diff --git a/README b/README
index 6ac8a6d..ca1ab90 100644
--- a/README
+++ b/README
@@ -24,7 +24,6 @@ FAQ
 
 Libraries
 
-- libfpga-test       autotest suite
 - libfpga-cores      reusable cores
 - libfpga-stdlib     standard design elements on top of libfpga-control
 - libfpga-control    programmatic access to libfpga-model
@@ -92,9 +91,13 @@ long-term:
 
 ChangeLog
 
+2012-09-24
+* First design verified: hello_world is an AND gate design which was
+  verified in a xc6slx9.
+
 2012-08-20
-* Beginning of full fidelity circle with model, floorplan, conversion from
-  and to bitstream and floorplan formats.
+* Beginning of full fidelity circle with model, floorplan, conversion
+  between floorplan and binary configuration formats.
 
 2012-06-03
 * Project started.
diff --git a/bit2fp.c b/bit2fp.c
index 78a6a4e..91eaeab 100644
--- a/bit2fp.c
+++ b/bit2fp.c
@@ -61,7 +61,7 @@ int main(int argc, char** argv)
 		return 0;
 	}
 
-	// read bitstream file
+	// read binary configuration file
 	{
 		FILE* fbits = fopen(argv[file_arg], "r");
 		if (!fbits) {
@@ -73,7 +73,7 @@ int main(int argc, char** argv)
 		if (rc) FAIL(rc);
 	}
 
-	// fill model from bitstream
+	// fill model from binary configuration
 	if (pull_model)
 		if ((rc = extract_model(&model, &config.bits))) FAIL(rc);