a little more iob support
This commit is contained in:
parent
7339cd9cc5
commit
0a212a5dc5
77
bit_frames.c
77
bit_frames.c
|
@ -92,6 +92,41 @@ struct extract_state
|
|||
struct sw_yxpos yx_pos[MAX_YX_SWITCHES]; // needs to be dynamically alloced...
|
||||
};
|
||||
|
||||
static int write_iobs(struct fpga_bits* bits, struct fpga_model* model)
|
||||
{
|
||||
int i, y, x, type_idx, part_idx, dev_idx, rc;
|
||||
struct fpga_device* dev;
|
||||
uint32_t* u32_p;
|
||||
const char* name;
|
||||
|
||||
for (i = 0; (name = fpga_enum_iob(model, i, &y, &x, &type_idx)); i++) {
|
||||
dev_idx = fpga_dev_idx(model, y, x, DEV_IOB, type_idx);
|
||||
if (dev_idx == NO_DEV) FAIL(EINVAL);
|
||||
dev = FPGA_DEV(model, y, x, dev_idx);
|
||||
if (!dev->instantiated)
|
||||
continue;
|
||||
|
||||
part_idx = find_iob_sitename(XC6SLX9, name);
|
||||
if (part_idx == -1) {
|
||||
HERE();
|
||||
continue;
|
||||
}
|
||||
|
||||
u32_p = (uint32_t*)
|
||||
&bits->d[IOB_DATA_START + part_idx*IOB_ENTRY_LEN];
|
||||
if (dev->u.iob.O_used) {
|
||||
u32_p[0] = 0x00000180;
|
||||
u32_p[1] = 0x06001100;
|
||||
} else if (dev->u.iob.I_mux == IMUX_I) {
|
||||
u32_p[0] = 0x00000107;
|
||||
u32_p[1] = 0x0B002400;
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
fail:
|
||||
return rc;
|
||||
}
|
||||
|
||||
static int extract_iobs(struct fpga_model* model, struct fpga_bits* bits)
|
||||
{
|
||||
int i, num_iobs, iob_y, iob_x, iob_idx, dev_idx, rc;
|
||||
|
@ -609,6 +644,44 @@ fail:
|
|||
return rc;
|
||||
}
|
||||
|
||||
static int write_logic(struct fpga_bits* bits, struct fpga_model* model)
|
||||
{
|
||||
int dev_idx, row, row_pos, rc;
|
||||
int x, y, byte_off;
|
||||
struct fpga_device* dev;
|
||||
uint8_t* u8_p;
|
||||
|
||||
for (x = LEFT_SIDE_WIDTH; x < model->x_width-RIGHT_SIDE_WIDTH; x++) {
|
||||
if (!is_atx(X_FABRIC_LOGIC_COL|X_CENTER_LOGIC_COL, model, x))
|
||||
continue;
|
||||
for (y = TOP_IO_TILES; y < model->y_height - BOT_IO_TILES; y++) {
|
||||
if (!has_device_type(model, y, x, DEV_LOGIC, LOGIC_M))
|
||||
continue;
|
||||
row = which_row(y, model);
|
||||
row_pos = pos_in_row(y, model);
|
||||
if (row == -1 || row_pos == -1 || row_pos == 8) {
|
||||
HERE();
|
||||
continue;
|
||||
}
|
||||
if (row_pos > 8) row_pos--;
|
||||
u8_p = get_first_minor(bits, row, model->x_major[x]);
|
||||
byte_off = row_pos * 8;
|
||||
if (row_pos >= 8) byte_off += HCLK_BYTES;
|
||||
|
||||
// X device
|
||||
dev_idx = fpga_dev_idx(model, y, x, DEV_LOGIC, DEV_LOGX);
|
||||
if (dev_idx == NO_DEV) FAIL(EINVAL);
|
||||
dev = FPGA_DEV(model, y, x, dev_idx);
|
||||
if (!dev->instantiated)
|
||||
continue;
|
||||
printf("y%02i x%02i major %i byte_off %i\n", y, x, model->x_major[x], byte_off);
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
fail:
|
||||
return rc;
|
||||
}
|
||||
|
||||
int write_model(struct fpga_bits* bits, struct fpga_model* model)
|
||||
{
|
||||
int i, rc;
|
||||
|
@ -617,6 +690,10 @@ int write_model(struct fpga_bits* bits, struct fpga_model* model)
|
|||
set_bitp(bits, &s_default_bits[i]);
|
||||
rc = write_switches(bits, model);
|
||||
if (rc) FAIL(rc);
|
||||
rc = write_iobs(bits, model);
|
||||
if (rc) FAIL(rc);
|
||||
rc = write_logic(bits, model);
|
||||
if (rc) FAIL(rc);
|
||||
return 0;
|
||||
fail:
|
||||
return rc;
|
||||
|
|
80
control.c
80
control.c
|
@ -108,50 +108,50 @@ static const struct iob_site xc6slx9_iob_right[] =
|
|||
{ 68, {"P75", "P74"}},
|
||||
};
|
||||
|
||||
const char* fpga_enum_iob(struct fpga_model* model, int enum_idx,
|
||||
int* y, int* x, dev_type_idx_t* type_idx)
|
||||
{
|
||||
if (enum_idx < 0) { HERE(); return 0; }
|
||||
|
||||
if (enum_idx < sizeof(xc6slx9_iob_top)/sizeof(xc6slx9_iob_top[0])*4) {
|
||||
*y = TOP_OUTER_ROW;
|
||||
*x = xc6slx9_iob_top[enum_idx/4].xy;
|
||||
*type_idx = enum_idx%4;
|
||||
return xc6slx9_iob_top[enum_idx/4].name[enum_idx%4];
|
||||
}
|
||||
enum_idx -= sizeof(xc6slx9_iob_top)/sizeof(xc6slx9_iob_top[0])*4;
|
||||
if (enum_idx < sizeof(xc6slx9_iob_bottom)/sizeof(xc6slx9_iob_bottom[0])*4) {
|
||||
*y = model->y_height - BOT_OUTER_ROW;
|
||||
*x = xc6slx9_iob_bottom[enum_idx/4].xy;
|
||||
*type_idx = enum_idx%4;
|
||||
return xc6slx9_iob_bottom[enum_idx/4].name[enum_idx%4];
|
||||
}
|
||||
enum_idx -= sizeof(xc6slx9_iob_bottom)/sizeof(xc6slx9_iob_bottom[0])*4;
|
||||
if (enum_idx < sizeof(xc6slx9_iob_left)/sizeof(xc6slx9_iob_left[0])*2) {
|
||||
*y = xc6slx9_iob_left[enum_idx/2].xy;
|
||||
*x = LEFT_OUTER_COL;
|
||||
*type_idx = enum_idx%2;
|
||||
return xc6slx9_iob_left[enum_idx/2].name[enum_idx%2];
|
||||
}
|
||||
enum_idx -= sizeof(xc6slx9_iob_left)/sizeof(xc6slx9_iob_left[0])*2;
|
||||
if (enum_idx < sizeof(xc6slx9_iob_right)/sizeof(xc6slx9_iob_right[0])*2) {
|
||||
*y = xc6slx9_iob_right[enum_idx/2].xy;
|
||||
*x = model->x_width-RIGHT_OUTER_O;
|
||||
*type_idx = enum_idx%2;
|
||||
return xc6slx9_iob_right[enum_idx/2].name[enum_idx%2];
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
int fpga_find_iob(struct fpga_model* model, const char* sitename,
|
||||
int* y, int* x, dev_type_idx_t* idx)
|
||||
{
|
||||
int i, j;
|
||||
const char* name;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < sizeof(xc6slx9_iob_top)/sizeof(xc6slx9_iob_top[0]); i++) {
|
||||
for (j = 0; j < 4; j++) {
|
||||
if (!strcmp(xc6slx9_iob_top[i].name[j], sitename)) {
|
||||
*y = TOP_OUTER_ROW;
|
||||
*x = xc6slx9_iob_top[i].xy;
|
||||
*idx = j;
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
for (i = 0; i < sizeof(xc6slx9_iob_bottom)/sizeof(xc6slx9_iob_bottom[0]); i++) {
|
||||
for (j = 0; j < 4; j++) {
|
||||
if (!strcmp(xc6slx9_iob_bottom[i].name[j], sitename)) {
|
||||
*y = model->y_height-BOT_OUTER_ROW;
|
||||
*x = xc6slx9_iob_bottom[i].xy;
|
||||
*idx = j;
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
for (i = 0; i < sizeof(xc6slx9_iob_left)/sizeof(xc6slx9_iob_left[0]); i++) {
|
||||
for (j = 0; j < 2; j++) {
|
||||
if (!strcmp(xc6slx9_iob_left[i].name[j], sitename)) {
|
||||
*y = xc6slx9_iob_left[i].xy;
|
||||
*x = LEFT_OUTER_COL;
|
||||
*idx = j;
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
for (i = 0; i < sizeof(xc6slx9_iob_right)/sizeof(xc6slx9_iob_right[0]); i++) {
|
||||
for (j = 0; j < 2; j++) {
|
||||
if (!strcmp(xc6slx9_iob_right[i].name[j], sitename)) {
|
||||
*y = xc6slx9_iob_right[i].xy;
|
||||
*x = model->x_width-RIGHT_OUTER_O;
|
||||
*idx = j;
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
for (i = 0; (name = fpga_enum_iob(model, i, y, x, idx)); i++) {
|
||||
if (!strcmp(name, sitename))
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
|
|
@ -5,9 +5,10 @@
|
|||
// For details see the UNLICENSE file at the root of the source tree.
|
||||
//
|
||||
|
||||
const char* fpga_enum_iob(struct fpga_model* model, int enum_idx,
|
||||
int* y, int* x, dev_type_idx_t* type_idx);
|
||||
int fpga_find_iob(struct fpga_model* model, const char* sitename,
|
||||
int* y, int* x, dev_type_idx_t* idx);
|
||||
|
||||
const char* fpga_iob_sitename(struct fpga_model* model, int y, int x,
|
||||
dev_type_idx_t idx);
|
||||
|
||||
|
|
17
parts.c
17
parts.c
|
@ -71,6 +71,23 @@ const char* get_iob_sitename(int idcode, int idx)
|
|||
return iob_xc6slx9_sitenames[idx];
|
||||
}
|
||||
|
||||
int find_iob_sitename(int idcode, const char* name)
|
||||
{
|
||||
int i;
|
||||
|
||||
if ((idcode & IDCODE_MASK) != XC6SLX9) {
|
||||
HERE();
|
||||
return -1;
|
||||
}
|
||||
for (i = 0; i < sizeof(iob_xc6slx9_sitenames)
|
||||
/sizeof(iob_xc6slx9_sitenames[0]); i++) {
|
||||
if (iob_xc6slx9_sitenames[i]
|
||||
&& !strcmp(iob_xc6slx9_sitenames[i], name))
|
||||
return i;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
int get_major_minors(int idcode, int major)
|
||||
{
|
||||
static const int minors_per_major[] = // for slx9
|
||||
|
|
2
parts.h
2
parts.h
|
@ -46,6 +46,8 @@ enum major_type get_major_type(int idcode, int major);
|
|||
|
||||
int get_num_iobs(int idcode);
|
||||
const char* get_iob_sitename(int idcode, int idx);
|
||||
// returns -1 if sitename not found
|
||||
int find_iob_sitename(int idcode, const char* name);
|
||||
|
||||
// The routing bitpos is relative to a tile, i.e. major (x)
|
||||
// and row/v64_i (y) are defined outside.
|
||||
|
|
Loading…
Reference in New Issue
Block a user