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cleanup

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This commit is contained in:
Wolfgang Spraul 2012-08-23 10:02:56 +02:00
parent a88c4f1835
commit 44e9688409
8 changed files with 332 additions and 344 deletions
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179
autotest.c
View File

@ -103,87 +103,22 @@ fail:
return rc; return rc;
} }
static const char* s_spaces = " "; int fpga_switch_to_yx(struct switch_to_yx* p)
static int printf_switchtree(struct fpga_model* model, int y, int x,
const char* start, int indent)
{ {
int i, idx, conn_to_y, conn_to_x, num_dests, connpt_dests_o, rc; struct sw_conns conns = { .model = p->model, .y = p->y, .x = p->x,
const char* to_str; .start_switch = p->start_switch };
char tmp_str[128]; while (fpga_switch_conns(&conns) != NO_CONN) {
if (is_atyx(p->yx_req, p->model, conns.dest_y, conns.dest_x)) {
// printf("%.*sy%02i x%02i %s\n", indent, s_spaces, y, x, start); memcpy(p->chain, conns.chain.chain,
#if 0 conns.chain.chain_size*sizeof(*p->chain));
num_dests = fpga_connpt_lookup(model, y, x, start, &connpt_dests_o); p->chain_size = conns.chain.chain_size;
for (i = 0; i < num_dests; i++) { p->dest_y = conns.dest_y;
if (!i) p->dest_x = conns.dest_x;
printf("%.*s| connects to:\n", indent, s_spaces); p->dest_connpt = conns.dest_str_i;
to_str = fpga_conn_dest(model, y, x,
connpt_dests_o + i, &conn_to_y, &conn_to_x);
printf("%.*s y%02i x%02i %s\n", indent, s_spaces,
conn_to_y, conn_to_x, to_str);
}
idx = fpga_switch_first(model, y, x, start, SW_TO);
if (idx != NO_SWITCH)
printf("%.*s| can be switched from:\n", indent, s_spaces);
while (idx != NO_SWITCH) {
to_str = fpga_switch_str(model, y, x, idx, SW_FROM);
printf("%.*s %s %s\n", indent, s_spaces,
fpga_switch_is_bidir(model, y, x, idx) ? "<->" : "<-",
to_str);
idx = fpga_switch_next(model, y, x, idx, SW_TO);
}
#endif
idx = fpga_switch_first(model, y, x, start, SW_FROM);
if (idx != NO_SWITCH)
printf("%.*s| switches to:\n", indent, s_spaces);
while (idx != NO_SWITCH) {
printf("%.*s %s\n", indent, s_spaces,
fmt_sw(model, y, x, idx, SW_FROM));
to_str = fpga_switch_str(model, y, x, idx, SW_TO);
#if 0
printf("%.*s %s %s\n", indent, s_spaces,
fpga_switch_is_bidir(model, y, x, idx) ? "<->" : "->",
to_str);
#endif
strcpy(tmp_str, to_str);
rc = printf_switchtree(model, y, x, tmp_str, indent+2);
if (rc) FAIL(rc);
idx = fpga_switch_next(model, y, x, idx, SW_FROM);
}
return 0;
fail:
return rc;
}
void printf_swconns(struct fpga_model* model, int y, int x, const char* sw)
{
struct swchain_conns conns =
{ .model = model, .y = y, .x = x, .start_switch = sw };
while (fpga_switch_conns_enum(&conns) != NO_CONN) {
printf("sw %s conn y%02i x%02i %s\n", fmt_swchain(model, y, x,
conns.chain.chain, conns.chain.chain_size),
conns.dest_y, conns.dest_x, conns.dest_str);
}
}
// return dest_y, dest_x, dest_str
int fpga_switch_to_yx(int yx_req, struct fpga_model* model, int y, int x,
const char* start_switch, swidx_t* sw_chain, int* sw_chain_size)
{
struct swchain_conns conns = { .model = model, .y = y, .x = x,
.start_switch = start_switch };
while (fpga_switch_conns_enum(&conns) != NO_CONN) {
if (is_atyx(yx_req, model, conns.dest_y, conns.dest_x)) {
memcpy(sw_chain, conns.chain.chain,
conns.chain.chain_size*sizeof(*sw_chain));
*sw_chain_size = conns.chain.chain_size;
return 0; return 0;
} }
} }
*sw_chain_size = 0; p->chain_size = 0;
return 0; return 0;
} }
@ -193,11 +128,7 @@ int main(int argc, char** argv)
struct fpga_device* P46_dev, *P48_dev, *logic_dev; struct fpga_device* P46_dev, *P48_dev, *logic_dev;
int P46_y, P46_x, P46_idx, P48_y, P48_x, P48_idx, rc; int P46_y, P46_x, P46_idx, P48_y, P48_x, P48_idx, rc;
struct test_state tstate; struct test_state tstate;
// struct sw_chain chain; struct switch_to_yx switch_to;
// struct swchain_conns conns;
char tmp_str[128];
swidx_t switch_chain[MAX_SW_CHAIN_SIZE];
int switch_chain_size;
printf("\n"); printf("\n");
printf("O fpgatools automatic test suite. Be welcome and be " printf("O fpgatools automatic test suite. Be welcome and be "
@ -255,69 +186,37 @@ int main(int argc, char** argv)
rc = diff_printf(&tstate); rc = diff_printf(&tstate);
if (rc) FAIL(rc); if (rc) FAIL(rc);
rc = fpga_switch_to_yx(YX_DEV_ILOGIC, &model, P46_y, P46_x, printf("P46 I pinw %s\n", strarray_lookup(&model.str, P46_dev->iob.pinw_out_I));
P46_dev->iob.pinw_out_I, switch_chain, &switch_chain_size);
switch_to.yx_req = YX_DEV_ILOGIC;
switch_to.model = &model;
switch_to.y = P46_y;
switch_to.x = P46_x;
switch_to.start_switch = P46_dev->iob.pinw_out_I;
rc = fpga_switch_to_yx(&switch_to);
if (rc) FAIL(rc); if (rc) FAIL(rc);
// todo: needs to return dest_y, dest_x, dest_connpt printf("%s\n", fmt_swchain(&model, switch_to.y, switch_to.x, switch_to.chain, switch_to.chain_size));
printf("%s\n", fmt_swchain(&model, P46_y, P46_x, switch_chain, switch_chain_size)); switch_to.yx_req = YX_ROUTING_TILE;
switch_to.y = switch_to.dest_y;
switch_to.x = switch_to.dest_x;
switch_to.start_switch = switch_to.dest_connpt;
rc = fpga_switch_to_yx(&switch_to);
if (rc) FAIL(rc);
printf("%s\n", fmt_swchain(&model, switch_to.y, switch_to.x, switch_to.chain, switch_to.chain_size));
#if 0 switch_to.yx_req = YX_ROUTING_TO_FABLOGIC;
printf("P46 I pinw %s\n", P46_dev->iob.pinw_out_I); switch_to.y = switch_to.dest_y;
switch_to.x = switch_to.dest_x;
switch_to.start_switch = switch_to.dest_connpt;
rc = fpga_switch_to_yx(&switch_to);
if (rc) FAIL(rc);
printf("%s\n", fmt_swchain(&model, switch_to.y, switch_to.x, switch_to.chain, switch_to.chain_size));
printf_swconns(&model, P46_y, P46_x, P46_dev->iob.pinw_out_I); // todo: result is NN2 but NR1 would be closer
// printf_swconns(&model, P46_y, P46_x, P46_dev->iob.pinw_out_I);
printf("P48 O pinw %s\n", strarray_lookup(&model.str, P48_dev->iob.pinw_in_O));
conns.model = &model;
conns.y = P46_y;
conns.x = P46_x;
conns.start_switch = P46_dev->iob.pinw_out_I;
while (fpga_switch_conns_enum(&conns) != NO_CONN) {
if (is_atyx(YX_DEV_ILOGIC, &model, conns.dest_y, conns.dest_x)) {
struct swchain_conns conns2;
printf("conn chain_size %i connpt_o %i num_dests %i i %i y %i x %i str %s\n",
conns.chain.chain_size, conns.connpt_dest_start,
conns.num_dests, conns.dest_i, conns.dest_y, conns.dest_x, conns.dest_str);
strcpy(tmp_str, conns.dest_str);
conns2.model = &model;
conns2.y = conns.dest_y;
conns2.x = conns.dest_x;
conns2.start_switch = tmp_str;
while (fpga_switch_conns_enum(&conns2) != NO_CONN) {
if (is_atyx(YX_ROUTING_TILE, &model, conns2.dest_y, conns2.dest_x)) {
struct swchain_conns conns3;
struct sw_chain chain3;
printf("conn2 chain_size %i connpt_o %i num_dests %i i %i y %i x %i str %s\n",
conns2.chain.chain_size, conns2.connpt_dest_start,
conns2.num_dests, conns2.dest_i, conns2.dest_y, conns2.dest_x, conns2.dest_str);
strcpy(tmp_str, conns2.dest_str);
printf_swconns(&model, conns2.dest_y, conns2.dest_x, tmp_str);
conns3.model = &model;
conns3.y = conns2.dest_y;
conns3.x = conns2.dest_x;
conns3.start_switch = tmp_str;
while (fpga_switch_conns_enum(&conns3) != NO_CONN) {
if (is_atyx(YX_ROUTING_TO_FABLOGIC, &model, conns3.dest_y, conns3.dest_x)) {
printf("route to y%02i x%02i\n", conns3.dest_y, conns3.dest_x);
break;
}
}
break;
}
}
break;
}
}
#endif
printf("P48 O pinw %s\n", P48_dev->iob.pinw_in_O);
printf("\n"); printf("\n");
printf("O Test suite completed.\n"); printf("O Test suite completed.\n");

104
control.c
View File

@ -262,21 +262,19 @@ int fpga_set_lut(struct fpga_model* model, struct fpga_device* dev,
return 0; return 0;
} }
int fpga_connpt_lookup(struct fpga_model* model, int y, int x, int fpga_connpt_find(struct fpga_model* model, int y, int x,
const char* name, int* connpt_dests_o) str16_t name_i, int* connpt_dests_o)
{ {
struct fpga_tile* tile; struct fpga_tile* tile;
int i, rc, connpt_i, num_dests; int i, num_dests;
rc = strarray_find(&model->str, name, &connpt_i);
if (rc) FAIL(rc);
tile = YX_TILE(model, y, x); tile = YX_TILE(model, y, x);
for (i = 0; i < tile->num_conn_point_names; i++) { for (i = 0; i < tile->num_conn_point_names; i++) {
if (tile->conn_point_names[i*2+1] == connpt_i) if (tile->conn_point_names[i*2+1] == name_i)
break; break;
} }
if (i >= tile->num_conn_point_names) if (i >= tile->num_conn_point_names)
FAIL(EINVAL); { HERE(); goto fail; }
*connpt_dests_o = tile->conn_point_names[i*2]; *connpt_dests_o = tile->conn_point_names[i*2];
if (i < tile->num_conn_point_names-1) if (i < tile->num_conn_point_names-1)
@ -288,47 +286,27 @@ fail:
return 0; return 0;
} }
#define NUM_CONN_DEST_BUFS 16 void fpga_conn_dest(struct fpga_model* model, int y, int x,
#define CONN_DEST_BUF_SIZE 128 int connpt_dest_idx, int* dest_y, int* dest_x, str16_t* str_i)
const char* fpga_conn_dest(struct fpga_model* model, int y, int x,
int connpt_dest_idx, int* dest_y, int* dest_x)
{ {
static char conn_dest_buf[NUM_CONN_DEST_BUFS][CONN_DEST_BUF_SIZE];
static int last_buf = 0;
struct fpga_tile* tile; struct fpga_tile* tile;
const char* hash_str;
tile = YX_TILE(model, y, x); tile = YX_TILE(model, y, x);
if (connpt_dest_idx < 0 if (connpt_dest_idx < 0
|| connpt_dest_idx >= tile->num_conn_point_dests) { || connpt_dest_idx >= tile->num_conn_point_dests) {
HERE(); HERE();
return 0; return;
} }
*dest_x = tile->conn_point_dests[connpt_dest_idx*3]; *dest_x = tile->conn_point_dests[connpt_dest_idx*3];
*dest_y = tile->conn_point_dests[connpt_dest_idx*3+1]; *dest_y = tile->conn_point_dests[connpt_dest_idx*3+1];
*str_i = tile->conn_point_dests[connpt_dest_idx*3+2];
hash_str = strarray_lookup(&model->str,
tile->conn_point_dests[connpt_dest_idx*3+2]);
if (!hash_str || (strlen(hash_str) >= CONN_DEST_BUF_SIZE)) {
HERE();
return 0;
}
last_buf = (last_buf+1)%NUM_CONN_DEST_BUFS;
strcpy(conn_dest_buf[last_buf], hash_str);
return conn_dest_buf[last_buf];
} }
swidx_t fpga_switch_first(struct fpga_model* model, int y, int x, swidx_t fpga_switch_first(struct fpga_model* model, int y, int x,
const char* name, int from_to) str16_t name_i, int from_to)
{ {
struct fpga_tile* tile; struct fpga_tile* tile;
int rc, i, connpt_o, name_i; int i, connpt_o;
rc = strarray_find(&model->str, name, &name_i);
if (rc) FAIL(rc);
// Finds the first switch either from or to the name given. // Finds the first switch either from or to the name given.
tile = YX_TILE(model, y, x); tile = YX_TILE(model, y, x);
@ -338,8 +316,6 @@ swidx_t fpga_switch_first(struct fpga_model* model, int y, int x,
break; break;
} }
return (i >= tile->num_switches) ? NO_SWITCH : i; return (i >= tile->num_switches) ? NO_SWITCH : i;
fail:
return NO_SWITCH;
} }
static swidx_t fpga_switch_search(struct fpga_model* model, int y, int x, static swidx_t fpga_switch_search(struct fpga_model* model, int y, int x,
@ -403,6 +379,19 @@ const char* fpga_switch_str(struct fpga_model* model, int y, int x,
return connpt_str(model, y, x, SW_I(sw, from_to)); return connpt_str(model, y, x, SW_I(sw, from_to));
} }
str16_t fpga_switch_str_i(struct fpga_model* model, int y, int x,
swidx_t swidx, int from_to)
{
struct fpga_tile* tile;
uint32_t sw;
int connpt_o;
tile = YX_TILE(model, y, x);
sw = tile->switches[swidx];
connpt_o = SW_I(sw, from_to);
return tile->conn_point_names[connpt_o*2+1];
}
int fpga_switch_is_bidir(struct fpga_model* model, int y, int x, int fpga_switch_is_bidir(struct fpga_model* model, int y, int x,
swidx_t swidx) swidx_t swidx)
{ {
@ -480,17 +469,18 @@ const char* fmt_swchain(struct fpga_model* model, int y, int x,
return buf[last_buf]; return buf[last_buf];
} }
int fpga_switch_chain_enum(struct sw_chain* chain) int fpga_switch_chain(struct sw_chain* chain)
{ {
swidx_t idx; swidx_t idx;
struct fpga_tile* tile; struct fpga_tile* tile;
int child_from_to, i; int child_from_to, i;
if (chain->start_switch != SW_CHAIN_NEXT) { if (chain->start_switch != STRIDX_NO_ENTRY) {
idx = fpga_switch_first(chain->model, chain->y, chain->x, idx = fpga_switch_first(chain->model, chain->y, chain->x,
chain->start_switch, chain->from_to); chain->start_switch, chain->from_to);
chain->start_switch = SW_CHAIN_NEXT; chain->start_switch = STRIDX_NO_ENTRY;
if (idx == NO_SWITCH) { if (idx == NO_SWITCH) {
HERE(); // unusual and is probably some internal error
chain->chain_size = 0; chain->chain_size = 0;
return NO_SWITCH; return NO_SWITCH;
} }
@ -529,7 +519,7 @@ int fpga_switch_chain_enum(struct sw_chain* chain)
tile = YX_TILE(chain->model, chain->y, chain->x); tile = YX_TILE(chain->model, chain->y, chain->x);
while (1) { while (1) {
idx = fpga_switch_first(chain->model, chain->y, chain->x, idx = fpga_switch_first(chain->model, chain->y, chain->x,
fpga_switch_str(chain->model, chain->y, chain->x, fpga_switch_str_i(chain->model, chain->y, chain->x,
chain->chain[chain->chain_size-1], !chain->from_to), chain->chain[chain->chain_size-1], !chain->from_to),
chain->from_to); chain->from_to);
child_from_to = SW_I(tile->switches[chain->chain[chain->chain_size-1]], child_from_to = SW_I(tile->switches[chain->chain[chain->chain_size-1]],
@ -571,43 +561,45 @@ internal_error:
return NO_SWITCH; return NO_SWITCH;
} }
int fpga_switch_conns_enum(struct swchain_conns* conns) int fpga_switch_conns(struct sw_conns* conns)
{ {
const char* end_of_chain_str; str16_t end_of_chain_str;
if (conns->start_switch != SW_CHAIN_NEXT) { if (conns->start_switch != STRIDX_NO_ENTRY) {
conns->chain.model = conns->model; conns->chain.model = conns->model;
conns->chain.y = conns->y; conns->chain.y = conns->y;
conns->chain.x = conns->x; conns->chain.x = conns->x;
conns->chain.start_switch = conns->start_switch; conns->chain.start_switch = conns->start_switch;
conns->chain.from_to = SW_FROM; conns->chain.from_to = SW_FROM;
conns->start_switch = SW_CHAIN_NEXT; conns->start_switch = STRIDX_NO_ENTRY;
conns->num_dests = 0; conns->num_dests = 0;
conns->dest_i = 0; conns->dest_i = 0;
} }
else if (!conns->chain.chain_size) { HERE(); goto internal_error; } else if (!conns->chain.chain_size) { HERE(); goto internal_error; }
while (conns->dest_i >= conns->num_dests) { while (conns->dest_i >= conns->num_dests) {
fpga_switch_chain_enum(&conns->chain); fpga_switch_chain(&conns->chain);
if (conns->chain.chain_size == 0) if (conns->chain.chain_size == 0)
return NO_CONN; return NO_CONN;
end_of_chain_str = fpga_switch_str(conns->model, end_of_chain_str = fpga_switch_str_i(conns->model,
conns->y, conns->x, conns->y, conns->x,
conns->chain.chain[conns->chain.chain_size-1], conns->chain.chain[conns->chain.chain_size-1],
SW_TO); SW_TO);
if (!end_of_chain_str) { HERE(); goto internal_error; } if (end_of_chain_str == STRIDX_NO_ENTRY)
{ HERE(); goto internal_error; }
conns->dest_i = 0; conns->dest_i = 0;
conns->num_dests = fpga_connpt_lookup(conns->model, conns->num_dests = fpga_connpt_find(conns->model,
conns->y, conns->x, end_of_chain_str, conns->y, conns->x, end_of_chain_str,
&conns->connpt_dest_start); &conns->connpt_dest_start);
if (conns->num_dests) if (conns->num_dests)
break; break;
} }
conns->dest_str = fpga_conn_dest(conns->model, conns->y, conns->x, fpga_conn_dest(conns->model, conns->y, conns->x,
conns->connpt_dest_start + conns->dest_i, conns->connpt_dest_start + conns->dest_i,
&conns->dest_y, &conns->dest_x); &conns->dest_y, &conns->dest_x, &conns->dest_str_i);
if (!conns->dest_str) { HERE(); goto internal_error; } if (conns->dest_str_i == STRIDX_NO_ENTRY)
{ HERE(); goto internal_error; }
conns->dest_i++; conns->dest_i++;
return 0; return 0;
@ -615,3 +607,15 @@ internal_error:
conns->chain.chain_size = 0; conns->chain.chain_size = 0;
return NO_CONN; return NO_CONN;
} }
void printf_swconns(struct fpga_model* model, int y, int x, str16_t sw)
{
struct sw_conns conns =
{ .model = model, .y = y, .x = x, .start_switch = sw };
while (fpga_switch_conns(&conns) != NO_CONN) {
printf("sw %s conn y%02i x%02i %s\n", fmt_swchain(model, y, x,
conns.chain.chain, conns.chain.chain_size),
conns.dest_y, conns.dest_x,
strarray_lookup(&model->str, conns.dest_str_i));
}
}

52
control.h
View File

@ -34,17 +34,17 @@ int fpga_set_lut(struct fpga_model* model, struct fpga_device* dev,
// returns the number of outgoing connections for the // returns the number of outgoing connections for the
// connection point given with 'name', and the connection // connection point given with 'name', and the connection
// point's first dest offset in connpt_dests_o. // point's first dest offset in connpt_dests_o.
int fpga_connpt_lookup(struct fpga_model* model, int y, int x, int fpga_connpt_find(struct fpga_model* model, int y, int x,
const char* name, int* connpt_dests_o); str16_t name_i, int* connpt_dests_o);
const char* fpga_conn_dest(struct fpga_model* model, int y, int x, void fpga_conn_dest(struct fpga_model* model, int y, int x,
int connpt_dest_idx, int* dest_y, int* dest_x); int connpt_dest_idx, int* dest_y, int* dest_x, str16_t* str_i);
typedef int swidx_t; // swidx_t is an index into the uint32_t switches array typedef int swidx_t; // swidx_t is an index into the uint32_t switches array
// returns a switch index, or -1 (NO_SWITCH) if no switch was found // returns a switch index, or -1 (NO_SWITCH) if no switch was found
swidx_t fpga_switch_first(struct fpga_model* model, int y, int x, swidx_t fpga_switch_first(struct fpga_model* model, int y, int x,
const char* name, int from_to); str16_t name_i, int from_to);
swidx_t fpga_switch_next(struct fpga_model* model, int y, int x, swidx_t fpga_switch_next(struct fpga_model* model, int y, int x,
swidx_t last, int from_to); swidx_t last, int from_to);
swidx_t fpga_switch_backtofirst(struct fpga_model* model, int y, int x, swidx_t fpga_switch_backtofirst(struct fpga_model* model, int y, int x,
@ -52,6 +52,8 @@ swidx_t fpga_switch_backtofirst(struct fpga_model* model, int y, int x,
const char* fpga_switch_str(struct fpga_model* model, int y, int x, const char* fpga_switch_str(struct fpga_model* model, int y, int x,
swidx_t swidx, int from_to); swidx_t swidx, int from_to);
str16_t fpga_switch_str_i(struct fpga_model* model, int y, int x,
swidx_t swidx, int from_to);
int fpga_switch_is_bidir(struct fpga_model* model, int y, int x, int fpga_switch_is_bidir(struct fpga_model* model, int y, int x,
swidx_t swidx); swidx_t swidx);
int fpga_switch_is_enabled(struct fpga_model* model, int y, int x, int fpga_switch_is_enabled(struct fpga_model* model, int y, int x,
@ -66,8 +68,7 @@ const char* fmt_sw(struct fpga_model* model, int y, int x,
const char* fmt_swchain(struct fpga_model* model, int y, int x, const char* fmt_swchain(struct fpga_model* model, int y, int x,
swidx_t* sw, int sw_size); swidx_t* sw, int sw_size);
#define SW_CHAIN_NEXT 0 // use for name #define MAX_SW_CHAIN_SIZE 32 // largest seen so far was 10
#define MAX_SW_CHAIN_SIZE 32 // largest seen so far was 10
struct sw_chain struct sw_chain
{ {
@ -75,8 +76,8 @@ struct sw_chain
struct fpga_model* model; struct fpga_model* model;
int y; int y;
int x; int x;
// start_switch will be set to SW_CHAIN_NEXT (0) after the first call // start_switch will be set to STRIDX_NO_ENTRY (0) after the first call
const char* start_switch; str16_t start_switch;
int from_to; int from_to;
// return values: // return values:
@ -90,16 +91,16 @@ struct sw_chain
// Returns 0 if another switch is returned in chain, or // Returns 0 if another switch is returned in chain, or
// NO_SWITCH (-1) if there is no other switch. // NO_SWITCH (-1) if there is no other switch.
// chain_size set to 0 when there are no more switches in the tree // chain_size set to 0 when there are no more switches in the tree
int fpga_switch_chain_enum(struct sw_chain* chain); int fpga_switch_chain(struct sw_chain* chain);
struct swchain_conns struct sw_conns
{ {
// start and recurring values: // start and recurring values:
struct fpga_model* model; struct fpga_model* model;
int y; int y;
int x; int x;
// start_switch will be set to SW_CHAIN_NEXT (0) after first call // start_switch will be set to STRIDX_NO_ENTRY (0) after first call
const char* start_switch; str16_t start_switch;
// return values: // return values:
struct sw_chain chain; struct sw_chain chain;
@ -108,9 +109,30 @@ struct swchain_conns
int dest_i; int dest_i;
int dest_y; int dest_y;
int dest_x; int dest_x;
const char* dest_str; str16_t dest_str_i;
}; };
// Returns 0 if another connection is returned in conns, or // Returns 0 if another connection is returned in conns, or
// NO_CONN (-1) if there is no other connection. // NO_CONN (-1) if there is no other connection.
int fpga_switch_conns_enum(struct swchain_conns* conns); int fpga_switch_conns(struct sw_conns* conns);
void printf_swconns(struct fpga_model* model, int y, int x, str16_t sw);
struct switch_to_yx
{
// input:
int yx_req; // YX_-value
struct fpga_model* model;
int y;
int x;
str16_t start_switch;
// output:
swidx_t chain[MAX_SW_CHAIN_SIZE];
int chain_size;
int dest_y;
int dest_x;
str16_t dest_connpt;
};
int fpga_switch_to_yx(struct switch_to_yx* p);

7
helper.h
View File

@ -17,11 +17,12 @@
#define MACRO_STR(arg) #arg #define MACRO_STR(arg) #arg
#define OUT_OF_MEM() { fprintf(stderr, \ #define OUT_OF_MEM() { fprintf(stderr, \
"Out of memory in %s:%i\n", __FILE__, __LINE__); } "#E Out of memory in %s:%i\n", __FILE__, __LINE__); }
#define EXIT(expr) if (expr) { fprintf(stderr, \ #define EXIT(expr) if (expr) { fprintf(stderr, \
"Internal error in %s:%i\n", __FILE__, __LINE__); exit(1); } "#E Internal error in %s:%i\n", __FILE__, __LINE__); exit(1); }
#define HERE() fprintf(stderr, "%s:%i\n", __FILE__, __LINE__) #define HERE() fprintf(stderr, "#E Internal error in %s:%i\n", \
__FILE__, __LINE__)
#define FAIL(code) do { HERE(); rc = (code); goto fail; } while (0) #define FAIL(code) do { HERE(); rc = (code); goto fail; } while (0)
#define XOUT() do { HERE(); goto xout; } while (0) #define XOUT() do { HERE(); goto xout; } while (0)

22
model.h
View File

@ -352,18 +352,16 @@ enum { ITERM_NONE = 1, ITERM_UNTUNED_25, ITERM_UNTUNED_50,
enum { OTERM_NONE = 1, OTERM_UNTUNED_25, OTERM_UNTUNED_50, enum { OTERM_NONE = 1, OTERM_UNTUNED_25, OTERM_UNTUNED_50,
OTERM_UNTUNED_75 }; OTERM_UNTUNED_75 };
typedef char PINW_NAME[32];
struct fpgadev_iob struct fpgadev_iob
{ {
PINW_NAME pinw_in_O; str16_t pinw_in_O;
PINW_NAME pinw_in_T; str16_t pinw_in_T;
PINW_NAME pinw_out_I; str16_t pinw_out_I;
PINW_NAME pinw_out_PADOUT; str16_t pinw_out_PADOUT;
PINW_NAME pinw_out_PCI_RDY; str16_t pinw_out_PCI_RDY;
PINW_NAME pinw_in_DIFFI_IN; str16_t pinw_in_DIFFI_IN;
PINW_NAME pinw_in_DIFFO_IN; str16_t pinw_in_DIFFO_IN;
PINW_NAME pinw_out_DIFFO_OUT; str16_t pinw_out_DIFFO_OUT;
int subtype; // IOBM or IOBS int subtype; // IOBM or IOBS
IOSTANDARD istandard; IOSTANDARD istandard;
@ -461,8 +459,10 @@ const char* wpref(struct fpga_model* model, int y, int x, const char* wire_name)
char next_non_whitespace(const char* s); char next_non_whitespace(const char* s);
char last_major(const char* str, int cur_o); char last_major(const char* str, int cur_o);
int has_connpt(struct fpga_model* model, int y, int x, const char* name); int has_connpt(struct fpga_model* model, int y, int x, const char* name);
// add_connpt_name(): name_i and conn_point_o can be 0
int add_connpt_name(struct fpga_model* model, int y, int x, int add_connpt_name(struct fpga_model* model, int y, int x,
const char* connpt_name, int dup_warn); const char* connpt_name, int warn_if_duplicate, uint16_t* name_i,
int* conn_point_o);
int has_device(struct fpga_model* model, int y, int x, int dev); int has_device(struct fpga_model* model, int y, int x, int dev);
int has_device_type(struct fpga_model* model, int y, int x, int dev, int subtype); int has_device_type(struct fpga_model* model, int y, int x, int dev, int subtype);

66
model_devices.c
View File

@ -40,6 +40,7 @@ static int init_iob(struct fpga_model* model, int y, int x,
struct fpga_tile* tile; struct fpga_tile* tile;
const char* prefix; const char* prefix;
int type_idx, rc; int type_idx, rc;
char tmp_str[128];
tile = YX_TILE(model, y, x); tile = YX_TILE(model, y, x);
tile->devs[idx].iob.subtype = subtype; tile->devs[idx].iob.subtype = subtype;
@ -54,56 +55,51 @@ static int init_iob(struct fpga_model* model, int y, int x,
prefix = "RIOB"; prefix = "RIOB";
else else
FAIL(EINVAL); FAIL(EINVAL);
snprintf(tile->devs[idx].iob.pinw_in_O,
sizeof(tile->devs[idx].iob.pinw_in_O), snprintf(tmp_str, sizeof(tmp_str), "%s_O%i_PINW", prefix, type_idx);
"%s_O%i_PINW", prefix, type_idx); rc = add_connpt_name(model, y, x, tmp_str, /*dup_warn*/ 1,
rc = add_connpt_name(model, y, x, tile->devs[idx].iob.pinw_in_O, /*dup_warn*/ 1); &tile->devs[idx].iob.pinw_in_O, 0);
if (rc) FAIL(rc); if (rc) FAIL(rc);
snprintf(tile->devs[idx].iob.pinw_in_T,
sizeof(tile->devs[idx].iob.pinw_in_T), snprintf(tmp_str, sizeof(tmp_str), "%s_T%i_PINW", prefix, type_idx);
"%s_T%i_PINW", prefix, type_idx); rc = add_connpt_name(model, y, x, tmp_str, /*dup_warn*/ 1,
rc = add_connpt_name(model, y, x, tile->devs[idx].iob.pinw_in_T, /*dup_warn*/ 1); &tile->devs[idx].iob.pinw_in_T, 0);
if (rc) FAIL(rc); if (rc) FAIL(rc);
snprintf(tile->devs[idx].iob.pinw_out_I, snprintf(tmp_str, sizeof(tmp_str), "%s_IBUF%i_PINW", prefix, type_idx);
sizeof(tile->devs[idx].iob.pinw_out_I), rc = add_connpt_name(model, y, x, tmp_str, /*dup_warn*/ 1,
"%s_IBUF%i_PINW", prefix, type_idx); &tile->devs[idx].iob.pinw_out_I, 0);
rc = add_connpt_name(model, y, x, tile->devs[idx].iob.pinw_out_I, /*dup_warn*/ 1);
if (rc) FAIL(rc); if (rc) FAIL(rc);
snprintf(tile->devs[idx].iob.pinw_out_PADOUT, snprintf(tmp_str, sizeof(tmp_str), "%s_PADOUT%i", prefix, type_idx);
sizeof(tile->devs[idx].iob.pinw_out_PADOUT), rc = add_connpt_name(model, y, x, tmp_str, /*dup_warn*/ 1,
"%s_PADOUT%i", prefix, type_idx); &tile->devs[idx].iob.pinw_out_PADOUT, 0);
rc = add_connpt_name(model, y, x, tile->devs[idx].iob.pinw_out_PADOUT, /*dup_warn*/ 1);
if (rc) FAIL(rc); if (rc) FAIL(rc);
snprintf(tile->devs[idx].iob.pinw_in_DIFFI_IN, snprintf(tmp_str, sizeof(tmp_str), "%s_DIFFI_IN%i", prefix, type_idx);
sizeof(tile->devs[idx].iob.pinw_in_DIFFI_IN), rc = add_connpt_name(model, y, x, tmp_str, /*dup_warn*/ 1,
"%s_DIFFI_IN%i", prefix, type_idx); &tile->devs[idx].iob.pinw_in_DIFFI_IN, 0);
rc = add_connpt_name(model, y, x, tile->devs[idx].iob.pinw_in_DIFFI_IN, /*dup_warn*/ 1);
if (rc) FAIL(rc); if (rc) FAIL(rc);
snprintf(tile->devs[idx].iob.pinw_in_DIFFO_IN, snprintf(tmp_str, sizeof(tmp_str), "%s_DIFFO_IN%i", prefix, type_idx);
sizeof(tile->devs[idx].iob.pinw_in_DIFFO_IN), rc = add_connpt_name(model, y, x, tmp_str, /*dup_warn*/ 1,
"%s_DIFFO_IN%i", prefix, type_idx); &tile->devs[idx].iob.pinw_in_DIFFO_IN, 0);
rc = add_connpt_name(model, y, x, tile->devs[idx].iob.pinw_in_DIFFO_IN, /*dup_warn*/ 1);
if (rc) FAIL(rc); if (rc) FAIL(rc);
snprintf(tile->devs[idx].iob.pinw_out_DIFFO_OUT, snprintf(tmp_str, sizeof(tmp_str), "%s_DIFFO_OUT%i", prefix, type_idx);
sizeof(tile->devs[idx].iob.pinw_out_DIFFO_OUT), rc = add_connpt_name(model, y, x, tmp_str, /*dup_warn*/ 1,
"%s_DIFFO_OUT%i", prefix, type_idx); &tile->devs[idx].iob.pinw_out_DIFFO_OUT, 0);
rc = add_connpt_name(model, y, x, tile->devs[idx].iob.pinw_out_DIFFO_OUT, /*dup_warn*/ 1);
if (rc) FAIL(rc); if (rc) FAIL(rc);
if (!x && y == model->center_y - CENTER_TOP_IOB_O && type_idx == 1) if (!x && y == model->center_y - CENTER_TOP_IOB_O && type_idx == 1)
strcpy(tile->devs[idx].iob.pinw_out_PCI_RDY, "LIOB_TOP_PCI_RDY0"); strcpy(tmp_str, "LIOB_TOP_PCI_RDY0");
else if (!x && y == model->center_y + CENTER_BOT_IOB_O && type_idx == 0) else if (!x && y == model->center_y + CENTER_BOT_IOB_O && type_idx == 0)
strcpy(tile->devs[idx].iob.pinw_out_PCI_RDY, "LIOB_BOT_PCI_RDY0"); strcpy(tmp_str, "LIOB_BOT_PCI_RDY0");
else if (x == model->x_width-RIGHT_OUTER_O && y == model->center_y - CENTER_TOP_IOB_O && type_idx == 0) else if (x == model->x_width-RIGHT_OUTER_O && y == model->center_y - CENTER_TOP_IOB_O && type_idx == 0)
strcpy(tile->devs[idx].iob.pinw_out_PCI_RDY, "RIOB_BOT_PCI_RDY0"); strcpy(tmp_str, "RIOB_BOT_PCI_RDY0");
else if (x == model->x_width-RIGHT_OUTER_O && y == model->center_y + CENTER_BOT_IOB_O && type_idx == 1) else if (x == model->x_width-RIGHT_OUTER_O && y == model->center_y + CENTER_BOT_IOB_O && type_idx == 1)
strcpy(tile->devs[idx].iob.pinw_out_PCI_RDY, "RIOB_TOP_PCI_RDY1"); strcpy(tmp_str, "RIOB_TOP_PCI_RDY1");
else { else {
snprintf(tile->devs[idx].iob.pinw_out_PCI_RDY, snprintf(tmp_str, sizeof(tmp_str),
sizeof(tile->devs[idx].iob.pinw_out_PCI_RDY),
"%s_PCI_RDY%i", prefix, type_idx); "%s_PCI_RDY%i", prefix, type_idx);
} }
rc = add_connpt_name(model, y, x, tile->devs[idx].iob.pinw_out_PCI_RDY, /*dup_warn*/ 1); rc = add_connpt_name(model, y, x, tmp_str, /*dup_warn*/ 1,
&tile->devs[idx].iob.pinw_out_PCI_RDY, 0);
if (rc) FAIL(rc); if (rc) FAIL(rc);
return 0; return 0;
fail: fail:

21
model_helper.c
View File

@ -71,17 +71,6 @@ int has_connpt(struct fpga_model* model, int y, int x,
return 0; return 0;
} }
static int _add_connpt_name(struct fpga_model* model, int y, int x,
const char* connpt_name, int warn_if_duplicate, uint16_t* name_i,
int* conn_point_o);
int add_connpt_name(struct fpga_model* model, int y, int x,
const char* connpt_name, int dup_warn)
{
return _add_connpt_name(model, y, x, connpt_name, dup_warn,
0 /* name_i */, 0 /* conn_point_o */);
}
#define CONN_NAMES_INCREMENT 128 #define CONN_NAMES_INCREMENT 128
// add_switch() assumes that the new element is appended // add_switch() assumes that the new element is appended
@ -99,7 +88,7 @@ static void connpt_names_array_append(struct fpga_tile* tile, int name_i)
tile->num_conn_point_names++; tile->num_conn_point_names++;
} }
static int _add_connpt_name(struct fpga_model* model, int y, int x, int add_connpt_name(struct fpga_model* model, int y, int x,
const char* connpt_name, int warn_if_duplicate, uint16_t* name_i, const char* connpt_name, int warn_if_duplicate, uint16_t* name_i,
int* conn_point_o) int* conn_point_o)
{ {
@ -178,10 +167,12 @@ int add_connpt_2(struct fpga_model* model, int y, int x,
int rc; int rc;
snprintf(name_buf, sizeof(name_buf), "%s%s", connpt_name, suffix1); snprintf(name_buf, sizeof(name_buf), "%s%s", connpt_name, suffix1);
rc = add_connpt_name(model, y, x, name_buf, dup_warn); rc = add_connpt_name(model, y, x, name_buf, dup_warn,
/*name_i*/ 0, /*connpt_o*/ 0);
if (rc) goto xout; if (rc) goto xout;
snprintf(name_buf, sizeof(name_buf), "%s%s", connpt_name, suffix2); snprintf(name_buf, sizeof(name_buf), "%s%s", connpt_name, suffix2);
rc = add_connpt_name(model, y, x, name_buf, dup_warn); rc = add_connpt_name(model, y, x, name_buf, dup_warn,
/*name_i*/ 0, /*connpt_o*/ 0);
if (rc) goto xout; if (rc) goto xout;
return 0; return 0;
xout: xout:
@ -198,7 +189,7 @@ int add_conn_uni(struct fpga_model* model, int y1, int x1, const char* name1, in
uint16_t* new_ptr; uint16_t* new_ptr;
int conn_start, num_conn_point_dests_for_this_wire, rc, j, conn_point_o; int conn_start, num_conn_point_dests_for_this_wire, rc, j, conn_point_o;
rc = _add_connpt_name(model, y1, x1, name1, 0 /* warn_if_duplicate */, rc = add_connpt_name(model, y1, x1, name1, 0 /* warn_if_duplicate */,
&name1_i, &conn_point_o); &name1_i, &conn_point_o);
if (rc) goto xout; if (rc) goto xout;

225
model_ports.c
View File

@ -35,53 +35,73 @@ static int init_iologic_ports(struct fpga_model* model, int y, int x,
} }
for (i = X_A /* 0 */; i <= M_DQ /* 23 */; i++) { for (i = X_A /* 0 */; i <= M_DQ /* 23 */; i++) {
rc = add_connpt_name(model, y, x, pf("IOI_INTER_LOGICOUT%i", i), dup_warn); rc = add_connpt_name(model, y, x, pf("IOI_INTER_LOGICOUT%i", i),
dup_warn, /*name_i*/ 0, /*connpt_o*/ 0);
if (rc) goto xout; if (rc) goto xout;
} }
rc = add_connpt_name(model, y, x, pf("%s_GND_TIEOFF", prefix), dup_warn); rc = add_connpt_name(model, y, x, pf("%s_GND_TIEOFF", prefix),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_name(model, y, x, pf("%s_VCC_TIEOFF", prefix), dup_warn); rc = add_connpt_name(model, y, x, pf("%s_VCC_TIEOFF", prefix),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_name(model, y, x, pf("%s_KEEP1_STUB", prefix), dup_warn); rc = add_connpt_name(model, y, x, pf("%s_KEEP1_STUB", prefix),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
for (i = 0; i <= 4; i++) { for (i = 0; i <= 4; i++) {
rc = add_connpt_2(model, y, x, pf("AUXADDR%i_IODELAY", i), suffix1, suffix2, dup_warn); rc = add_connpt_2(model, y, x, pf("AUXADDR%i_IODELAY", i),
suffix1, suffix2, dup_warn);
if (rc) goto xout; if (rc) goto xout;
} }
rc = add_connpt_2(model, y, x, "AUXSDOIN_IODELAY", suffix1, suffix2, dup_warn); rc = add_connpt_2(model, y, x, "AUXSDOIN_IODELAY", suffix1, suffix2,
dup_warn);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_2(model, y, x, "AUXSDO_IODELAY", suffix1, suffix2, dup_warn); rc = add_connpt_2(model, y, x, "AUXSDO_IODELAY", suffix1, suffix2,
dup_warn);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_2(model, y, x, "MEMUPDATE_IODELAY", suffix1, suffix2, dup_warn); rc = add_connpt_2(model, y, x, "MEMUPDATE_IODELAY", suffix1, suffix2,
dup_warn);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_name(model, y, x, "OUTN_IODELAY_SITE", dup_warn); rc = add_connpt_name(model, y, x, "OUTN_IODELAY_SITE",
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_name(model, y, x, "STUB_OUTN_IODELAY_S", dup_warn); rc = add_connpt_name(model, y, x, "STUB_OUTN_IODELAY_S",
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_name(model, y, x, "OUTP_IODELAY_SITE", dup_warn); rc = add_connpt_name(model, y, x, "OUTP_IODELAY_SITE",
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_name(model, y, x, "STUB_OUTP_IODELAY_S", dup_warn); rc = add_connpt_name(model, y, x, "STUB_OUTP_IODELAY_S",
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
for (i = 1; i <= 4; i++) { for (i = 1; i <= 4; i++) {
rc = add_connpt_2(model, y, x, pf("Q%i_ILOGIC_SITE", i), "", "_S", dup_warn); rc = add_connpt_2(model, y, x, pf("Q%i_ILOGIC_SITE", i), "", "_S",
dup_warn);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_2(model, y, x, pf("D%i_OLOGIC_SITE", i), "", "_S", dup_warn); rc = add_connpt_2(model, y, x, pf("D%i_OLOGIC_SITE", i), "", "_S",
dup_warn);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_2(model, y, x, pf("T%i_OLOGIC_SITE", i), "", "_S", dup_warn); rc = add_connpt_2(model, y, x, pf("T%i_OLOGIC_SITE", i), "", "_S",
dup_warn);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_2(model, y, x, pf("SHIFTIN%i_OLOGIC_SITE", i), "", "_S", dup_warn); rc = add_connpt_2(model, y, x, pf("SHIFTIN%i_OLOGIC_SITE", i), "", "_S",
dup_warn);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_2(model, y, x, pf("SHIFTOUT%i_OLOGIC_SITE", i), "", "_S", dup_warn); rc = add_connpt_2(model, y, x, pf("SHIFTOUT%i_OLOGIC_SITE", i), "", "_S",
dup_warn);
if (rc) goto xout; if (rc) goto xout;
} }
for (i = 0; i <= 1; i++) { for (i = 0; i <= 1; i++) {
rc = add_connpt_2(model, y, x, pf("CFB%i_ILOGIC_SITE", i), "", "_S", dup_warn); rc = add_connpt_2(model, y, x, pf("CFB%i_ILOGIC_SITE", i), "", "_S",
dup_warn);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_2(model, y, x, pf("CLK%i_ILOGIC_SITE", i), "", "_S", dup_warn); rc = add_connpt_2(model, y, x, pf("CLK%i_ILOGIC_SITE", i), "", "_S",
dup_warn);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_2(model, y, x, pf("CLK%i_OLOGIC_SITE", i), "", "_S", dup_warn); rc = add_connpt_2(model, y, x, pf("CLK%i_OLOGIC_SITE", i), "", "_S",
dup_warn);
if (rc) goto xout; if (rc) goto xout;
} }
{ {
@ -111,12 +131,15 @@ static int init_iologic_ports(struct fpga_model* model, int y, int x,
"VALID_ILOGIC_SITE", "" }; "VALID_ILOGIC_SITE", "" };
for (i = 0; mcb_2[i][0]; i++) { for (i = 0; mcb_2[i][0]; i++) {
rc = add_connpt_2(model, y, x, mcb_2[i], "", "_S", dup_warn); rc = add_connpt_2(model, y, x, mcb_2[i], "", "_S",
dup_warn);
} }
} }
rc = add_connpt_name(model, y, x, "DATAOUT2_IODELAY_SITE", dup_warn); rc = add_connpt_name(model, y, x, "DATAOUT2_IODELAY_SITE",
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_name(model, y, x, "DATAOUT2_IODELAY2_SITE_S", dup_warn); rc = add_connpt_name(model, y, x, "DATAOUT2_IODELAY2_SITE_S",
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
for (i = 0; i <= 2; i++) { for (i = 0; i <= 2; i++) {
@ -129,11 +152,14 @@ static int init_iologic_ports(struct fpga_model* model, int y, int x,
"_M", "_S", dup_warn); "_M", "_S", dup_warn);
if (rc) goto xout; if (rc) goto xout;
} }
rc = add_connpt_2(model, y, x, "IOI_CLKDIST_CLK0_ILOGIC", "_M", "_S", dup_warn); rc = add_connpt_2(model, y, x, "IOI_CLKDIST_CLK0_ILOGIC", "_M", "_S",
dup_warn);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_2(model, y, x, "IOI_CLKDIST_CLK0_OLOGIC", "_M", "_S", dup_warn); rc = add_connpt_2(model, y, x, "IOI_CLKDIST_CLK0_OLOGIC", "_M", "_S",
dup_warn);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_2(model, y, x, "IOI_CLKDIST_CLK1", "_M", "_S", dup_warn); rc = add_connpt_2(model, y, x, "IOI_CLKDIST_CLK1", "_M", "_S",
dup_warn);
if (rc) goto xout; if (rc) goto xout;
if (side == TOP_S || side == BOTTOM_S) { if (side == TOP_S || side == BOTTOM_S) {
@ -148,11 +174,13 @@ static int init_iologic_ports(struct fpga_model* model, int y, int x,
"IOI_MCB_DRPTRAIN", "" }; "IOI_MCB_DRPTRAIN", "" };
for (i = 0; mcb_2[i][0]; i++) { for (i = 0; mcb_2[i][0]; i++) {
rc = add_connpt_2(model, y, x, mcb_2[i], "_M", "_S", dup_warn); rc = add_connpt_2(model, y, x, mcb_2[i], "_M", "_S",
dup_warn);
if (rc) goto xout; if (rc) goto xout;
} }
for (i = 0; mcb_1[i][0]; i++) { for (i = 0; mcb_1[i][0]; i++) {
rc = add_connpt_name(model, y, x, mcb_1[i], dup_warn); rc = add_connpt_name(model, y, x, mcb_1[i],
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
} }
} }
@ -201,20 +229,26 @@ int init_ports(struct fpga_model* model, int dup_warn)
if (is_aty(Y_ROW_HORIZ_AXSYMM|Y_CHIP_HORIZ_REGS, if (is_aty(Y_ROW_HORIZ_AXSYMM|Y_CHIP_HORIZ_REGS,
model, y)) model, y))
continue; continue;
rc = add_connpt_name(model, y, x, "VCC_WIRE", dup_warn); rc = add_connpt_name(model, y, x, "VCC_WIRE",
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_name(model, y, x, "GND_WIRE", dup_warn); rc = add_connpt_name(model, y, x, "GND_WIRE",
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_name(model, y, x, "KEEP1_WIRE", dup_warn); rc = add_connpt_name(model, y, x, "KEEP1_WIRE",
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_name(model, y, x, "FAN", dup_warn); rc = add_connpt_name(model, y, x, "FAN",
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_name(model, y, x, "FAN_B", dup_warn); rc = add_connpt_name(model, y, x, "FAN_B",
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
if (!is_atyx(YX_IO_ROUTING, model, y, x)) { if (!is_atyx(YX_IO_ROUTING, model, y, x)) {
for (i = 0; i <= 1; i++) { for (i = 0; i <= 1; i++) {
rc = add_connpt_name(model, y, x, pf("GFAN%i", i), dup_warn); rc = add_connpt_name(model, y, x, pf("GFAN%i", i),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
} }
} else { } else {
@ -224,10 +258,12 @@ int init_ports(struct fpga_model* model, int dup_warn)
// to the PLL, but elsewhere? Not clear what they // to the PLL, but elsewhere? Not clear what they
// connect to... // connect to...
rc = add_connpt_name(model, y, x, rc = add_connpt_name(model, y, x,
logicin_s(X_A5, 1 /* routing_io */), dup_warn); logicin_s(X_A5, 1 /* routing_io */),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_name(model, y, x, rc = add_connpt_name(model, y, x,
logicin_s(X_B4, 1 /* routing_io */), dup_warn); logicin_s(X_B4, 1 /* routing_io */),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
} }
} }
@ -241,30 +277,40 @@ int init_ports(struct fpga_model* model, int dup_warn)
// pass 0 is ramb16, pass 1 and 2 are for ramb8 // pass 0 is ramb16, pass 1 and 2 are for ramb8
for (i = 0; i <= 2; i++) { for (i = 0; i <= 2; i++) {
for (j = 'A'; j <= 'B'; j++) { for (j = 'A'; j <= 'B'; j++) {
rc = add_connpt_name(model, y, x, pf("%s_CLK%c", pass_str[i], j), dup_warn); rc = add_connpt_name(model, y, x, pf("%s_CLK%c", pass_str[i], j),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_name(model, y, x, pf("%s_EN%c", pass_str[i], j), dup_warn); rc = add_connpt_name(model, y, x, pf("%s_EN%c", pass_str[i], j),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_name(model, y, x, pf("%s_REGCE%c", pass_str[i], j), dup_warn); rc = add_connpt_name(model, y, x, pf("%s_REGCE%c", pass_str[i], j),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_name(model, y, x, pf("%s_RST%c", pass_str[i], j), dup_warn); rc = add_connpt_name(model, y, x, pf("%s_RST%c", pass_str[i], j),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
for (k = 0; k <= (!i ? 3 : 1); k++) { for (k = 0; k <= (!i ? 3 : 1); k++) {
rc = add_connpt_name(model, y, x, pf("%s_DIP%c%i", pass_str[i], j, k), dup_warn); rc = add_connpt_name(model, y, x, pf("%s_DIP%c%i", pass_str[i], j, k),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_name(model, y, x, pf("%s_DOP%c%i", pass_str[i], j, k), dup_warn); rc = add_connpt_name(model, y, x, pf("%s_DOP%c%i", pass_str[i], j, k),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_name(model, y, x, pf("%s_WE%c%i", pass_str[i], j, k), dup_warn); rc = add_connpt_name(model, y, x, pf("%s_WE%c%i", pass_str[i], j, k),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
} }
for (k = 0; k <= (!i ? 13 : 12); k++) { for (k = 0; k <= (!i ? 13 : 12); k++) {
rc = add_connpt_name(model, y, x, pf("%s_ADDR%c%i", pass_str[i], j, k), dup_warn); rc = add_connpt_name(model, y, x, pf("%s_ADDR%c%i", pass_str[i], j, k),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
} }
for (k = 0; k <= (!i ? 31 : 15); k++) { for (k = 0; k <= (!i ? 31 : 15); k++) {
rc = add_connpt_name(model, y, x, pf("%s_DI%c%i", pass_str[i], j, k), dup_warn); rc = add_connpt_name(model, y, x, pf("%s_DI%c%i", pass_str[i], j, k),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_name(model, y, x, pf("%s_DO%c%i", pass_str[i], j, k), dup_warn); rc = add_connpt_name(model, y, x, pf("%s_DO%c%i", pass_str[i], j, k),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
} }
} }
@ -280,54 +326,70 @@ int init_ports(struct fpga_model* model, int dup_warn)
is_in_row(model, y, &row_num, &row_pos); is_in_row(model, y, &row_num, &row_pos);
if (!row_num && row_pos == LAST_POS_IN_ROW) { if (!row_num && row_pos == LAST_POS_IN_ROW) {
rc = add_connpt_name(model, y, x, "CARRYIN_DSP48A1_SITE", dup_warn); rc = add_connpt_name(model, y, x, "CARRYIN_DSP48A1_SITE",
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
for (i = 0; i <= 47; i++) { for (i = 0; i <= 47; i++) {
rc = add_connpt_name(model, y, x, pf("PCIN%i_DSP48A1_SITE", i), dup_warn); rc = add_connpt_name(model, y, x, pf("PCIN%i_DSP48A1_SITE", i),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
} }
} }
rc = add_connpt_name(model, y, x, "CLK_DSP48A1_SITE", dup_warn); rc = add_connpt_name(model, y, x, "CLK_DSP48A1_SITE",
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_name(model, y, x, "CARRYOUT_DSP48A1_SITE", dup_warn); rc = add_connpt_name(model, y, x, "CARRYOUT_DSP48A1_SITE",
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_name(model, y, x, "CARRYOUTF_DSP48A1_SITE", dup_warn); rc = add_connpt_name(model, y, x, "CARRYOUTF_DSP48A1_SITE",
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
for (i = 0; pref[i][0]; i++) { for (i = 0; pref[i][0]; i++) {
rc = add_connpt_name(model, y, x, pf("%sCARRYIN_DSP48A1_SITE", pref[i]), dup_warn); rc = add_connpt_name(model, y, x, pf("%sCARRYIN_DSP48A1_SITE", pref[i]),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
for (j = 0; seq[j][0]; j++) { for (j = 0; seq[j][0]; j++) {
rc = add_connpt_name(model, y, x, pf("%s%s_DSP48A1_SITE", pref[i], seq[j]), dup_warn); rc = add_connpt_name(model, y, x, pf("%s%s_DSP48A1_SITE", pref[i], seq[j]),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
} }
} }
for (i = 0; i <= 17; i++) { for (i = 0; i <= 17; i++) {
rc = add_connpt_name(model, y, x, pf("A%i_DSP48A1_SITE", i), dup_warn); rc = add_connpt_name(model, y, x, pf("A%i_DSP48A1_SITE", i),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_name(model, y, x, pf("B%i_DSP48A1_SITE", i), dup_warn); rc = add_connpt_name(model, y, x, pf("B%i_DSP48A1_SITE", i),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_name(model, y, x, pf("D%i_DSP48A1_SITE", i), dup_warn); rc = add_connpt_name(model, y, x, pf("D%i_DSP48A1_SITE", i),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_name(model, y, x, pf("BCOUT%i_DSP48A1_SITE", i), dup_warn); rc = add_connpt_name(model, y, x, pf("BCOUT%i_DSP48A1_SITE", i),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
} }
for (i = 0; i <= 47; i++) { for (i = 0; i <= 47; i++) {
rc = add_connpt_name(model, y, x, pf("C%i_DSP48A1_SITE", i), dup_warn); rc = add_connpt_name(model, y, x, pf("C%i_DSP48A1_SITE", i),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_name(model, y, x, pf("P%i_DSP48A1_SITE", i), dup_warn); rc = add_connpt_name(model, y, x, pf("P%i_DSP48A1_SITE", i),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_name(model, y, x, pf("PCOUT%i_DSP48A1_SITE", i), dup_warn); rc = add_connpt_name(model, y, x, pf("PCOUT%i_DSP48A1_SITE", i),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
} }
for (i = 0; i <= 35; i++) { for (i = 0; i <= 35; i++) {
rc = add_connpt_name(model, y, x, pf("M%i_DSP48A1_SITE", i), dup_warn); rc = add_connpt_name(model, y, x, pf("M%i_DSP48A1_SITE", i),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
} }
for (i = 0; i <= 7; i++) { for (i = 0; i <= 7; i++) {
rc = add_connpt_name(model, y, x, pf("OPMODE%i_DSP48A1_SITE", i), dup_warn); rc = add_connpt_name(model, y, x, pf("OPMODE%i_DSP48A1_SITE", i),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
} }
} }
@ -341,44 +403,57 @@ int init_ports(struct fpga_model* model, int dup_warn)
if (YX_TILE(model, y, x)->flags & TF_LOGIC_XM_DEV) { if (YX_TILE(model, y, x)->flags & TF_LOGIC_XM_DEV) {
// The first SLICEM on the bottom has a given C_IN port. // The first SLICEM on the bottom has a given C_IN port.
if (is_aty(Y_INNER_BOTTOM, model, y+3)) { if (is_aty(Y_INNER_BOTTOM, model, y+3)) {
rc = add_connpt_name(model, y, x, "M_CIN", dup_warn); rc = add_connpt_name(model, y, x, "M_CIN",
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
} }
rc = add_connpt_name(model, y, x, "M_COUT", dup_warn); rc = add_connpt_name(model, y, x, "M_COUT",
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_name(model, y, x, "M_WE", dup_warn); rc = add_connpt_name(model, y, x, "M_WE",
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
for (i = 'A'; i <= 'D'; i++) { for (i = 'A'; i <= 'D'; i++) {
rc = add_connpt_name(model, y, x, pf("M_%cI", i), dup_warn); rc = add_connpt_name(model, y, x, pf("M_%cI", i),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
} }
pref[0] = "M"; pref[0] = "M";
pref[1] = "X"; pref[1] = "X";
} else { // LOGIC_XL } else { // LOGIC_XL
rc = add_connpt_name(model, y, x, "XL_COUT", dup_warn); rc = add_connpt_name(model, y, x, "XL_COUT",
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
pref[0] = "L"; pref[0] = "L";
pref[1] = "XX"; pref[1] = "XX";
} }
for (k = 0; k <= 1; k++) { for (k = 0; k <= 1; k++) {
rc = add_connpt_name(model, y, x, pf("%s_CE", pref[k]), dup_warn); rc = add_connpt_name(model, y, x, pf("%s_CE", pref[k]),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_name(model, y, x, pf("%s_SR", pref[k]), dup_warn); rc = add_connpt_name(model, y, x, pf("%s_SR", pref[k]),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_name(model, y, x, pf("%s_CLK", pref[k]), dup_warn); rc = add_connpt_name(model, y, x, pf("%s_CLK", pref[k]),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
for (i = 'A'; i <= 'D'; i++) { for (i = 'A'; i <= 'D'; i++) {
for (j = 1; j <= 6; j++) { for (j = 1; j <= 6; j++) {
rc = add_connpt_name(model, y, x, pf("%s_%c%i", pref[k], i, j), dup_warn); rc = add_connpt_name(model, y, x, pf("%s_%c%i", pref[k], i, j),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
} }
rc = add_connpt_name(model, y, x, pf("%s_%c", pref[k], i), dup_warn); rc = add_connpt_name(model, y, x, pf("%s_%c", pref[k], i),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_name(model, y, x, pf("%s_%cMUX", pref[k], i), dup_warn); rc = add_connpt_name(model, y, x, pf("%s_%cMUX", pref[k], i),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_name(model, y, x, pf("%s_%cQ", pref[k], i), dup_warn); rc = add_connpt_name(model, y, x, pf("%s_%cQ", pref[k], i),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
rc = add_connpt_name(model, y, x, pf("%s_%cX", pref[k], i), dup_warn); rc = add_connpt_name(model, y, x, pf("%s_%cX", pref[k], i),
dup_warn, 0, 0);
if (rc) goto xout; if (rc) goto xout;
} }
} }