From 75a047ac3e86b593e1fa90599516f75e20a25bb4 Mon Sep 17 00:00:00 2001 From: Wolfgang Spraul Date: Fri, 31 Aug 2012 07:05:58 +0200 Subject: [PATCH] autotest cleanup --- autotest.c | 551 ++++++++++++++++++++++++----------------------- autotest_diff.sh | 2 +- 2 files changed, 277 insertions(+), 276 deletions(-) diff --git a/autotest.c b/autotest.c index c54879f..ecd7600 100644 --- a/autotest.c +++ b/autotest.c @@ -21,6 +21,9 @@ time_t g_start_time; struct test_state { + int cmdline_skip; + char cmdline_diff_exec[1024]; + struct fpga_model* model; // test filenames are: tmp_dir/autotest__.??? char tmp_dir[256]; @@ -63,13 +66,19 @@ static int diff_printf(struct test_state* tstate) FILE* dest_f = 0; int rc; - snprintf(path, sizeof(path), "%s/autotest_%s_%04i", tstate->tmp_dir, + if (tstate->cmdline_skip >= tstate->next_diff_counter) { + printf("O Skipping diff %i.\n", tstate->next_diff_counter); + tstate->next_diff_counter++; + return 0; + } + + snprintf(path, sizeof(path), "%s/autotest_%s_%06i", tstate->tmp_dir, tstate->base_name, tstate->next_diff_counter); path_base = strlen(path); - if (tstate->next_diff_counter == 1) + if (tstate->next_diff_counter == tstate->cmdline_skip + 1) strcpy(prior_fp, "/dev/null"); else { - snprintf(prior_fp, sizeof(prior_fp), "%s/autotest_%s_%04i.fp", + snprintf(prior_fp, sizeof(prior_fp), "%s/autotest_%s_%06i.fp", tstate->tmp_dir, tstate->base_name, tstate->next_diff_counter-1); } @@ -86,10 +95,14 @@ static int diff_printf(struct test_state* tstate) fclose(dest_f); dest_f = 0; path[path_base] = 0; - snprintf(tmp, sizeof(tmp), "./autotest_diff.sh %s %s.fp >%s.log 2>&1", - prior_fp, path, path); + snprintf(tmp, sizeof(tmp), "%s %s %s.fp >%s.log 2>&1", + tstate->cmdline_diff_exec, prior_fp, path, path); rc = system(tmp); - if (rc) FAIL(rc); + if (rc) { + printf("#E %s:%i system call '%s' failed with code %i, " + "check %s.log\n", __FILE__, __LINE__, tmp, rc, path); +// todo: report the error up so we can avoid adding a switch to the block list etc. + } strcpy(&path[path_base], ".diff"); rc = dump_file(path); @@ -102,104 +115,8 @@ fail: return rc; } -static void cut_sw_from_end(struct fpga_net* net, int cut_o) -{ - if (cut_o <= 2) return; - memmove(&net->el[2], &net->el[cut_o], - (net->len-cut_o)*sizeof(net->el[0])); - net->len = 2 + net->len-cut_o; -} - -int test_net(struct test_state* tstate, net_idx_t net_i); -int test_net(struct test_state* tstate, net_idx_t net_i) -{ - struct fpga_net* net; - struct fpga_net copy_net; - swidx_t same_sw[64]; - int same_len; - int i, j, rc; - - net = fpga_net_get(tstate->model, net_i); - if (!net) FAIL(EINVAL); - copy_net = *net; - - for (i = net->len-1; i >= 2; i--) { - printf("round i %i\n", i); - *net = copy_net; - cut_sw_from_end(net, i); - if (net->len <= 2) { - rc = diff_printf(tstate); - if (rc) FAIL(rc); - continue; - } - // what other switches go to SW_TO(el[2])? - printf_swchain(tstate->model, - net->el[2].y, net->el[2].x, - fpga_switch_str_i(tstate->model, - net->el[2].y, net->el[2].x, - net->el[2].idx, SW_TO), - SW_TO, 1, 0, 0); - same_len = sizeof(same_sw)/sizeof(*same_sw); - rc = fpga_switch_same_fromto(tstate->model, - net->el[2].y, net->el[2].x, - net->el[2].idx, SW_TO, same_sw, &same_len); - if (rc) FAIL(rc); - printf("same_len at this level %i\n", same_len); - for (j = 0; j < same_len; j++) { - net->el[2].idx = same_sw[j]; - rc = diff_printf(tstate); - if (rc) FAIL(rc); - } - } - return 0; -fail: - return rc; -} - -int test_net2(struct test_state* tstate, net_idx_t net_i); -int test_net2(struct test_state* tstate, net_idx_t net_i) -{ - struct fpga_net* net; - struct fpga_net copy_net; - swidx_t same_sw[64]; - int same_len; - int i, j, rc; - - net = fpga_net_get(tstate->model, net_i); - if (!net) FAIL(EINVAL); - copy_net = *net; - - for (i = 3; i <= net->len-1; i++) { - printf("round i %i\n", i); - net->len = i; - // what other switches go from SW_FROM(el[i-1])? - printf_swchain(tstate->model, - net->el[i-1].y, net->el[i-1].x, - fpga_switch_str_i(tstate->model, - net->el[i-1].y, net->el[i-1].x, - net->el[i-1].idx, SW_FROM), - SW_FROM, 1, 0, 0); - same_len = sizeof(same_sw)/sizeof(*same_sw); - rc = fpga_switch_same_fromto(tstate->model, - net->el[i-1].y, net->el[i-1].x, - net->el[i-1].idx, SW_FROM, same_sw, &same_len); - if (rc) FAIL(rc); - printf("same_len at this level %i\n", same_len); - for (j = 0; j < same_len; j++) { - net->el[i-1].idx = same_sw[j]; - rc = diff_printf(tstate); - if (rc) FAIL(rc); - } - *net = copy_net; - } - return 0; -fail: - return rc; -} - // goal: configure logic devices in all supported variations -int test_logic_config(struct test_state* tstate); -int test_logic_config(struct test_state* tstate) +static int test_logic_config(struct test_state* tstate) { int a_to_d[] = { A6_LUT, B6_LUT, C6_LUT, D6_LUT }; int idx_enum[] = { DEV_LOGM, DEV_LOGX }; @@ -227,82 +144,15 @@ fail: return rc; } -static int test_device_fingers(struct test_state* tstate, int y, int x, - int type, int type_idx, swidx_t* block_list, int* block_list_len) -{ - struct fpga_device* dev; - struct switch_to_yx switch_to; - struct sw_chain chain; - net_idx_t net_idx; - int i, from_to, rc; - - rc = fdev_set_required_pins(tstate->model, y, x, type, type_idx); - if (rc) FAIL(rc); -// fdev_print_required_pins(tstate->model, y, x, type, type_idx); - - dev = fdev_p(tstate->model, y, x, type, type_idx); - if (!dev) FAIL(EINVAL); - for (i = 0; i < dev->pinw_req_total; i++) { - from_to = (i < dev->pinw_req_in) ? SW_TO : SW_FROM; - switch_to.yx_req = YX_ROUTING_TILE; - switch_to.flags = SWTO_YX_DEF; - switch_to.model = tstate->model; - switch_to.y = y; - switch_to.x = x; - switch_to.start_switch = dev->pinw[dev->pinw_req_for_cfg[i]]; - switch_to.from_to = from_to; - rc = fpga_switch_to_yx(&switch_to); - if (rc) FAIL(rc); -// printf_switch_to_result(&switch_to); - - rc = construct_sw_chain(&chain, tstate->model, switch_to.dest_y, - switch_to.dest_x, switch_to.dest_connpt, from_to, - /*max_depth*/ 1, block_list, *block_list_len); - if (rc) FAIL(rc); - while (fpga_switch_chain(&chain) != NO_SWITCH) { - rc = fpga_net_new(tstate->model, &net_idx); - if (rc) FAIL(rc); - - // add port - rc = fpga_net_add_port(tstate->model, net_idx, - y, x, fpga_dev_idx(tstate->model, y, x, - type, type_idx), dev->pinw_req_for_cfg[i]); - if (rc) FAIL(rc); - // add (one) switch in logic tile - rc = fpga_net_add_switches(tstate->model, net_idx, - y, x, &switch_to.set); - if (rc) FAIL(rc); - // add switches in routing tile - rc = fpga_net_add_switches(tstate->model, net_idx, - switch_to.dest_y, switch_to.dest_x, &chain.set); - if (rc) FAIL(rc); - -// fprintf_net(stdout, tstate->model, net_idx); -// printf("set %s\n", fmt_swset(tstate->model, switch_to.dest_y, switch_to.dest_x, &chain.set, from_to)); - -#if 1 - rc = diff_printf(tstate); - if (rc) FAIL(rc); -#endif - fpga_net_delete(tstate->model, net_idx); - } - *block_list_len = chain.block_list_len; -// printf("block_list_len now %i\n", *block_list_len); - destruct_sw_chain(&chain); - } - return 0; -fail: - return rc; -} - static int test_logic_net(struct test_state* tstate, int logic_y, int logic_x, int type_idx, pinw_idx_t port, const struct sw_set* logic_switch_set, int routing_y, int routing_x, swidx_t routing_sw1, swidx_t routing_sw2) { net_idx_t net_idx; struct sw_set routing_switches; - int rc; + int dbg, rc; + dbg = 0; rc = fpga_net_new(tstate->model, &net_idx); if (rc) FAIL(rc); @@ -327,36 +177,38 @@ static int test_logic_net(struct test_state* tstate, int logic_y, int logic_x, routing_y, routing_x, &routing_switches); if (rc) FAIL(rc); -#if 0 - printf("lnet %s %s\n", fpga_switch_print(tstate->model, routing_y, - routing_x, routing_sw1), routing_sw2 == NO_SWITCH ? "" - : fpga_switch_print(tstate->model, routing_y, routing_x, routing_sw2)); -#endif -#if 1 + if (dbg) + printf("lnet %s %s\n", + routing_sw2 == NO_SWITCH ? "" : fpga_switch_print( + tstate->model, routing_y, routing_x, + routing_sw2), + fpga_switch_print(tstate->model, + routing_y, routing_x, routing_sw1)); + rc = diff_printf(tstate); if (rc) FAIL(rc); -#endif + fpga_net_delete(tstate->model, net_idx); return 0; fail: return rc; } -static int test_logic_fingers(struct test_state* tstate, int y, int x, +static int test_logic_net_l2(struct test_state* tstate, int y, int x, int type, int type_idx, str16_t* done_pinw_list, int* done_pinw_len, swidx_t* l2_done_list, int* l2_done_len) { struct fpga_device* dev; struct switch_to_yx switch_to; - struct sw_chain chain; - net_idx_t net_idx; - int i, j, k, l, from_to, direction, rc; + int i, j, k, l, m, from_to, rc; struct sw_set set_l1, set_l2; struct fpga_tile* switch_tile; + int dbg = 0; rc = fdev_set_required_pins(tstate->model, y, x, type, type_idx); if (rc) FAIL(rc); -// fdev_print_required_pins(tstate->model, y, x, type, type_idx); + if (dbg) + fdev_print_required_pins(tstate->model, y, x, type, type_idx); dev = fdev_p(tstate->model, y, x, type, type_idx); if (!dev) FAIL(EINVAL); @@ -381,97 +233,134 @@ static int test_logic_fingers(struct test_state* tstate, int y, int x, switch_to.from_to = from_to; rc = fpga_switch_to_yx(&switch_to); if (rc) FAIL(rc); -// printf_switch_to_result(&switch_to); + if (dbg) + printf_switch_to_result(&switch_to); switch_tile = YX_TILE(tstate->model, switch_to.dest_y, switch_to.dest_x); rc = fpga_swset_fromto(tstate->model, switch_to.dest_y, switch_to.dest_x, switch_to.dest_connpt, from_to, &set_l1); if (rc) FAIL(rc); + if (dbg) + fpga_swset_print(tstate->model, switch_to.dest_y, + switch_to.dest_x, &set_l1, from_to); -// if (1||(i < dev->pinw_req_in)) { -// if (i >= dev->pinw_req_in) { - if (1) { -// fpga_swset_print(tstate->model, switch_to.dest_y, switch_to.dest_x, &set_l1, from_to); - for (j = 0; j < set_l1.len; j++) { - rc = test_logic_net(tstate, y, x, type_idx, dev->pinw_req_for_cfg[i], - &switch_to.set, switch_to.dest_y, switch_to.dest_x, - set_l1.sw[j], NO_SWITCH); - if (rc) FAIL(rc); - // level one switches themselves cannot become duplicates - // because we check for unique pinwires already. but we still - // need to add them to the done_list to compare against - // future l2 switches. -// todo: rename l2_done_list to just done_list - l2_done_list[(*l2_done_len)++] = set_l1.sw[j]; + for (j = 0; j < set_l1.len; j++) { + for (k = 0; k < 2; k++) { + // k == 0 is the SW_FROM round, k == 1 is the SW_TO round. + // For out-pins, we don't need the SW_TO round because they + // would create multiple sources driving one pin which is + // illegal. + if (k && i >= dev->pinw_req_in) + break; rc = fpga_swset_fromto(tstate->model, switch_to.dest_y, switch_to.dest_x, CONNPT_STR16(switch_tile, SW_I(switch_tile->switches[set_l1.sw[j]], !from_to)), - i < dev->pinw_req_in ? from_to : !from_to, &set_l2); + k ? SW_TO : SW_FROM, &set_l2); if (rc) FAIL(rc); - for (k = 0; k < set_l2.len; k++) { - // on an out pin, we are reversing direction and looking - // for other switches pointing *to* the output, but we - // can skip ourselves... - if (set_l2.sw[k] == set_l1.sw[j]) - continue; + for (l = 0; l < set_l2.len; l++) { - // The level 1 switches cannot duplicate because we - // already track unique pinwires. But level 2 switches - // must be checked for duplicates. - for (l = 0; l < *l2_done_len; l++) { - if (l2_done_list[l] == set_l2.sw[k]) + // duplicate check + for (m = 0; m < *l2_done_len; m++) { + if (l2_done_list[m] == set_l2.sw[l]) break; } - if (l < *l2_done_len) + if (m < *l2_done_len) continue; - l2_done_list[(*l2_done_len)++] = set_l2.sw[k]; + l2_done_list[(*l2_done_len)++] = set_l2.sw[l]; + + // we did the l1 switches in an earlier round, but have to + // redo them before every l2 switch to make a clean diff + // on top of l1. The l2 can be in the same mip as the l1 + // so it has to be repeated for every l2 switch, not just + // once for the set. + rc = test_logic_net(tstate, y, x, type_idx, dev->pinw_req_for_cfg[i], + &switch_to.set, switch_to.dest_y, switch_to.dest_x, + set_l1.sw[j], NO_SWITCH); + if (rc) FAIL(rc); rc = test_logic_net(tstate, y, x, type_idx, dev->pinw_req_for_cfg[i], &switch_to.set, switch_to.dest_y, switch_to.dest_x, - set_l1.sw[j], set_l2.sw[k]); + set_l1.sw[j], set_l2.sw[l]); if (rc) FAIL(rc); } } } + } + return 0; +fail: + return rc; +} +static int test_logic_net_l1(struct test_state* tstate, int y, int x, + int type, int type_idx, str16_t* done_pinw_list, int* done_pinw_len, + swidx_t* done_sw_list, int* done_sw_len) +{ + struct fpga_device* dev; + struct switch_to_yx switch_to; + int i, j, k, from_to, rc; + struct sw_set set_l1; + int dbg = 0; -#if 0 + rc = fdev_set_required_pins(tstate->model, y, x, type, type_idx); + if (rc) FAIL(rc); + if (dbg) + fdev_print_required_pins(tstate->model, y, x, type, type_idx); + dev = fdev_p(tstate->model, y, x, type, type_idx); + if (!dev) FAIL(EINVAL); + for (i = 0; i < dev->pinw_req_total; i++) { - // loop twice, first continue in the same direction as - // the in/out pin, second loop in reverse direction - for (direction = 0; direction <= 1; direction++) { -//printf("direction %i\n", direction); - for (j = 0; j < set_l1.len; j++) { - -//printf("j %i\n", j); - rc = fpga_swset_fromto(tstate->model, switch_to.dest_y, - switch_to.dest_x, CONNPT_STR16(switch_tile, - SW_I(switch_tile->switches[set_l1.sw[j]], !from_to)), - direction ? !from_to : from_to, &set_l2); - if (rc) FAIL(rc); - -#if 0 - rc = test_logic_net(tstate, y, x, type_idx, dev->pinw_req_for_cfg[i], - &switch_to.set, switch_to.dest_y, switch_to.dest_x, - set_l1.sw[j], NO_SWITCH); - if (rc) FAIL(rc); -#endif - - for (k = 0; k < set_l2.len; k++) { -#if 0 - rc = test_logic_net(tstate, y, x, type_idx, dev->pinw_req_for_cfg[i], - &switch_to.set, switch_to.dest_y, switch_to.dest_x, - set_l1.sw[j], set_l2.sw[k]); - if (rc) FAIL(rc); -#endif - } -// fpga_swset_print(tstate->model, switch_to.dest_y, switch_to.dest_x, &set_l2, direction ? !from_to: from_to); - } + // do every pinw only once across all configs + for (j = 0; j < *done_pinw_len; j++) { + if (done_pinw_list[j] == dev->pinw[dev->pinw_req_for_cfg[i]]) + break; + } + if (j < *done_pinw_len) + continue; + done_pinw_list[(*done_pinw_len)++] = dev->pinw[dev->pinw_req_for_cfg[i]]; + + from_to = (i < dev->pinw_req_in) ? SW_TO : SW_FROM; + switch_to.yx_req = YX_ROUTING_TILE; + switch_to.flags = SWTO_YX_DEF; + switch_to.model = tstate->model; + switch_to.y = y; + switch_to.x = x; + switch_to.start_switch = dev->pinw[dev->pinw_req_for_cfg[i]]; + switch_to.from_to = from_to; + rc = fpga_switch_to_yx(&switch_to); + if (rc) FAIL(rc); + if (dbg) + printf_switch_to_result(&switch_to); + + rc = fpga_swset_fromto(tstate->model, switch_to.dest_y, + switch_to.dest_x, switch_to.dest_connpt, from_to, &set_l1); + if (rc) FAIL(rc); + if (dbg) + fpga_swset_print(tstate->model, switch_to.dest_y, + switch_to.dest_x, &set_l1, from_to); + + for (j = 0; j < set_l1.len; j++) { + // an out-pin can go directly to an in-pin and + // we don't need that pin twice + for (k = 0; k < *done_sw_len; k++) { + if (done_sw_list[k] == set_l1.sw[j]) + break; + } + if (k < *done_sw_len) + continue; + + rc = test_logic_net(tstate, y, x, type_idx, dev->pinw_req_for_cfg[i], + &switch_to.set, switch_to.dest_y, switch_to.dest_x, + set_l1.sw[j], NO_SWITCH); + if (rc) FAIL(rc); + done_sw_list[(*done_sw_len)++] = set_l1.sw[j]; + if (dbg) + printf("done_list %s at %i\n", fpga_switch_print(tstate->model, + switch_to.dest_y, switch_to.dest_x, set_l1.sw[j]), + (*done_sw_len)-1); } -#endif } return 0; fail: @@ -479,22 +368,22 @@ fail: } // goal: use all switches in a routing switchbox -int test_logic_routing_switches(struct test_state* tstate); -int test_logic_routing_switches(struct test_state* tstate) +static int test_logic_routing_switches(struct test_state* tstate) { int a_to_d[] = { A6_LUT, B6_LUT, C6_LUT, D6_LUT }; int idx_enum[] = { DEV_LOGM, DEV_LOGX }; int y, x, i, j, k, rc; - swidx_t l2_done_list[MAX_SWITCHBOX_SIZE]; - int l2_done_len; + swidx_t done_sw_list[MAX_SWITCHBOX_SIZE]; + int done_sw_len; str16_t done_pinw_list[2000]; int done_pinw_len; y = 68; x = 13; + // first make one round over all configs with single-level nets only. done_pinw_len = 0; - l2_done_len = 0; + done_sw_len = 0; for (i = 0; i < sizeof(idx_enum)/sizeof(*idx_enum); i++) { for (j = 0; j < sizeof(a_to_d)/sizeof(*a_to_d); j++) { for (k = '1'; k <= '6'; k++) { @@ -502,43 +391,148 @@ int test_logic_routing_switches(struct test_state* tstate) idx_enum[i], a_to_d[j], pf("A%c", k), ZTERM); if (rc) FAIL(rc); - rc = test_logic_fingers(tstate, y, x, DEV_LOGIC, + rc = test_logic_net_l1(tstate, y, x, DEV_LOGIC, idx_enum[i], done_pinw_list, &done_pinw_len, - l2_done_list, &l2_done_len); + done_sw_list, &done_sw_len); + if (rc) FAIL(rc); + fdev_delete(tstate->model, y, x, DEV_LOGIC, idx_enum[i]); + } + } + + } + + // second round with two-level nets + done_pinw_len = 0; // reset done pinwires + for (i = 0; i < sizeof(idx_enum)/sizeof(*idx_enum); i++) { + for (j = 0; j < sizeof(a_to_d)/sizeof(*a_to_d); j++) { + for (k = '1'; k <= '6'; k++) { + rc = fdev_logic_set_lut(tstate->model, y, x, + idx_enum[i], a_to_d[j], pf("A%c", k), ZTERM); + if (rc) FAIL(rc); + + rc = test_logic_net_l2(tstate, y, x, DEV_LOGIC, + idx_enum[i], done_pinw_list, &done_pinw_len, + done_sw_list, &done_sw_len); if (rc) FAIL(rc); fdev_delete(tstate->model, y, x, DEV_LOGIC, idx_enum[i]); } } } -#if 0 -for (i = 0; i < done_list_len; i++) { - printf("done %i %s\n", i, fpga_switch_print(tstate->model, 68, 12, done_list[i])); -} -#endif return 0; fail: return rc; } +#define DEFAULT_DIFF_EXEC "./autotest_diff.sh" + +static void printf_help(const char* argv_0, const char** available_tests) +{ + printf( "\n" + "fpgatools automatic test suite\n" + "\n" + "Usage: %s [--test=] [--diff=] [--skip=]\n" + "Default diff executable: " DEFAULT_DIFF_EXEC "\n", argv_0); + + if (available_tests) { + int i = 0; + printf("\n"); + while (available_tests[i] && available_tests[i][0]) { + printf("%s %s\n", !i ? "Available tests:" + : " ", available_tests[i]); + i++; + } + } + printf("\n"); +} + int main(int argc, char** argv) { struct fpga_model model; - struct fpga_device* P46_dev, *P48_dev, *logic_dev; - int P46_y, P46_x, P46_dev_idx, P46_type_idx; - int P48_y, P48_x, P48_dev_idx, P48_type_idx, logic_dev_idx, rc; struct test_state tstate; - struct switch_to_yx switch_to; - net_idx_t P46_net; + char param[1024], cmdline_test[1024]; + int i, param_skip, rc; + const char* available_tests[] = + { "logic_cfg", "routing_sw", 0 }; // flush after every line is better for the autotest // output, tee, etc. // for example: ./autotest 2>&1 | tee autotest.log setvbuf(stdout, /*buf*/ 0, _IOLBF, /*size*/ 0); + if (argc < 2) { + printf_help(argv[0], available_tests); + return 0; + } + + // + // command line + // + + memset(&tstate, 0, sizeof(tstate)); + tstate.cmdline_skip = -1; + tstate.cmdline_diff_exec[0] = 0; + cmdline_test[0] = 0; + for (i = 1; i < argc; i++) { + memset(param, 0, sizeof(param)); + if (sscanf(argv[i], "--test=%1023c", param) == 1) { + if (cmdline_test[0]) { + printf_help(argv[0], available_tests); + return EINVAL; + } + strcpy(cmdline_test, param); + continue; + } + memset(param, 0, sizeof(param)); + if (sscanf(argv[i], "--diff=%1023c", param) == 1) { + if (tstate.cmdline_diff_exec[0]) { + printf_help(argv[0], available_tests); + return EINVAL; + } + strcpy(tstate.cmdline_diff_exec, param); + continue; + } + if (sscanf(argv[i], "--skip=%i", ¶m_skip) == 1) { + if (tstate.cmdline_skip != -1) { + printf_help(argv[0], available_tests); + return EINVAL; + } + tstate.cmdline_skip = param_skip; + continue; + } + printf_help(argv[0], available_tests); + return EINVAL; + } + if (!cmdline_test[0]) { + printf_help(argv[0], available_tests); + return EINVAL; + } + i = 0; + while (available_tests[i] && available_tests[i][0]) { + if (!strcmp(available_tests[i], cmdline_test)) + break; + i++; + } + if (!available_tests[i] || !available_tests[i][0]) { + printf_help(argv[0], available_tests); + return EINVAL; + } + if (!tstate.cmdline_diff_exec[0]) + strcpy(tstate.cmdline_diff_exec, DEFAULT_DIFF_EXEC); + if (tstate.cmdline_skip == -1) + tstate.cmdline_skip = 0; + + // + // test + // + printf("\n"); printf("O fpgatools automatic test suite. Be welcome and be " "our guest. namo namaha.\n"); printf("\n"); + printf("O Test: %s\n", cmdline_test); + printf("O Diff: %s\n", tstate.cmdline_diff_exec); + printf("O Skip: %i\n", tstate.cmdline_skip); + printf("\n"); printf("O Time measured in seconds from 0.\n"); g_start_time = time(0); TIMESTAMP(); @@ -555,19 +549,18 @@ int main(int argc, char** argv) tstate.model = &model; strcpy(tstate.tmp_dir, AUTOTEST_TMP_DIR); mkdir(tstate.tmp_dir, S_IRWXU|S_IRWXG|S_IROTH|S_IXOTH); - rc = diff_start(&tstate, "and"); + rc = diff_start(&tstate, cmdline_test); if (rc) FAIL(rc); -#if 0 - rc = test_logic_config(&tstate); - if (rc) FAIL(rc); -#endif + if (!strcmp(cmdline_test, "logic_cfg")) { + rc = test_logic_config(&tstate); + if (rc) FAIL(rc); + } + if (!strcmp(cmdline_test, "routing_sw")) { + rc = test_logic_routing_switches(&tstate); + if (rc) FAIL(rc); + } -#if 1 - rc = test_logic_routing_switches(&tstate); - if (rc) FAIL(rc); -#endif - // test_iob_config // test_iologic_routing_switches @@ -591,6 +584,14 @@ int main(int argc, char** argv) #endif #if 0 + struct fpga_model model; + struct fpga_device* P46_dev, *P48_dev, *logic_dev; + int P46_y, P46_x, P46_dev_idx, P46_type_idx; + int P48_y, P48_x, P48_dev_idx, P48_type_idx, logic_dev_idx, rc; + struct test_state tstate; + struct switch_to_yx switch_to; + net_idx_t P46_net; + // configure P46 rc = fpga_find_iob(&model, "P46", &P46_y, &P46_x, &P46_type_idx); if (rc) FAIL(rc); @@ -726,7 +727,7 @@ int main(int argc, char** argv) #endif printf("\n"); - printf("O Test suite completed.\n"); + printf("O Test completed.\n"); TIME_AND_MEM(); printf("\n"); return EXIT_SUCCESS; diff --git a/autotest_diff.sh b/autotest_diff.sh index e65d784..4112c99 100755 --- a/autotest_diff.sh +++ b/autotest_diff.sh @@ -12,5 +12,5 @@ fi echo "fp:" > ${2%.*}.diff cat ${2%.*}.fp_diff | sed -e '/^--- /d;/^+++ /d;/^@@ /d' >> ${2%.*}.diff -echo "b2f:" >> ${2%.*}.diff +echo "bit:" >> ${2%.*}.diff cat ${2%.*}.b2f_diff | sed -e '/^--- /d;/^+++ /d;/^@@ /d' >> ${2%.*}.diff