variable rename
This commit is contained in:
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785d809538
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7d90449ab4
98
autotest.c
98
autotest.c
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@ -1053,14 +1053,14 @@ static int test_logic(struct test_state* tstate, int y, int x, int type_idx,
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if (tstate->dry_run) {
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for (lut = LUT_A; lut <= LUT_D; lut++) {
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if (!logic_cfg->a2d[lut].lut6
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&& !logic_cfg->a2d[lut].lut5)
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if (!logic_cfg->a2d[lut].lut6_str
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&& !logic_cfg->a2d[lut].lut5_str)
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continue;
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printf("O %c6_lut '%s' %c5_lut '%s'\n",
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'A'+lut, logic_cfg->a2d[lut].lut6
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? logic_cfg->a2d[lut].lut6 : "-",
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'A'+lut, logic_cfg->a2d[lut].lut5
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? logic_cfg->a2d[lut].lut5 : "-");
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'A'+lut, logic_cfg->a2d[lut].lut6_str
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? logic_cfg->a2d[lut].lut6_str : "-",
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'A'+lut, logic_cfg->a2d[lut].lut5_str
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? logic_cfg->a2d[lut].lut5_str : "-");
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}
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}
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rc = fdev_logic_setconf(tstate->model, y, x, type_idx, logic_cfg);
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@ -1113,17 +1113,17 @@ static int test_logic(struct test_state* tstate, int y, int x, int type_idx,
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}
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}
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if ((dev->pinw_req_for_cfg[i] == LI_A6
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&& dev->u.logic.a2d[LUT_A].lut5
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&& *dev->u.logic.a2d[LUT_A].lut5)
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&& dev->u.logic.a2d[LUT_A].lut5_str
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&& *dev->u.logic.a2d[LUT_A].lut5_str)
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|| (dev->pinw_req_for_cfg[i] == LI_B6
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&& dev->u.logic.a2d[LUT_B].lut5
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&& *dev->u.logic.a2d[LUT_B].lut5)
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&& dev->u.logic.a2d[LUT_B].lut5_str
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&& *dev->u.logic.a2d[LUT_B].lut5_str)
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|| (dev->pinw_req_for_cfg[i] == LI_C6
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&& dev->u.logic.a2d[LUT_C].lut5
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&& *dev->u.logic.a2d[LUT_C].lut5)
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&& dev->u.logic.a2d[LUT_C].lut5_str
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&& *dev->u.logic.a2d[LUT_C].lut5_str)
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|| (dev->pinw_req_for_cfg[i] == LI_D6
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&& dev->u.logic.a2d[LUT_D].lut5
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&& *dev->u.logic.a2d[LUT_D].lut5)
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&& dev->u.logic.a2d[LUT_D].lut5_str
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&& *dev->u.logic.a2d[LUT_D].lut5_str)
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|| (latch_logic
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&& (dev->pinw_req_for_cfg[i] == LI_CLK
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|| dev->pinw_req_for_cfg[i] == LI_CE))) {
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@ -1245,7 +1245,7 @@ static int test_lut_encoding(struct test_state* tstate)
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for (type_i = 0; type_i < sizeof(idx_enum)/sizeof(*idx_enum); type_i++) {
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for (lut = LUT_A; lut <= LUT_D; lut++) {
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memset(&logic_cfg, 0, sizeof(logic_cfg));
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logic_cfg.a2d[lut].lut6 = lut6_str;
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logic_cfg.a2d[lut].lut6_str = lut6_str;
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logic_cfg.a2d[lut].out_used = 1;
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// lut6 only
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@ -1280,7 +1280,7 @@ static int test_lut_encoding(struct test_state* tstate)
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}
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// lut6 and lut5 pairs
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logic_cfg.a2d[lut].lut5 = lut5_str;
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logic_cfg.a2d[lut].lut5_str = lut5_str;
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logic_cfg.a2d[lut].out_mux = MUX_O5;
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sprintf(lut6_str, "(A6+~A6)*1");
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@ -1346,7 +1346,7 @@ static int test_logic_config(struct test_state* tstate)
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// lut6, direct-out
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memset(&logic_cfg, 0, sizeof(logic_cfg));
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logic_cfg.a2d[lut].lut6 = "A1";
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logic_cfg.a2d[lut].lut6_str = "A1";
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logic_cfg.a2d[lut].out_used = 1;
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rc = test_logic(tstate, y, x_enum[x_i],
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@ -1358,7 +1358,7 @@ static int test_logic_config(struct test_state* tstate)
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// O6 over mux-out seems not supported
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// on an X device.
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memset(&logic_cfg, 0, sizeof(logic_cfg));
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logic_cfg.a2d[lut].lut6 = "A1";
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logic_cfg.a2d[lut].lut6_str = "A1";
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logic_cfg.a2d[lut].out_mux = MUX_O6;
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rc = test_logic(tstate, y, x_enum[x_i],
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@ -1397,7 +1397,7 @@ static int test_logic_config(struct test_state* tstate)
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// lut6, ff-out
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memset(&logic_cfg, 0, sizeof(logic_cfg));
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logic_cfg.a2d[lut].lut6 = "A1";
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logic_cfg.a2d[lut].lut6_str = "A1";
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logic_cfg.a2d[lut].ff = FF_FF;
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logic_cfg.a2d[lut].ff_mux = MUX_O6;
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logic_cfg.a2d[lut].ff_srinit = FF_SRINIT0;
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@ -1440,7 +1440,7 @@ static int test_logic_config(struct test_state* tstate)
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// lut6, latch-out
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memset(&logic_cfg, 0, sizeof(logic_cfg));
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logic_cfg.a2d[lut].lut6 = "A1";
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logic_cfg.a2d[lut].lut6_str = "A1";
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logic_cfg.a2d[lut].ff = FF_LATCH;
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logic_cfg.a2d[lut].ff_mux = MUX_O6;
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logic_cfg.a2d[lut].ff_srinit = FF_SRINIT0;
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@ -1464,7 +1464,7 @@ static int test_logic_config(struct test_state* tstate)
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// lut6, and-latch
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memset(&logic_cfg, 0, sizeof(logic_cfg));
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logic_cfg.a2d[lut].lut6 = "A1";
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logic_cfg.a2d[lut].lut6_str = "A1";
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logic_cfg.a2d[lut].ff = FF_AND2L;
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logic_cfg.a2d[lut].ff_mux = MUX_O6;
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// AND2L requires SRINIT=0
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@ -1481,7 +1481,7 @@ static int test_logic_config(struct test_state* tstate)
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// lut6, or-latch
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memset(&logic_cfg, 0, sizeof(logic_cfg));
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logic_cfg.a2d[lut].lut6 = "A1";
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logic_cfg.a2d[lut].lut6_str = "A1";
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logic_cfg.a2d[lut].ff = FF_OR2L;
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logic_cfg.a2d[lut].ff_mux = MUX_O6;
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// OR2L requires SRINIT=1
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@ -1509,7 +1509,7 @@ static int test_logic_config(struct test_state* tstate)
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if (rc) FAIL(rc);
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// . o6-direct
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logic_cfg.a2d[lut].lut6 = "A1";
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logic_cfg.a2d[lut].lut6_str = "A1";
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logic_cfg.a2d[lut].out_used = 1;
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rc = test_logic(tstate, y, x_enum[x_i],
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idx_enum[type_i], &logic_cfg);
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@ -1531,9 +1531,9 @@ static int test_logic_config(struct test_state* tstate)
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// lut6 direct-out, lut5 mux-out
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memset(&logic_cfg, 0, sizeof(logic_cfg));
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logic_cfg.a2d[lut].lut6 = "(A6+~A6)*A1";
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logic_cfg.a2d[lut].lut6_str = "(A6+~A6)*A1";
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logic_cfg.a2d[lut].out_used = 1;
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logic_cfg.a2d[lut].lut5 = "A1*A2";
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logic_cfg.a2d[lut].lut5_str = "A1*A2";
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logic_cfg.a2d[lut].out_mux = MUX_O5;
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rc = test_logic(tstate, y, x_enum[x_i],
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idx_enum[type_i], &logic_cfg);
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@ -1607,29 +1607,29 @@ static int test_logic_config(struct test_state* tstate)
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if (idx_enum[type_i] == DEV_LOG_X) {
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// minimum-config X device
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memset(&logic_cfg, 0, sizeof(logic_cfg));
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logic_cfg.a2d[LUT_A].lut6 = "(A6+~A6)*A1";
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logic_cfg.a2d[LUT_A].lut5 = "A2";
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logic_cfg.a2d[LUT_A].lut6_str = "(A6+~A6)*A1";
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logic_cfg.a2d[LUT_A].lut5_str = "A2";
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logic_cfg.a2d[LUT_A].out_mux = MUX_5Q;
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logic_cfg.a2d[LUT_A].ff5_srinit = FF_SRINIT0;
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logic_cfg.a2d[LUT_A].ff = FF_FF;
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logic_cfg.a2d[LUT_A].ff_mux = MUX_O6;
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logic_cfg.a2d[LUT_A].ff_srinit = FF_SRINIT0;
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logic_cfg.a2d[LUT_B].lut6 = "(A6+~A6)*A4";
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logic_cfg.a2d[LUT_B].lut5 = "A3";
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logic_cfg.a2d[LUT_B].lut6_str = "(A6+~A6)*A4";
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logic_cfg.a2d[LUT_B].lut5_str = "A3";
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logic_cfg.a2d[LUT_B].out_mux = MUX_5Q;
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logic_cfg.a2d[LUT_B].ff5_srinit = FF_SRINIT0;
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logic_cfg.a2d[LUT_B].ff = FF_FF;
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logic_cfg.a2d[LUT_B].ff_mux = MUX_O6;
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logic_cfg.a2d[LUT_B].ff_srinit = FF_SRINIT0;
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logic_cfg.a2d[LUT_C].lut6 = "(A6+~A6)*(A2+A5)";
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logic_cfg.a2d[LUT_C].lut5 = "A3+A4";
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logic_cfg.a2d[LUT_C].lut6_str = "(A6+~A6)*(A2+A5)";
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logic_cfg.a2d[LUT_C].lut5_str = "A3+A4";
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logic_cfg.a2d[LUT_C].out_mux = MUX_5Q;
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logic_cfg.a2d[LUT_C].ff5_srinit = FF_SRINIT0;
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logic_cfg.a2d[LUT_C].ff = FF_FF;
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logic_cfg.a2d[LUT_C].ff_mux = MUX_O6;
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logic_cfg.a2d[LUT_C].ff_srinit = FF_SRINIT0;
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logic_cfg.a2d[LUT_D].lut6 = "(A6+~A6)*A3";
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logic_cfg.a2d[LUT_D].lut5 = "A3+A5";
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logic_cfg.a2d[LUT_D].lut6_str = "(A6+~A6)*A3";
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logic_cfg.a2d[LUT_D].lut5_str = "A3+A5";
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logic_cfg.a2d[LUT_D].out_mux = MUX_5Q;
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logic_cfg.a2d[LUT_D].ff5_srinit = FF_SRINIT0;
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logic_cfg.a2d[LUT_D].ff = FF_FF;
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@ -1646,26 +1646,26 @@ static int test_logic_config(struct test_state* tstate)
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}
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// cout
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memset(&logic_cfg, 0, sizeof(logic_cfg));
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logic_cfg.a2d[LUT_A].lut6 = "(A6+~A6)*(~A5)";
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logic_cfg.a2d[LUT_A].lut5 = "1";
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logic_cfg.a2d[LUT_A].lut6_str = "(A6+~A6)*(~A5)";
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logic_cfg.a2d[LUT_A].lut5_str = "1";
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logic_cfg.a2d[LUT_A].cy0 = CY0_O5;
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logic_cfg.a2d[LUT_A].ff = FF_FF;
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logic_cfg.a2d[LUT_A].ff_mux = MUX_XOR;
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logic_cfg.a2d[LUT_A].ff_srinit = FF_SRINIT0;
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logic_cfg.a2d[LUT_B].lut6 = "(A6+~A6)*(A5)";
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logic_cfg.a2d[LUT_B].lut5 = "1";
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logic_cfg.a2d[LUT_B].lut6_str = "(A6+~A6)*(A5)";
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logic_cfg.a2d[LUT_B].lut5_str = "1";
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logic_cfg.a2d[LUT_B].cy0 = CY0_O5;
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logic_cfg.a2d[LUT_B].ff = FF_FF;
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logic_cfg.a2d[LUT_B].ff_mux = MUX_XOR;
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logic_cfg.a2d[LUT_B].ff_srinit = FF_SRINIT0;
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logic_cfg.a2d[LUT_C].lut6 = "(A6+~A6)*(A5)";
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logic_cfg.a2d[LUT_C].lut5 = "1";
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logic_cfg.a2d[LUT_C].lut6_str = "(A6+~A6)*(A5)";
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logic_cfg.a2d[LUT_C].lut5_str = "1";
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logic_cfg.a2d[LUT_C].cy0 = CY0_O5;
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logic_cfg.a2d[LUT_C].ff = FF_FF;
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logic_cfg.a2d[LUT_C].ff_mux = MUX_XOR;
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logic_cfg.a2d[LUT_C].ff_srinit = FF_SRINIT0;
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logic_cfg.a2d[LUT_D].lut6 = "(A6+~A6)*(A5)";
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logic_cfg.a2d[LUT_D].lut5 = "1";
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logic_cfg.a2d[LUT_D].lut6_str = "(A6+~A6)*(A5)";
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logic_cfg.a2d[LUT_D].lut5_str = "1";
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logic_cfg.a2d[LUT_D].cy0 = CY0_O5;
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logic_cfg.a2d[LUT_D].ff = FF_FF;
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logic_cfg.a2d[LUT_D].ff_mux = MUX_XOR;
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@ -1682,10 +1682,10 @@ static int test_logic_config(struct test_state* tstate)
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// f8 out-mux
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memset(&logic_cfg, 0, sizeof(logic_cfg));
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logic_cfg.a2d[LUT_A].lut6 = "~A5";
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logic_cfg.a2d[LUT_B].lut6 = "(A5)";
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logic_cfg.a2d[LUT_C].lut6 = "A5";
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logic_cfg.a2d[LUT_D].lut6 = "((A5))";
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logic_cfg.a2d[LUT_A].lut6_str = "~A5";
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logic_cfg.a2d[LUT_B].lut6_str = "(A5)";
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logic_cfg.a2d[LUT_C].lut6_str = "A5";
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logic_cfg.a2d[LUT_D].lut6_str = "((A5))";
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logic_cfg.a2d[LUT_B].out_mux = MUX_F8;
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rc = test_logic(tstate, y, x_enum[x_i],
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idx_enum[type_i], &logic_cfg);
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@ -1704,8 +1704,8 @@ static int test_logic_config(struct test_state* tstate)
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// f7amux
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memset(&logic_cfg, 0, sizeof(logic_cfg));
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logic_cfg.a2d[LUT_A].lut6 = "~A5";
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logic_cfg.a2d[LUT_B].lut6 = "(A5)";
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logic_cfg.a2d[LUT_A].lut6_str = "~A5";
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logic_cfg.a2d[LUT_B].lut6_str = "(A5)";
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logic_cfg.a2d[LUT_A].out_mux = MUX_F7;
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rc = test_logic(tstate, y, x_enum[x_i],
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idx_enum[type_i], &logic_cfg);
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@ -1724,8 +1724,8 @@ static int test_logic_config(struct test_state* tstate)
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// f7bmux
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memset(&logic_cfg, 0, sizeof(logic_cfg));
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logic_cfg.a2d[LUT_C].lut6 = "~A5";
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logic_cfg.a2d[LUT_D].lut6 = "(A5)";
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logic_cfg.a2d[LUT_C].lut6_str = "~A5";
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logic_cfg.a2d[LUT_D].lut6_str = "(A5)";
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logic_cfg.a2d[LUT_C].out_mux = MUX_F7;
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rc = test_logic(tstate, y, x_enum[x_i],
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idx_enum[type_i], &logic_cfg);
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@ -100,20 +100,20 @@ int main(int argc, char** argv)
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}
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if (!cur_bit) { // first bit
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logic_cfg.precyinit = PRECYINIT_0;
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logic_cfg.a2d[LUT_A].lut6 = "(A6+~A6)*(~A5)";
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logic_cfg.a2d[LUT_A].lut5 = "1";
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logic_cfg.a2d[LUT_A].lut6_str = "(A6+~A6)*(~A5)";
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logic_cfg.a2d[LUT_A].lut5_str = "1";
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logic_cfg.a2d[LUT_A].cy0 = CY0_O5;
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logic_cfg.a2d[LUT_A].ff = FF_FF;
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logic_cfg.a2d[LUT_A].ff_mux = MUX_XOR;
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logic_cfg.a2d[LUT_A].ff_srinit = FF_SRINIT0;
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} else if (cur_bit == param_highest_bit) {
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logic_cfg.a2d[cur_bit%4].lut6 = "A5";
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logic_cfg.a2d[cur_bit%4].lut6_str = "A5";
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logic_cfg.a2d[cur_bit%4].ff = FF_FF;
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logic_cfg.a2d[cur_bit%4].ff_mux = MUX_XOR;
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logic_cfg.a2d[cur_bit%4].ff_srinit = FF_SRINIT0;
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} else {
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logic_cfg.a2d[cur_bit%4].lut6 = "(A6+~A6)*(A5)";
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logic_cfg.a2d[cur_bit%4].lut5 = "0";
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logic_cfg.a2d[cur_bit%4].lut6_str = "(A6+~A6)*(A5)";
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logic_cfg.a2d[cur_bit%4].lut5_str = "0";
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logic_cfg.a2d[cur_bit%4].cy0 = CY0_O5;
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logic_cfg.a2d[cur_bit%4].ff = FF_FF;
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logic_cfg.a2d[cur_bit%4].ff_mux = MUX_XOR;
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@ -139,18 +139,18 @@ int main(int argc, char** argv)
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fnet_add_port(&model, clock_net, cur_y, logic_x, DEV_LOGIC, logic_type_idx, LI_CLK);
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// lut5 net (drive vcc into A6 to enable lut5)
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if (logic_cfg.a2d[LUT_A].lut5
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|| logic_cfg.a2d[LUT_B].lut5
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|| logic_cfg.a2d[LUT_C].lut5
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|| logic_cfg.a2d[LUT_D].lut5) {
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if (logic_cfg.a2d[LUT_A].lut5_str
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|| logic_cfg.a2d[LUT_B].lut5_str
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|| logic_cfg.a2d[LUT_C].lut5_str
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|| logic_cfg.a2d[LUT_D].lut5_str) {
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fnet_new(&model, &net);
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if (logic_cfg.a2d[LUT_A].lut5)
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if (logic_cfg.a2d[LUT_A].lut5_str)
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fnet_add_port(&model, net, cur_y, logic_x, DEV_LOGIC, logic_type_idx, LI_A6);
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if (logic_cfg.a2d[LUT_B].lut5)
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if (logic_cfg.a2d[LUT_B].lut5_str)
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fnet_add_port(&model, net, cur_y, logic_x, DEV_LOGIC, logic_type_idx, LI_B6);
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if (logic_cfg.a2d[LUT_C].lut5)
|
||||
if (logic_cfg.a2d[LUT_C].lut5_str)
|
||||
fnet_add_port(&model, net, cur_y, logic_x, DEV_LOGIC, logic_type_idx, LI_C6);
|
||||
if (logic_cfg.a2d[LUT_D].lut5)
|
||||
if (logic_cfg.a2d[LUT_D].lut5_str)
|
||||
fnet_add_port(&model, net, cur_y, logic_x, DEV_LOGIC, logic_type_idx, LI_D6);
|
||||
fnet_vcc_gnd(&model, net, /*is_vcc*/ 1);
|
||||
}
|
||||
|
|
|
@ -1220,8 +1220,8 @@ static int extract_logic(struct extract_state* es)
|
|||
rc = lut2str(lut_ML[LUT_A], l_col
|
||||
? XC6_LMAP_XL_L_A : XC6_LMAP_XM_M_A,
|
||||
lut5_used,
|
||||
lut6_ml[LUT_A], &cfg_ml.a2d[LUT_A].lut6,
|
||||
lut5_ml[LUT_A], &cfg_ml.a2d[LUT_A].lut5);
|
||||
lut6_ml[LUT_A], &cfg_ml.a2d[LUT_A].lut6_str,
|
||||
lut5_ml[LUT_A], &cfg_ml.a2d[LUT_A].lut5_str);
|
||||
if (rc) FAIL(rc);
|
||||
}
|
||||
// ML-B
|
||||
|
@ -1245,8 +1245,8 @@ static int extract_logic(struct extract_state* es)
|
|||
rc = lut2str(lut_ML[LUT_B], l_col
|
||||
? XC6_LMAP_XL_L_B : XC6_LMAP_XM_M_B,
|
||||
lut5_used,
|
||||
lut6_ml[LUT_B], &cfg_ml.a2d[LUT_B].lut6,
|
||||
lut5_ml[LUT_B], &cfg_ml.a2d[LUT_B].lut5);
|
||||
lut6_ml[LUT_B], &cfg_ml.a2d[LUT_B].lut6_str,
|
||||
lut5_ml[LUT_B], &cfg_ml.a2d[LUT_B].lut5_str);
|
||||
if (rc) FAIL(rc);
|
||||
}
|
||||
// ML-C
|
||||
|
@ -1270,8 +1270,8 @@ static int extract_logic(struct extract_state* es)
|
|||
rc = lut2str(lut_ML[LUT_C], l_col
|
||||
? XC6_LMAP_XL_L_C : XC6_LMAP_XM_M_C,
|
||||
lut5_used,
|
||||
lut6_ml[LUT_C], &cfg_ml.a2d[LUT_C].lut6,
|
||||
lut5_ml[LUT_C], &cfg_ml.a2d[LUT_C].lut5);
|
||||
lut6_ml[LUT_C], &cfg_ml.a2d[LUT_C].lut6_str,
|
||||
lut5_ml[LUT_C], &cfg_ml.a2d[LUT_C].lut5_str);
|
||||
if (rc) FAIL(rc);
|
||||
}
|
||||
// ML-D
|
||||
|
@ -1295,8 +1295,8 @@ static int extract_logic(struct extract_state* es)
|
|||
rc = lut2str(lut_ML[LUT_D], l_col
|
||||
? XC6_LMAP_XL_L_D : XC6_LMAP_XM_M_D,
|
||||
lut5_used,
|
||||
lut6_ml[LUT_D], &cfg_ml.a2d[LUT_D].lut6,
|
||||
lut5_ml[LUT_D], &cfg_ml.a2d[LUT_D].lut5);
|
||||
lut6_ml[LUT_D], &cfg_ml.a2d[LUT_D].lut6_str,
|
||||
lut5_ml[LUT_D], &cfg_ml.a2d[LUT_D].lut5_str);
|
||||
if (rc) FAIL(rc);
|
||||
}
|
||||
// X-A
|
||||
|
@ -1309,8 +1309,8 @@ static int extract_logic(struct extract_state* es)
|
|||
rc = lut2str(lut_X[LUT_A], l_col
|
||||
? XC6_LMAP_XL_X_A : XC6_LMAP_XM_X_A,
|
||||
lut5_used,
|
||||
lut6_x[LUT_A], &cfg_x.a2d[LUT_A].lut6,
|
||||
lut5_x[LUT_A], &cfg_x.a2d[LUT_A].lut5);
|
||||
lut6_x[LUT_A], &cfg_x.a2d[LUT_A].lut6_str,
|
||||
lut5_x[LUT_A], &cfg_x.a2d[LUT_A].lut5_str);
|
||||
if (rc) FAIL(rc);
|
||||
|
||||
}
|
||||
|
@ -1324,8 +1324,8 @@ static int extract_logic(struct extract_state* es)
|
|||
rc = lut2str(lut_X[LUT_B], l_col
|
||||
? XC6_LMAP_XL_X_B : XC6_LMAP_XM_X_B,
|
||||
lut5_used,
|
||||
lut6_x[LUT_B], &cfg_x.a2d[LUT_B].lut6,
|
||||
lut5_x[LUT_B], &cfg_x.a2d[LUT_B].lut5);
|
||||
lut6_x[LUT_B], &cfg_x.a2d[LUT_B].lut6_str,
|
||||
lut5_x[LUT_B], &cfg_x.a2d[LUT_B].lut5_str);
|
||||
if (rc) FAIL(rc);
|
||||
|
||||
}
|
||||
|
@ -1339,8 +1339,8 @@ static int extract_logic(struct extract_state* es)
|
|||
rc = lut2str(lut_X[LUT_C], l_col
|
||||
? XC6_LMAP_XL_X_C : XC6_LMAP_XM_X_C,
|
||||
lut5_used,
|
||||
lut6_x[LUT_C], &cfg_x.a2d[LUT_C].lut6,
|
||||
lut5_x[LUT_C], &cfg_x.a2d[LUT_C].lut5);
|
||||
lut6_x[LUT_C], &cfg_x.a2d[LUT_C].lut6_str,
|
||||
lut5_x[LUT_C], &cfg_x.a2d[LUT_C].lut5_str);
|
||||
if (rc) FAIL(rc);
|
||||
|
||||
}
|
||||
|
@ -1354,8 +1354,8 @@ static int extract_logic(struct extract_state* es)
|
|||
rc = lut2str(lut_X[LUT_D], l_col
|
||||
? XC6_LMAP_XL_X_D : XC6_LMAP_XM_X_D,
|
||||
lut5_used,
|
||||
lut6_x[LUT_D], &cfg_x.a2d[LUT_D].lut6,
|
||||
lut5_x[LUT_D], &cfg_x.a2d[LUT_D].lut5);
|
||||
lut6_x[LUT_D], &cfg_x.a2d[LUT_D].lut6_str,
|
||||
lut5_x[LUT_D], &cfg_x.a2d[LUT_D].lut5_str);
|
||||
if (rc) FAIL(rc);
|
||||
|
||||
}
|
||||
|
@ -2765,24 +2765,24 @@ static int str2lut(uint64_t *lut, int lut_pos, const struct fpgadev_logic_a2d *a
|
|||
int lut6_used, lut5_used, lut_map[64], rc;
|
||||
uint64_t u64;
|
||||
|
||||
lut6_used = a2d->lut6 && a2d->lut6[0];
|
||||
lut5_used = a2d->lut5 && a2d->lut5[0];
|
||||
lut6_used = a2d->lut6_str && a2d->lut6_str[0];
|
||||
lut5_used = a2d->lut5_str && a2d->lut5_str[0];
|
||||
if (!lut6_used && !lut5_used)
|
||||
return 0;
|
||||
|
||||
if (lut5_used) {
|
||||
if (!lut6_used) u64 = 0;
|
||||
else {
|
||||
rc = bool_str2bits(a2d->lut6, &u64, 32);
|
||||
rc = bool_str2bits(a2d->lut6_str, &u64, 32);
|
||||
if (rc) FAIL(rc);
|
||||
u64 <<= 32;
|
||||
}
|
||||
rc = bool_str2bits(a2d->lut5, &u64, 32);
|
||||
rc = bool_str2bits(a2d->lut5_str, &u64, 32);
|
||||
if (rc) FAIL(rc);
|
||||
xc6_lut_bitmap(lut_pos, &lut_map, 32);
|
||||
} else {
|
||||
// lut6_used only
|
||||
rc = bool_str2bits(a2d->lut6, &u64, 64);
|
||||
rc = bool_str2bits(a2d->lut6_str, &u64, 64);
|
||||
if (rc) FAIL(rc);
|
||||
xc6_lut_bitmap(lut_pos, &lut_map, 64);
|
||||
}
|
||||
|
|
|
@ -419,14 +419,14 @@ int fdev_logic_setconf(struct fpga_model* model, int y, int x,
|
|||
for (lut = LUT_A; lut <= LUT_D; lut++) {
|
||||
if (logic_cfg->a2d[lut].out_used)
|
||||
dev->u.logic.a2d[lut].out_used = 1;
|
||||
if (logic_cfg->a2d[lut].lut6) {
|
||||
if (logic_cfg->a2d[lut].lut6_str) {
|
||||
rc = fdev_logic_a2d_lut(model, y, x, type_idx,
|
||||
lut, 6, logic_cfg->a2d[lut].lut6, ZTERM);
|
||||
lut, 6, logic_cfg->a2d[lut].lut6_str, ZTERM);
|
||||
if (rc) FAIL(rc);
|
||||
}
|
||||
if (logic_cfg->a2d[lut].lut5) {
|
||||
if (logic_cfg->a2d[lut].lut5_str) {
|
||||
rc = fdev_logic_a2d_lut(model, y, x, type_idx,
|
||||
lut, 5, logic_cfg->a2d[lut].lut5, ZTERM);
|
||||
lut, 5, logic_cfg->a2d[lut].lut5_str, ZTERM);
|
||||
if (rc) FAIL(rc);
|
||||
}
|
||||
if (logic_cfg->a2d[lut].ff) {
|
||||
|
@ -500,8 +500,8 @@ int fdev_logic_a2d_lut(struct fpga_model* model, int y, int x, int type_idx,
|
|||
if (rc) FAIL(rc);
|
||||
|
||||
lut_ptr = (lut_5or6 == 5)
|
||||
? &dev->u.logic.a2d[lut_a2d].lut5
|
||||
: &dev->u.logic.a2d[lut_a2d].lut6;
|
||||
? &dev->u.logic.a2d[lut_a2d].lut5_str
|
||||
: &dev->u.logic.a2d[lut_a2d].lut6_str;
|
||||
if (*lut_ptr == 0) {
|
||||
*lut_ptr = malloc(MAX_LUT_LEN);
|
||||
if (!(*lut_ptr)) FAIL(ENOMEM);
|
||||
|
@ -945,17 +945,17 @@ int fdev_set_required_pins(struct fpga_model* model, int y, int x, int type,
|
|||
// LI_AX..LI_DX are in sequence
|
||||
add_req_inpin(dev, LI_AX+i);
|
||||
}
|
||||
if (dev->u.logic.a2d[i].lut6) {
|
||||
scan_lut_digits(dev->u.logic.a2d[i].lut6, digits);
|
||||
if (dev->u.logic.a2d[i].lut6_str) {
|
||||
scan_lut_digits(dev->u.logic.a2d[i].lut6_str, digits);
|
||||
for (j = 0; j < 6; j++) {
|
||||
if (!digits[j]) continue;
|
||||
add_req_inpin(dev, LI_A1+i*6+j);
|
||||
}
|
||||
}
|
||||
if (dev->u.logic.a2d[i].lut5) {
|
||||
if (dev->u.logic.a2d[i].lut5_str) {
|
||||
// A6 must be high/vcc if lut5 is used
|
||||
add_req_inpin(dev, LI_A6+i*6);
|
||||
scan_lut_digits(dev->u.logic.a2d[i].lut5, digits);
|
||||
scan_lut_digits(dev->u.logic.a2d[i].lut5_str, digits);
|
||||
for (j = 0; j < 6; j++) {
|
||||
if (!digits[j]) continue;
|
||||
add_req_inpin(dev, LI_A1+i*6+j);
|
||||
|
@ -993,10 +993,10 @@ void fdev_delete(struct fpga_model* model, int y, int x, int type, int type_idx)
|
|||
dev->pinw_req_in = 0;
|
||||
if (dev->type == DEV_LOGIC) {
|
||||
for (i = LUT_A; i <= LUT_D; i++) {
|
||||
free(dev->u.logic.a2d[i].lut6);
|
||||
dev->u.logic.a2d[i].lut6 = 0;
|
||||
free(dev->u.logic.a2d[i].lut5);
|
||||
dev->u.logic.a2d[i].lut5 = 0;
|
||||
free(dev->u.logic.a2d[i].lut6_str);
|
||||
dev->u.logic.a2d[i].lut6_str = 0;
|
||||
free(dev->u.logic.a2d[i].lut5_str);
|
||||
dev->u.logic.a2d[i].lut5_str = 0;
|
||||
}
|
||||
}
|
||||
dev->instantiated = 0;
|
||||
|
|
|
@ -327,12 +327,12 @@ static int printf_LOGIC(FILE* f, struct fpga_model* model,
|
|||
}
|
||||
cfg = &tile->devs[i].u.logic;
|
||||
for (j = LUT_D; j >= LUT_A; j--) {
|
||||
if (cfg->a2d[j].lut6 && cfg->a2d[j].lut6[0])
|
||||
if (cfg->a2d[j].lut6_str && cfg->a2d[j].lut6_str[0])
|
||||
fprintf(f, "%s %c6_lut %s\n", pref, 'A'+j,
|
||||
cfg->a2d[j].lut6);
|
||||
if (cfg->a2d[j].lut5 && cfg->a2d[j].lut5[0])
|
||||
cfg->a2d[j].lut6_str);
|
||||
if (cfg->a2d[j].lut5_str && cfg->a2d[j].lut5_str[0])
|
||||
fprintf(f, "%s %c5_lut %s\n", pref, 'A'+j,
|
||||
cfg->a2d[j].lut5);
|
||||
cfg->a2d[j].lut5_str);
|
||||
if (cfg->a2d[j].out_used)
|
||||
fprintf(f, "%s %c_used\n", pref, 'A'+j);
|
||||
switch (cfg->a2d[j].ff) {
|
||||
|
|
|
@ -431,8 +431,8 @@ enum { PRECYINIT_0 = 1, PRECYINIT_1, PRECYINIT_AX };
|
|||
struct fpgadev_logic_a2d
|
||||
{
|
||||
int out_used;
|
||||
char* lut6;
|
||||
char* lut5;
|
||||
char* lut6_str;
|
||||
char* lut5_str;
|
||||
int ff_mux; // O6, O5, X, F7(a/c), F8(b), MC31(d), CY, XOR
|
||||
int ff_srinit; // SRINIT0, SRINIT1
|
||||
int ff5_srinit; // SRINIT0, SRINIT1
|
||||
|
|
Loading…
Reference in New Issue
Block a user