diff --git a/.gitignore b/.gitignore index 42bf14f..d87d560 100644 --- a/.gitignore +++ b/.gitignore @@ -28,6 +28,7 @@ pair2net autotest fp2bit bit2fp +printf_swbits hello_world blinking_led diff --git a/Makefile b/Makefile index bb04f67..3f7049f 100644 --- a/Makefile +++ b/Makefile @@ -11,8 +11,8 @@ CFLAGS += -I$(CURDIR)/libs LDFLAGS += -Wl,-rpath,$(CURDIR)/libs -OBJS = autotest.o bit2fp.o draw_svg_tiles.o fp2bit.o hstrrep.o \ - merge_seq.o new_fp.o pair2net.o sort_seq.o hello_world.o \ +OBJS = autotest.o bit2fp.o printf_swbits.o draw_svg_tiles.o fp2bit.o \ + hstrrep.o merge_seq.o new_fp.o pair2net.o sort_seq.o hello_world.o \ blinking_led.o DYNAMIC_LIBS = libs/libfpga-model.so libs/libfpga-bit.so \ @@ -23,7 +23,7 @@ DYNAMIC_LIBS = libs/libfpga-model.so libs/libfpga-bit.so \ .SECONDARY: .SECONDEXPANSION: -all: new_fp fp2bit bit2fp draw_svg_tiles autotest hstrrep \ +all: new_fp fp2bit bit2fp printf_swbits draw_svg_tiles autotest hstrrep \ sort_seq merge_seq pair2net hello_world blinking_led include Makefile.common @@ -168,8 +168,8 @@ compare_%_conns.fco: compare_%.fp sort_seq merge_seq compare_%_sw.fco: compare_%.fp @cat $<|awk '{if ($$1=="sw") printf "%s %s %s %s %s\n",$$2,$$3,$$4,$$5,$$6}'|sort >$@ -compare_%_swbits.fco: bit2fp - @./bit2fp --printf-swbits | sort > $@ +compare_%_swbits.fco: printf_swbits + @./printf_swbits | sort > $@ compare_%.fp: new_fp @./new_fp >$@ @@ -198,6 +198,8 @@ fp2bit: fp2bit.o $(DYNAMIC_LIBS) bit2fp: bit2fp.o $(DYNAMIC_LIBS) +printf_swbits: printf_swbits.o $(DYNAMIC_LIBS) + new_fp: new_fp.o $(DYNAMIC_LIBS) draw_svg_tiles: CFLAGS += `pkg-config libxml-2.0 --cflags` @@ -222,7 +224,7 @@ clean: @make -C libs clean rm -f $(OBJS) *.d rm -f draw_svg_tiles new_fp hstrrep sort_seq merge_seq autotest - rm -f fp2bit bit2fp pair2net hello_world blinking_led + rm -f fp2bit bit2fp printf_swbits pair2net hello_world blinking_led rm -f xc6slx9.fp xc6slx9.svg rm -f $(DESIGN_GOLD) $(AUTOTEST_GOLD) $(COMPARE_GOLD) rm -f test.gold/compare_xc6slx9.fp diff --git a/autotest.c b/autotest.c index 4e263e0..7198442 100644 --- a/autotest.c +++ b/autotest.c @@ -1748,7 +1748,7 @@ static int test_bscan_config(struct test_state* tstate) static int test_clock_routing(struct test_state* tstate) { - int rc, i, iob_clk_y, iob_clk_x, iob_clk_type_idx; + int rc, i, t2_io_idx, iob_clk_y, iob_clk_x, iob_clk_type_idx; int logic_y, logic_x, logic_type_idx; int y; net_idx_t clock_net; @@ -1759,15 +1759,16 @@ static int test_clock_routing(struct test_state* tstate) // first round over all gclk pins to the same logic dev // - for (i = 0; i < tstate->model->pkg->num_gclk_pins; i++) { - if (!tstate->model->pkg->gclk_pin[i]) - continue; - fpga_find_iob(tstate->model, tstate->model->pkg->gclk_pin[i], - &iob_clk_y, &iob_clk_x, &iob_clk_type_idx); - RC_CHECK(tstate->model); - printf("\nO test %i: gclk pin %s (y%i x%i IOB %i)\n", - tstate->next_diff_counter, tstate->model->pkg->gclk_pin[i], + for (i = 0; i < tstate->model->die->num_gclk_pins; i++) { + + t2_io_idx = tstate->model->die->gclk_t2_io_idx[i]; + iob_clk_y = tstate->model->die->t2_io[t2_io_idx].y; + iob_clk_x = tstate->model->die->t2_io[t2_io_idx].x; + iob_clk_type_idx = tstate->model->die->t2_io[t2_io_idx].type_idx; + printf("\nO test %i: gclk %i (y%i x%i IOB %i)\n", + tstate->next_diff_counter, i, iob_clk_y, iob_clk_x, iob_clk_type_idx); + fdev_iob_input(tstate->model, iob_clk_y, iob_clk_x, iob_clk_type_idx, IO_LVCMOS33); @@ -1807,12 +1808,13 @@ static int test_clock_routing(struct test_state* tstate) // left and right side of all hclk rows top-down. // - for (i = 0; i < tstate->model->pkg->num_gclk_pins; i++) { - if (!tstate->model->pkg->gclk_pin[i]) - continue; - fpga_find_iob(tstate->model, tstate->model->pkg->gclk_pin[i], - &iob_clk_y, &iob_clk_x, &iob_clk_type_idx); - RC_CHECK(tstate->model); + for (i = 0; i < tstate->model->die->num_gclk_pins; i++) { + + t2_io_idx = tstate->model->die->gclk_t2_io_idx[i]; + iob_clk_y = tstate->model->die->t2_io[t2_io_idx].y; + iob_clk_x = tstate->model->die->t2_io[t2_io_idx].x; + iob_clk_type_idx = tstate->model->die->t2_io[t2_io_idx].type_idx; + // skip top and bottom iobs if (iob_clk_x != LEFT_OUTER_COL && iob_clk_x != tstate->model->x_width-RIGHT_OUTER_O) diff --git a/bit2fp.c b/bit2fp.c index bacf25c..c58268b 100644 --- a/bit2fp.c +++ b/bit2fp.c @@ -13,7 +13,7 @@ int main(int argc, char** argv) { struct fpga_model model; int bit_header, bit_regs, bit_crc, fp_header, pull_model, file_arg, flags; - int print_swbits, rc = -1; + int rc = -1; struct fpga_config config; // parameters @@ -22,7 +22,7 @@ int main(int argc, char** argv) "\n" "%s - bitstream to floorplan\n" "Usage: %s [--bit-header] [--bit-regs] [--bit-crc] [--no-model]\n" - " %*s [--no-fp-header] [--printf-swbits] \n" + " %*s [--no-fp-header] \n" "\n", argv[0], argv[0], (int) strlen(argv[0]), ""); goto fail; } @@ -32,7 +32,6 @@ int main(int argc, char** argv) pull_model = 1; fp_header = 1; file_arg = 1; - print_swbits = 0; while (file_arg < argc && !strncmp(argv[file_arg], "--", 2)) { if (!strcmp(argv[file_arg], "--bit-header")) @@ -45,22 +44,10 @@ int main(int argc, char** argv) pull_model = 0; else if (!strcmp(argv[file_arg], "--no-fp-header")) fp_header = 0; - else if (!strcmp(argv[file_arg], "--printf-swbits")) - print_swbits = 1; else break; file_arg++; } - // build model - if ((rc = fpga_build_model(&model, XC6SLX9, TQG144))) - FAIL(rc); - - if (print_swbits) { - rc = printf_swbits(&model); - if (rc) FAIL(rc); - return 0; - } - // read binary configuration file { FILE* fbits = fopen(argv[file_arg], "r"); @@ -73,6 +60,15 @@ int main(int argc, char** argv) if (rc) FAIL(rc); } + // build model + if (config.idcode_reg == -1) FAIL(EINVAL); + // todo: scanf package from header string, better default for part + // 1. cmd line + // 2. header string + // 3. part-default + if ((rc = fpga_build_model(&model, config.reg[config.idcode_reg].int_v, + cmdline_package(argc, argv)))) FAIL(rc); + // fill model from binary configuration if (pull_model) if ((rc = extract_model(&model, &config.bits))) FAIL(rc); diff --git a/blinking_led.c b/blinking_led.c index 19aae65..4843ae2 100644 --- a/blinking_led.c +++ b/blinking_led.c @@ -37,27 +37,30 @@ int main(int argc, char** argv) if (cmdline_help(argc, argv)) { printf( " %*s [-Dbits=14|23]\n" - " %*s [-Dclock_pin=P55|...]\n" - " %*s [-Dled_pin=P48|...]\n" + " %*s [-Dclock_pin=IO_L30N_GCLK0_USERCCLK_2|...]\n" + " %*s [-Dled_pin=IO_L48P_D7_2|...]\n" "\n", (int) strlen(*argv), "", (int) strlen(*argv), "", (int) strlen(*argv), ""); return 0; } if (!(param_bits = cmdline_intvar(argc, argv, "bits"))) param_bits = 14; + if (!(param_clock_pin = cmdline_strvar(argc, argv, "clock_pin"))) - param_clock_pin = "P55"; + param_clock_pin = "IO_L30N_GCLK0_USERCCLK_2"; if (!(param_led_pin = cmdline_strvar(argc, argv, "led_pin"))) - param_led_pin = "P48"; + param_led_pin = "IO_L48P_D7_2"; fpga_build_model(&model, cmdline_part(argc, argv), cmdline_package(argc, argv)); - fpga_find_iob(&model, param_clock_pin, &iob_clk_y, &iob_clk_x, &iob_clk_type_idx); + fpga_find_iob(&model, xc6_find_pkg_pin(model.pkg, param_clock_pin), + &iob_clk_y, &iob_clk_x, &iob_clk_type_idx); fdev_iob_input(&model, iob_clk_y, iob_clk_x, iob_clk_type_idx, IO_LVCMOS33); - fpga_find_iob(&model, param_led_pin, &iob_led_y, &iob_led_x, &iob_led_type_idx); + fpga_find_iob(&model, xc6_find_pkg_pin(model.pkg, param_led_pin), + &iob_led_y, &iob_led_x, &iob_led_type_idx); fdev_iob_output(&model, iob_led_y, iob_led_x, iob_led_type_idx, IO_LVCMOS25); fdev_iob_slew(&model, iob_led_y, iob_led_x, iob_led_type_idx, diff --git a/libs/bit_frames.c b/libs/bit_frames.c index b00ae05..91f30cf 100644 --- a/libs/bit_frames.c +++ b/libs/bit_frames.c @@ -269,16 +269,15 @@ fail: static int extract_iobs(struct extract_state* es) { - int i, num_iobs, iob_y, iob_x, iob_idx, dev_idx, first_iob, rc; + int i, iob_y, iob_x, iob_idx, dev_idx, first_iob, rc; uint64_t u64; const char* iob_sitename; struct fpga_device* dev; struct fpgadev_iob cfg; RC_CHECK(es->model); - num_iobs = get_num_iobs(XC6SLX9); first_iob = 0; - for (i = 0; i < num_iobs; i++) { + for (i = 0; i < es->model->die->num_t2_ios; i++) { u64 = frame_get_u64(&es->bits->d[ IOB_DATA_START + i*IOB_ENTRY_LEN]); if (!u64) continue; @@ -572,22 +571,20 @@ fail: static int extract_type2(struct extract_state* es) { - int i, bits_off; + int gclk_i, bits_off; uint16_t u16; RC_CHECK(es->model); extract_iobs(es); - for (i = 0; i < es->model->pkg->num_gclk_pins; i++) { - if (!es->model->pkg->gclk_pin[i]) - continue; + for (gclk_i = 0; gclk_i < es->model->die->num_gclk_pins; gclk_i++) { bits_off = IOB_DATA_START - + es->model->pkg->gclk_type2_o[i]*XC6_WORD_BYTES + + es->model->die->gclk_t2_switches[gclk_i]*XC6_WORD_BYTES + XC6_TYPE2_GCLK_REG_SW/XC6_WORD_BITS; u16 = frame_get_u16(&es->bits->d[bits_off]); if (!u16) continue; if (u16 & (1<<(XC6_TYPE2_GCLK_REG_SW%XC6_WORD_BITS))) { - int iob_y, iob_x, iob_idx; + int t2_io_idx, iob_y, iob_x, iob_type_idx; struct fpga_device *iob_dev; struct switch_to_yx_l2 switch_to_yx_l2; struct switch_to_rel switch_to_rel; @@ -597,10 +594,11 @@ static int extract_type2(struct extract_state* es) // the writing equivalent is in write_inner_term_sw() // - fpga_find_iob(es->model, es->model->pkg->gclk_pin[i], - &iob_y, &iob_x, &iob_idx); - RC_CHECK(es->model); - iob_dev = fdev_p(es->model, iob_y, iob_x, DEV_IOB, iob_idx); + t2_io_idx = es->model->die->gclk_t2_io_idx[gclk_i]; + iob_y = es->model->die->t2_io[t2_io_idx].y; + iob_x = es->model->die->t2_io[t2_io_idx].x; + iob_type_idx = es->model->die->t2_io[t2_io_idx].type_idx; + iob_dev = fdev_p(es->model, iob_y, iob_x, DEV_IOB, iob_type_idx); RC_ASSERT(es->model, iob_dev); switch_to_yx_l2.l1.yx_req = YX_X_CENTER_CMTPLL | YX_Y_CENTER; @@ -2489,7 +2487,7 @@ static int write_inner_term_sw(struct fpga_bits *bits, if ((from_found = strstr(from_str, "CLKPIN")) && (to_found = strstr(to_str, "CKPIN"))) { struct switch_to_yx_l2 switch_to_yx_l2; - int iob_y, iob_x, iob_idx; + int t2_io_idx, iob_y, iob_x, iob_type_idx; struct fpga_device *iob_dev; from_idx = atoi(&from_found[6]); @@ -2508,17 +2506,16 @@ static int write_inner_term_sw(struct fpga_bits *bits, RC_ASSERT(model, switch_to_yx_l2.l1.set.len); // find matching gclk pin - for (j = 0; j < model->pkg->num_gclk_pins; j++) { - if (!model->pkg->gclk_pin[j]) - continue; + for (j = 0; j < model->die->num_gclk_pins; j++) { + t2_io_idx = model->die->gclk_t2_io_idx[j]; + iob_y = model->die->t2_io[t2_io_idx].y; + iob_x = model->die->t2_io[t2_io_idx].x; + iob_type_idx = model->die->t2_io[t2_io_idx].type_idx; - fpga_find_iob(model, model->pkg->gclk_pin[j], - &iob_y, &iob_x, &iob_idx); - RC_CHECK(model); if (iob_y != switch_to_yx_l2.l1.dest_y || iob_x != switch_to_yx_l2.l1.dest_x) continue; - iob_dev = fdev_p(model, iob_y, iob_x, DEV_IOB, iob_idx); + iob_dev = fdev_p(model, iob_y, iob_x, DEV_IOB, iob_type_idx); RC_ASSERT(model, iob_dev); if (fpga_switch_lookup(model, iob_y, iob_x, @@ -2527,12 +2524,12 @@ static int write_inner_term_sw(struct fpga_bits *bits, break; } // set bit - if (j < model->pkg->num_gclk_pins) { + if (j < model->die->num_gclk_pins) { uint16_t u16; int bits_off; bits_off = IOB_DATA_START - + model->pkg->gclk_type2_o[j]*XC6_WORD_BYTES + + model->die->gclk_t2_switches[j]*XC6_WORD_BYTES + XC6_TYPE2_GCLK_REG_SW/XC6_WORD_BITS; u16 = frame_get_u16(&bits->d[bits_off]); u16 |= 1<<(XC6_TYPE2_GCLK_REG_SW%XC6_WORD_BITS); diff --git a/libs/control.c b/libs/control.c index 0f8f204..6ca6ec5 100644 --- a/libs/control.c +++ b/libs/control.c @@ -163,50 +163,6 @@ int fpga_find_iob(struct fpga_model* model, const char* sitename, return -1; } -const char* fpga_iob_sitename(struct fpga_model* model, int y, int x, - dev_type_idx_t idx) -{ - int i; - - if (y == TOP_OUTER_ROW) { - for (i = 0; i < sizeof(xc6slx9_iob_top)/sizeof(xc6slx9_iob_top[0]); i++) { - if (xc6slx9_iob_top[i].xy == x) { - if (idx < 0 || idx > 3) return 0; - return xc6slx9_iob_top[i].name[idx]; - } - } - return 0; - } - if (y == model->y_height-BOT_OUTER_ROW) { - for (i = 0; i < sizeof(xc6slx9_iob_bottom)/sizeof(xc6slx9_iob_bottom[0]); i++) { - if (xc6slx9_iob_bottom[i].xy == x) { - if (idx < 0 || idx > 3) return 0; - return xc6slx9_iob_bottom[i].name[idx]; - } - } - return 0; - } - if (x == LEFT_OUTER_COL) { - for (i = 0; i < sizeof(xc6slx9_iob_left)/sizeof(xc6slx9_iob_left[0]); i++) { - if (xc6slx9_iob_left[i].xy == y) { - if (idx < 0 || idx > 1) return 0; - return xc6slx9_iob_left[i].name[idx]; - } - } - return 0; - } - if (x == model->x_width-RIGHT_OUTER_O) { - for (i = 0; i < sizeof(xc6slx9_iob_right)/sizeof(xc6slx9_iob_right[0]); i++) { - if (xc6slx9_iob_right[i].xy == y) { - if (idx < 0 || idx > 1) return 0; - return xc6slx9_iob_right[i].name[idx]; - } - } - return 0; - } - return 0; -} - static void enum_x(struct fpga_model *model, enum fpgadev_type type, int enum_i, int *y, int x, int *type_idx) { diff --git a/libs/control.h b/libs/control.h index dd89b29..b0bb397 100644 --- a/libs/control.h +++ b/libs/control.h @@ -12,8 +12,6 @@ const char* fpga_enum_iob(struct fpga_model* model, int enum_idx, int* y, int* x, dev_type_idx_t* type_idx); int fpga_find_iob(struct fpga_model* model, const char* sitename, int* y, int* x, dev_type_idx_t* idx); -const char* fpga_iob_sitename(struct fpga_model* model, int y, int x, - dev_type_idx_t idx); // // When dealing with devices, there are two indices: diff --git a/libs/parts.c b/libs/parts.c index dfcdd65..eb6acbe 100644 --- a/libs/parts.c +++ b/libs/parts.c @@ -8,11 +8,10 @@ #include "model.h" #include "control.h" -const char* iob_xc6slx9_sitenames[IOB_WORDS*2/8] = +static const char* iob_xc6slx9_sitenames[IOB_WORDS*2/8] = { // Note that the configuration space for 4*6 IOBs - // that are marked with 0 is used for clocks etc, - // just not IOBs. + // that are marked with 0 is used for gclk switches. [0] "P70", "P69", "P67", "P66", "P65", "P64", "P62", "P61", "P60", "P59", "P58", "P57", "UNB113", "UNB114", "UNB115", "UNB116", @@ -57,13 +56,6 @@ const char* iob_xc6slx9_sitenames[IOB_WORDS*2/8] = "UNB93", "UNB94", "UNB95", "UNB96", "UNB97", "UNB98", "P75", "P74" }; -int get_num_iobs(int idcode) -{ - if ((idcode & IDCODE_MASK) != XC6SLX9) - EXIT(1); - return sizeof(iob_xc6slx9_sitenames)/sizeof(iob_xc6slx9_sitenames[0]); -} - const char* get_iob_sitename(int idcode, int idx) { if ((idcode & IDCODE_MASK) != XC6SLX9) @@ -136,232 +128,236 @@ const struct xc_die *xc_die_info(int idcode) [15] = { XC_MAJ_XM | XC_MAJ_TOP_BOT_IO, 31 }, [16] = { XC_MAJ_XL | XC_MAJ_TOP_BOT_IO, 30 }, [17] = { XC_MAJ_RIGHT, 30 }}, - .num_type2 = 224, - .type2 = { - [0] = { XC_T2_IOB_PAD, 70 }, - [1] = { XC_T2_IOB_PAD, 69 }, - [2] = { XC_T2_IOB_PAD, 67 }, - [3] = { XC_T2_IOB_PAD, 66 }, - [4] = { XC_T2_IOB_PAD, 65 }, - [5] = { XC_T2_IOB_PAD, 64 }, - [6] = { XC_T2_IOB_PAD, 62 }, - [7] = { XC_T2_IOB_PAD, 61 }, - [8] = { XC_T2_IOB_PAD, 60 }, - [9] = { XC_T2_IOB_PAD, 59 }, - [10] = { XC_T2_IOB_PAD, 58 }, - [11] = { XC_T2_IOB_PAD, 57 }, - [12] = { XC_T2_IOB_UNBONDED, 113 }, - [13] = { XC_T2_IOB_UNBONDED, 114 }, - [14] = { XC_T2_IOB_UNBONDED, 115 }, - [15] = { XC_T2_IOB_UNBONDED, 116 }, - [16] = { XC_T2_IOB_UNBONDED, 117 }, - [17] = { XC_T2_IOB_UNBONDED, 118 }, - [18] = { XC_T2_IOB_PAD, 56 }, - [19] = { XC_T2_IOB_PAD, 55 }, - [20] = { XC_T2_CENTER }, - [21] = { XC_T2_CENTER }, - [22] = { XC_T2_CENTER }, - [23] = { XC_T2_CENTER }, - [24] = { XC_T2_CENTER }, - [25] = { XC_T2_CENTER }, - [26] = { XC_T2_IOB_PAD, 51 }, - [27] = { XC_T2_IOB_PAD, 50 }, - [28] = { XC_T2_IOB_UNBONDED, 123 }, - [29] = { XC_T2_IOB_UNBONDED, 124 }, - [30] = { XC_T2_IOB_UNBONDED, 125 }, - [31] = { XC_T2_IOB_UNBONDED, 126 }, - [32] = { XC_T2_IOB_UNBONDED, 127 }, - [33] = { XC_T2_IOB_UNBONDED, 128 }, - [34] = { XC_T2_IOB_UNBONDED, 129 }, - [35] = { XC_T2_IOB_UNBONDED, 130 }, - [36] = { XC_T2_IOB_UNBONDED, 131 }, - [37] = { XC_T2_IOB_UNBONDED, 132 }, - [38] = { XC_T2_IOB_PAD, 48 }, - [39] = { XC_T2_IOB_PAD, 47 }, - [40] = { XC_T2_IOB_PAD, 46 }, - [41] = { XC_T2_IOB_PAD, 45 }, - [42] = { XC_T2_IOB_PAD, 44 }, - [43] = { XC_T2_IOB_PAD, 43 }, - [44] = { XC_T2_IOB_UNBONDED, 139 }, - [45] = { XC_T2_IOB_UNBONDED, 140 }, - [46] = { XC_T2_IOB_PAD, 41 }, - [47] = { XC_T2_IOB_PAD, 40 }, - [48] = { XC_T2_IOB_PAD, 39 }, - [49] = { XC_T2_IOB_PAD, 38 }, - [50] = { XC_T2_IOB_PAD, 35 }, - [51] = { XC_T2_IOB_PAD, 34 }, - [52] = { XC_T2_IOB_PAD, 33 }, - [53] = { XC_T2_IOB_PAD, 32 }, - [54] = { XC_T2_IOB_UNBONDED, 149 }, - [55] = { XC_T2_IOB_UNBONDED, 150 }, - [56] = { XC_T2_IOB_UNBONDED, 151 }, - [57] = { XC_T2_IOB_UNBONDED, 152 }, - [58] = { XC_T2_IOB_UNBONDED, 153 }, - [59] = { XC_T2_IOB_UNBONDED, 154 }, - [60] = { XC_T2_IOB_UNBONDED, 155 }, - [61] = { XC_T2_IOB_UNBONDED, 156 }, - [62] = { XC_T2_IOB_UNBONDED, 157 }, - [63] = { XC_T2_IOB_UNBONDED, 158 }, - [64] = { XC_T2_IOB_PAD, 30 }, - [65] = { XC_T2_IOB_PAD, 29 }, - [66] = { XC_T2_IOB_PAD, 27 }, - [67] = { XC_T2_IOB_PAD, 26 }, - [68] = { XC_T2_IOB_UNBONDED, 163 }, - [69] = { XC_T2_IOB_UNBONDED, 164 }, - [70] = { XC_T2_IOB_UNBONDED, 165 }, - [71] = { XC_T2_IOB_UNBONDED, 166 }, - [72] = { XC_T2_IOB_UNBONDED, 167 }, - [73] = { XC_T2_IOB_UNBONDED, 168 }, - [74] = { XC_T2_IOB_PAD, 24 }, - [75] = { XC_T2_IOB_PAD, 23 }, - [76] = { XC_T2_IOB_PAD, 22 }, - [77] = { XC_T2_IOB_PAD, 21 }, - [78] = { XC_T2_CENTER }, - [79] = { XC_T2_CENTER }, - [80] = { XC_T2_CENTER }, - [81] = { XC_T2_CENTER }, - [82] = { XC_T2_CENTER }, - [83] = { XC_T2_CENTER }, - [84] = { XC_T2_IOB_PAD, 17 }, - [85] = { XC_T2_IOB_PAD, 16 }, - [86] = { XC_T2_IOB_PAD, 15 }, - [87] = { XC_T2_IOB_PAD, 14 }, - [88] = { XC_T2_IOB_UNBONDED, 177 }, - [89] = { XC_T2_IOB_UNBONDED, 178 }, - [90] = { XC_T2_IOB_UNBONDED, 179 }, - [91] = { XC_T2_IOB_UNBONDED, 180 }, - [92] = { XC_T2_IOB_UNBONDED, 181 }, - [93] = { XC_T2_IOB_UNBONDED, 182 }, - [94] = { XC_T2_IOB_UNBONDED, 183 }, - [95] = { XC_T2_IOB_UNBONDED, 184 }, - [96] = { XC_T2_IOB_PAD, 12 }, - [97] = { XC_T2_IOB_PAD, 11 }, - [98] = { XC_T2_IOB_PAD, 10 }, - [99] = { XC_T2_IOB_PAD, 9 }, - [100] = { XC_T2_IOB_PAD, 8 }, - [101] = { XC_T2_IOB_PAD, 7 }, - [102] = { XC_T2_IOB_PAD, 6 }, - [103] = { XC_T2_IOB_PAD, 5 }, - [104] = { XC_T2_IOB_UNBONDED, 193 }, - [105] = { XC_T2_IOB_UNBONDED, 194 }, - [106] = { XC_T2_IOB_UNBONDED, 195 }, - [107] = { XC_T2_IOB_UNBONDED, 196 }, - [108] = { XC_T2_IOB_UNBONDED, 197 }, - [109] = { XC_T2_IOB_UNBONDED, 198 }, - [110] = { XC_T2_IOB_PAD, 2 }, - [111] = { XC_T2_IOB_PAD, 1 }, - [112] = { XC_T2_IOB_PAD, 144 }, - [113] = { XC_T2_IOB_PAD, 143 }, - [114] = { XC_T2_IOB_PAD, 142 }, - [115] = { XC_T2_IOB_PAD, 141 }, - [116] = { XC_T2_IOB_PAD, 140 }, - [117] = { XC_T2_IOB_PAD, 139 }, - [118] = { XC_T2_IOB_PAD, 138 }, - [119] = { XC_T2_IOB_PAD, 137 }, - [120] = { XC_T2_IOB_UNBONDED, 9 }, - [121] = { XC_T2_IOB_UNBONDED, 10 }, - [122] = { XC_T2_IOB_UNBONDED, 11 }, - [123] = { XC_T2_IOB_UNBONDED, 12 }, - [124] = { XC_T2_IOB_UNBONDED, 13 }, - [125] = { XC_T2_IOB_UNBONDED, 14 }, - [126] = { XC_T2_IOB_UNBONDED, 15 }, - [127] = { XC_T2_IOB_UNBONDED, 16 }, - [128] = { XC_T2_IOB_UNBONDED, 17 }, - [129] = { XC_T2_IOB_UNBONDED, 18 }, - [130] = { XC_T2_IOB_UNBONDED, 19 }, - [131] = { XC_T2_IOB_UNBONDED, 20 }, - [132] = { XC_T2_IOB_PAD, 134 }, - [133] = { XC_T2_IOB_PAD, 133 }, - [134] = { XC_T2_IOB_PAD, 132 }, - [135] = { XC_T2_IOB_PAD, 131 }, - [136] = { XC_T2_CENTER }, - [137] = { XC_T2_CENTER }, - [138] = { XC_T2_CENTER }, - [139] = { XC_T2_CENTER }, - [140] = { XC_T2_CENTER }, - [141] = { XC_T2_CENTER }, - [142] = { XC_T2_IOB_PAD, 127 }, - [143] = { XC_T2_IOB_PAD, 126 }, - [144] = { XC_T2_IOB_PAD, 124 }, - [145] = { XC_T2_IOB_PAD, 123 }, - [146] = { XC_T2_IOB_UNBONDED, 29 }, - [147] = { XC_T2_IOB_UNBONDED, 30 }, - [148] = { XC_T2_IOB_UNBONDED, 31 }, - [149] = { XC_T2_IOB_UNBONDED, 32 }, - [150] = { XC_T2_IOB_UNBONDED, 33 }, - [151] = { XC_T2_IOB_UNBONDED, 34 }, - [152] = { XC_T2_IOB_PAD, 121 }, - [153] = { XC_T2_IOB_PAD, 120 }, - [154] = { XC_T2_IOB_PAD, 119 }, - [155] = { XC_T2_IOB_PAD, 118 }, - [156] = { XC_T2_IOB_PAD, 117 }, - [157] = { XC_T2_IOB_PAD, 116 }, - [158] = { XC_T2_IOB_PAD, 115 }, - [159] = { XC_T2_IOB_PAD, 114 }, - [160] = { XC_T2_IOB_PAD, 112 }, - [161] = { XC_T2_IOB_PAD, 111 }, - [162] = { XC_T2_IOB_PAD, 105 }, - [163] = { XC_T2_IOB_PAD, 104 }, - [164] = { XC_T2_IOB_UNBONDED, 47 }, - [165] = { XC_T2_IOB_UNBONDED, 48 }, - [166] = { XC_T2_IOB_UNBONDED, 49 }, - [167] = { XC_T2_IOB_UNBONDED, 50 }, - [168] = { XC_T2_IOB_UNBONDED, 51 }, - [169] = { XC_T2_IOB_UNBONDED, 52 }, - [170] = { XC_T2_IOB_PAD, 102 }, - [171] = { XC_T2_IOB_PAD, 101 }, - [172] = { XC_T2_IOB_PAD, 100 }, - [173] = { XC_T2_IOB_PAD, 99 }, - [174] = { XC_T2_IOB_PAD, 98 }, - [175] = { XC_T2_IOB_PAD, 97 }, - [176] = { XC_T2_IOB_UNBONDED, 59 }, - [177] = { XC_T2_IOB_UNBONDED, 60 }, - [178] = { XC_T2_IOB_UNBONDED, 61 }, - [179] = { XC_T2_IOB_UNBONDED, 62 }, - [180] = { XC_T2_IOB_UNBONDED, 63 }, - [181] = { XC_T2_IOB_UNBONDED, 64 }, - [182] = { XC_T2_IOB_UNBONDED, 65 }, - [183] = { XC_T2_IOB_UNBONDED, 66 }, - [184] = { XC_T2_IOB_UNBONDED, 67 }, - [185] = { XC_T2_IOB_UNBONDED, 68 }, - [186] = { XC_T2_IOB_PAD, 95 }, - [187] = { XC_T2_IOB_PAD, 94 }, - [188] = { XC_T2_IOB_PAD, 93 }, - [189] = { XC_T2_IOB_PAD, 92 }, - [190] = { XC_T2_CENTER }, - [191] = { XC_T2_CENTER }, - [192] = { XC_T2_CENTER }, - [193] = { XC_T2_CENTER }, - [194] = { XC_T2_CENTER }, - [195] = { XC_T2_CENTER }, - [196] = { XC_T2_IOB_PAD, 88 }, - [197] = { XC_T2_IOB_PAD, 87 }, - [198] = { XC_T2_IOB_PAD, 85 }, - [199] = { XC_T2_IOB_PAD, 84 }, - [200] = { XC_T2_IOB_UNBONDED, 77 }, - [201] = { XC_T2_IOB_UNBONDED, 78 }, - [202] = { XC_T2_IOB_PAD, 83 }, - [203] = { XC_T2_IOB_PAD, 82 }, - [204] = { XC_T2_IOB_PAD, 81 }, - [205] = { XC_T2_IOB_PAD, 80 }, - [206] = { XC_T2_IOB_PAD, 79 }, - [207] = { XC_T2_IOB_PAD, 78 }, - [208] = { XC_T2_IOB_UNBONDED, 85 }, - [209] = { XC_T2_IOB_UNBONDED, 86 }, - [210] = { XC_T2_IOB_UNBONDED, 87 }, - [211] = { XC_T2_IOB_UNBONDED, 88 }, - [212] = { XC_T2_IOB_UNBONDED, 89 }, - [213] = { XC_T2_IOB_UNBONDED, 90 }, - [214] = { XC_T2_IOB_UNBONDED, 91 }, - [215] = { XC_T2_IOB_UNBONDED, 92 }, - [216] = { XC_T2_IOB_UNBONDED, 93 }, - [217] = { XC_T2_IOB_UNBONDED, 94 }, - [218] = { XC_T2_IOB_UNBONDED, 95 }, - [219] = { XC_T2_IOB_UNBONDED, 96 }, - [220] = { XC_T2_IOB_UNBONDED, 97 }, - [221] = { XC_T2_IOB_UNBONDED, 98 }, - [222] = { XC_T2_IOB_PAD, 75 }, - [223] = { XC_T2_IOB_PAD, 74 }}, + .num_t2_ios = 224, + .t2_io = { + [0] = { .pair = 1, .pos_side = 1, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 38, .type_idx = 3 }, + [1] = { .pair = 1, .pos_side = 0, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 38, .type_idx = 2 }, + [2] = { .pair = 2, .pos_side = 1, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 38, .type_idx = 0 }, + [3] = { .pair = 2, .pos_side = 0, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 38, .type_idx = 1 }, + [4] = { .pair = 3, .pos_side = 1, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 36, .type_idx = 3 }, + [5] = { .pair = 3, .pos_side = 0, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 36, .type_idx = 2 }, + [6] = { .pair = 12, .pos_side = 1, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 36, .type_idx = 0 }, + [7] = { .pair = 12, .pos_side = 0, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 36, .type_idx = 1 }, + [8] = { .pair = 13, .pos_side = 1, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 31, .type_idx = 3 }, + [9] = { .pair = 13, .pos_side = 0, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 31, .type_idx = 2 }, + [10] = { .pair = 14, .pos_side = 1, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 31, .type_idx = 0 }, + [11] = { .pair = 14, .pos_side = 0, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 31, .type_idx = 1 }, + [12] = { .pair = 23, .pos_side = 1, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 29, .type_idx = 3 }, + [13] = { .pair = 23, .pos_side = 0, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 29, .type_idx = 2 }, + [14] = { .pair = 16, .pos_side = 1, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 29, .type_idx = 0 }, + [15] = { .pair = 16, .pos_side = 0, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 29, .type_idx = 1 }, + [16] = { .pair = 29, .pos_side = 1, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 25, .type_idx = 3 }, + [17] = { .pair = 29, .pos_side = 0, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 25, .type_idx = 2 }, + [18] = { .pair = 30, .pos_side = 1, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 25, .type_idx = 0 }, + [19] = { .pair = 30, .pos_side = 0, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 25, .type_idx = 1 }, + // 20-25 are for gclk switches and remain 0 + [26] = { .pair = 31, .pos_side = 1, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 21, .type_idx = 3 }, + [27] = { .pair = 31, .pos_side = 0, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 21, .type_idx = 2 }, + [28] = { .pair = 32, .pos_side = 1, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 21, .type_idx = 0 }, + [29] = { .pair = 32, .pos_side = 0, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 21, .type_idx = 1 }, + [30] = { .pair = 45, .pos_side = 1, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 19, .type_idx = 3 }, + [31] = { .pair = 45, .pos_side = 0, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 19, .type_idx = 2 }, + [32] = { .pair = 41, .pos_side = 1, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 19, .type_idx = 0 }, + [33] = { .pair = 41, .pos_side = 0, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 19, .type_idx = 1 }, + [34] = { .pair = 43, .pos_side = 1, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 14, .type_idx = 3 }, + [35] = { .pair = 43, .pos_side = 0, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 14, .type_idx = 2 }, + [36] = { .pair = 46, .pos_side = 1, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 14, .type_idx = 0 }, + [37] = { .pair = 46, .pos_side = 0, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 14, .type_idx = 1 }, + [38] = { .pair = 48, .pos_side = 1, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 12, .type_idx = 3 }, + [39] = { .pair = 48, .pos_side = 0, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 12, .type_idx = 2 }, + [40] = { .pair = 49, .pos_side = 1, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 12, .type_idx = 0 }, + [41] = { .pair = 49, .pos_side = 0, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 12, .type_idx = 1 }, + [42] = { .pair = 62, .pos_side = 1, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 7, .type_idx = 3 }, + [43] = { .pair = 62, .pos_side = 0, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 7, .type_idx = 2 }, + [44] = { .pair = 63, .pos_side = 1, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 7, .type_idx = 0 }, + [45] = { .pair = 63, .pos_side = 0, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 7, .type_idx = 1 }, + [46] = { .pair = 64, .pos_side = 1, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 5, .type_idx = 3 }, + [47] = { .pair = 64, .pos_side = 0, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 5, .type_idx = 2 }, + [48] = { .pair = 65, .pos_side = 1, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 5, .type_idx = 0 }, + [49] = { .pair = 65, .pos_side = 0, .bank = 2, .y = XC6_SLX9_TOTAL_TILE_ROWS - BOT_OUTER_ROW, .x = 5, .type_idx = 1 }, + + [50] = { .pair = 1, .pos_side = 1, .bank = 3, .y = 68, .x = LEFT_OUTER_COL, .type_idx = 1 }, + [51] = { .pair = 1, .pos_side = 0, .bank = 3, .y = 68, .x = LEFT_OUTER_COL, .type_idx = 0 }, + [52] = { .pair = 2, .pos_side = 1, .bank = 3, .y = 67, .x = LEFT_OUTER_COL, .type_idx = 1 }, + [53] = { .pair = 2, .pos_side = 0, .bank = 3, .y = 67, .x = LEFT_OUTER_COL, .type_idx = 0 }, + [54] = { .pair = 31, .pos_side = 1, .bank = 3, .y = 66, .x = LEFT_OUTER_COL, .type_idx = 1 }, + [55] = { .pair = 31, .pos_side = 0, .bank = 3, .y = 66, .x = LEFT_OUTER_COL, .type_idx = 0 }, + [56] = { .pair = 32, .pos_side = 1, .bank = 3, .y = 65, .x = LEFT_OUTER_COL, .type_idx = 1 }, + [57] = { .pair = 32, .pos_side = 0, .bank = 3, .y = 65, .x = LEFT_OUTER_COL, .type_idx = 0 }, + [58] = { .pair = 33, .pos_side = 1, .bank = 3, .y = 61, .x = LEFT_OUTER_COL, .type_idx = 1 }, + [59] = { .pair = 33, .pos_side = 0, .bank = 3, .y = 61, .x = LEFT_OUTER_COL, .type_idx = 0 }, + [60] = { .pair = 34, .pos_side = 1, .bank = 3, .y = 58, .x = LEFT_OUTER_COL, .type_idx = 1 }, + [61] = { .pair = 34, .pos_side = 0, .bank = 3, .y = 58, .x = LEFT_OUTER_COL, .type_idx = 0 }, + [62] = { .pair = 35, .pos_side = 1, .bank = 3, .y = 55, .x = LEFT_OUTER_COL, .type_idx = 1 }, + [63] = { .pair = 35, .pos_side = 0, .bank = 3, .y = 55, .x = LEFT_OUTER_COL, .type_idx = 0 }, + [64] = { .pair = 36, .pos_side = 1, .bank = 3, .y = 52, .x = LEFT_OUTER_COL, .type_idx = 1 }, + [65] = { .pair = 36, .pos_side = 0, .bank = 3, .y = 52, .x = LEFT_OUTER_COL, .type_idx = 0 }, + [66] = { .pair = 37, .pos_side = 1, .bank = 3, .y = 49, .x = LEFT_OUTER_COL, .type_idx = 1 }, + [67] = { .pair = 37, .pos_side = 0, .bank = 3, .y = 49, .x = LEFT_OUTER_COL, .type_idx = 0 }, + [68] = { .pair = 38, .pos_side = 1, .bank = 3, .y = 46, .x = LEFT_OUTER_COL, .type_idx = 1 }, + [69] = { .pair = 38, .pos_side = 0, .bank = 3, .y = 46, .x = LEFT_OUTER_COL, .type_idx = 0 }, + [70] = { .pair = 39, .pos_side = 1, .bank = 3, .y = 42, .x = LEFT_OUTER_COL, .type_idx = 1 }, + [71] = { .pair = 39, .pos_side = 0, .bank = 3, .y = 42, .x = LEFT_OUTER_COL, .type_idx = 0 }, + [72] = { .pair = 40, .pos_side = 1, .bank = 3, .y = 39, .x = LEFT_OUTER_COL, .type_idx = 1 }, + [73] = { .pair = 40, .pos_side = 0, .bank = 3, .y = 39, .x = LEFT_OUTER_COL, .type_idx = 0 }, + [74] = { .pair = 41, .pos_side = 1, .bank = 3, .y = 38, .x = LEFT_OUTER_COL, .type_idx = 1 }, + [75] = { .pair = 41, .pos_side = 0, .bank = 3, .y = 38, .x = LEFT_OUTER_COL, .type_idx = 0 }, + [76] = { .pair = 42, .pos_side = 1, .bank = 3, .y = 37, .x = LEFT_OUTER_COL, .type_idx = 1 }, + [77] = { .pair = 42, .pos_side = 0, .bank = 3, .y = 37, .x = LEFT_OUTER_COL, .type_idx = 0 }, + // 78-83 are for gclk switches and remain 0 + [84] = { .pair = 43, .pos_side = 1, .bank = 3, .y = 33, .x = LEFT_OUTER_COL, .type_idx = 1 }, + [85] = { .pair = 43, .pos_side = 0, .bank = 3, .y = 33, .x = LEFT_OUTER_COL, .type_idx = 0 }, + [86] = { .pair = 44, .pos_side = 1, .bank = 3, .y = 32, .x = LEFT_OUTER_COL, .type_idx = 1 }, + [87] = { .pair = 44, .pos_side = 0, .bank = 3, .y = 32, .x = LEFT_OUTER_COL, .type_idx = 0 }, + [88] = { .pair = 45, .pos_side = 1, .bank = 3, .y = 31, .x = LEFT_OUTER_COL, .type_idx = 1 }, + [89] = { .pair = 45, .pos_side = 0, .bank = 3, .y = 31, .x = LEFT_OUTER_COL, .type_idx = 0 }, + [90] = { .pair = 46, .pos_side = 1, .bank = 3, .y = 30, .x = LEFT_OUTER_COL, .type_idx = 1 }, + [91] = { .pair = 46, .pos_side = 0, .bank = 3, .y = 30, .x = LEFT_OUTER_COL, .type_idx = 0 }, + [92] = { .pair = 47, .pos_side = 1, .bank = 3, .y = 29, .x = LEFT_OUTER_COL, .type_idx = 1 }, + [93] = { .pair = 47, .pos_side = 0, .bank = 3, .y = 29, .x = LEFT_OUTER_COL, .type_idx = 0 }, + [94] = { .pair = 48, .pos_side = 1, .bank = 3, .y = 28, .x = LEFT_OUTER_COL, .type_idx = 1 }, + [95] = { .pair = 48, .pos_side = 0, .bank = 3, .y = 28, .x = LEFT_OUTER_COL, .type_idx = 0 }, + [96] = { .pair = 49, .pos_side = 1, .bank = 3, .y = 14, .x = LEFT_OUTER_COL, .type_idx = 1 }, + [97] = { .pair = 49, .pos_side = 0, .bank = 3, .y = 14, .x = LEFT_OUTER_COL, .type_idx = 0 }, + [98] = { .pair = 50, .pos_side = 1, .bank = 3, .y = 13, .x = LEFT_OUTER_COL, .type_idx = 1 }, + [99] = { .pair = 50, .pos_side = 0, .bank = 3, .y = 13, .x = LEFT_OUTER_COL, .type_idx = 0 }, + [100] = { .pair = 51, .pos_side = 1, .bank = 3, .y = 12, .x = LEFT_OUTER_COL, .type_idx = 1 }, + [101] = { .pair = 51, .pos_side = 0, .bank = 3, .y = 12, .x = LEFT_OUTER_COL, .type_idx = 0 }, + [102] = { .pair = 52, .pos_side = 1, .bank = 3, .y = 11, .x = LEFT_OUTER_COL, .type_idx = 1 }, + [103] = { .pair = 52, .pos_side = 0, .bank = 3, .y = 11, .x = LEFT_OUTER_COL, .type_idx = 0 }, + [104] = { .pair = 53, .pos_side = 1, .bank = 3, .y = 9, .x = LEFT_OUTER_COL, .type_idx = 1 }, + [105] = { .pair = 53, .pos_side = 0, .bank = 3, .y = 9, .x = LEFT_OUTER_COL, .type_idx = 0 }, + [106] = { .pair = 54, .pos_side = 1, .bank = 3, .y = 7, .x = LEFT_OUTER_COL, .type_idx = 1 }, + [107] = { .pair = 54, .pos_side = 0, .bank = 3, .y = 7, .x = LEFT_OUTER_COL, .type_idx = 0 }, + [108] = { .pair = 55, .pos_side = 1, .bank = 3, .y = 5, .x = LEFT_OUTER_COL, .type_idx = 1 }, + [109] = { .pair = 55, .pos_side = 0, .bank = 3, .y = 5, .x = LEFT_OUTER_COL, .type_idx = 0 }, + [110] = { .pair = 83, .pos_side = 1, .bank = 3, .y = 3, .x = LEFT_OUTER_COL, .type_idx = 1 }, + [111] = { .pair = 83, .pos_side = 0, .bank = 3, .y = 3, .x = LEFT_OUTER_COL, .type_idx = 0 }, + + [112] = { .pair = 1, .pos_side = 1, .bank = 0, .y = TOP_OUTER_ROW, .x = 5, .type_idx = 0 }, + [113] = { .pair = 1, .pos_side = 0, .bank = 0, .y = TOP_OUTER_ROW, .x = 5, .type_idx = 1 }, + [114] = { .pair = 2, .pos_side = 1, .bank = 0, .y = TOP_OUTER_ROW, .x = 5, .type_idx = 2 }, + [115] = { .pair = 2, .pos_side = 0, .bank = 0, .y = TOP_OUTER_ROW, .x = 5, .type_idx = 3 }, + [116] = { .pair = 3, .pos_side = 1, .bank = 0, .y = TOP_OUTER_ROW, .x = 7, .type_idx = 0 }, + [117] = { .pair = 3, .pos_side = 0, .bank = 0, .y = TOP_OUTER_ROW, .x = 7, .type_idx = 1 }, + [118] = { .pair = 4, .pos_side = 1, .bank = 0, .y = TOP_OUTER_ROW, .x = 7, .type_idx = 2 }, + [119] = { .pair = 4, .pos_side = 0, .bank = 0, .y = TOP_OUTER_ROW, .x = 7, .type_idx = 3 }, + [120] = { .pair = 5, .pos_side = 1, .bank = 0, .y = TOP_OUTER_ROW, .x = 12, .type_idx = 0 }, + [121] = { .pair = 5, .pos_side = 0, .bank = 0, .y = TOP_OUTER_ROW, .x = 12, .type_idx = 1 }, + [122] = { .pair = 6, .pos_side = 1, .bank = 0, .y = TOP_OUTER_ROW, .x = 12, .type_idx = 2 }, + [123] = { .pair = 6, .pos_side = 0, .bank = 0, .y = TOP_OUTER_ROW, .x = 12, .type_idx = 3 }, + [124] = { .pair = 10, .pos_side = 1, .bank = 0, .y = TOP_OUTER_ROW, .x = 14, .type_idx = 0 }, + [125] = { .pair = 10, .pos_side = 0, .bank = 0, .y = TOP_OUTER_ROW, .x = 14, .type_idx = 1 }, + [126] = { .pair = 8, .pos_side = 1, .bank = 0, .y = TOP_OUTER_ROW, .x = 14, .type_idx = 2 }, + [127] = { .pair = 8, .pos_side = 0, .bank = 0, .y = TOP_OUTER_ROW, .x = 14, .type_idx = 3 }, + [128] = { .pair = 11, .pos_side = 1, .bank = 0, .y = TOP_OUTER_ROW, .x = 19, .type_idx = 0 }, + [129] = { .pair = 11, .pos_side = 0, .bank = 0, .y = TOP_OUTER_ROW, .x = 19, .type_idx = 1 }, + [130] = { .pair = 33, .pos_side = 1, .bank = 0, .y = TOP_OUTER_ROW, .x = 19, .type_idx = 2 }, + [131] = { .pair = 33, .pos_side = 0, .bank = 0, .y = TOP_OUTER_ROW, .x = 19, .type_idx = 3 }, + [132] = { .pair = 34, .pos_side = 1, .bank = 0, .y = TOP_OUTER_ROW, .x = 21, .type_idx = 0 }, + [133] = { .pair = 34, .pos_side = 0, .bank = 0, .y = TOP_OUTER_ROW, .x = 21, .type_idx = 1 }, + [134] = { .pair = 35, .pos_side = 1, .bank = 0, .y = TOP_OUTER_ROW, .x = 21, .type_idx = 2 }, + [135] = { .pair = 35, .pos_side = 0, .bank = 0, .y = TOP_OUTER_ROW, .x = 21, .type_idx = 3 }, + // 136-141 are for gclk switches and remain 0 + [142] = { .pair = 36, .pos_side = 1, .bank = 0, .y = TOP_OUTER_ROW, .x = 25, .type_idx = 0 }, + [143] = { .pair = 36, .pos_side = 0, .bank = 0, .y = TOP_OUTER_ROW, .x = 25, .type_idx = 1 }, + [144] = { .pair = 37, .pos_side = 1, .bank = 0, .y = TOP_OUTER_ROW, .x = 25, .type_idx = 2 }, + [145] = { .pair = 37, .pos_side = 0, .bank = 0, .y = TOP_OUTER_ROW, .x = 25, .type_idx = 3 }, + [146] = { .pair = 38, .pos_side = 1, .bank = 0, .y = TOP_OUTER_ROW, .x = 29, .type_idx = 0 }, + [147] = { .pair = 38, .pos_side = 0, .bank = 0, .y = TOP_OUTER_ROW, .x = 29, .type_idx = 1 }, + [148] = { .pair = 39, .pos_side = 1, .bank = 0, .y = TOP_OUTER_ROW, .x = 29, .type_idx = 2 }, + [149] = { .pair = 39, .pos_side = 0, .bank = 0, .y = TOP_OUTER_ROW, .x = 29, .type_idx = 3 }, + [150] = { .pair = 41, .pos_side = 1, .bank = 0, .y = TOP_OUTER_ROW, .x = 31, .type_idx = 0 }, + [151] = { .pair = 41, .pos_side = 0, .bank = 0, .y = TOP_OUTER_ROW, .x = 31, .type_idx = 1 }, + [152] = { .pair = 62, .pos_side = 1, .bank = 0, .y = TOP_OUTER_ROW, .x = 31, .type_idx = 2 }, + [153] = { .pair = 62, .pos_side = 0, .bank = 0, .y = TOP_OUTER_ROW, .x = 31, .type_idx = 3 }, + [154] = { .pair = 63, .pos_side = 1, .bank = 0, .y = TOP_OUTER_ROW, .x = 36, .type_idx = 0 }, + [155] = { .pair = 63, .pos_side = 0, .bank = 0, .y = TOP_OUTER_ROW, .x = 36, .type_idx = 1 }, + [156] = { .pair = 64, .pos_side = 1, .bank = 0, .y = TOP_OUTER_ROW, .x = 36, .type_idx = 2 }, + [157] = { .pair = 64, .pos_side = 0, .bank = 0, .y = TOP_OUTER_ROW, .x = 36, .type_idx = 3 }, + [158] = { .pair = 65, .pos_side = 1, .bank = 0, .y = TOP_OUTER_ROW, .x = 38, .type_idx = 0 }, + [159] = { .pair = 65, .pos_side = 0, .bank = 0, .y = TOP_OUTER_ROW, .x = 38, .type_idx = 1 }, + [160] = { .pair = 66, .pos_side = 1, .bank = 0, .y = TOP_OUTER_ROW, .x = 38, .type_idx = 2 }, + [161] = { .pair = 66, .pos_side = 0, .bank = 0, .y = TOP_OUTER_ROW, .x = 38, .type_idx = 3 }, + + [162] = { .pair = 1, .pos_side = 1, .bank = 1, .y = 4, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 0 }, + [163] = { .pair = 1, .pos_side = 0, .bank = 1, .y = 4, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 1 }, + [164] = { .pair = 29, .pos_side = 1, .bank = 1, .y = 5, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 0 }, + [165] = { .pair = 29, .pos_side = 0, .bank = 1, .y = 5, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 1 }, + [166] = { .pair = 30, .pos_side = 1, .bank = 1, .y = 7, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 0 }, + [167] = { .pair = 30, .pos_side = 0, .bank = 1, .y = 7, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 1 }, + [168] = { .pair = 31, .pos_side = 1, .bank = 1, .y = 9, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 0 }, + [169] = { .pair = 31, .pos_side = 0, .bank = 1, .y = 9, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 1 }, + [170] = { .pair = 32, .pos_side = 1, .bank = 1, .y = 11, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 0 }, + [171] = { .pair = 32, .pos_side = 0, .bank = 1, .y = 11, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 1 }, + [172] = { .pair = 33, .pos_side = 1, .bank = 1, .y = 12, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 0 }, + [173] = { .pair = 33, .pos_side = 0, .bank = 1, .y = 12, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 1 }, + [174] = { .pair = 34, .pos_side = 1, .bank = 1, .y = 13, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 0 }, + [175] = { .pair = 34, .pos_side = 0, .bank = 1, .y = 13, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 1 }, + [176] = { .pair = 35, .pos_side = 1, .bank = 1, .y = 14, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 0 }, + [177] = { .pair = 35, .pos_side = 0, .bank = 1, .y = 14, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 1 }, + [178] = { .pair = 36, .pos_side = 1, .bank = 1, .y = 28, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 0 }, + [179] = { .pair = 36, .pos_side = 0, .bank = 1, .y = 28, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 1 }, + [180] = { .pair = 37, .pos_side = 1, .bank = 1, .y = 29, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 0 }, + [181] = { .pair = 37, .pos_side = 0, .bank = 1, .y = 29, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 1 }, + [182] = { .pair = 38, .pos_side = 1, .bank = 1, .y = 30, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 0 }, + [183] = { .pair = 38, .pos_side = 0, .bank = 1, .y = 30, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 1 }, + [184] = { .pair = 39, .pos_side = 1, .bank = 1, .y = 31, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 0 }, + [185] = { .pair = 39, .pos_side = 0, .bank = 1, .y = 31, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 1 }, + [186] = { .pair = 40, .pos_side = 1, .bank = 1, .y = 32, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 0 }, + [187] = { .pair = 40, .pos_side = 0, .bank = 1, .y = 32, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 1 }, + [188] = { .pair = 41, .pos_side = 1, .bank = 1, .y = 33, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 0 }, + [189] = { .pair = 41, .pos_side = 0, .bank = 1, .y = 33, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 1 }, + // 190-195 are for gclk switches and remain 0 + [196] = { .pair = 42, .pos_side = 1, .bank = 1, .y = 37, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 0 }, + [197] = { .pair = 42, .pos_side = 0, .bank = 1, .y = 37, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 1 }, + [198] = { .pair = 43, .pos_side = 1, .bank = 1, .y = 38, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 0 }, + [199] = { .pair = 43, .pos_side = 0, .bank = 1, .y = 38, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 1 }, + [200] = { .pair = 44, .pos_side = 1, .bank = 1, .y = 39, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 0 }, + [201] = { .pair = 44, .pos_side = 0, .bank = 1, .y = 39, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 1 }, + [202] = { .pair = 45, .pos_side = 1, .bank = 1, .y = 42, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 0 }, + [203] = { .pair = 45, .pos_side = 0, .bank = 1, .y = 42, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 1 }, + [204] = { .pair = 46, .pos_side = 1, .bank = 1, .y = 46, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 0 }, + [205] = { .pair = 46, .pos_side = 0, .bank = 1, .y = 46, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 1 }, + [206] = { .pair = 47, .pos_side = 1, .bank = 1, .y = 49, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 0 }, + [207] = { .pair = 47, .pos_side = 0, .bank = 1, .y = 49, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 1 }, + [208] = { .pair = 48, .pos_side = 1, .bank = 1, .y = 52, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 0 }, + [209] = { .pair = 48, .pos_side = 0, .bank = 1, .y = 52, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 1 }, + [210] = { .pair = 49, .pos_side = 1, .bank = 1, .y = 55, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 0 }, + [211] = { .pair = 49, .pos_side = 0, .bank = 1, .y = 55, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 1 }, + [212] = { .pair = 50, .pos_side = 1, .bank = 1, .y = 58, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 0 }, + [213] = { .pair = 50, .pos_side = 0, .bank = 1, .y = 58, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 1 }, + [214] = { .pair = 51, .pos_side = 1, .bank = 1, .y = 61, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 0 }, + [215] = { .pair = 51, .pos_side = 0, .bank = 1, .y = 61, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 1 }, + [216] = { .pair = 52, .pos_side = 1, .bank = 1, .y = 65, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 0 }, + [217] = { .pair = 52, .pos_side = 0, .bank = 1, .y = 65, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 1 }, + [218] = { .pair = 53, .pos_side = 1, .bank = 1, .y = 66, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 0 }, + [219] = { .pair = 53, .pos_side = 0, .bank = 1, .y = 66, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 1 }, + [220] = { .pair = 61, .pos_side = 1, .bank = 1, .y = 67, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 0 }, + [221] = { .pair = 61, .pos_side = 0, .bank = 1, .y = 67, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 1 }, + [222] = { .pair = 74, .pos_side = 1, .bank = 1, .y = 68, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 0 }, + [223] = { .pair = 74, .pos_side = 0, .bank = 1, .y = 68, .x = XC6_SLX9_TOTAL_TILE_COLS - RIGHT_OUTER_O, .type_idx = 1 }}, + // gclk: ug382 table 1-6 page 25 + .num_gclk_pins = XC6_NUM_GCLK_PINS, + .gclk_t2_io_idx = { // indices into t2_io + /* 0 */ 19, 18, 17, 16, + /* 4 */ 199, 198, 197, 196, + /* 8 */ 189, 188, 187, 186, + /* 12 */ 145, 144, 143, 142, + /* 16 */ 135, 134, 133, 132, + /* 20 */ 87, 86, 85, 84, + /* 24 */ 77, 76, 75, 74, + /* 28 */ 29, 28, 27, 26 }, + // todo: gclk 2/3/28 and 29 positions not yet verified + .gclk_t2_switches = { // 16-bit words into type2 data + /* 0 */ 20*4+ 6, 20*4+ 9, 20*4+ 0, 20*4+ 3, + /* 4 */ 190*4+18, 190*4+21, 190*4+12, 190*4+15, + /* 8 */ 190*4+ 6, 190*4+ 9, 190*4+ 0, 190*4+ 3, + /* 12 */ 136*4+18, 136*4+21, 136*4+12, 136*4+15, + /* 16 */ 136*4+ 6, 136*4+ 9, 136*4+ 0, 136*4+ 3, + /* 20 */ 78*4+21, 78*4+18, 78*4+15, 78*4+12, + /* 24 */ 78*4+ 9, 78*4+ 6, 78*4+ 3, 78*4+ 0, + /* 28 */ 20*4+18, 20*4+21, 20*4+12, 20*4+15 }, .mcb_ypos = 20, .num_mui = 8, .mui_pos = { 40, 43, 47, 50, 53, 56, 59, 63 }, @@ -388,36 +384,539 @@ int xc_die_center_major(const struct xc_die *die) const struct xc6_pkg_info *xc6_pkg_info(enum xc6_pkg pkg) { - // ug382 table 1-6 page 25 + // see ug385 static const struct xc6_pkg_info pkg_tqg144 = { .pkg = TQG144, - .num_gclk_pins = XC6_NUM_GCLK_PINS, - .gclk_pin = { - /* 0 */ "P55", "P56", 0, 0, - /* 4 */ "P84", "P85", "P87", "P88", - /* 8 */ "P92", "P93", "P94", "P95", - /* 12 */ "P123", "P124", "P126", "P127", - /* 16 */ "P131", "P132", "P133", "P134", - /* 20 */ "P14", "P15", "P16", "P17", - /* 24 */ "P21", "P22", "P23", "P24", - /* 28 */ 0, 0, "P50", "P51" }, - .gclk_type2_o = { - /* 0 */ 20*4+ 6, 20*4+ 9, -1, -1, - /* 4 */ 190*4+18, 190*4+21, 190*4+12, 190*4+15, - /* 8 */ 190*4+ 6, 190*4+ 9, 190*4+ 0, 190*4+ 3, - /* 12 */ 136*4+18, 136*4+21, 136*4+12, 136*4+15, - /* 16 */ 136*4+ 6, 136*4+ 9, 136*4+ 0, 136*4+ 3, - /* 20 */ 78*4+21, 78*4+18, 78*4+15, 78*4+12, - /* 24 */ 78*4+ 9, 78*4+ 6, 78*4+ 3, 78*4+ 0, - /* 28 */ -1, -1, 20*4+12, 20*4+15 }}; + .num_pins = /*physical pinouts*/ 144 + /*on die but unbonded*/ 98, + .pin = { + // name bank bufio2 description pair pos_side + { "P144", 0, "TL", "IO_L1P_HSWAPEN_0", 1, 1 }, + { "P143", 0, "TL", "IO_L1N_VREF_0", 1, 0 }, + { "P142", 0, "TL", "IO_L2P_0", 2, 1 }, + { "P141", 0, "TL", "IO_L2N_0", 2, 0 }, + { "P140", 0, "TL", "IO_L3P_0", 3, 1 }, + { "P139", 0, "TL", "IO_L3N_0", 3, 0 }, + { "P138", 0, "TL", "IO_L4P_0", 4, 1 }, + { "P137", 0, "TL", "IO_L4N_0", 4, 0 }, + { "P134", 0, "TL", "IO_L34P_GCLK19_0", 34, 1 }, + { "P133", 0, "TL", "IO_L34N_GCLK18_0", 34, 0 }, + { "P132", 0, "TL", "IO_L35P_GCLK17_0", 35, 1 }, + { "P131", 0, "TL", "IO_L35N_GCLK16_0", 35, 0 }, + { "P127", 0, "TR", "IO_L36P_GCLK15_0", 36, 1 }, + { "P126", 0, "TR", "IO_L36N_GCLK14_0", 36, 0 }, + { "P124", 0, "TR", "IO_L37P_GCLK13_0", 37, 1 }, + { "P123", 0, "TR", "IO_L37N_GCLK12_0", 37, 0 }, + { "P121", 0, "TR", "IO_L62P_0", 62, 1 }, + { "P120", 0, "TR", "IO_L62N_VREF_0", 62, 0 }, + { "P119", 0, "TR", "IO_L63P_SCP7_0", 63, 1 }, + { "P118", 0, "TR", "IO_L63N_SCP6_0", 63, 0 }, + { "P117", 0, "TR", "IO_L64P_SCP5_0", 64, 1 }, + { "P116", 0, "TR", "IO_L64N_SCP4_0", 64, 0 }, + { "P115", 0, "TR", "IO_L65P_SCP3_0", 65, 1 }, + { "P114", 0, "TR", "IO_L65N_SCP2_0", 65, 0 }, + { "P112", 0, "TR", "IO_L66P_SCP1_0", 66, 1 }, + { "P111", 0, "TR", "IO_L66N_SCP0_0", 66, 0 }, + { "P109", -1, "NA", "TCK", 0, 0 }, + { "P110", -1, "NA", "TDI", 0, 0 }, + { "P107", -1, "NA", "TMS", 0, 0 }, + { "P106", -1, "NA", "TDO", 0, 0 }, + { "P105", 1, "RT", "IO_L1P_1", 1, 1 }, + { "P104", 1, "RT", "IO_L1N_VREF_1", 1, 0 }, + { "P102", 1, "RT", "IO_L32P_1", 32, 1 }, + { "P101", 1, "RT", "IO_L32N_1", 32, 0 }, + { "P100", 1, "RT", "IO_L33P_1", 33, 1 }, + { "P99", 1, "RT", "IO_L33N_1", 33, 0 }, + { "P98", 1, "RT", "IO_L34P_1", 34, 1 }, + { "P97", 1, "RT", "IO_L34N_1", 34, 0 }, + { "P95", 1, "RT", "IO_L40P_GCLK11_1", 40, 1 }, + { "P94", 1, "RT", "IO_L40N_GCLK10_1", 40, 0 }, + { "P93", 1, "RT", "IO_L41P_GCLK9_IRDY1_1", 41, 1 }, + { "P92", 1, "RT", "IO_L41N_GCLK8_1", 41, 0 }, + { "P88", 1, "RB", "IO_L42P_GCLK7_1", 42, 1 }, + { "P87", 1, "RB", "IO_L42N_GCLK6_TRDY1_1", 42, 0 }, + { "P85", 1, "RB", "IO_L43P_GCLK5_1", 43, 1 }, + { "P84", 1, "RB", "IO_L43N_GCLK4_1", 43, 0 }, + { "P83", 1, "RB", "IO_L45P_1", 45, 1 }, + { "P82", 1, "RB", "IO_L45N_1", 45, 0 }, + { "P81", 1, "RB", "IO_L46P_1", 46, 1 }, + { "P80", 1, "RB", "IO_L46N_1", 46, 0 }, + { "P79", 1, "RB", "IO_L47P_1", 47, 1 }, + { "P78", 1, "RB", "IO_L47N_1", 47, 0 }, + { "P75", 1, "RB", "IO_L74P_AWAKE_1", 74, 1 }, + { "P74", 1, "RB", "IO_L74N_DOUT_BUSY_1", 74, 0 }, + { "P73", -1, "NA", "SUSPEND", 0, 0 }, + { "P72", 2, "NA", "CMPCS_B_2", 0, 0 }, + { "P71", 2, "NA", "DONE_2", 0, 0 }, + { "P70", 2, "BR", "IO_L1P_CCLK_2", 1, 1 }, + { "P69", 2, "BR", "IO_L1N_M0_CMPMISO_2", 1, 0 }, + { "P67", 2, "BR", "IO_L2P_CMPCLK_2", 2, 1 }, + { "P66", 2, "BR", "IO_L2N_CMPMOSI_2", 2, 0 }, + { "P65", 2, "BR", "IO_L3P_D0_DIN_MISO_MISO1_2", 3, 1 }, + { "P64", 2, "BR", "IO_L3N_MOSI_CSI_B_MISO0_2", 3, 0 }, + { "P62", 2, "BR", "IO_L12P_D1_MISO2_2", 12, 1 }, + { "P61", 2, "BR", "IO_L12N_D2_MISO3_2", 12, 0 }, + { "P60", 2, "BR", "IO_L13P_M1_2", 13, 1 }, + { "P59", 2, "BR", "IO_L13N_D10_2", 13, 0 }, + { "P58", 2, "BR", "IO_L14P_D11_2", 14, 1 }, + { "P57", 2, "BR", "IO_L14N_D12_2", 14, 0 }, + { "P56", 2, "BR", "IO_L30P_GCLK1_D13_2", 30, 1 }, + { "P55", 2, "BR", "IO_L30N_GCLK0_USERCCLK_2", 30, 0 }, + { "P51", 2, "BL", "IO_L31P_GCLK31_D14_2", 31, 1 }, + { "P50", 2, "BL", "IO_L31N_GCLK30_D15_2", 31, 0 }, + { "P48", 2, "BL", "IO_L48P_D7_2", 48, 1 }, + { "P47", 2, "BL", "IO_L48N_RDWR_B_VREF_2", 48, 0 }, + { "P46", 2, "BL", "IO_L49P_D3_2", 49, 1 }, + { "P45", 2, "BL", "IO_L49N_D4_2", 49, 0 }, + { "P44", 2, "BL", "IO_L62P_D5_2", 62, 1 }, + { "P43", 2, "BL", "IO_L62N_D6_2", 62, 0 }, + { "P41", 2, "BL", "IO_L64P_D8_2", 64, 1 }, + { "P40", 2, "BL", "IO_L64N_D9_2", 64, 0 }, + { "P39", 2, "BL", "IO_L65P_INIT_B_2", 65, 1 }, + { "P38", 2, "BL", "IO_L65N_CSO_B_2", 65, 0 }, + { "P37", 2, "NA", "PROGRAM_B_2", 0, 0 }, + { "P35", 3, "LB", "IO_L1P_3", 1, 1 }, + { "P34", 3, "LB", "IO_L1N_VREF_3", 1, 0 }, + { "P33", 3, "LB", "IO_L2P_3", 2, 1 }, + { "P32", 3, "LB", "IO_L2N_3", 2, 0 }, + { "P30", 3, "LB", "IO_L36P_3", 36, 1 }, + { "P29", 3, "LB", "IO_L36N_3", 36, 0 }, + { "P27", 3, "LB", "IO_L37P_3", 37, 1 }, + { "P26", 3, "LB", "IO_L37N_3", 37, 0 }, + { "P24", 3, "LB", "IO_L41P_GCLK27_3", 41, 1 }, + { "P23", 3, "LB", "IO_L41N_GCLK26_3", 41, 0 }, + { "P22", 3, "LB", "IO_L42P_GCLK25_TRDY2_3", 42, 1 }, + { "P21", 3, "LB", "IO_L42N_GCLK24_3", 42, 0 }, + { "P17", 3, "LT", "IO_L43P_GCLK23_3", 43, 1 }, + { "P16", 3, "LT", "IO_L43N_GCLK22_IRDY2_3", 43, 0 }, + { "P15", 3, "LT", "IO_L44P_GCLK21_3", 44, 1 }, + { "P14", 3, "LT", "IO_L44N_GCLK20_3", 44, 0 }, + { "P12", 3, "LT", "IO_L49P_3", 49, 1 }, + { "P11", 3, "LT", "IO_L49N_3", 49, 0 }, + { "P10", 3, "LT", "IO_L50P_3", 50, 1 }, + { "P9", 3, "LT", "IO_L50N_3", 50, 0 }, + { "P8", 3, "LT", "IO_L51P_3", 51, 1 }, + { "P7", 3, "LT", "IO_L51N_3", 51, 0 }, + { "P6", 3, "LT", "IO_L52P_3", 52, 1 }, + { "P5", 3, "LT", "IO_L52N_3", 52, 0 }, + { "P2", 3, "LT", "IO_L83P_3", 83, 1 }, + { "P1", 3, "LT", "IO_L83N_VREF_3", 83, 0 }, + { "P108", -1, "NA", "GND", 0, 0 }, + { "P113", -1, "NA", "GND", 0, 0 }, + { "P13", -1, "NA", "GND", 0, 0 }, + { "P130", -1, "NA", "GND", 0, 0 }, + { "P136", -1, "NA", "GND", 0, 0 }, + { "P25", -1, "NA", "GND", 0, 0 }, + { "P3", -1, "NA", "GND", 0, 0 }, + { "P49", -1, "NA", "GND", 0, 0 }, + { "P54", -1, "NA", "GND", 0, 0 }, + { "P68", -1, "NA", "GND", 0, 0 }, + { "P77", -1, "NA", "GND", 0, 0 }, + { "P91", -1, "NA", "GND", 0, 0 }, + { "P96", -1, "NA", "GND", 0, 0 }, + { "P129", -1, "NA", "VCCAUX", 0, 0 }, + { "P20", -1, "NA", "VCCAUX", 0, 0 }, + { "P36", -1, "NA", "VCCAUX", 0, 0 }, + { "P53", -1, "NA", "VCCAUX", 0, 0 }, + { "P90", -1, "NA", "VCCAUX", 0, 0 }, + { "P128", -1, "NA", "VCCINT", 0, 0 }, + { "P19", -1, "NA", "VCCINT", 0, 0 }, + { "P28", -1, "NA", "VCCINT", 0, 0 }, + { "P52", -1, "NA", "VCCINT", 0, 0 }, + { "P89", -1, "NA", "VCCINT", 0, 0 }, + { "P122", 0, "NA", "VCCO_0", 0, 0 }, + { "P125", 0, "NA", "VCCO_0", 0, 0 }, + { "P135", 0, "NA", "VCCO_0", 0, 0 }, + { "P103", 1, "NA", "VCCO_1", 0, 0 }, + { "P76", 1, "NA", "VCCO_1", 0, 0 }, + { "P86", 1, "NA", "VCCO_1", 0, 0 }, + { "P42", 2, "NA", "VCCO_2", 0, 0 }, + { "P63", 2, "NA", "VCCO_2", 0, 0 }, + { "P18", 3, "NA", "VCCO_3", 0, 0 }, + { "P31", 3, "NA", "VCCO_3", 0, 0 }, + { "P4", 3, "NA", "VCCO_3", 0, 0 }, + + // rest is unbonded (.description = 0) + { "UNB113", 2, "BR", 0, 23, 1 }, + { "UNB114", 2, "BR", 0, 23, 0 }, + { "UNB115", 2, "BR", 0, 16, 1 }, + { "UNB116", 2, "BR", 0, 16, 0 }, + { "UNB117", 2, "BR", 0, 29, 1 }, + { "UNB118", 2, "BR", 0, 29, 0 }, + { "UNB123", 2, "BL", 0, 32, 1 }, + { "UNB124", 2, "BL", 0, 32, 0 }, + { "UNB125", 2, "BL", 0, 45, 1 }, + { "UNB126", 2, "BL", 0, 45, 0 }, + { "UNB127", 2, "BL", 0, 41, 1 }, + { "UNB128", 2, "BL", 0, 41, 0 }, + { "UNB129", 2, "BL", 0, 43, 1 }, + { "UNB130", 2, "BL", 0, 43, 0 }, + { "UNB131", 2, "BL", 0, 46, 1 }, + { "UNB132", 2, "BL", 0, 46, 0 }, + { "UNB139", 2, "BL", 0, 63, 1 }, + { "UNB140", 2, "BL", 0, 63, 0 }, + { "UNB149", 3, "LB", 0, 31, 1 }, + { "UNB150", 3, "LB", 0, 31, 0 }, + { "UNB151", 3, "LB", 0, 32, 1 }, + { "UNB152", 3, "LB", 0, 32, 0 }, + { "UNB153", 3, "LB", 0, 33, 1 }, + { "UNB154", 3, "LB", 0, 33, 0 }, + { "UNB155", 3, "LB", 0, 34, 1 }, + { "UNB156", 3, "LB", 0, 34, 0 }, + { "UNB157", 3, "LB", 0, 35, 1 }, + { "UNB158", 3, "LB", 0, 35, 0 }, + { "UNB163", 3, "LB", 0, 38, 1 }, + { "UNB164", 3, "LB", 0, 38, 0 }, + { "UNB165", 3, "LB", 0, 39, 1 }, + { "UNB166", 3, "LB", 0, 39, 0 }, + { "UNB167", 3, "LB", 0, 40, 1 }, + { "UNB168", 3, "LB", 0, 40, 0 }, + { "UNB177", 3, "LT", 0, 45, 1 }, + { "UNB178", 3, "LT", 0, 45, 0 }, + { "UNB179", 3, "LT", 0, 46, 1 }, + { "UNB180", 3, "LT", 0, 46, 0 }, + { "UNB181", 3, "LT", 0, 47, 1 }, + { "UNB182", 3, "LT", 0, 47, 0 }, + { "UNB183", 3, "LT", 0, 48, 1 }, + { "UNB184", 3, "LT", 0, 48, 0 }, + { "UNB193", 3, "LT", 0, 53, 1 }, + { "UNB194", 3, "LT", 0, 53, 0 }, + { "UNB195", 3, "LT", 0, 54, 1 }, + { "UNB196", 3, "LT", 0, 54, 0 }, + { "UNB197", 3, "LT", 0, 55, 1 }, + { "UNB198", 3, "LT", 0, 55, 0 }, + { "UNB9", 0, "TL", 0, 5, 1 }, + { "UNB10", 0, "TL", 0, 5, 0 }, + { "UNB11", 0, "TL", 0, 6, 1 }, + { "UNB12", 0, "TL", 0, 6, 0 }, + { "UNB13", 0, "TL", 0, 10, 1 }, + { "UNB14", 0, "TL", 0, 10, 0 }, + { "UNB15", 0, "TL", 0, 8, 1 }, + { "UNB16", 0, "TL", 0, 8, 0 }, + { "UNB17", 0, "TL", 0, 11, 1 }, + { "UNB18", 0, "TL", 0, 11, 0 }, + { "UNB19", 0, "TL", 0, 33, 1 }, + { "UNB20", 0, "TL", 0, 33, 0 }, + { "UNB29", 0, "TR", 0, 38, 1 }, + { "UNB30", 0, "TR", 0, 38, 0 }, + { "UNB31", 0, "TR", 0, 39, 1 }, + { "UNB32", 0, "TR", 0, 39, 0 }, + { "UNB33", 0, "TR", 0, 41, 1 }, + { "UNB34", 0, "TR", 0, 41, 0 }, + { "UNB47", 1, "RT", 0, 29, 1 }, + { "UNB48", 1, "RT", 0, 29, 0 }, + { "UNB49", 1, "RT", 0, 30, 1 }, + { "UNB50", 1, "RT", 0, 30, 0 }, + { "UNB51", 1, "RT", 0, 31, 1 }, + { "UNB52", 1, "RT", 0, 31, 0 }, + { "UNB59", 1, "RT", 0, 35, 1 }, + { "UNB60", 1, "RT", 0, 35, 0 }, + { "UNB61", 1, "RT", 0, 36, 1 }, + { "UNB62", 1, "RT", 0, 36, 0 }, + { "UNB63", 1, "RT", 0, 37, 1 }, + { "UNB64", 1, "RT", 0, 37, 0 }, + { "UNB65", 1, "RT", 0, 38, 1 }, + { "UNB66", 1, "RT", 0, 38, 0 }, + { "UNB67", 1, "RT", 0, 39, 1 }, + { "UNB68", 1, "RT", 0, 39, 0 }, + { "UNB77", 1, "RB", 0, 44, 1 }, + { "UNB78", 1, "RB", 0, 44, 0 }, + { "UNB85", 1, "RB", 0, 48, 1 }, + { "UNB86", 1, "RB", 0, 48, 0 }, + { "UNB87", 1, "RB", 0, 49, 1 }, + { "UNB88", 1, "RB", 0, 49, 0 }, + { "UNB89", 1, "RB", 0, 50, 1 }, + { "UNB90", 1, "RB", 0, 50, 0 }, + { "UNB91", 1, "RB", 0, 51, 1 }, + { "UNB92", 1, "RB", 0, 51, 0 }, + { "UNB93", 1, "RB", 0, 52, 1 }, + { "UNB94", 1, "RB", 0, 52, 0 }, + { "UNB95", 1, "RB", 0, 53, 1 }, + { "UNB96", 1, "RB", 0, 53, 0 }, + { "UNB97", 1, "RB", 0, 61, 1 }, + { "UNB98", 1, "RB", 0, 61, 0 }}}; + static const struct xc6_pkg_info pkg_ftg256 = { + .pkg = FTG256, + // todo: any unbonded pins? + .num_pins = /*physical pinouts*/ 256 + /*on die but unbonded*/ 0, + // name bank bufio2 description pair pos_side + .pin = { + { "C4", 0, "TL", "IO_L1P_HSWAPEN_0", 1, 1 }, + { "A4", 0, "TL", "IO_L1N_VREF_0", 1, 0 }, + { "B5", 0, "TL", "IO_L2P_0", 2, 1 }, + { "A5", 0, "TL", "IO_L2N_0", 2, 0 }, + { "D5", 0, "TL", "IO_L3P_0", 3, 1 }, + { "C5", 0, "TL", "IO_L3N_0", 3, 0 }, + { "B6", 0, "TL", "IO_L4P_0", 4, 1 }, + { "A6", 0, "TL", "IO_L4N_0", 4, 0 }, + { "F7", 0, "TL", "IO_L5P_0", 5, 1 }, + { "E6", 0, "TL", "IO_L5N_0", 5, 0 }, + { "C7", 0, "TL", "IO_L6P_0", 6, 1 }, + { "A7", 0, "TL", "IO_L6N_0", 6, 0 }, + { "D6", 0, "TL", "IO_L7P_0", 7, 1 }, + { "C6", 0, "TL", "IO_L7N_0", 7, 0 }, + { "B8", 0, "TL", "IO_L33P_0", 33, 1 }, + { "A8", 0, "TL", "IO_L33N_0", 33, 0 }, + { "C9", 0, "TL", "IO_L34P_GCLK19_0", 34, 1 }, + { "A9", 0, "TL", "IO_L34N_GCLK18_0", 34, 0 }, + { "B10", 0, "TL", "IO_L35P_GCLK17_0", 35, 1 }, + { "A10", 0, "TL", "IO_L35N_GCLK16_0", 35, 0 }, + { "E7", 0, "TR", "IO_L36P_GCLK15_0", 36, 1 }, + { "E8", 0, "TR", "IO_L36N_GCLK14_0", 36, 0 }, + { "E10", 0, "TR", "IO_L37P_GCLK13_0", 37, 1 }, + { "C10", 0, "TR", "IO_L37N_GCLK12_0", 37, 0 }, + { "D8", 0, "TR", "IO_L38P_0", 38, 1 }, + { "C8", 0, "TR", "IO_L38N_VREF_0", 38, 0 }, + { "C11", 0, "TR", "IO_L39P_0", 39, 1 }, + { "A11", 0, "TR", "IO_L39N_0", 39, 0 }, + { "F9", 0, "TR", "IO_L40P_0", 40, 1 }, + { "D9", 0, "TR", "IO_L40N_0", 40, 0 }, + { "B12", 0, "TR", "IO_L62P_0", 62, 1 }, + { "A12", 0, "TR", "IO_L62N_VREF_0", 62, 0 }, + { "C13", 0, "TR", "IO_L63P_SCP7_0", 63, 1 }, + { "A13", 0, "TR", "IO_L63N_SCP6_0", 63, 0 }, + { "F10", 0, "TR", "IO_L64P_SCP5_0", 64, 1 }, + { "E11", 0, "TR", "IO_L64N_SCP4_0", 64, 0 }, + { "B14", 0, "TR", "IO_L65P_SCP3_0", 65, 1 }, + { "A14", 0, "TR", "IO_L65N_SCP2_0", 65, 0 }, + { "D11", 0, "TR", "IO_L66P_SCP1_0", 66, 1 }, + { "D12", 0, "TR", "IO_L66N_SCP0_0", 66, 0 }, + { "C14", -1, "NA", "TCK" }, + { "C12", -1, "NA", "TDI" }, + { "A15", -1, "NA", "TMS" }, + { "E14", -1, "NA", "TDO" }, + { "E13", 1, "RT", "IO_L1P_A25_1", 1, 1 }, + { "E12", 1, "RT", "IO_L1N_A24_VREF_1", 1, 0 }, + { "B15", 1, "RT", "IO_L29P_A23_M1A13_1", 29, 1 }, + { "B16", 1, "RT", "IO_L29N_A22_M1A14_1", 29, 0 }, + { "F12", 1, "RT", "IO_L30P_A21_M1RESET_1", 30, 1 }, + { "G11", 1, "RT", "IO_L30N_A20_M1A11_1", 30, 0 }, + { "D14", 1, "RT", "IO_L31P_A19_M1CKE_1", 31, 1 }, + { "D16", 1, "RT", "IO_L31N_A18_M1A12_1", 31, 0 }, + { "F13", 1, "RT", "IO_L32P_A17_M1A8_1", 32, 1 }, + { "F14", 1, "RT", "IO_L32N_A16_M1A9_1", 32, 0 }, + { "C15", 1, "RT", "IO_L33P_A15_M1A10_1", 33, 1 }, + { "C16", 1, "RT", "IO_L33N_A14_M1A4_1", 33, 0 }, + { "E15", 1, "RT", "IO_L34P_A13_M1WE_1", 34, 1 }, + { "E16", 1, "RT", "IO_L34N_A12_M1BA2_1", 34, 0 }, + { "F15", 1, "RT", "IO_L35P_A11_M1A7_1", 35, 1 }, + { "F16", 1, "RT", "IO_L35N_A10_M1A2_1", 35, 0 }, + { "G14", 1, "RT", "IO_L36P_A9_M1BA0_1", 36, 1 }, + { "G16", 1, "RT", "IO_L36N_A8_M1BA1_1", 36, 0 }, + { "H15", 1, "RT", "IO_L37P_A7_M1A0_1", 37, 1 }, + { "H16", 1, "RT", "IO_L37N_A6_M1A1_1", 37, 0 }, + { "G12", 1, "RT", "IO_L38P_A5_M1CLK_1", 38, 1 }, + { "H11", 1, "RT", "IO_L38N_A4_M1CLKN_1", 38, 0 }, + { "H13", 1, "RT", "IO_L39P_M1A3_1", 39, 1 }, + { "H14", 1, "RT", "IO_L39N_M1ODT_1", 39, 0 }, + { "J11", 1, "RT", "IO_L40P_GCLK11_M1A5_1", 40, 1 }, + { "J12", 1, "RT", "IO_L40N_GCLK10_M1A6_1", 40, 0 }, + { "J13", 1, "RT", "IO_L41P_GCLK9_IRDY1_M1RASN_1", 41, 1 }, + { "K14", 1, "RT", "IO_L41N_GCLK8_M1CASN_1", 41, 0 }, + { "K12", 1, "RB", "IO_L42P_GCLK7_M1UDM_1", 42, 1 }, + { "K11", 1, "RB", "IO_L42N_GCLK6_TRDY1_M1LDM_1", 42, 0 }, + { "J14", 1, "RB", "IO_L43P_GCLK5_M1DQ4_1", 43, 1 }, + { "J16", 1, "RB", "IO_L43N_GCLK4_M1DQ5_1", 43, 0 }, + { "K15", 1, "RB", "IO_L44P_A3_M1DQ6_1", 44, 1 }, + { "K16", 1, "RB", "IO_L44N_A2_M1DQ7_1", 44, 0 }, + { "N14", 1, "RB", "IO_L45P_A1_M1LDQS_1", 45, 1 }, + { "N16", 1, "RB", "IO_L45N_A0_M1LDQSN_1", 45, 0 }, + { "M15", 1, "RB", "IO_L46P_FCS_B_M1DQ2_1", 46, 1 }, + { "M16", 1, "RB", "IO_L46N_FOE_B_M1DQ3_1", 46, 0 }, + { "L14", 1, "RB", "IO_L47P_FWE_B_M1DQ0_1", 47, 1 }, + { "L16", 1, "RB", "IO_L47N_LDC_M1DQ1_1", 47, 0 }, + { "P15", 1, "RB", "IO_L48P_HDC_M1DQ8_1", 48, 1 }, + { "P16", 1, "RB", "IO_L48N_M1DQ9_1", 48, 0 }, + { "R15", 1, "RB", "IO_L49P_M1DQ10_1", 49, 1 }, + { "R16", 1, "RB", "IO_L49N_M1DQ11_1", 49, 0 }, + { "R14", 1, "RB", "IO_L50P_M1UDQS_1", 50, 1 }, + { "T15", 1, "RB", "IO_L50N_M1UDQSN_1", 50, 0 }, + { "T14", 1, "RB", "IO_L51P_M1DQ12_1", 51, 1 }, + { "T13", 1, "RB", "IO_L51N_M1DQ13_1", 51, 0 }, + { "R12", 1, "RB", "IO_L52P_M1DQ14_1", 52, 1 }, + { "T12", 1, "RB", "IO_L52N_M1DQ15_1", 52, 0 }, + { "L12", 1, "RB", "IO_L53P_1", 53, 1 }, + { "L13", 1, "RB", "IO_L53N_VREF_1", 53, 0 }, + { "M13", 1, "RB", "IO_L74P_AWAKE_1", 74, 1 }, + { "M14", 1, "RB", "IO_L74N_DOUT_BUSY_1", 74, 0 }, + { "P14", -1, "NA", "SUSPEND" }, + { "L11", 2, "NA", "CMPCS_B_2" }, + { "P13", 2, "NA", "DONE_2" }, + { "R11", 2, "BR", "IO_L1P_CCLK_2", 1, 1 }, + { "T11", 2, "BR", "IO_L1N_M0_CMPMISO_2", 1, 0 }, + { "M12", 2, "BR", "IO_L2P_CMPCLK_2", 2, 1 }, + { "M11", 2, "BR", "IO_L2N_CMPMOSI_2", 2, 0 }, + { "P10", 2, "BR", "IO_L3P_D0_DIN_MISO_MISO1_2", 3, 1 }, + { "T10", 2, "BR", "IO_L3N_MOSI_CSI_B_MISO0_2", 3, 0 }, + { "N12", 2, "BR", "IO_L12P_D1_MISO2_2", 12, 1 }, + { "P12", 2, "BR", "IO_L12N_D2_MISO3_2", 12, 0 }, + { "N11", 2, "BR", "IO_L13P_M1_2", 13, 1 }, + { "P11", 2, "BR", "IO_L13N_D10_2", 13, 0 }, + { "N9", 2, "BR", "IO_L14P_D11_2", 14, 1 }, + { "P9", 2, "BR", "IO_L14N_D12_2", 14, 0 }, + { "R9", 2, "BR", "IO_L23P_2", 23, 1 }, + { "T9", 2, "BR", "IO_L23N_2", 23, 0 }, + { "L10", 2, "BR", "IO_L16P_2", 16, 1 }, + { "M10", 2, "BR", "IO_L16N_VREF_2", 16, 0 }, + { "M9", 2, "BR", "IO_L29P_GCLK3_2", 29, 1 }, + { "N8", 2, "BR", "IO_L29N_GCLK2_2", 29, 0 }, + { "P8", 2, "BR", "IO_L30P_GCLK1_D13_2", 30, 1 }, + { "T8", 2, "BR", "IO_L30N_GCLK0_USERCCLK_2", 30, 0 }, + { "P7", 2, "BL", "IO_L31P_GCLK31_D14_2", 31, 1 }, + { "M7", 2, "BL", "IO_L31N_GCLK30_D15_2", 31, 0 }, + { "R7", 2, "BL", "IO_L32P_GCLK29_2", 32, 1 }, + { "T7", 2, "BL", "IO_L32N_GCLK28_2", 32, 0 }, + { "P6", 2, "BL", "IO_L47P_2", 47, 1 }, + { "T6", 2, "BL", "IO_L47N_2", 47, 0 }, + { "R5", 2, "BL", "IO_L48P_D7_2", 48, 1 }, + { "T5", 2, "BL", "IO_L48N_RDWR_B_VREF_2", 48, 0 }, + { "N5", 2, "BL", "IO_L49P_D3_2", 49, 1 }, + { "P5", 2, "BL", "IO_L49N_D4_2", 49, 0 }, + { "L8", 2, "BL", "IO_L62P_D5_2", 62, 1 }, + { "L7", 2, "BL", "IO_L62N_D6_2", 62, 0 }, + { "P4", 2, "BL", "IO_L63P_2", 63, 1 }, + { "T4", 2, "BL", "IO_L63N_2", 63, 0 }, + { "M6", 2, "BL", "IO_L64P_D8_2", 64, 1 }, + { "N6", 2, "BL", "IO_L64N_D9_2", 64, 0 }, + { "R3", 2, "BL", "IO_L65P_INIT_B_2", 65, 1 }, + { "T3", 2, "BL", "IO_L65N_CSO_B_2", 65, 0 }, + { "T2", 2, "NA", "PROGRAM_B_2" }, + { "M4", 3, "LB", "IO_L1P_3", 1, 1 }, + { "M3", 3, "LB", "IO_L1N_VREF_3", 1, 0 }, + { "M5", 3, "LB", "IO_L2P_3", 2, 1 }, + { "N4", 3, "LB", "IO_L2N_3", 2, 0 }, + { "R2", 3, "LB", "IO_L32P_M3DQ14_3", 32, 1 }, + { "R1", 3, "LB", "IO_L32N_M3DQ15_3", 32, 0 }, + { "P2", 3, "LB", "IO_L33P_M3DQ12_3", 33, 1 }, + { "P1", 3, "LB", "IO_L33N_M3DQ13_3", 33, 0 }, + { "N3", 3, "LB", "IO_L34P_M3UDQS_3", 34, 1 }, + { "N1", 3, "LB", "IO_L34N_M3UDQSN_3", 34, 0 }, + { "M2", 3, "LB", "IO_L35P_M3DQ10_3", 35, 1 }, + { "M1", 3, "LB", "IO_L35N_M3DQ11_3", 35, 0 }, + { "L3", 3, "LB", "IO_L36P_M3DQ8_3", 36, 1 }, + { "L1", 3, "LB", "IO_L36N_M3DQ9_3", 36, 0 }, + { "K2", 3, "LB", "IO_L37P_M3DQ0_3", 37, 1 }, + { "K1", 3, "LB", "IO_L37N_M3DQ1_3", 37, 0 }, + { "J3", 3, "LB", "IO_L38P_M3DQ2_3", 38, 1 }, + { "J1", 3, "LB", "IO_L38N_M3DQ3_3", 38, 0 }, + { "H2", 3, "LB", "IO_L39P_M3LDQS_3", 39, 1 }, + { "H1", 3, "LB", "IO_L39N_M3LDQSN_3", 39, 0 }, + { "G3", 3, "LB", "IO_L40P_M3DQ6_3", 40, 1 }, + { "G1", 3, "LB", "IO_L40N_M3DQ7_3", 40, 0 }, + { "F2", 3, "LB", "IO_L41P_GCLK27_M3DQ4_3", 41, 1 }, + { "F1", 3, "LB", "IO_L41N_GCLK26_M3DQ5_3", 41, 0 }, + { "K3", 3, "LB", "IO_L42P_GCLK25_TRDY2_M3UDM_3", 42, 1 }, + { "J4", 3, "LB", "IO_L42N_GCLK24_M3LDM_3", 42, 0 }, + { "J6", 3, "LT", "IO_L43P_GCLK23_M3RASN_3", 43, 1 }, + { "H5", 3, "LT", "IO_L43N_GCLK22_IRDY2_M3CASN_3", 43, 0 }, + { "H4", 3, "LT", "IO_L44P_GCLK21_M3A5_3", 44, 1 }, + { "H3", 3, "LT", "IO_L44N_GCLK20_M3A6_3", 44, 0 }, + { "L4", 3, "LT", "IO_L45P_M3A3_3", 45, 1 }, + { "L5", 3, "LT", "IO_L45N_M3ODT_3", 45, 0 }, + { "E2", 3, "LT", "IO_L46P_M3CLK_3", 46, 1 }, + { "E1", 3, "LT", "IO_L46N_M3CLKN_3", 46, 0 }, + { "K5", 3, "LT", "IO_L47P_M3A0_3", 47, 1 }, + { "K6", 3, "LT", "IO_L47N_M3A1_3", 47, 0 }, + { "C3", 3, "LT", "IO_L48P_M3BA0_3", 48, 1 }, + { "C2", 3, "LT", "IO_L48N_M3BA1_3", 48, 0 }, + { "D3", 3, "LT", "IO_L49P_M3A7_3", 49, 1 }, + { "D1", 3, "LT", "IO_L49N_M3A2_3", 49, 0 }, + { "C1", 3, "LT", "IO_L50P_M3WE_3", 50, 1 }, + { "B1", 3, "LT", "IO_L50N_M3BA2_3", 50, 0 }, + { "G6", 3, "LT", "IO_L51P_M3A10_3", 51, 1 }, + { "G5", 3, "LT", "IO_L51N_M3A4_3", 51, 0 }, + { "B2", 3, "LT", "IO_L52P_M3A8_3", 52, 1 }, + { "A2", 3, "LT", "IO_L52N_M3A9_3", 52, 0 }, + { "F4", 3, "LT", "IO_L53P_M3CKE_3", 53, 1 }, + { "F3", 3, "LT", "IO_L53N_M3A12_3", 53, 0 }, + { "E4", 3, "LT", "IO_L54P_M3RESET_3", 54, 1 }, + { "E3", 3, "LT", "IO_L54N_M3A11_3", 54, 0 }, + { "F6", 3, "LT", "IO_L55P_M3A13_3", 55, 1 }, + { "F5", 3, "LT", "IO_L55N_M3A14_3", 55, 0 }, + { "B3", 3, "LT", "IO_L83P_3", 83, 1 }, + { "A3", 3, "LT", "IO_L83N_VREF_3", 83, 0 }, + { "A1", -1, "NA", "GND" }, + { "A16", -1, "NA", "GND" }, + { "B11", -1, "NA", "GND" }, + { "B7", -1, "NA", "GND" }, + { "D13", -1, "NA", "GND" }, + { "D4", -1, "NA", "GND" }, + { "E9", -1, "NA", "GND" }, + { "G15", -1, "NA", "GND" }, + { "G2", -1, "NA", "GND" }, + { "G8", -1, "NA", "GND" }, + { "H12", -1, "NA", "GND" }, + { "H7", -1, "NA", "GND" }, + { "H9", -1, "NA", "GND" }, + { "J5", -1, "NA", "GND" }, + { "J8", -1, "NA", "GND" }, + { "K7", -1, "NA", "GND" }, + { "K9", -1, "NA", "GND" }, + { "L15", -1, "NA", "GND" }, + { "L2", -1, "NA", "GND" }, + { "M8", -1, "NA", "GND" }, + { "N13", -1, "NA", "GND" }, + { "P3", -1, "NA", "GND" }, + { "R10", -1, "NA", "GND" }, + { "R6", -1, "NA", "GND" }, + { "T1", -1, "NA", "GND" }, + { "T16", -1, "NA", "GND" }, + { "E5", -1, "NA", "VCCAUX" }, + { "F11", -1, "NA", "VCCAUX" }, + { "F8", -1, "NA", "VCCAUX" }, + { "G10", -1, "NA", "VCCAUX" }, + { "H6", -1, "NA", "VCCAUX" }, + { "J10", -1, "NA", "VCCAUX" }, + { "L6", -1, "NA", "VCCAUX" }, + { "L9", -1, "NA", "VCCAUX" }, + { "G7", -1, "NA", "VCCINT" }, + { "G9", -1, "NA", "VCCINT" }, + { "H10", -1, "NA", "VCCINT" }, + { "H8", -1, "NA", "VCCINT" }, + { "J7", -1, "NA", "VCCINT" }, + { "J9", -1, "NA", "VCCINT" }, + { "K10", -1, "NA", "VCCINT" }, + { "K8", -1, "NA", "VCCINT" }, + { "B13", 0, "NA", "VCCO_0" }, + { "B4", 0, "NA", "VCCO_0" }, + { "B9", 0, "NA", "VCCO_0" }, + { "D10", 0, "NA", "VCCO_0" }, + { "D7", 0, "NA", "VCCO_0" }, + { "D15", 1, "NA", "VCCO_1" }, + { "G13", 1, "NA", "VCCO_1" }, + { "J15", 1, "NA", "VCCO_1" }, + { "K13", 1, "NA", "VCCO_1" }, + { "N15", 1, "NA", "VCCO_1" }, + { "R13", 1, "NA", "VCCO_1" }, + { "N10", 2, "NA", "VCCO_2" }, + { "N7", 2, "NA", "VCCO_2" }, + { "R4", 2, "NA", "VCCO_2" }, + { "R8", 2, "NA", "VCCO_2" }, + { "D2", 3, "NA", "VCCO_3" }, + { "G4", 3, "NA", "VCCO_3" }, + { "J2", 3, "NA", "VCCO_3" }, + { "K4", 3, "NA", "VCCO_3" }, + { "N2", 3, "NA", "VCCO_3" }}}; switch (pkg) { case TQG144: return &pkg_tqg144; + case FTG256: return &pkg_ftg256; default: ; } HERE(); return 0; } +const char *xc6_find_pkg_pin(const struct xc6_pkg_info *pkg_info, const char *description) +{ + int i; + + for (i = 0; i < pkg_info->num_pins; i++) { + if (!strcmp(pkg_info->pin[i].description, description)) + return pkg_info->pin[i].name; + } + HERE(); + return 0; +} + int get_major_minors(int idcode, int major) { static const int minors_per_major[] = // for slx9 diff --git a/libs/parts.h b/libs/parts.h index fadb9b2..c0959a5 100644 --- a/libs/parts.h +++ b/libs/parts.h @@ -44,16 +44,6 @@ struct xc_major_info int minors; }; -#define XC_T2_IOB_PAD 0x00000001 -#define XC_T2_IOB_UNBONDED 0x00000002 -#define XC_T2_CENTER 0x00000004 - -struct xc_type2_info -{ - int flags; - int val; -}; - // // major_str // 'L' = X+L logic block @@ -76,6 +66,18 @@ struct xc_type2_info // 'U' = unwired // +#define XC6_NUM_GCLK_PINS 32 + +struct xc_t2_io_info +{ + int pair; // 0 for entries used for switches + int pos_side; // 1 for positive, 0 for negative + int bank; + int y; + int x; + int type_idx; +}; + struct xc_die { int idcode; @@ -85,8 +87,13 @@ struct xc_die const char* major_str; int num_majors; struct xc_major_info majors[XC_MAX_MAJORS]; - int num_type2; - struct xc_type2_info type2[XC_MAX_TYPE2_ENTRIES]; + + int num_t2_ios; + struct xc_t2_io_info t2_io[XC_MAX_TYPE2_ENTRIES]; + int num_gclk_pins; + int gclk_t2_io_idx[XC6_NUM_GCLK_PINS]; + int gclk_t2_switches[XC6_NUM_GCLK_PINS]; // in 16-bit words + int mcb_ypos; int num_mui; int mui_pos[XC_MAX_MUI_POS]; @@ -98,20 +105,31 @@ const struct xc_die* xc_die_info(int idcode); int xc_die_center_major(const struct xc_die *die); enum xc6_pkg { TQG144, FTG256, CSG324, FGG484 }; -#define XC6_NUM_GCLK_PINS 32 +#define XC6_MAX_NUM_PINS 900 // fgg900 package + +// see ug385 +struct xc6_pin_info +{ + const char *name; + int bank; + const char *bufio2; + const char *description; + int pair; + int pos_side; +}; struct xc6_pkg_info { enum xc6_pkg pkg; - int num_gclk_pins; - // negative side of differential pairs: even numbers - // positive side of differential pairs: odd numbers - const char* gclk_pin[XC6_NUM_GCLK_PINS]; - int gclk_type2_o[XC6_NUM_GCLK_PINS]; // in words + int num_pins; + struct xc6_pin_info pin[XC6_MAX_NUM_PINS]; }; const struct xc6_pkg_info *xc6_pkg_info(enum xc6_pkg pkg); +// returns 0 if description not found +const char *xc6_find_pkg_pin(const struct xc6_pkg_info *pkg_info, const char *description); + #define FRAME_SIZE 130 #define FRAMES_PER_ROW 505 // for slx4 and slx9 #define PADDING_FRAMES_PER_ROW 2 @@ -219,11 +237,13 @@ enum major_type get_major_type(int idcode, int major); #define XC6_LEFTSIDE_MAJOR 1 #define XC6_SLX9_RIGHTMOST_MAJOR 17 +#define XC6_SLX9_TOTAL_TILE_ROWS 73 +#define XC6_SLX9_TOTAL_TILE_COLS 45 + int get_rightside_major(int idcode); int get_major_framestart(int idcode, int major); int get_frames_per_row(int idcode); -int get_num_iobs(int idcode); const char* get_iob_sitename(int idcode, int idx); // returns -1 if sitename not found int find_iob_sitename(int idcode, const char* name); diff --git a/printf_swbits.c b/printf_swbits.c new file mode 100644 index 0000000..51804cc --- /dev/null +++ b/printf_swbits.c @@ -0,0 +1,29 @@ +// +// Author: Wolfgang Spraul +// +// This is free and unencumbered software released into the public domain. +// For details see the UNLICENSE file at the root of the source tree. +// + +#include "model.h" +#include "bit.h" + +int main(int argc, char** argv) +{ + struct fpga_model model; + int i; + + for (i = 1; i < argc; i++) { + if (!strcmp(argv[i], "--help")) { + printf( "\n%s\n\n" + "Usage: %s [--part=xc6slx9]\n" + " %*s [--help]\n\n", + *argv, *argv, (int) strlen(*argv), ""); + return 1; + } + } + fpga_build_model(&model, cmdline_part(argc, argv), + cmdline_package(argc, argv)); + printf_swbits(&model); + return fpga_free_model(&model); +}