261 lines
7.2 KiB
C
261 lines
7.2 KiB
C
//
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// Author: Wolfgang Spraul
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//
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// This is free and unencumbered software released into the public domain.
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// For details see the UNLICENSE file at the root of the source tree.
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//
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#include <time.h>
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#include "model.h"
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#include "floorplan.h"
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#include "control.h"
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time_t g_start_time;
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#define TIME() (time(0)-g_start_time)
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#define TIMESTAMP() printf("O timestamp %lld\n", (long long) TIME())
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#define MEMUSAGE() printf("O memusage %i\n", get_vm_mb());
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#define TIME_AND_MEM() TIMESTAMP(); MEMUSAGE()
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#define AUTOTEST_TMP_DIR "autotest.tmp"
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struct test_state
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{
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struct fpga_model* model;
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// test filenames are: tmp_dir/autotest_<base_name>_<diff_counter>.???
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char tmp_dir[256];
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char base_name[256];
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int next_diff_counter;
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};
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static int dump_file(const char* path)
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{
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char line[1024];
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FILE* f;
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printf("\n");
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printf("O begin dump %s\n", path);
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f = fopen(path, "r");
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EXIT(!f);
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while (fgets(line, sizeof(line), f)) {
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if (!strncmp(line, "--- ", 4)
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|| !strncmp(line, "+++ ", 4)
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|| !strncmp(line, "@@ ", 3))
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continue;
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printf(line);
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}
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fclose(f);
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printf("O end dump %s\n", path);
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printf("\n");
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return 0;
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}
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static int diff_start(struct test_state* tstate, const char* base_name)
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{
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strcpy(tstate->base_name, base_name);
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tstate->next_diff_counter = 1;
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return 0;
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}
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static int diff_printf(struct test_state* tstate)
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{
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char path[1024], tmp[1024], prior_fp[1024];
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int path_base;
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FILE* dest_f = 0;
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int rc;
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snprintf(path, sizeof(path), "%s/autotest_%s_%04i", tstate->tmp_dir,
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tstate->base_name, tstate->next_diff_counter);
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path_base = strlen(path);
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if (tstate->next_diff_counter == 1)
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strcpy(prior_fp, "/dev/null");
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else {
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snprintf(prior_fp, sizeof(prior_fp), "%s/autotest_%s_%04i.fp",
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tstate->tmp_dir, tstate->base_name,
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tstate->next_diff_counter-1);
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}
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strcpy(&path[path_base], ".fp");
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dest_f = fopen(path, "w");
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if (!dest_f) FAIL(errno);
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rc = printf_devices(dest_f, tstate->model, /*config_only*/ 1);
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if (rc) FAIL(rc);
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rc = printf_switches(dest_f, tstate->model, /*enabled_only*/ 1);
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if (rc) FAIL(rc);
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fclose(dest_f);
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dest_f = 0;
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path[path_base] = 0;
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snprintf(tmp, sizeof(tmp), "./autotest_diff.sh %s %s.fp >%s.log 2>&1",
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prior_fp, path, path);
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rc = system(tmp);
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if (rc) FAIL(rc);
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strcpy(&path[path_base], ".diff");
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rc = dump_file(path);
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if (rc) FAIL(rc);
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tstate->next_diff_counter++;
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return 0;
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fail:
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if (dest_f) fclose(dest_f);
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return rc;
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}
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int main(int argc, char** argv)
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{
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struct fpga_model model;
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struct fpga_device* P46_dev, *P48_dev, *logic_dev;
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int P46_y, P46_x, P46_idx, P48_y, P48_x, P48_idx, rc;
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struct test_state tstate;
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struct switch_to_yx switch_to;
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printf("\n");
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printf("O fpgatools automatic test suite. Be welcome and be "
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"our guest. namo namaha.\n");
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printf("\n");
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printf("O Time measured in seconds from 0.\n");
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g_start_time = time(0);
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TIMESTAMP();
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printf("O Memory usage reported in megabytes.\n");
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MEMUSAGE();
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printf("O Building memory model...\n");
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if ((rc = fpga_build_model(&model, XC6SLX9_ROWS, XC6SLX9_COLUMNS,
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XC6SLX9_LEFT_WIRING, XC6SLX9_RIGHT_WIRING)))
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goto fail;
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printf("O Done\n");
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TIME_AND_MEM();
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tstate.model = &model;
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strcpy(tstate.tmp_dir, AUTOTEST_TMP_DIR);
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mkdir(tstate.tmp_dir, S_IRWXU|S_IRWXG|S_IROTH|S_IXOTH);
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rc = diff_start(&tstate, "and");
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if (rc) FAIL(rc);
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// configure P46
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rc = fpga_find_iob(&model, "P46", &P46_y, &P46_x, &P46_idx);
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if (rc) FAIL(rc);
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P46_dev = fpga_dev(&model, P46_y, P46_x, DEV_IOB, P46_idx);
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if (!P46_dev) FAIL(EINVAL);
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P46_dev->instantiated = 1;
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strcpy(P46_dev->iob.istandard, IO_LVCMOS33);
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P46_dev->iob.bypass_mux = BYPASS_MUX_I;
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P46_dev->iob.I_mux = IMUX_I;
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// configure P48
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rc = fpga_find_iob(&model, "P48", &P48_y, &P48_x, &P48_idx);
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if (rc) FAIL(rc);
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P48_dev = fpga_dev(&model, P48_y, P48_x, DEV_IOB, P48_idx);
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if (!P48_dev) FAIL(EINVAL);
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P48_dev->instantiated = 1;
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strcpy(P48_dev->iob.ostandard, IO_LVCMOS33);
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P48_dev->iob.drive_strength = 12;
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P48_dev->iob.O_used = 1;
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P48_dev->iob.slew = SLEW_SLOW;
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P48_dev->iob.suspend = SUSP_3STATE;
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// configure logic
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logic_dev = fpga_dev(&model, /*y*/ 68, /*x*/ 13, DEV_LOGIC, DEV_LOGX);
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if (!logic_dev) FAIL(EINVAL);
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logic_dev->instantiated = 1;
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logic_dev->logic.D_used = 1;
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rc = fpga_set_lut(&model, logic_dev, D6_LUT, "A3", ZTERM);
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if (rc) FAIL(rc);
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rc = diff_printf(&tstate);
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if (rc) FAIL(rc);
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printf("P46 I pinw %s\n", strarray_lookup(&model.str, P46_dev->pinw_out[IOB_OUT_I]));
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switch_to.yx_req = YX_DEV_ILOGIC;
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switch_to.flags = SWTO_YX_DEF;
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switch_to.model = &model;
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switch_to.y = P46_y;
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switch_to.x = P46_x;
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switch_to.start_switch = P46_dev->pinw_out[IOB_OUT_I];
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rc = fpga_switch_to_yx(&switch_to);
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if (rc) FAIL(rc);
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rc = fpga_switch_set_enable(&model, switch_to.y, switch_to.x, &switch_to.set);
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if (rc) FAIL(rc);
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printf(" %s\n", fmt_swset(&model, switch_to.y, switch_to.x, &switch_to.set, SW_FROM));
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switch_to.yx_req = YX_ROUTING_TILE;
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switch_to.flags = SWTO_YX_DEF;
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switch_to.y = switch_to.dest_y;
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switch_to.x = switch_to.dest_x;
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switch_to.start_switch = switch_to.dest_connpt;
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rc = fpga_switch_to_yx(&switch_to);
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if (rc) FAIL(rc);
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rc = fpga_switch_set_enable(&model, switch_to.y, switch_to.x, &switch_to.set);
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if (rc) FAIL(rc);
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printf(" %s\n", fmt_swset(&model, switch_to.y, switch_to.x, &switch_to.set, SW_FROM));
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switch_to.yx_req = YX_ROUTING_TO_FABLOGIC;
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switch_to.flags = SWTO_YX_CLOSEST;
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switch_to.y = switch_to.dest_y;
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switch_to.x = switch_to.dest_x;
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switch_to.start_switch = switch_to.dest_connpt;
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rc = fpga_switch_to_yx(&switch_to);
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if (rc) FAIL(rc);
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rc = fpga_switch_set_enable(&model, switch_to.y, switch_to.x, &switch_to.set);
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if (rc) FAIL(rc);
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printf(" %s\n", fmt_swset(&model, switch_to.y, switch_to.x, &switch_to.set, SW_FROM));
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switch_to.yx_req = YX_DEV_LOGIC;
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switch_to.flags = SWTO_YX_TARGET_CONNPT|SWTO_YX_MAX_SWITCH_DEPTH;
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switch_to.y = switch_to.dest_y;
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switch_to.x = switch_to.dest_x;
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switch_to.start_switch = switch_to.dest_connpt;
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switch_to.max_switch_depth = 1;
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{
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struct sw_chain c = {
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.model = &model, .y = switch_to.dest_y,
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.x = switch_to.dest_x+1,
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.start_switch = logic_dev->pinw_in[LOGIC_IN_D3],
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.from_to = SW_TO, .max_chain_size = MAX_SW_DEPTH };
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if (fpga_switch_chain(&c) == NO_CONN) FAIL(EINVAL);
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if (c.set.len == 0) { HERE(); FAIL(EINVAL); }
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switch_to.target_connpt = fpga_switch_str_i(&model,
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switch_to.dest_y, switch_to.dest_x+1,
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c.set.sw[c.set.len-1], SW_FROM);
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}
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rc = fpga_switch_to_yx(&switch_to);
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if (rc) FAIL(rc);
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rc = fpga_switch_set_enable(&model, switch_to.y, switch_to.x, &switch_to.set);
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if (rc) FAIL(rc);
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printf(" %s\n", fmt_swset(&model, switch_to.y, switch_to.x, &switch_to.set, SW_FROM));
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{
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struct sw_chain c = {
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.model = &model, .y = switch_to.dest_y,
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.x = switch_to.dest_x,
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.start_switch = switch_to.dest_connpt,
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.from_to = SW_FROM, .max_chain_size = MAX_SW_DEPTH };
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if (fpga_switch_chain(&c) == NO_CONN) FAIL(EINVAL);
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if (c.set.len == 0) { HERE(); FAIL(EINVAL); }
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rc = fpga_switch_set_enable(&model, c.y, c.x, &c.set);
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if (rc) FAIL(rc);
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printf(" %s\n", fmt_swset(&model, c.y, c.x, &c.set, SW_FROM));
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}
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rc = diff_printf(&tstate);
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if (rc) FAIL(rc);
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printf("\n");
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printf("P48 O pinw %s\n", strarray_lookup(&model.str, P48_dev->pinw_in[IOB_IN_O]));
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printf("\n");
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printf("O Test suite completed.\n");
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TIME_AND_MEM();
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printf("\n");
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return EXIT_SUCCESS;
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fail:
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return rc;
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}
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