suzanne.soy/fpgatools
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public domain tools for FPGAs
33 Commits 1 Branch 0 Tags 2 MiB
C 98.7%
Makefile 1.2%
970eb4eee9
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Wolfgang Spraul 970eb4eee9 added simple hashed string array for tile and wire names
2012-07-19 17:29:25 +02:00
.gitignore added new stub util new_floorplan 2012-07-18 04:37:15 +02:00
bit2txt.c a little DSP support, lots of reading and thinking 2012-07-08 03:47:59 +02:00
draw_svg_tiles.c added new stub util new_floorplan 2012-07-18 04:37:15 +02:00
fpgastyle.css css 2012-06-23 16:55:17 +02:00
helper.c a little DSP support, lots of reading and thinking 2012-07-08 03:47:59 +02:00
helper.h a little DSP support, lots of reading and thinking 2012-07-08 03:47:59 +02:00
lib.svg tiny svg steps 2012-06-18 04:47:51 +02:00
LINKS ran into a wall with routing drawings, starting a C model of the chip 2012-07-11 16:01:01 +02:00
lut.svg finished lut equiv. schematic 2012-06-23 16:54:53 +02:00
Makefile added new stub util new_floorplan 2012-07-18 04:37:15 +02:00
model.c added simple hashed string array for tile and wire names 2012-07-19 17:29:25 +02:00
model.h added simple hashed string array for tile and wire names 2012-07-19 17:29:25 +02:00
new_floorplan.c added new stub util new_floorplan 2012-07-18 04:37:15 +02:00
not-needed.h minor lut fix 2012-07-01 07:49:52 +02:00
README first steps 2012-06-10 07:33:24 +02:00
UNLICENSE ramb16 cleanup, going public domain, see unlicense.org 2012-06-26 01:45:43 +02:00

README 

Design Principles

- small independent command line utilities, no GUI
- plain C, no C++
- simple Makefiles
- text-based file formats
- no documentation - read the sources
- automatic test suite

Utilities

- bit2txt dumps .bit bitstream as text
- txt2bit parses a textual bitstream back into a binary .bit file