suzanne.soy/racket
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Chez Scheme: increase available registers on Arm64

Browse Source
This commit is contained in:
Matthew Flatt 2020-08-04 16:09:22 +00:00
parent 744e69c0c1
commit 204d9d6f01
2 changed files with 14 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
racket/src/ChezScheme/s/arm64.def
View File

@ -1,11 +1,12 @@
(define-constant architecture 'arm64)
(define-constant ptr-bits 64)
(define-constant asm-arg-reg-max 9)
(define-constant asm-arg-reg-max 14)
(define-constant asm-arg-reg-cnt 3)
(define-constant asm-fpreg-max 2)
(define-constant asm-fpreg-max 6)
(define-constant native-endianness 'little)
(define-constant unaligned-floats #f)
(define-constant unaligned-integers #t)
(define-constant integer-divide-instruction #t)

13
racket/src/ChezScheme/s/arm64.ss
View File

@ -37,9 +37,18 @@
[ %r5 %Carg6 #f 5 uptr]
[ %r6 %Carg7 #f 6 uptr]
[ %r7 %Carg8 #f 7 uptr]
[ %r9 #f 9 uptr]
[ %r12 #f 12 uptr]
[ %r13 #f 13 uptr]
[ %r14 #f 14 uptr]
[ %r15 #f 15 uptr]
[ %lr #f 30 uptr] ; %lr is trashed by 'c' calls including calls to hand-coded routines like get-room
[%fp1 %v8 #f 8 fp]
[%fp2 %v9 #f 9 fp]
[%fp1 %v16 #f 16 fp]
[%fp2 %v17 #f 17 fp]
[%fp3 %v18 #f 18 fp]
[%fp4 %v19 #f 19 fp]
[%fp5 %v20 #f 20 fp]
[%fp6 %v21 #f 21 fp]
)
(machine-dependent
[%jmptmp %argtmp #f 10 uptr]