diff --git a/racket/src/ChezScheme/c/Mf-arm64osx b/racket/src/ChezScheme/c/Mf-arm64osx new file mode 100644 index 0000000000..d73163a0b3 --- /dev/null +++ b/racket/src/ChezScheme/c/Mf-arm64osx @@ -0,0 +1,45 @@ +# Mf-a6osx +# Copyright 1984-2017 Cisco Systems, Inc. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +m ?= arm64osx +Cpu ?= AARCH64 + +mdinclude = -I/opt/X11/include/ +o = o +mdsrc ?= arm32le.c +mdobj ?= arm32le.o + +.SUFFIXES: +.SUFFIXES: .c .o + +.c.o: + $C -c -D${Cpu} -I${Include} ${zlibInc} ${LZ4Inc} ${mdinclude} $*.c + +include Mf-base + +${KernelO}: ${kernelobj} ${zlibDep} ${LZ4Dep} + ${LD} -r -o ${KernelO} ${kernelobj} ${zlibLib} ${LZ4Lib} + +${KernelLib}: ${kernelobj} + ${AR} ${ARFLAGS} ${KernelLib} ${kernelobj} + +${Scheme}: ${Kernel} ${KernelLinkDeps} ${Main} + $C -o ${Scheme} ${Main} ${Kernel} ${KernelLinkLibs} ${LDFLAGS} ${LIBS} + +../zlib/configure.log: + (cd ../zlib; ${SetConfigEnv} CFLAGS="${CFLAGS}" ./configure) + +../lz4/lib/liblz4.a: ${LZ4Sources} + (cd ../lz4/lib; ${SetConfigEnv} CFLAGS="${CFLAGS}" ${MAKE} liblz4.a) diff --git a/racket/src/ChezScheme/c/Mf-tarm64osx b/racket/src/ChezScheme/c/Mf-tarm64osx new file mode 100644 index 0000000000..e4d05eb21f --- /dev/null +++ b/racket/src/ChezScheme/c/Mf-tarm64osx @@ -0,0 +1,5 @@ +# Mf-tarm64osx + +m ?= tarm64osx + +include Mf-arm64osx diff --git a/racket/src/ChezScheme/c/arm32le.c b/racket/src/ChezScheme/c/arm32le.c index f2cd6aec3f..085ef0be5b 100644 --- a/racket/src/ChezScheme/c/arm32le.c +++ b/racket/src/ChezScheme/c/arm32le.c @@ -41,11 +41,17 @@ void S_doflush(uptr start, uptr end) { void S_machine_init() { int l1_dcache_line_size, l1_icache_line_size; +#if defined(__linux__) if ((l1_dcache_line_size = sysconf(_SC_LEVEL1_DCACHE_LINESIZE)) <= 0) { l1_dcache_line_size = DEFAULT_L1_MAX_CACHE_LINE_SIZE; } if ((l1_icache_line_size = sysconf(_SC_LEVEL1_ICACHE_LINESIZE)) <= 0) { l1_icache_line_size = DEFAULT_L1_MAX_CACHE_LINE_SIZE; } +#else + l1_dcache_line_size = DEFAULT_L1_MAX_CACHE_LINE_SIZE; + l1_icache_line_size = DEFAULT_L1_MAX_CACHE_LINE_SIZE; +#endif + l1_max_cache_line_size = l1_dcache_line_size > l1_icache_line_size ? l1_dcache_line_size : l1_icache_line_size; } diff --git a/racket/src/ChezScheme/c/atomic.h b/racket/src/ChezScheme/c/atomic.h index 54db9f44de..854de274b5 100644 --- a/racket/src/ChezScheme/c/atomic.h +++ b/racket/src/ChezScheme/c/atomic.h @@ -37,38 +37,38 @@ # define CAS_ANY_FENCE(a, old, new) ((*(a) == (old)) ? (*(a) = (new), 1) : 0) #elif defined(__arm64__) FORCEINLINE int CAS_LOAD_ACQUIRE(volatile void *addr, void *old_val, void *new_val) { - int ret; + long ret; __asm__ __volatile__ ("mov %0, #0\n\t" "0:\n\t" - "ldaxr r12, [%1, #0]\n\t" - "cmp r12, %2\n\t" + "ldaxr x12, [%1, #0]\n\t" + "cmp x12, %2\n\t" "bne 1f\n\t" - "stxr r7, %3, [%1, #0]\n\t" - "cmp r7, #0\n\t" + "stxr x7, %3, [%1, #0]\n\t" + "cmp x7, #0\n\t" "bne 1f\n\t" "moveq %0, #1\n\t" "1:\n\t" : "=&r" (ret) : "r" (addr), "r" (old_val), "r" (new_val) - : "cc", "memory", "r12", "r7"); + : "cc", "memory", "x12", "x7"); return ret; } /* same as above, but ldaxr -> ldxr and stxr -> stlxr */ FORCEINLINE int CAS_STORE_RELEASE(volatile void *addr, void *old_val, void *new_val) { - int ret; + long ret; __asm__ __volatile__ ("mov %0, #0\n\t" "0:\n\t" - "ldxr r12, [%1, #0]\n\t" - "cmp r12, %2\n\t" + "ldxr x12, [%1, #0]\n\t" + "cmp x12, %2\n\t" "bne 1f\n\t" - "stlxr r7, %3, [%1, #0]\n\t" - "cmp r7, #0\n\t" + "stlxr x7, %3, [%1, #0]\n\t" + "cmp x7, #0\n\t" "bne 1f\n\t" "moveq %0, #1\n\t" "1:\n\t" : "=&r" (ret) : "r" (addr), "r" (old_val), "r" (new_val) - : "cc", "memory", "r12", "r7"); + : "cc", "memory", "x12", "x7"); return ret; } #elif defined(__arm__) diff --git a/racket/src/ChezScheme/c/version.h b/racket/src/ChezScheme/c/version.h index 199e6d8de6..e8cd18f54e 100644 --- a/racket/src/ChezScheme/c/version.h +++ b/racket/src/ChezScheme/c/version.h @@ -78,6 +78,13 @@ # endif #endif +#if (machine_type == machine_type_arm64osx || machine_type == machine_type_tarm64osx) +# define OS_ANY_MACOSX +# if (machine_type == machine_type_tarm64osx) +# define PTHREADS +# endif +#endif + #if (machine_type == machine_type_pb) # if defined(__powerpc__) && !defined(__powerpc64__) # define PORTABLE_BYTECODE_BIGENDIAN diff --git a/racket/src/ChezScheme/configure b/racket/src/ChezScheme/configure index 98e0a75476..1ff39ad7d6 100755 --- a/racket/src/ChezScheme/configure +++ b/racket/src/ChezScheme/configure @@ -156,6 +156,9 @@ case "${CONFIG_UNAME}" in m64=a6osx tm32=ti3osx tm64=ta6osx + elif uname -a | egrep 'arm|aarch' > /dev/null 2>&1 ; then + m64=arm64osx + tm64=tarm6osx fi installprefix=/usr/local installmansuffix=share/man @@ -511,6 +514,9 @@ if [ "$cflagsset" = "no" ] ; then a6osx|ta6osx) CFLAGS="-m64 ${optFlags}" ;; + arm64osx|tarm64osx) + CFLAGS="-arch arm ${optFlags}" + ;; a6nt|ta6nt) CFLAGS="${optFlags}" ;; diff --git a/racket/src/ChezScheme/s/Mf-arm64le b/racket/src/ChezScheme/s/Mf-arm64le index 74195ef2ba..1c7ce88365 100644 --- a/racket/src/ChezScheme/s/Mf-arm64le +++ b/racket/src/ChezScheme/s/Mf-arm64le @@ -1,4 +1,4 @@ -# Mf-tarm64le +# Mf-arm64le # Copyright 1984-2017 Cisco Systems, Inc. # # Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/racket/src/ChezScheme/s/Mf-arm64osx b/racket/src/ChezScheme/s/Mf-arm64osx new file mode 100644 index 0000000000..92a5257213 --- /dev/null +++ b/racket/src/ChezScheme/s/Mf-arm64osx @@ -0,0 +1,21 @@ +# Mf-arm64osx +# Copyright 1984-2017 Cisco Systems, Inc. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +m ?= arm64osx +archincludes = arm64.ss + +include Mf-base + +machine.def: arm64.def diff --git a/racket/src/ChezScheme/s/Mf-tarm64osx b/racket/src/ChezScheme/s/Mf-tarm64osx new file mode 100644 index 0000000000..09f0a2a416 --- /dev/null +++ b/racket/src/ChezScheme/s/Mf-tarm64osx @@ -0,0 +1,18 @@ +# Mf-tarm64osx +# Copyright 1984-2017 Cisco Systems, Inc. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +m = tarm64osx + +include Mf-arm64osx diff --git a/racket/src/ChezScheme/s/arm64.ss b/racket/src/ChezScheme/s/arm64.ss index b32e3dfb41..0b1fdd4d2a 100644 --- a/racket/src/ChezScheme/s/arm64.ss +++ b/racket/src/ChezScheme/s/arm64.ss @@ -298,8 +298,10 @@ (define-instruction value popcount [(op (z ur) (x ur)) - (let ([u (make-tmp 'u 'fp)]) - `(set! ,(make-live-info) ,z (asm ,info ,asm-popcount ,x ,u)))]) + (let ([u (make-tmp 'u)]) + (seq + `(set! ,(make-live-info) ,u (asm ,null-info ,asm-kill)) + `(set! ,(make-live-info) ,z (asm ,info ,asm-popcount ,x ,u))))]) (define-instruction value (move) [(op (z mem) (x ur)) @@ -1254,7 +1256,7 @@ (lambda (op dest code*) (record-case dest [(label) (offset l) - (safe-assert (uncond-branch-disp? (+ offset 4))) + (safe-assert (uncond-branch-disp? offset)) (emit-code (op dest code*) [26 #b000101] [0 (fxand (fxsra (fx+ offset 4) 2) (fx- (fxsll 1 26) 1))])] @@ -1550,9 +1552,10 @@ (define uncond-branch-disp? (lambda (x) - (and (fixnum? x) - (fx<= (- (expt 2 26)) x (- (expt 2 20) 1)) - (not (fxlogtest x #b11))))) + (let ([x (+ x 4)]) ; because `branch-always-label-op` adds 4 + (and (fixnum? x) + (fx<= (- (expt 2 27)) x (- (expt 2 27) 1)) + (not (fxlogtest x #b11)))))) (define asm-size (lambda (x) diff --git a/racket/src/ChezScheme/s/cmacros.ss b/racket/src/ChezScheme/s/cmacros.ss index 4387ff0b2d..073874ac3f 100644 --- a/racket/src/ChezScheme/s/cmacros.ss +++ b/racket/src/ChezScheme/s/cmacros.ss @@ -394,6 +394,7 @@ ppc32le tppc32le arm64le tarm64le pb + arm64osx tarm64osx ) (include "machine.def") diff --git a/racket/src/ChezScheme/s/mkheader.ss b/racket/src/ChezScheme/s/mkheader.ss index 5b5e498799..e1e31417e0 100644 --- a/racket/src/ChezScheme/s/mkheader.ss +++ b/racket/src/ChezScheme/s/mkheader.ss @@ -823,6 +823,8 @@ (nl) (pr "#define LOCKED_INCR(addr, ret) \\~%") + (pr " do {\\~%") + (pr " long _return_;\\~%") (pr " __asm__ __volatile__ (\"mov %0, #0\\n\\t\"\\~%") (pr " \"0:\\n\\t\"\\~%") (pr " \"ldxr x12, [%1, #0]\\n\\t\"\\~%") @@ -834,12 +836,16 @@ (pr " \"bne 1f\\n\\t\"\\~%") (pr " \"mov %0, #1\\n\\t\"\\~%") (pr " \"1:\\n\\t\"\\~%") - (pr " : \"=&r\" (ret)\\~%") + (pr " : \"=&r\" (_return_)\\~%") (pr " : \"r\" (addr)\\~%") - (pr " : \"cc\", \"memory\", \"x12\", \"x7\")~%") + (pr " : \"cc\", \"memory\", \"x12\", \"x7\");\\~%") + (pr " ret = _return_;\\~%") + (pr " } while (0)~%") (nl) (pr "#define LOCKED_DECR(addr, ret) \\~%") + (pr " do {\\~%") + (pr " long _return_;\\~%") (pr " __asm__ __volatile__ (\"mov %0, #0\\n\\t\"\\~%") (pr " \"0:\\n\\t\"\\~%") (pr " \"ldxr x12, [%1, #0]\\n\\t\"\\~%") @@ -851,9 +857,11 @@ (pr " \"bne 1f\\n\\t\"\\~%") (pr " \"mov %0, #1\\n\\t\"\\~%") (pr " \"1:\\n\\t\"\\~%") - (pr " : \"=&r\" (ret)\\~%") + (pr " : \"=&r\" (_return_)\\~%") (pr " : \"r\" (addr)\\~%") - (pr " : \"cc\", \"memory\", \"x12\", \"x7\")~%")] + (pr " : \"cc\", \"memory\", \"x12\", \"x7\");\\~%") + (pr " ret = _return_;\\~%") + (pr " } while (0)~%")] [(pb) (pr "#define INITLOCK(addr) (*((long *) addr) = 0)~%") (pr "#define SPINLOCK(addr) (*((long *) addr) = 1)~%") diff --git a/racket/src/ChezScheme/s/tarm64osx.def b/racket/src/ChezScheme/s/tarm64osx.def new file mode 100644 index 0000000000..07f98341c5 --- /dev/null +++ b/racket/src/ChezScheme/s/tarm64osx.def @@ -0,0 +1,6 @@ +;;; tarm64osx.def + +(define-constant machine-type (constant machine-type-tarm64osx)) +(features iconv expeditor pthreads) +(include "arm64.def") +(include "default.def") diff --git a/racket/src/ChezScheme/workarea b/racket/src/ChezScheme/workarea index 6c7cadb02f..9287c67e86 100755 --- a/racket/src/ChezScheme/workarea +++ b/racket/src/ChezScheme/workarea @@ -55,6 +55,7 @@ case "$Mhost" in a6s2) ;; arm32le) ;; arm64le) ;; + arm64osx) ;; i3fb) ;; i3le) ;; i3nb) ;; @@ -73,6 +74,7 @@ case "$Mhost" in ta6s2) Muni=a6s2 ;; tarm32le) Muni=arm32le ;; tarm64le) Muni=arm64le ;; + tarm64osx) Muni=arm64osx ;; ti3fb) Muni=i3fb ;; ti3le) Muni=i3le ;; ti3nb) Muni=i3nb ;; @@ -101,6 +103,7 @@ case "$Muniarch" in a6s2) March=a6 ;; arm32le) March=arm32 ;; arm64le) March=arm64 ;; + arm64osx) March=arm64 ;; i3fb) March=i3 ;; i3le) March=i3 ;; i3nb) March=i3 ;; diff --git a/racket/src/Makefile.in b/racket/src/Makefile.in index 678de8567c..df77bd2231 100644 --- a/racket/src/Makefile.in +++ b/racket/src/Makefile.in @@ -74,6 +74,7 @@ bc-explain-configure: racketcs: if [ ! -f cs/c/Makefile ]; then $(MAKE) cs-explain-configure; fi + $(MAKE) @MAKE_LOCAL_RACKET@ $(MAKE) @CS_BOOTSTRAP_HELP@ cd cs/c && $(MAKE) @CS_USE_BOOTSTRAP_HELP@ @@ -90,13 +91,13 @@ cs-explain-configure: no-local-racket: $(NOOP) -local/bc/racket3m: +@RUN_LOCAL_RACKET@: mkdir -p local $(MAKE) local/Makefile - cd local && $(MAKE) + cd local && $(MAKE) local/Makefile: - cd local && `cd ..; cd $(srcdir); pwd`/configure --disable-gracket + cd local && `cd ..; cd $(srcdir); pwd`/configure --disable-gracket @CONFIGURE_LOCAL_RACKET@ # Install (common) ---------------------------------------- diff --git a/racket/src/README.txt b/racket/src/README.txt index e6fab793c2..2872fdd4da 100644 --- a/racket/src/README.txt +++ b/racket/src/README.txt @@ -353,7 +353,13 @@ Cross-compilation requires at least two flags to `configure`: run `configure` again (with no arguments) in a "local" subdirectory to create a build for the current platform. -Some less commonly needed `configure` flags for Racket BC: +An additional flag is needed for building Racket CS, unless the flag +`--enable-racket=auto` is used: + + * `--enable-scheme=DIR`, where DIR is a path that has a "ChezScheme" + directory where Chez Scheme is built for the host system. + +Some less commonly needed `configure` flags are for Racket BC: * `--enable-stackup`, if the target platform`s stack grows up. diff --git a/racket/src/bc/configure b/racket/src/bc/configure index f2590983b2..2c74ce17be 100755 --- a/racket/src/bc/configure +++ b/racket/src/bc/configure @@ -6948,6 +6948,7 @@ fi ############## Racket for Racket ################ if test "${enable_racket}" = "auto" ; then + # See also "configure-parent.ac" enable_racket="`pwd`/../local/bc/racket3m" fi diff --git a/racket/src/bc/configure-parent.ac b/racket/src/bc/configure-parent.ac index ae9611ac5e..7d8e31e716 100644 --- a/racket/src/bc/configure-parent.ac +++ b/racket/src/bc/configure-parent.ac @@ -37,6 +37,8 @@ MAKE_LOCAL_RACKET=no-local-racket if test "${enable_racket}" = "auto" ; then MAKE_LOCAL_RACKET="local/bc/racket3m" fi +RUN_LOCAL_RACKET="local/bc/racket3m" +CONFIGURE_LOCAL_RACKET=--enable-bc if test "${enable_cgcdefault}" = "yes" ; then MAIN_VARIANT=cgc @@ -48,6 +50,8 @@ RUN_RACKET="bc/racket${MAIN_VARIANT}" AC_SUBST(RUN_RACKET) AC_SUBST(MAKE_LOCAL_RACKET) +AC_SUBST(RUN_LOCAL_RACKET) +AC_SUBST(CONFIGURE_LOCAL_RACKET) makefiles="Makefile" diff --git a/racket/src/bc/configure.ac b/racket/src/bc/configure.ac index fa061ef280..9801b7914a 100644 --- a/racket/src/bc/configure.ac +++ b/racket/src/bc/configure.ac @@ -1277,6 +1277,7 @@ fi ############## Racket for Racket ################ if test "${enable_racket}" = "auto" ; then + # See also "configure-parent.ac" enable_racket="`pwd`/../local/bc/racket3m" fi diff --git a/racket/src/bc/foreign/libffi/configure.host b/racket/src/bc/foreign/libffi/configure.host index 2b66a819b4..3b8cc9654a 100644 --- a/racket/src/bc/foreign/libffi/configure.host +++ b/racket/src/bc/foreign/libffi/configure.host @@ -11,7 +11,7 @@ case "${host}" in MSVC=1 ;; - aarch64*-*-*) + aarch64*-*-* | arm64*-*-*) TARGET=AARCH64; TARGETDIR=aarch64 SOURCES="ffi.c sysv.S" ;; diff --git a/racket/src/bc/gc2/vm_osx.c b/racket/src/bc/gc2/vm_osx.c index 43eb39f75a..434e86ecac 100644 --- a/racket/src/bc/gc2/vm_osx.c +++ b/racket/src/bc/gc2/vm_osx.c @@ -124,23 +124,41 @@ static void unregister_mach_thread() { # define ARCH_thread_state_t ppc_thread_state_t # define ARCH_THREAD_STATE PPC_THREAD_STATE # define ARCH_THREAD_STATE_COUNT PPC_THREAD_STATE_COUNT -#elif defined(__arm__) || defined(__arm64__) +#elif defined(__arm__) # define ARCH_thread_state_t arm_thread_state_t # define ARCH_THREAD_STATE ARM_THREAD_STATE # define ARCH_THREAD_STATE_COUNT ARM_THREAD_STATE_COUNT #elif defined(__x86_64__) +# define ARCH_exception_state_t x86_exception_state64_t +# define ARCH_EXCEPTION_STATE x86_EXCEPTION_STATE64 +# define ARCH_EXCEPTION_STATE_COUNT x86_EXCEPTION_STATE64_COUNT # define ARCH_thread_state_t x86_thread_state64_t # define ARCH_THREAD_STATE x86_THREAD_STATE64 # define ARCH_THREAD_STATE_COUNT x86_THREAD_STATE64_COUNT # define USE_THREAD_STATE # include # include +#elif defined(__arm64__) +# define ARCH_exception_state_t arm_exception_state64_t +# define ARCH_EXCEPTION_STATE ARM_EXCEPTION_STATE64 +# define ARCH_EXCEPTION_STATE_COUNT ARM_EXCEPTION_STATE64_COUNT +# define ARCH_thread_state_t arm_thread_state64_t +# define ARCH_THREAD_STATE ARM_THREAD_STATE64 +# define ARCH_THREAD_STATE_COUNT ARM_THREAD_STATE64_COUNT +# define ARCH_FAULTVADDR_FIELD THREAD_FLD(far) +# define USE_THREAD_STATE +# include +# include #else # define ARCH_thread_state_t i386_thread_state_t # define ARCH_THREAD_STATE i386_THREAD_STATE # define ARCH_THREAD_STATE_COUNT i386_THREAD_STATE_COUNT #endif +#ifndef ARCH_FAULTVADDR_FIELD +# define ARCH_FAULTVADDR_FIELD THREAD_FLD(faultvaddr) +#endif + /* the structure of an exception msg and its reply */ typedef struct rep_msg { mach_msg_header_t head; @@ -311,11 +329,11 @@ kern_return_t GC_catch_exception_raise(mach_port_t port, p = (void*)exception_data[1]; #else /* We have to do it this way for 64-bit mode: */ - x86_exception_state64_t exc_state; - mach_msg_type_number_t exc_state_count = x86_EXCEPTION_STATE64_COUNT; - (void)thread_get_state(thread_port, x86_EXCEPTION_STATE64, (natural_t*)&exc_state, + ARCH_exception_state_t exc_state; + mach_msg_type_number_t exc_state_count = ARCH_EXCEPTION_STATE_COUNT; + (void)thread_get_state(thread_port, ARCH_EXCEPTION_STATE, (natural_t*)&exc_state, &exc_state_count); - p = (void *)exc_state. THREAD_FLD(faultvaddr); + p = (void *)exc_state.ARCH_FAULTVADDR_FIELD; #endif #if defined(MZ_USE_PLACES) diff --git a/racket/src/cfg-bc b/racket/src/cfg-bc index 8a8ac6f63e..db0e460cf3 100755 --- a/racket/src/cfg-bc +++ b/racket/src/cfg-bc @@ -585,6 +585,8 @@ ac_unique_file="setup-go.rkt" enable_option_checking=no ac_subst_vars='LTLIBOBJS LIBOBJS +CONFIGURE_LOCAL_RACKET +RUN_LOCAL_RACKET RUN_RACKET CS_USE_BOOTSTRAP_HELP CS_BOOTSTRAP_HELP @@ -2325,6 +2327,8 @@ MAKE_LOCAL_RACKET=no-local-racket if test "${enable_racket}" = "auto" ; then MAKE_LOCAL_RACKET="local/bc/racket3m" fi +RUN_LOCAL_RACKET="local/bc/racket3m" +CONFIGURE_LOCAL_RACKET=--enable-bc if test "${enable_cgcdefault}" = "yes" ; then MAIN_VARIANT=cgc @@ -2337,6 +2341,8 @@ RUN_RACKET="bc/racket${MAIN_VARIANT}" + + makefiles="Makefile" ac_config_files="$ac_config_files $makefiles" diff --git a/racket/src/cfg-cs b/racket/src/cfg-cs index 90335565ba..cd569b1ac1 100755 --- a/racket/src/cfg-cs +++ b/racket/src/cfg-cs @@ -585,6 +585,8 @@ ac_unique_file="setup-go.rkt" enable_option_checking=no ac_subst_vars='LTLIBOBJS LIBOBJS +CONFIGURE_LOCAL_RACKET +RUN_LOCAL_RACKET RUN_RACKET CS_USE_BOOTSTRAP_HELP CS_BOOTSTRAP_HELP @@ -2231,6 +2233,12 @@ fi MAKE_LOCAL_RACKET=no-local-racket +if test "${enable_racket}" = "auto" ; then + MAKE_LOCAL_RACKET="local/cs/c/racketcs" +fi +RUN_LOCAL_RACKET="local/cs/c/racketcs" +CONFIGURE_LOCAL_RACKET=--enable-cs + MAIN_MAKE_TARGET=racketcs MAIN_VARIANT=3m @@ -2239,6 +2247,8 @@ RUN_RACKET="cs/c/racketcs" + + makefiles="Makefile" ac_config_files="$ac_config_files $makefiles" diff --git a/racket/src/cs/c/Makefile.in b/racket/src/cs/c/Makefile.in index 38c984af12..5383e795f1 100644 --- a/racket/src/cs/c/Makefile.in +++ b/racket/src/cs/c/Makefile.in @@ -8,7 +8,7 @@ SCHEME_DIR = $(srcdir)/../../ChezScheme UP_SCHEME_DIR = $(upsrcdir)/../../ChezScheme SCHEME_WORKAREA = ChezScheme MACH = @MACH@ -CS_HOST_WORKAREA_PREFIX = +CS_HOST_WORKAREA_PREFIX = @CS_HOST_WORKAREA_PREFIX@ SCHEME_HOST_WORKAREA = $(CS_HOST_WORKAREA_PREFIX)$(SCHEME_WORKAREA) SCHEME_BIN = $(SCHEME_HOST_WORKAREA)/$(MACH)/bin/$(MACH)/scheme SCHEME_INC = $(SCHEME_HOST_WORKAREA)/$(MACH)/boot/$(MACH) diff --git a/racket/src/cs/c/configure b/racket/src/cs/c/configure index 795ccdaa1f..2d4522a658 100755 --- a/racket/src/cs/c/configure +++ b/racket/src/cs/c/configure @@ -627,6 +627,7 @@ INSTALL_LIBS_ENABLE INSTALL_SETUP_RACKET_FLAGS INSTALL_SETUP_FLAGS RUN_RACKET +CS_HOST_WORKAREA_PREFIX CROSS_COMPILE_TARGET_KIND COMP_SUBDIR_CONFIGURE_ARGS ENABLE_OR_DISABLE_WPO @@ -1431,8 +1432,8 @@ Optional Features: --enable-pkgscope= set `raco pkg' default: installation, user, or shared --enable-docs build docs on install (enabled by default) --enable-usersetup setup user-specific files on install - --enable-racket= use as Racket to build; or "auto" to create - --enable-scheme= obsolete + --enable-racket= use as Racket for build; or "auto" to create + --enable-scheme= use as host's build directory for cross --enable-mach= use Chez Scheme machine type --enable-target= cross-build for Chez Scheme machine type --enable-natipkg add "-natipkg" to library subpath @@ -3199,6 +3200,8 @@ LZ4_LIB_DEP='$(OWN_LZ4_LIB)' LZ4_LIB='$(OWN_LZ4_LIB)' LZ4_LIB_UNPACK='$(AR) x $(OWN_LZ4_LIB)' +CS_HOST_WORKAREA_PREFIX= + PLT_CS_SLSP_SUFFIX= enable_pthread_by_default=yes @@ -4479,12 +4482,12 @@ case "$MACH_HOST_CPU" in x86|i*86) MACH="${thread_prefix}i3${MACH_OS}" ;; + aarch64*|arm64*) + MACH="${thread_prefix}arm64${MACH_OS}" + ;; arm*) MACH="${thread_prefix}arm32${MACH_OS}" ;; - aarch64*) - MACH="${thread_prefix}arm64${MACH_OS}" - ;; power*) MACH="${thread_prefix}ppc32${MACH_OS}" ;; @@ -4536,12 +4539,12 @@ elif test "${build_os}_${build_cpu}" != "${host_os}_${host_cpu}" ; then x86|i*86) BUILD_MACH="${BUILD_THREAD_PREFIX}i3${BUILD_OS}" ;; + aarch64*|arm64*) + BUILD_MACH="${BUILD_THREAD_PREFIX}arm64${BUILD_OS}" + ;; arm*) BUILD_MACH="${BUILD_THREAD_PREFIX}arm32${BUILD_OS}" ;; - aarch64*) - BUILD_MACH="${BUILD_THREAD_PREFIX}arm64${BUILD_OS}" - ;; power*) BUILD_MACH="${BUILD_THREAD_PREFIX}ppc32${BUILD_OS}" ;; @@ -4583,10 +4586,15 @@ SCHEME_DIR=${srcdir}/../../ChezScheme MAKE_BUILD_SCHEME=checkout if test "${enable_scheme}" != "" ; then - echo Warning: --enable-scheme=... is obsolete and unsupported + CS_HOST_WORKAREA_PREFIX="${enable_scheme}/" fi if test "${enable_racket}" != "" ; then + if test "${enable_racket}" = "auto" ; then + # See also "configure-parent.ac" + enable_racket="`pwd`/../../local/cs/c/racketcs" + CS_HOST_WORKAREA_PREFIX=../../local/cs/c/ + fi # In non-cross mode, we interpret `--enable-racket` to supply a # Racket used only for generating Chez Scheme boot files if test "${CROSS_MODE}" = "cross" ; then @@ -5644,6 +5652,7 @@ SCHEME_CROSS_CONFIG_ARGS="--machine=${TARGET_MACH} --disable-x11 ${cs_auto_flags + makefiles="Makefile" diff --git a/racket/src/cs/c/configure-parent.ac b/racket/src/cs/c/configure-parent.ac index 1ebb357193..53c1cf6403 100644 --- a/racket/src/cs/c/configure-parent.ac +++ b/racket/src/cs/c/configure-parent.ac @@ -24,6 +24,12 @@ m4_include(../ac/boothelp.m4) MAKE_LOCAL_RACKET=no-local-racket +if test "${enable_racket}" = "auto" ; then + MAKE_LOCAL_RACKET="local/cs/c/racketcs" +fi +RUN_LOCAL_RACKET="local/cs/c/racketcs" +CONFIGURE_LOCAL_RACKET=--enable-cs + MAIN_MAKE_TARGET=racketcs MAIN_VARIANT=3m @@ -31,6 +37,8 @@ RUN_RACKET="cs/c/racketcs" AC_SUBST(RUN_RACKET) AC_SUBST(MAKE_LOCAL_RACKET) +AC_SUBST(RUN_LOCAL_RACKET) +AC_SUBST(CONFIGURE_LOCAL_RACKET) makefiles="Makefile" diff --git a/racket/src/cs/c/configure.ac b/racket/src/cs/c/configure.ac index f3acaf89ad..502a5c5b4f 100644 --- a/racket/src/cs/c/configure.ac +++ b/racket/src/cs/c/configure.ac @@ -20,8 +20,8 @@ AC_ARG_ENABLE(wpo, [ --enable-wpo agressively optimize Racket AC_ARG_ENABLE(compress, [ --enable-compress compress compiled code (enabled by default)]) AC_ARG_ENABLE(compressboot, [ --enable-compressboot compress boot files]) m4_include(../ac/path_arg.m4) -AC_ARG_ENABLE(racket, [ --enable-racket= use as Racket to build; or "auto" to create]) -AC_ARG_ENABLE(scheme, [ --enable-scheme= obsolete]) +AC_ARG_ENABLE(racket, [ --enable-racket= use as Racket for build; or "auto" to create]) +AC_ARG_ENABLE(scheme, [ --enable-scheme= use as host's build directory for cross]) AC_ARG_ENABLE(mach, [ --enable-mach= use Chez Scheme machine type ]) AC_ARG_ENABLE(target, [ --enable-target= cross-build for Chez Scheme machine type ]) m4_include(../ac/natipkg_arg.m4) @@ -157,6 +157,8 @@ LZ4_LIB_DEP='$(OWN_LZ4_LIB)' LZ4_LIB='$(OWN_LZ4_LIB)' LZ4_LIB_UNPACK='$(AR) x $(OWN_LZ4_LIB)' +CS_HOST_WORKAREA_PREFIX= + PLT_CS_SLSP_SUFFIX= enable_pthread_by_default=yes @@ -346,12 +348,12 @@ case "$MACH_HOST_CPU" in x86|i*86) MACH="${thread_prefix}i3${MACH_OS}" ;; + aarch64*|arm64*) + MACH="${thread_prefix}arm64${MACH_OS}" + ;; arm*) MACH="${thread_prefix}arm32${MACH_OS}" ;; - aarch64*) - MACH="${thread_prefix}arm64${MACH_OS}" - ;; power*) MACH="${thread_prefix}ppc32${MACH_OS}" ;; @@ -403,12 +405,12 @@ elif test "${build_os}_${build_cpu}" != "${host_os}_${host_cpu}" ; then x86|i*86) BUILD_MACH="${BUILD_THREAD_PREFIX}i3${BUILD_OS}" ;; + aarch64*|arm64*) + BUILD_MACH="${BUILD_THREAD_PREFIX}arm64${BUILD_OS}" + ;; arm*) BUILD_MACH="${BUILD_THREAD_PREFIX}arm32${BUILD_OS}" ;; - aarch64*) - BUILD_MACH="${BUILD_THREAD_PREFIX}arm64${BUILD_OS}" - ;; power*) BUILD_MACH="${BUILD_THREAD_PREFIX}ppc32${BUILD_OS}" ;; @@ -450,10 +452,15 @@ SCHEME_DIR=${srcdir}/../../ChezScheme MAKE_BUILD_SCHEME=checkout if test "${enable_scheme}" != "" ; then - echo Warning: --enable-scheme=... is obsolete and unsupported + CS_HOST_WORKAREA_PREFIX="${enable_scheme}/" fi if test "${enable_racket}" != "" ; then + if test "${enable_racket}" = "auto" ; then + # See also "configure-parent.ac" + enable_racket="`pwd`/../../local/cs/c/racketcs" + CS_HOST_WORKAREA_PREFIX=../../local/cs/c/ + fi # In non-cross mode, we interpret `--enable-racket` to supply a # Racket used only for generating Chez Scheme boot files if test "${CROSS_MODE}" = "cross" ; then @@ -764,6 +771,7 @@ AC_SUBST(CS_COMPILED_SUBDIR) AC_SUBST(ENABLE_OR_DISABLE_WPO) AC_SUBST(COMP_SUBDIR_CONFIGURE_ARGS) AC_SUBST(CROSS_COMPILE_TARGET_KIND) +AC_SUBST(CS_HOST_WORKAREA_PREFIX) AC_SUBST(RUN_RACKET) AC_SUBST(INSTALL_SETUP_FLAGS) AC_SUBST(INSTALL_SETUP_RACKET_FLAGS) diff --git a/racket/src/cs/c/embed-boot.rkt b/racket/src/cs/c/embed-boot.rkt index ed33e1d9c1..5ad55884f9 100644 --- a/racket/src/cs/c/embed-boot.rkt +++ b/racket/src/cs/c/embed-boot.rkt @@ -53,7 +53,8 @@ bstr3 terminator)) (define pos (case (or target (path->string (system-library-subpath #f))) - [("x86_64-darwin" "i386-darwin" "x86_64-macosx" "i386-macosx") + [("x86_64-darwin" "i386-darwin" "aarch64-darwin" + "x86_64-macosx" "i386-macosx" "aarch64-macosx") ;; Mach-O (copy-file use-src-file dest-file #t) (add-plt-segment dest-file data #:name #"__RKTBOOT") diff --git a/racket/src/cs/rumble/system.ss b/racket/src/cs/rumble/system.ss index 11e23778f1..6987ec6b72 100644 --- a/racket/src/cs/rumble/system.ss +++ b/racket/src/cs/rumble/system.ss @@ -26,9 +26,12 @@ (define os*-symbol (case (machine-type) - [(a6osx ta6osx i3osx ti3osx) (if unix-style-macos? - 'darwin - 'macosx)] + [(a6osx ta6osx + i3osx ti3osx + arm64osx tarm64osx) + (if unix-style-macos? + 'darwin + 'macosx)] [(a6nt ta6nt i3nt ti3nt) 'windows] [(a6le ta6le i3le ti3le arm32le tarm32le arm64le tarm64le