From 4f35f62a8913bf88e425d2307d62ff40a10dbd2c Mon Sep 17 00:00:00 2001 From: Matthew Flatt Date: Sun, 14 Jun 2020 15:46:43 -0600 Subject: [PATCH] fp improvements for x86_64 Specializations for operands that are the same. original commit: 9585613deebe83366845c4ab203d1d2a4b9cda00 --- s/x86_64.ss | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/s/x86_64.ss b/s/x86_64.ss index cb27b2166d..f759150539 100644 --- a/s/x86_64.ss +++ b/s/x86_64.ss @@ -897,7 +897,8 @@ (define-instruction value (fpmove) [(op (x fpmem) (y fpur)) `(set! ,(make-live-info) ,x (asm ,info ,asm-fpmove ,y))] - [(op (x fpur) (y fpmem fpur)) `(set! ,(make-live-info) ,x (asm ,info ,asm-fpmove ,y))]) + [(op (x fpur) (y fpmem)) `(set! ,(make-live-info) ,x (asm ,info ,asm-fpmove ,y))] + [(op (x fpur) (y fpur)) `(set! ,(make-live-info) ,x ,y)]) (define-instruction value (fpcastto) [(op (x mem) (y fpur)) `(set! ,(make-live-info) ,x (asm ,info ,asm-fpmove ,y))] @@ -2067,8 +2068,12 @@ (emit-it (cons 'reg %Cfparg1) dest-reg code*)))))] [else (Trivit (dest-reg src1 src2) - (emit sse.movsd src1 dest-reg - (emit-it src2 dest-reg code*)))])))) + (if (equal? src1 src2) + ;; avoid redundant load + (emit sse.movsd src1 dest-reg + (emit-it dest-reg dest-reg code*)) + (emit sse.movsd src1 dest-reg + (emit-it src2 dest-reg code*))))])))) (define asm-fpsqrt (lambda (code* dest-reg src)