From 8ba89cbd2a30440f79fc87655c01c7d5de3d37f0 Mon Sep 17 00:00:00 2001 From: Matthew Flatt Date: Tue, 9 Mar 2021 17:36:21 -0700 Subject: [PATCH] Chez Scheme: avoid floating-point register shuffling on x86_64 For floating-point arithmetic, encourage the register allocator to use the same register for an argument and destination in arithmetic. --- racket/src/ChezScheme/s/x86_64.ss | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/racket/src/ChezScheme/s/x86_64.ss b/racket/src/ChezScheme/s/x86_64.ss index 1ea01fac1f..f65c6a8a70 100644 --- a/racket/src/ChezScheme/s/x86_64.ss +++ b/racket/src/ChezScheme/s/x86_64.ss @@ -636,7 +636,11 @@ [(op (x fpur) (y ur)) `(set! ,(make-live-info) ,x (asm ,info ,asm-fpcast ,y))]) (define-instruction value (fp+ fp- fp* fp/) - [(op (x fpur) (y fpmem fpur) (z fpmem fpur)) + [(op (x fpur) (y fpur) (z fpmem fpur)) + (seq + `(move-related ,x ,y) + `(set! ,(make-live-info) ,x (asm ,info ,(asm-fpop-2 op) ,y ,z)))] + [(op (x fpur) (y fpmem) (z fpmem fpur)) `(set! ,(make-live-info) ,x (asm ,info ,(asm-fpop-2 op) ,y ,z))]) (define-instruction value (fpsqrt)