45 lines
1.9 KiB
Racket
45 lines
1.9 KiB
Racket
#lang scribble/doc
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@(require "mz.rkt"
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(for-label racket/unsafe/ops))
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@title[#:tag "memory-order"]{Machine Memory Order}
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Unlike Racket @tech{threads}, futures and places can expose the
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underlying machine's memory model, including a weak memory ordering.
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For example, when a future writes to multiple slots in a mutable
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vector, it's possible on some platforms for another future to observe
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the writes in a different order or not at all, unless the futures are
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explicitly synchronized. Similarly, shared byte strings or
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@tech{fxvectors} can expose the machine's memory model across places.
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Racket ensures that a machine's memory model is not observed in a way
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that unsafely exposes the implementation of primitive datatypes. For
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example, it is not possible for one future to see a partially
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constructed primitive value as a result of reading a vector that is
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mutated by another future.
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The @racket[box-cas!], @racket[vector-cas!],
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@racket[unsafe-box*-cas!], @racket[unsafe-vector*-cas!], and
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@racket[unsafe-struct*-cas!] operations all provide a machine-level
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compare-and-set, so they can be used in ways that are specifically
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supported by the a machine's memory model. The
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@racket[(memory-order-acquire)] and @racket[(memory-order-release)]
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operations similarly constrain machine-level stores and loads.
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Synchronization operations such as place messages, future
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@racket[touch]es, and @tech{future semaphores} imply suitable
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machine-level acquire and release ordering.
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@deftogether[(
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@defproc[(memory-order-acquire) void?]
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@defproc[(memory-order-release) void?]
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)]{
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Those operations implement a machine-level memory fence on platforms
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where one is needed for synchronization. The
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@racket[memory-order-acquire] operation ensures at least a load--load
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and load--store fence at the machine level, and the
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@racket[memory-order-release] operation ensures at least a
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store--store and store--load fence at the machine level.
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@history[#:added "7.7.0.11"]}
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