// This file was generated by the create_regs script
#define CPI_BASE                                                 0x7e800000
#define CPI_APB_ID                                               0x20637069
#define CPI_CPIS                                                 HW_REGISTER_RW( 0x7e800000 ) 
   #define CPI_CPIS_MASK                                         0xc0000007
   #define CPI_CPIS_WIDTH                                        32
      #define CPI_CPIS__MSB                                      31
      #define CPI_CPIS__LSB                                      0
#define CPI_CPIR                                                 HW_REGISTER_RW( 0x7e800004 ) 
   #define CPI_CPIR_MASK                                         0xffffffff
   #define CPI_CPIR_WIDTH                                        32
      #define CPI_CPIR__MSB                                      31
      #define CPI_CPIR__LSB                                      0
#define CPI_CPIF                                                 HW_REGISTER_RW( 0x7e800008 ) 
   #define CPI_CPIF_MASK                                         0xffffffff
   #define CPI_CPIF_WIDTH                                        32
      #define CPI_CPIF__MSB                                      31
      #define CPI_CPIF__LSB                                      0
#define CPI_CPIW                                                 HW_REGISTER_RW( 0x7e80000c ) 
   #define CPI_CPIW_MASK                                         0xffffffff
   #define CPI_CPIW_WIDTH                                        32
      #define CPI_CPIW__MSB                                      31
      #define CPI_CPIW__LSB                                      0
#define CPI_CPIWVC                                               HW_REGISTER_RW( 0x7e800010 ) 
   #define CPI_CPIWVC_MASK                                       0xffffffff
   #define CPI_CPIWVC_WIDTH                                      32
      #define CPI_CPIWVC__MSB                                    31
      #define CPI_CPIWVC__LSB                                    0
#define CPI_CPIWVS                                               HW_REGISTER_RW( 0x7e800014 ) 
   #define CPI_CPIWVS_MASK                                       0xffffffff
   #define CPI_CPIWVS_WIDTH                                      32
      #define CPI_CPIWVS__MSB                                    31
      #define CPI_CPIWVS__LSB                                    0
#define CPI_CPIWHC                                               HW_REGISTER_RW( 0x7e800018 ) 
   #define CPI_CPIWHC_MASK                                       0xffffffff
   #define CPI_CPIWHC_WIDTH                                      32
      #define CPI_CPIWHC__MSB                                    31
      #define CPI_CPIWHC__LSB                                    0
#define CPI_CPIWHS                                               HW_REGISTER_RW( 0x7e80001c ) 
   #define CPI_CPIWHS_MASK                                       0xffffffff
   #define CPI_CPIWHS_WIDTH                                      32
      #define CPI_CPIWHS__MSB                                    31
      #define CPI_CPIWHS__LSB                                    0
#define CPI_CPIB                                                 HW_REGISTER_RW( 0x7e800020 ) 
   #define CPI_CPIB_MASK                                         0xffffffff
   #define CPI_CPIB_WIDTH                                        32
      #define CPI_CPIB__MSB                                      31
      #define CPI_CPIB__LSB                                      0