/*************************************************************************** * Copyright (c) 1999-2005, Broadcom Corporation * All Rights Reserved * Confidential Property of Broadcom Corporation * * * THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE * AGREEMENT BETWEEN THE USER AND BROADCOM. YOU HAVE NO RIGHT TO USE OR * EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT. * * $brcm_Workfile: $ * $brcm_Revision: $ * $brcm_Date: $ * * Module Description: * DO NOT EDIT THIS FILE DIRECTLY * * This module was generated magically with RDB from a source description * file. You must edit the source file for changes to be made to this file. * * * Date: Generated on Mon Mar 28 16:48:47 2005 * MD5 Checksum ba913b07d554347688609e8e66f4943f * * Compiled with: RDB Utility combo_header.pl * RDB Parser 3.0 * unknown unknown * Perl Interpreter 5.006 * Operating System solaris * * Spec Versions: BG 01 * BVN_MFD 1 * CAP 1 * DSP_CTRL 03 * IN656 1 * ITFP 03 * LBG 1 * NET 1 * SCL 1 * VBI_DEC 03 * VD_TOP 5 * VIDEO_DEC 03 * VIP_CTRL 03 * VIP_L2 03 * VPP 03 * * RDB Files: /projects/BCM7043/A0/work/gelias/bcm7043_a0/design/chip/rdb/bcm7043_a0.rdb * /projects/BCM7043/A0/snapshot/bcm7043_a0/design/vip_tops/rdb/vip_top_blockdef.rdb * /projects/BCM7043/A0/snapshot/bcm7043_a0/design/cap/rdb/bvn_cap.rdb * /projects/BCM7043/A0/snapshot/bcm7043_a0/design/bvn/common/rdb/bvb_lite_general.rdb * /projects/BCM7043/A0/snapshot/bcm7043_a0/design/mfd/rdb/bvn_mfd.rdb * /projects/BCM7043/A0/snapshot/bcm7043_a0/design/bvn/common/rdb/bvb_lite_general.rdb * /projects/BCM7043/A0/snapshot/bcm7043_a0/design/scl/rdb/bvn_scl.rdb * /projects/BCM7043/A0/snapshot/bcm7043_a0/design/bvn/common/rdb/bvb_lite_general.rdb * /projects/BCM7043/A0/snapshot/bcm7043_a0/design/vpp/rdb/vpp.rdb * /projects/BCM7043/A0/snapshot/bcm7043_a0/design/bvn/common/rdb/bvb_lite_general.rdb * /projects/BCM7043/A0/snapshot/bcm7043_a0/design/video_decoder/rdb/video_decoder_top.rdb * /projects/BCM7043/A0/snapshot/bcm7043_a0/design/video_decoder/rdb/vd_major_revid.rdb * /projects/BCM7043/A0/snapshot/bcm7043_a0/design/video_decoder/rdb/vd_minor_revid.rdb * /projects/BCM7043/A0/snapshot/bcm7043_a0/design/656_dec/rdb/in656.rdb * /projects/BCM7043/A0/snapshot/bcm7043_a0/design/656_dec/rdb/in656_revid.rdb * /projects/BCM7043/A0/snapshot/bcm7043_a0/design/l2/rdb/vip_intr_ctrl2.rdb * /projects/BCM7043/A0/snapshot/bcm7043_a0/design/vnet/rdb/bvn_net.rdb * /projects/BCM7043/A0/snapshot/bcm7043_a0/design/lbg/rdb/vip_lbg.rdb * /projects/BCM7043/A0/snapshot/bcm7043_a0/design/bvn/common/rdb/bvb_lite_general.rdb * /projects/BCM7043/A0/snapshot/bcm7043_a0/design/vbi_dec/rdb/vib_top.rdb * /projects/BCM7043/A0/snapshot/bcm7043_a0/design/vbi_dec/rdb/video_dec.rdb * /projects/BCM7043/A0/snapshot/bcm7043_a0/design/vbi_dec/rdb/vbi_dec.rdb * /projects/BCM7043/A0/snapshot/bcm7043_a0/design/itfp/rdb/itfp.rdb * /projects/BCM7043/A0/snapshot/bcm7043_a0/design/bvn/common/rdb/bvb_lite_general.rdb * /projects/BCM7043/A0/snapshot/bcm7043_a0/design/vip_tops/rdb/vip_ctrl.rdb * /projects/BCM7043/A0/snapshot/bcm7043_a0/design/bsm/rdb/bg_top.rdb * /projects/BCM7043/A0/snapshot/bcm7043_a0/design/bsm/rdb/bg_ctrl.rdb * /projects/BCM7043/A0/snapshot/bcm7043_a0/design/dsp/rdb/dsp_top.rdb * /projects/BCM7043/A0/snapshot/bcm7043_a0/design/dsp/rdb/dsp_ctrl.rdb * * Revision History: * * $brcm_Log: $ * ***************************************************************************/ #ifndef BCM7043_A0_BG_INSTR_H__ #define BCM7043_A0_BG_INSTR_H__ /*************************************************************************** *BG_INSTR - BG Instructions ***************************************************************************/ #define BG_INSTR_DCT_WRITE 0x005f0000 /* DCT_WRITE command */ #define BG_INSTR_PUTAC_RESET 0x005f0004 /* PUT AC command */ #define BG_INSTR_INIT_MPEGTYPE 0x005f0008 /* INIT MPEGTYPE */ #define BG_INSTR_INTRA_MAXRUN 0x005f000c /* INTRA MAX RUN */ #define BG_INSTR_INTER_MAXRUN 0x005f0010 /* INTER MAX RUN */ #define BG_INSTR_INTRA_LAST_MAXRUN 0x005f0014 /* INTRA LAST MAX RUN */ #define BG_INSTR_INTER_LAST_MAXRUN 0x005f0018 /* INTER LAST MAX RUN */ #define BG_INSTR_INTRA_MAXLEVEL 0x005f001c /* INTRA MAX LEVEL */ #define BG_INSTR_INTER_MAXLEVEL 0x005f0020 /* INTER MAX LEVEL */ #define BG_INSTR_INTRA_LAST_MAXLEVEL 0x005f0024 /* INTRA LAST MAX LEVEL */ #define BG_INSTR_INTER_LAST_MAXLEVEL 0x005f0028 /* INTER LAST MAX LEVEL */ #define BG_INSTR_INTRA_RUN_RAM_BASE 0x005f002c /* INTRA RUN RAM BASE */ #define BG_INSTR_INTER_RUN_RAM_BASE 0x005f0030 /* INTER RUN RAM BASE */ #define BG_INSTR_INTRA_LAST_RUN_RAM_BASE 0x005f0034 /* INTRA LAST RUN RAM BASE */ #define BG_INSTR_INTER_LAST_RUN_RAM_BASE 0x005f0038 /* INTER LAST RUN RAM BASE */ #define BG_INSTR_INTRA_LEVEL_RAM_BASE 0x005f003c /* INTRA LEVEL RAM BASE */ #define BG_INSTR_INTER_LEVEL_RAM_BASE 0x005f0040 /* INTER LEVEL RAM BASE */ #define BG_INSTR_INTRA_LAST_LEVEL_RAM_BASE 0x005f0044 /* INTRA LAST LEVEL RAM BASE */ #define BG_INSTR_INTER_LAST_LEVEL_RAM_BASE 0x005f0048 /* INTER LAST LEVEL RAM BASE */ #define BG_INSTR_LAST_AC_LEVEL 0x005f004c /* LAST AC LEVEL */ #define BG_INSTR_DSP_STOP_ADDR 0x005f0050 /* DSP STOP ADDRESS */ #define BG_INSTR_CBP_REG 0x005f0054 /* CBP REG VALUE */ #define BG_INSTR_PUTBIT_COUNTER 0x005f0058 /* PUTBIT COUNTER */ #define BG_INSTR_INIT_COMMAND 0x005f005c /* INIT COMMAND */ #define BG_INSTR_OUT_POINTER 0x005f0060 /* READ OUTPOINTER VALUE */ #define BG_INSTR_PUTBIT_10 0x005f0064 /* PUT BIT COMMAND */ #define BG_INSTR_PUTBIT_16 0x005f0068 /* PUT BIT COMMAND */ #define BG_INSTR_PUTAC 0x005f006c /* PUT AC */ #define BG_INSTR_EXECSTATUS 0x005f0070 /* EXEC STATUS */ #define BG_INSTR_REVISION_ID 0x005f0074 /* Letter Box Generator Revision register */ #define BG_INSTR_PUTAC_ACCEL 0x005f0078 // added temporary by ilyam 13/09/05 /*************************************************************************** *DCT_WRITE - DCT_WRITE command ***************************************************************************/ /* BG_INSTR :: DCT_WRITE :: reserved0 [31:01] */ #define BG_INSTR_DCT_WRITE_reserved0_MASK 0xfffffffe #define BG_INSTR_DCT_WRITE_reserved0_ALIGN 0 #define BG_INSTR_DCT_WRITE_reserved0_BITS 31 #define BG_INSTR_DCT_WRITE_reserved0_SHIFT 1 /* BG_INSTR :: DCT_WRITE :: DCT_WRITE [00:00] */ #define BG_INSTR_DCT_WRITE_DCT_WRITE_MASK 0x00000001 #define BG_INSTR_DCT_WRITE_DCT_WRITE_ALIGN 0 #define BG_INSTR_DCT_WRITE_DCT_WRITE_BITS 1 #define BG_INSTR_DCT_WRITE_DCT_WRITE_SHIFT 0 /*************************************************************************** *PUTAC_RESET - PUT AC command ***************************************************************************/ /* BG_INSTR :: PUTAC_RESET :: reserved0 [31:01] */ #define BG_INSTR_PUTAC_RESET_reserved0_MASK 0xfffffffe #define BG_INSTR_PUTAC_RESET_reserved0_ALIGN 0 #define BG_INSTR_PUTAC_RESET_reserved0_BITS 31 #define BG_INSTR_PUTAC_RESET_reserved0_SHIFT 1 /* BG_INSTR :: PUTAC_RESET :: PUTAC_RESET [00:00] */ #define BG_INSTR_PUTAC_RESET_PUTAC_RESET_MASK 0x00000001 #define BG_INSTR_PUTAC_RESET_PUTAC_RESET_ALIGN 0 #define BG_INSTR_PUTAC_RESET_PUTAC_RESET_BITS 1 #define BG_INSTR_PUTAC_RESET_PUTAC_RESET_SHIFT 0 /*************************************************************************** *INIT_MPEGTYPE - INIT MPEGTYPE ***************************************************************************/ /* BG_INSTR :: INIT_MPEGTYPE :: reserved0 [31:05] */ #define BG_INSTR_INIT_MPEGTYPE_reserved0_MASK 0xffffffe0 #define BG_INSTR_INIT_MPEGTYPE_reserved0_ALIGN 0 #define BG_INSTR_INIT_MPEGTYPE_reserved0_BITS 27 #define BG_INSTR_INIT_MPEGTYPE_reserved0_SHIFT 5 /* BG_INSTR :: INIT_MPEGTYPE :: CBP_MODE [04:04] */ #define BG_INSTR_INIT_MPEGTYPE_CBP_MODE_MASK 0x00000010 #define BG_INSTR_INIT_MPEGTYPE_CBP_MODE_ALIGN 0 #define BG_INSTR_INIT_MPEGTYPE_CBP_MODE_BITS 1 #define BG_INSTR_INIT_MPEGTYPE_CBP_MODE_SHIFT 4 /* BG_INSTR :: INIT_MPEGTYPE :: INTRA [03:03] */ #define BG_INSTR_INIT_MPEGTYPE_INTRA_MASK 0x00000008 #define BG_INSTR_INIT_MPEGTYPE_INTRA_ALIGN 0 #define BG_INSTR_INIT_MPEGTYPE_INTRA_BITS 1 #define BG_INSTR_INIT_MPEGTYPE_INTRA_SHIFT 3 /* BG_INSTR :: INIT_MPEGTYPE :: MPEG4 [02:02] */ #define BG_INSTR_INIT_MPEGTYPE_MPEG4_MASK 0x00000004 #define BG_INSTR_INIT_MPEGTYPE_MPEG4_ALIGN 0 #define BG_INSTR_INIT_MPEGTYPE_MPEG4_BITS 1 #define BG_INSTR_INIT_MPEGTYPE_MPEG4_SHIFT 2 /* BG_INSTR :: INIT_MPEGTYPE :: MPEG2 [01:01] */ #define BG_INSTR_INIT_MPEGTYPE_MPEG2_MASK 0x00000002 #define BG_INSTR_INIT_MPEGTYPE_MPEG2_ALIGN 0 #define BG_INSTR_INIT_MPEGTYPE_MPEG2_BITS 1 #define BG_INSTR_INIT_MPEGTYPE_MPEG2_SHIFT 1 /* BG_INSTR :: INIT_MPEGTYPE :: MPEG1 [00:00] */ #define BG_INSTR_INIT_MPEGTYPE_MPEG1_MASK 0x00000001 #define BG_INSTR_INIT_MPEGTYPE_MPEG1_ALIGN 0 #define BG_INSTR_INIT_MPEGTYPE_MPEG1_BITS 1 #define BG_INSTR_INIT_MPEGTYPE_MPEG1_SHIFT 0 /*************************************************************************** *INTRA_MAXRUN - INTRA MAX RUN ***************************************************************************/ /* BG_INSTR :: INTRA_MAXRUN :: reserved0 [31:06] */ #define BG_INSTR_INTRA_MAXRUN_reserved0_MASK 0xffffffc0 #define BG_INSTR_INTRA_MAXRUN_reserved0_ALIGN 0 #define BG_INSTR_INTRA_MAXRUN_reserved0_BITS 26 #define BG_INSTR_INTRA_MAXRUN_reserved0_SHIFT 6 /* BG_INSTR :: INTRA_MAXRUN :: MAXRUN_VALUE [05:00] */ #define BG_INSTR_INTRA_MAXRUN_MAXRUN_VALUE_MASK 0x0000003f #define BG_INSTR_INTRA_MAXRUN_MAXRUN_VALUE_ALIGN 0 #define BG_INSTR_INTRA_MAXRUN_MAXRUN_VALUE_BITS 6 #define BG_INSTR_INTRA_MAXRUN_MAXRUN_VALUE_SHIFT 0 /*************************************************************************** *INTER_MAXRUN - INTER MAX RUN ***************************************************************************/ /* BG_INSTR :: INTER_MAXRUN :: reserved0 [31:06] */ #define BG_INSTR_INTER_MAXRUN_reserved0_MASK 0xffffffc0 #define BG_INSTR_INTER_MAXRUN_reserved0_ALIGN 0 #define BG_INSTR_INTER_MAXRUN_reserved0_BITS 26 #define BG_INSTR_INTER_MAXRUN_reserved0_SHIFT 6 /* BG_INSTR :: INTER_MAXRUN :: MAXRUN_VALUE [05:00] */ #define BG_INSTR_INTER_MAXRUN_MAXRUN_VALUE_MASK 0x0000003f #define BG_INSTR_INTER_MAXRUN_MAXRUN_VALUE_ALIGN 0 #define BG_INSTR_INTER_MAXRUN_MAXRUN_VALUE_BITS 6 #define BG_INSTR_INTER_MAXRUN_MAXRUN_VALUE_SHIFT 0 /*************************************************************************** *INTRA_LAST_MAXRUN - INTRA LAST MAX RUN ***************************************************************************/ /* BG_INSTR :: INTRA_LAST_MAXRUN :: reserved0 [31:06] */ #define BG_INSTR_INTRA_LAST_MAXRUN_reserved0_MASK 0xffffffc0 #define BG_INSTR_INTRA_LAST_MAXRUN_reserved0_ALIGN 0 #define BG_INSTR_INTRA_LAST_MAXRUN_reserved0_BITS 26 #define BG_INSTR_INTRA_LAST_MAXRUN_reserved0_SHIFT 6 /* BG_INSTR :: INTRA_LAST_MAXRUN :: MAXRUN_VALUE [05:00] */ #define BG_INSTR_INTRA_LAST_MAXRUN_MAXRUN_VALUE_MASK 0x0000003f #define BG_INSTR_INTRA_LAST_MAXRUN_MAXRUN_VALUE_ALIGN 0 #define BG_INSTR_INTRA_LAST_MAXRUN_MAXRUN_VALUE_BITS 6 #define BG_INSTR_INTRA_LAST_MAXRUN_MAXRUN_VALUE_SHIFT 0 /*************************************************************************** *INTER_LAST_MAXRUN - INTER LAST MAX RUN ***************************************************************************/ /* BG_INSTR :: INTER_LAST_MAXRUN :: reserved0 [31:06] */ #define BG_INSTR_INTER_LAST_MAXRUN_reserved0_MASK 0xffffffc0 #define BG_INSTR_INTER_LAST_MAXRUN_reserved0_ALIGN 0 #define BG_INSTR_INTER_LAST_MAXRUN_reserved0_BITS 26 #define BG_INSTR_INTER_LAST_MAXRUN_reserved0_SHIFT 6 /* BG_INSTR :: INTER_LAST_MAXRUN :: MAXRUN_VALUE [05:00] */ #define BG_INSTR_INTER_LAST_MAXRUN_MAXRUN_VALUE_MASK 0x0000003f #define BG_INSTR_INTER_LAST_MAXRUN_MAXRUN_VALUE_ALIGN 0 #define BG_INSTR_INTER_LAST_MAXRUN_MAXRUN_VALUE_BITS 6 #define BG_INSTR_INTER_LAST_MAXRUN_MAXRUN_VALUE_SHIFT 0 /*************************************************************************** *INTRA_MAXLEVEL - INTRA MAX LEVEL ***************************************************************************/ /* BG_INSTR :: INTRA_MAXLEVEL :: reserved0 [31:06] */ #define BG_INSTR_INTRA_MAXLEVEL_reserved0_MASK 0xffffffc0 #define BG_INSTR_INTRA_MAXLEVEL_reserved0_ALIGN 0 #define BG_INSTR_INTRA_MAXLEVEL_reserved0_BITS 26 #define BG_INSTR_INTRA_MAXLEVEL_reserved0_SHIFT 6 /* BG_INSTR :: INTRA_MAXLEVEL :: MAX_LEVEL_VALUE [05:00] */ #define BG_INSTR_INTRA_MAXLEVEL_MAX_LEVEL_VALUE_MASK 0x0000003f #define BG_INSTR_INTRA_MAXLEVEL_MAX_LEVEL_VALUE_ALIGN 0 #define BG_INSTR_INTRA_MAXLEVEL_MAX_LEVEL_VALUE_BITS 6 #define BG_INSTR_INTRA_MAXLEVEL_MAX_LEVEL_VALUE_SHIFT 0 /*************************************************************************** *INTER_MAXLEVEL - INTER MAX LEVEL ***************************************************************************/ /* BG_INSTR :: INTER_MAXLEVEL :: reserved0 [31:06] */ #define BG_INSTR_INTER_MAXLEVEL_reserved0_MASK 0xffffffc0 #define BG_INSTR_INTER_MAXLEVEL_reserved0_ALIGN 0 #define BG_INSTR_INTER_MAXLEVEL_reserved0_BITS 26 #define BG_INSTR_INTER_MAXLEVEL_reserved0_SHIFT 6 /* BG_INSTR :: INTER_MAXLEVEL :: MAX_LEVEL_VALUE [05:00] */ #define BG_INSTR_INTER_MAXLEVEL_MAX_LEVEL_VALUE_MASK 0x0000003f #define BG_INSTR_INTER_MAXLEVEL_MAX_LEVEL_VALUE_ALIGN 0 #define BG_INSTR_INTER_MAXLEVEL_MAX_LEVEL_VALUE_BITS 6 #define BG_INSTR_INTER_MAXLEVEL_MAX_LEVEL_VALUE_SHIFT 0 /*************************************************************************** *INTRA_LAST_MAXLEVEL - INTRA LAST MAX LEVEL ***************************************************************************/ /* BG_INSTR :: INTRA_LAST_MAXLEVEL :: reserved0 [31:06] */ #define BG_INSTR_INTRA_LAST_MAXLEVEL_reserved0_MASK 0xffffffc0 #define BG_INSTR_INTRA_LAST_MAXLEVEL_reserved0_ALIGN 0 #define BG_INSTR_INTRA_LAST_MAXLEVEL_reserved0_BITS 26 #define BG_INSTR_INTRA_LAST_MAXLEVEL_reserved0_SHIFT 6 /* BG_INSTR :: INTRA_LAST_MAXLEVEL :: MAX_LEVEL_VALUE [05:00] */ #define BG_INSTR_INTRA_LAST_MAXLEVEL_MAX_LEVEL_VALUE_MASK 0x0000003f #define BG_INSTR_INTRA_LAST_MAXLEVEL_MAX_LEVEL_VALUE_ALIGN 0 #define BG_INSTR_INTRA_LAST_MAXLEVEL_MAX_LEVEL_VALUE_BITS 6 #define BG_INSTR_INTRA_LAST_MAXLEVEL_MAX_LEVEL_VALUE_SHIFT 0 /*************************************************************************** *INTER_LAST_MAXLEVEL - INTER LAST MAX LEVEL ***************************************************************************/ /* BG_INSTR :: INTER_LAST_MAXLEVEL :: reserved0 [31:06] */ #define BG_INSTR_INTER_LAST_MAXLEVEL_reserved0_MASK 0xffffffc0 #define BG_INSTR_INTER_LAST_MAXLEVEL_reserved0_ALIGN 0 #define BG_INSTR_INTER_LAST_MAXLEVEL_reserved0_BITS 26 #define BG_INSTR_INTER_LAST_MAXLEVEL_reserved0_SHIFT 6 /* BG_INSTR :: INTER_LAST_MAXLEVEL :: MAX_LEVEL_VALUE [05:00] */ #define BG_INSTR_INTER_LAST_MAXLEVEL_MAX_LEVEL_VALUE_MASK 0x0000003f #define BG_INSTR_INTER_LAST_MAXLEVEL_MAX_LEVEL_VALUE_ALIGN 0 #define BG_INSTR_INTER_LAST_MAXLEVEL_MAX_LEVEL_VALUE_BITS 6 #define BG_INSTR_INTER_LAST_MAXLEVEL_MAX_LEVEL_VALUE_SHIFT 0 /*************************************************************************** *INTRA_RUN_RAM_BASE - INTRA RUN RAM BASE ***************************************************************************/ /* BG_INSTR :: INTRA_RUN_RAM_BASE :: reserved0 [31:09] */ #define BG_INSTR_INTRA_RUN_RAM_BASE_reserved0_MASK 0xfffffe00 #define BG_INSTR_INTRA_RUN_RAM_BASE_reserved0_ALIGN 0 #define BG_INSTR_INTRA_RUN_RAM_BASE_reserved0_BITS 23 #define BG_INSTR_INTRA_RUN_RAM_BASE_reserved0_SHIFT 9 /* BG_INSTR :: INTRA_RUN_RAM_BASE :: RAM_BASE_VALUE [08:00] */ #define BG_INSTR_INTRA_RUN_RAM_BASE_RAM_BASE_VALUE_MASK 0x000001ff #define BG_INSTR_INTRA_RUN_RAM_BASE_RAM_BASE_VALUE_ALIGN 0 #define BG_INSTR_INTRA_RUN_RAM_BASE_RAM_BASE_VALUE_BITS 9 #define BG_INSTR_INTRA_RUN_RAM_BASE_RAM_BASE_VALUE_SHIFT 0 /*************************************************************************** *INTER_RUN_RAM_BASE - INTER RUN RAM BASE ***************************************************************************/ /* BG_INSTR :: INTER_RUN_RAM_BASE :: reserved0 [31:09] */ #define BG_INSTR_INTER_RUN_RAM_BASE_reserved0_MASK 0xfffffe00 #define BG_INSTR_INTER_RUN_RAM_BASE_reserved0_ALIGN 0 #define BG_INSTR_INTER_RUN_RAM_BASE_reserved0_BITS 23 #define BG_INSTR_INTER_RUN_RAM_BASE_reserved0_SHIFT 9 /* BG_INSTR :: INTER_RUN_RAM_BASE :: RAM_BASE_VALUE [08:00] */ #define BG_INSTR_INTER_RUN_RAM_BASE_RAM_BASE_VALUE_MASK 0x000001ff #define BG_INSTR_INTER_RUN_RAM_BASE_RAM_BASE_VALUE_ALIGN 0 #define BG_INSTR_INTER_RUN_RAM_BASE_RAM_BASE_VALUE_BITS 9 #define BG_INSTR_INTER_RUN_RAM_BASE_RAM_BASE_VALUE_SHIFT 0 /*************************************************************************** *INTRA_LAST_RUN_RAM_BASE - INTRA LAST RUN RAM BASE ***************************************************************************/ /* BG_INSTR :: INTRA_LAST_RUN_RAM_BASE :: reserved0 [31:09] */ #define BG_INSTR_INTRA_LAST_RUN_RAM_BASE_reserved0_MASK 0xfffffe00 #define BG_INSTR_INTRA_LAST_RUN_RAM_BASE_reserved0_ALIGN 0 #define BG_INSTR_INTRA_LAST_RUN_RAM_BASE_reserved0_BITS 23 #define BG_INSTR_INTRA_LAST_RUN_RAM_BASE_reserved0_SHIFT 9 /* BG_INSTR :: INTRA_LAST_RUN_RAM_BASE :: RAM_BASE_VALUE [08:00] */ #define BG_INSTR_INTRA_LAST_RUN_RAM_BASE_RAM_BASE_VALUE_MASK 0x000001ff #define BG_INSTR_INTRA_LAST_RUN_RAM_BASE_RAM_BASE_VALUE_ALIGN 0 #define BG_INSTR_INTRA_LAST_RUN_RAM_BASE_RAM_BASE_VALUE_BITS 9 #define BG_INSTR_INTRA_LAST_RUN_RAM_BASE_RAM_BASE_VALUE_SHIFT 0 /*************************************************************************** *INTER_LAST_RUN_RAM_BASE - INTER LAST RUN RAM BASE ***************************************************************************/ /* BG_INSTR :: INTER_LAST_RUN_RAM_BASE :: reserved0 [31:09] */ #define BG_INSTR_INTER_LAST_RUN_RAM_BASE_reserved0_MASK 0xfffffe00 #define BG_INSTR_INTER_LAST_RUN_RAM_BASE_reserved0_ALIGN 0 #define BG_INSTR_INTER_LAST_RUN_RAM_BASE_reserved0_BITS 23 #define BG_INSTR_INTER_LAST_RUN_RAM_BASE_reserved0_SHIFT 9 /* BG_INSTR :: INTER_LAST_RUN_RAM_BASE :: RAM_BASE_VALUE [08:00] */ #define BG_INSTR_INTER_LAST_RUN_RAM_BASE_RAM_BASE_VALUE_MASK 0x000001ff #define BG_INSTR_INTER_LAST_RUN_RAM_BASE_RAM_BASE_VALUE_ALIGN 0 #define BG_INSTR_INTER_LAST_RUN_RAM_BASE_RAM_BASE_VALUE_BITS 9 #define BG_INSTR_INTER_LAST_RUN_RAM_BASE_RAM_BASE_VALUE_SHIFT 0 /*************************************************************************** *INTRA_LEVEL_RAM_BASE - INTRA LEVEL RAM BASE ***************************************************************************/ /* BG_INSTR :: INTRA_LEVEL_RAM_BASE :: reserved0 [31:09] */ #define BG_INSTR_INTRA_LEVEL_RAM_BASE_reserved0_MASK 0xfffffe00 #define BG_INSTR_INTRA_LEVEL_RAM_BASE_reserved0_ALIGN 0 #define BG_INSTR_INTRA_LEVEL_RAM_BASE_reserved0_BITS 23 #define BG_INSTR_INTRA_LEVEL_RAM_BASE_reserved0_SHIFT 9 /* BG_INSTR :: INTRA_LEVEL_RAM_BASE :: RAM_BASE_VALUE [08:00] */ #define BG_INSTR_INTRA_LEVEL_RAM_BASE_RAM_BASE_VALUE_MASK 0x000001ff #define BG_INSTR_INTRA_LEVEL_RAM_BASE_RAM_BASE_VALUE_ALIGN 0 #define BG_INSTR_INTRA_LEVEL_RAM_BASE_RAM_BASE_VALUE_BITS 9 #define BG_INSTR_INTRA_LEVEL_RAM_BASE_RAM_BASE_VALUE_SHIFT 0 /*************************************************************************** *INTER_LEVEL_RAM_BASE - INTER LEVEL RAM BASE ***************************************************************************/ /* BG_INSTR :: INTER_LEVEL_RAM_BASE :: reserved0 [31:09] */ #define BG_INSTR_INTER_LEVEL_RAM_BASE_reserved0_MASK 0xfffffe00 #define BG_INSTR_INTER_LEVEL_RAM_BASE_reserved0_ALIGN 0 #define BG_INSTR_INTER_LEVEL_RAM_BASE_reserved0_BITS 23 #define BG_INSTR_INTER_LEVEL_RAM_BASE_reserved0_SHIFT 9 /* BG_INSTR :: INTER_LEVEL_RAM_BASE :: RAM_BASE_VALUE [08:00] */ #define BG_INSTR_INTER_LEVEL_RAM_BASE_RAM_BASE_VALUE_MASK 0x000001ff #define BG_INSTR_INTER_LEVEL_RAM_BASE_RAM_BASE_VALUE_ALIGN 0 #define BG_INSTR_INTER_LEVEL_RAM_BASE_RAM_BASE_VALUE_BITS 9 #define BG_INSTR_INTER_LEVEL_RAM_BASE_RAM_BASE_VALUE_SHIFT 0 /*************************************************************************** *INTRA_LAST_LEVEL_RAM_BASE - INTRA LAST LEVEL RAM BASE ***************************************************************************/ /* BG_INSTR :: INTRA_LAST_LEVEL_RAM_BASE :: reserved0 [31:09] */ #define BG_INSTR_INTRA_LAST_LEVEL_RAM_BASE_reserved0_MASK 0xfffffe00 #define BG_INSTR_INTRA_LAST_LEVEL_RAM_BASE_reserved0_ALIGN 0 #define BG_INSTR_INTRA_LAST_LEVEL_RAM_BASE_reserved0_BITS 23 #define BG_INSTR_INTRA_LAST_LEVEL_RAM_BASE_reserved0_SHIFT 9 /* BG_INSTR :: INTRA_LAST_LEVEL_RAM_BASE :: RAM_BASE_VALUE [08:00] */ #define BG_INSTR_INTRA_LAST_LEVEL_RAM_BASE_RAM_BASE_VALUE_MASK 0x000001ff #define BG_INSTR_INTRA_LAST_LEVEL_RAM_BASE_RAM_BASE_VALUE_ALIGN 0 #define BG_INSTR_INTRA_LAST_LEVEL_RAM_BASE_RAM_BASE_VALUE_BITS 9 #define BG_INSTR_INTRA_LAST_LEVEL_RAM_BASE_RAM_BASE_VALUE_SHIFT 0 /*************************************************************************** *INTER_LAST_LEVEL_RAM_BASE - INTER LAST LEVEL RAM BASE ***************************************************************************/ /* BG_INSTR :: INTER_LAST_LEVEL_RAM_BASE :: reserved0 [31:09] */ #define BG_INSTR_INTER_LAST_LEVEL_RAM_BASE_reserved0_MASK 0xfffffe00 #define BG_INSTR_INTER_LAST_LEVEL_RAM_BASE_reserved0_ALIGN 0 #define BG_INSTR_INTER_LAST_LEVEL_RAM_BASE_reserved0_BITS 23 #define BG_INSTR_INTER_LAST_LEVEL_RAM_BASE_reserved0_SHIFT 9 /* BG_INSTR :: INTER_LAST_LEVEL_RAM_BASE :: RAM_BASE_VALUE [08:00] */ #define BG_INSTR_INTER_LAST_LEVEL_RAM_BASE_RAM_BASE_VALUE_MASK 0x000001ff #define BG_INSTR_INTER_LAST_LEVEL_RAM_BASE_RAM_BASE_VALUE_ALIGN 0 #define BG_INSTR_INTER_LAST_LEVEL_RAM_BASE_RAM_BASE_VALUE_BITS 9 #define BG_INSTR_INTER_LAST_LEVEL_RAM_BASE_RAM_BASE_VALUE_SHIFT 0 /*************************************************************************** *LAST_AC_LEVEL - LAST AC LEVEL ***************************************************************************/ /* BG_INSTR :: LAST_AC_LEVEL :: reserved0 [31:07] */ #define BG_INSTR_LAST_AC_LEVEL_reserved0_MASK 0xffffff80 #define BG_INSTR_LAST_AC_LEVEL_reserved0_ALIGN 0 #define BG_INSTR_LAST_AC_LEVEL_reserved0_BITS 25 #define BG_INSTR_LAST_AC_LEVEL_reserved0_SHIFT 7 /* BG_INSTR :: LAST_AC_LEVEL :: LAST_AC_LEVEL [06:00] */ #define BG_INSTR_LAST_AC_LEVEL_LAST_AC_LEVEL_MASK 0x0000007f #define BG_INSTR_LAST_AC_LEVEL_LAST_AC_LEVEL_ALIGN 0 #define BG_INSTR_LAST_AC_LEVEL_LAST_AC_LEVEL_BITS 7 #define BG_INSTR_LAST_AC_LEVEL_LAST_AC_LEVEL_SHIFT 0 /*************************************************************************** *DSP_STOP_ADDR - DSP STOP ADDRESS ***************************************************************************/ /* BG_INSTR :: DSP_STOP_ADDR :: reserved0 [31:07] */ #define BG_INSTR_DSP_STOP_ADDR_reserved0_MASK 0xffffff80 #define BG_INSTR_DSP_STOP_ADDR_reserved0_ALIGN 0 #define BG_INSTR_DSP_STOP_ADDR_reserved0_BITS 25 #define BG_INSTR_DSP_STOP_ADDR_reserved0_SHIFT 7 /* BG_INSTR :: DSP_STOP_ADDR :: DSP_STOP_ADDR [06:00] */ #define BG_INSTR_DSP_STOP_ADDR_DSP_STOP_ADDR_MASK 0x0000007f #define BG_INSTR_DSP_STOP_ADDR_DSP_STOP_ADDR_ALIGN 0 #define BG_INSTR_DSP_STOP_ADDR_DSP_STOP_ADDR_BITS 7 #define BG_INSTR_DSP_STOP_ADDR_DSP_STOP_ADDR_SHIFT 0 /*************************************************************************** *CBP_REG - CBP REG VALUE ***************************************************************************/ /* BG_INSTR :: CBP_REG :: reserved0 [31:06] */ #define BG_INSTR_CBP_REG_reserved0_MASK 0xffffffc0 #define BG_INSTR_CBP_REG_reserved0_ALIGN 0 #define BG_INSTR_CBP_REG_reserved0_BITS 26 #define BG_INSTR_CBP_REG_reserved0_SHIFT 6 /* BG_INSTR :: CBP_REG :: CBP_REG [05:00] */ #define BG_INSTR_CBP_REG_CBP_REG_MASK 0x0000003f #define BG_INSTR_CBP_REG_CBP_REG_ALIGN 0 #define BG_INSTR_CBP_REG_CBP_REG_BITS 6 #define BG_INSTR_CBP_REG_CBP_REG_SHIFT 0 /*************************************************************************** *PUTBIT_COUNTER - PUTBIT COUNTER ***************************************************************************/ /* BG_INSTR :: PUTBIT_COUNTER :: BIT_COUNTER_VALUE [31:00] */ #define BG_INSTR_PUTBIT_COUNTER_BIT_COUNTER_VALUE_MASK 0xffffffff #define BG_INSTR_PUTBIT_COUNTER_BIT_COUNTER_VALUE_ALIGN 0 #define BG_INSTR_PUTBIT_COUNTER_BIT_COUNTER_VALUE_BITS 32 #define BG_INSTR_PUTBIT_COUNTER_BIT_COUNTER_VALUE_SHIFT 0 /*************************************************************************** *INIT_COMMAND - INIT COMMAND ***************************************************************************/ /* BG_INSTR :: INIT_COMMAND :: reserved0 [31:01] */ #define BG_INSTR_INIT_COMMAND_reserved0_MASK 0xfffffffe #define BG_INSTR_INIT_COMMAND_reserved0_ALIGN 0 #define BG_INSTR_INIT_COMMAND_reserved0_BITS 31 #define BG_INSTR_INIT_COMMAND_reserved0_SHIFT 1 /* BG_INSTR :: INIT_COMMAND :: INIT [00:00] */ #define BG_INSTR_INIT_COMMAND_INIT_MASK 0x00000001 #define BG_INSTR_INIT_COMMAND_INIT_ALIGN 0 #define BG_INSTR_INIT_COMMAND_INIT_BITS 1 #define BG_INSTR_INIT_COMMAND_INIT_SHIFT 0 /*************************************************************************** *OUT_POINTER - READ OUTPOINTER VALUE ***************************************************************************/ /* BG_INSTR :: OUT_POINTER :: reserved0 [31:06] */ #define BG_INSTR_OUT_POINTER_reserved0_MASK 0xffffffc0 #define BG_INSTR_OUT_POINTER_reserved0_ALIGN 0 #define BG_INSTR_OUT_POINTER_reserved0_BITS 26 #define BG_INSTR_OUT_POINTER_reserved0_SHIFT 6 /* BG_INSTR :: OUT_POINTER :: OUT_POINTER [05:00] */ #define BG_INSTR_OUT_POINTER_OUT_POINTER_MASK 0x0000003f #define BG_INSTR_OUT_POINTER_OUT_POINTER_ALIGN 0 #define BG_INSTR_OUT_POINTER_OUT_POINTER_BITS 6 #define BG_INSTR_OUT_POINTER_OUT_POINTER_SHIFT 0 /*************************************************************************** *PUTBIT_10 - PUT BIT COMMAND ***************************************************************************/ /* BG_INSTR :: PUTBIT_10 :: reserved0 [31:16] */ #define BG_INSTR_PUTBIT_10_reserved0_MASK 0xffff0000 #define BG_INSTR_PUTBIT_10_reserved0_ALIGN 0 #define BG_INSTR_PUTBIT_10_reserved0_BITS 16 #define BG_INSTR_PUTBIT_10_reserved0_SHIFT 16 /* BG_INSTR :: PUTBIT_10 :: CLEN [15:10] */ #define BG_INSTR_PUTBIT_10_CLEN_MASK 0x0000fc00 #define BG_INSTR_PUTBIT_10_CLEN_ALIGN 0 #define BG_INSTR_PUTBIT_10_CLEN_BITS 6 #define BG_INSTR_PUTBIT_10_CLEN_SHIFT 10 /* BG_INSTR :: PUTBIT_10 :: CWORD [09:00] */ #define BG_INSTR_PUTBIT_10_CWORD_MASK 0x000003ff #define BG_INSTR_PUTBIT_10_CWORD_ALIGN 0 #define BG_INSTR_PUTBIT_10_CWORD_BITS 10 #define BG_INSTR_PUTBIT_10_CWORD_SHIFT 0 /*************************************************************************** *PUTBIT_16 - PUT BIT COMMAND ***************************************************************************/ /* BG_INSTR :: PUTBIT_16 :: reserved0 [31:22] */ #define BG_INSTR_PUTBIT_16_reserved0_MASK 0xffc00000 #define BG_INSTR_PUTBIT_16_reserved0_ALIGN 0 #define BG_INSTR_PUTBIT_16_reserved0_BITS 10 #define BG_INSTR_PUTBIT_16_reserved0_SHIFT 22 /* BG_INSTR :: PUTBIT_16 :: CLEN [21:16] */ #define BG_INSTR_PUTBIT_16_CLEN_MASK 0x003f0000 #define BG_INSTR_PUTBIT_16_CLEN_ALIGN 0 #define BG_INSTR_PUTBIT_16_CLEN_BITS 6 #define BG_INSTR_PUTBIT_16_CLEN_SHIFT 16 /* BG_INSTR :: PUTBIT_16 :: CWORD [15:00] */ #define BG_INSTR_PUTBIT_16_CWORD_MASK 0x0000ffff #define BG_INSTR_PUTBIT_16_CWORD_ALIGN 0 #define BG_INSTR_PUTBIT_16_CWORD_BITS 16 #define BG_INSTR_PUTBIT_16_CWORD_SHIFT 0 /*************************************************************************** *PUTAC - PUT AC ***************************************************************************/ /* BG_INSTR :: PUTAC :: reserved0 [31:09] */ #define BG_INSTR_PUTAC_reserved0_MASK 0xfffffe00 #define BG_INSTR_PUTAC_reserved0_ALIGN 0 #define BG_INSTR_PUTAC_reserved0_BITS 23 #define BG_INSTR_PUTAC_reserved0_SHIFT 9 /* BG_INSTR :: PUTAC :: DCT_RD_ADDRESS [08:00] */ #define BG_INSTR_PUTAC_DCT_RD_ADDRESS_MASK 0x000001ff #define BG_INSTR_PUTAC_DCT_RD_ADDRESS_ALIGN 0 #define BG_INSTR_PUTAC_DCT_RD_ADDRESS_BITS 9 #define BG_INSTR_PUTAC_DCT_RD_ADDRESS_SHIFT 0 /*************************************************************************** *EXECSTATUS - EXEC STATUS ***************************************************************************/ /* BG_INSTR :: EXECSTATUS :: reserved0 [31:01] */ #define BG_INSTR_EXECSTATUS_reserved0_MASK 0xfffffffe #define BG_INSTR_EXECSTATUS_reserved0_ALIGN 0 #define BG_INSTR_EXECSTATUS_reserved0_BITS 31 #define BG_INSTR_EXECSTATUS_reserved0_SHIFT 1 /* BG_INSTR :: EXECSTATUS :: EXEC_STATUS [00:00] */ #define BG_INSTR_EXECSTATUS_EXEC_STATUS_MASK 0x00000001 #define BG_INSTR_EXECSTATUS_EXEC_STATUS_ALIGN 0 #define BG_INSTR_EXECSTATUS_EXEC_STATUS_BITS 1 #define BG_INSTR_EXECSTATUS_EXEC_STATUS_SHIFT 0 /*************************************************************************** *REVISION_ID - Letter Box Generator Revision register ***************************************************************************/ /* BG_INSTR :: REVISION_ID :: reserved0 [31:08] */ #define BG_INSTR_REVISION_ID_reserved0_MASK 0xffffff00 #define BG_INSTR_REVISION_ID_reserved0_ALIGN 0 #define BG_INSTR_REVISION_ID_reserved0_BITS 24 #define BG_INSTR_REVISION_ID_reserved0_SHIFT 8 /* BG_INSTR :: REVISION_ID :: MAJOR [07:04] */ #define BG_INSTR_REVISION_ID_MAJOR_MASK 0x000000f0 #define BG_INSTR_REVISION_ID_MAJOR_ALIGN 0 #define BG_INSTR_REVISION_ID_MAJOR_BITS 4 #define BG_INSTR_REVISION_ID_MAJOR_SHIFT 4 /* BG_INSTR :: REVISION_ID :: MINOR [03:00] */ #define BG_INSTR_REVISION_ID_MINOR_MASK 0x0000000f #define BG_INSTR_REVISION_ID_MINOR_ALIGN 0 #define BG_INSTR_REVISION_ID_MINOR_BITS 4 #define BG_INSTR_REVISION_ID_MINOR_SHIFT 0 #endif /* #ifndef BCM7043_A0_BG_INSTR_H__ */ /* End of File */