// This file was generated by the create_regs script #define PIARBCTL_BASE 0x7e80a000 #define PIARBCTL_CAM HW_REGISTER_RW( 0x7e80a000 ) #define PIARBCTL_CAM_MASK 0x0000ffff #define PIARBCTL_CAM_WIDTH 16 #define PIARBCTL_CAM_RESET 0000000000 #define PIARBCTL_CAM_CHANNEL_INIBIT_BITS 15:8 #define PIARBCTL_CAM_CHANNEL_INIBIT_SET 0x0000ff00 #define PIARBCTL_CAM_CHANNEL_INIBIT_CLR 0xffff00ff #define PIARBCTL_CAM_CHANNEL_INIBIT_MSB 15 #define PIARBCTL_CAM_CHANNEL_INIBIT_LSB 8 #define PIARBCTL_CAM_CHANNEL_INIBIT_RESET 0x0 #define PIARBCTL_CAM_ALGORITHM_BITS 7:6 #define PIARBCTL_CAM_ALGORITHM_SET 0x000000c0 #define PIARBCTL_CAM_ALGORITHM_CLR 0xffffff3f #define PIARBCTL_CAM_ALGORITHM_MSB 7 #define PIARBCTL_CAM_ALGORITHM_LSB 6 #define PIARBCTL_CAM_ALGORITHM_RESET 0x0 #define PIARBCTL_CAM_THRESHOLD_BITS 5:4 #define PIARBCTL_CAM_THRESHOLD_SET 0x00000030 #define PIARBCTL_CAM_THRESHOLD_CLR 0xffffffcf #define PIARBCTL_CAM_THRESHOLD_MSB 5 #define PIARBCTL_CAM_THRESHOLD_LSB 4 #define PIARBCTL_CAM_THRESHOLD_RESET 0x0 #define PIARBCTL_CAM_DELAY_BITS 3:2 #define PIARBCTL_CAM_DELAY_SET 0x0000000c #define PIARBCTL_CAM_DELAY_CLR 0xfffffff3 #define PIARBCTL_CAM_DELAY_MSB 3 #define PIARBCTL_CAM_DELAY_LSB 2 #define PIARBCTL_CAM_DELAY_RESET 0x0 #define PIARBCTL_CAM_LIMIT_BITS 1:0 #define PIARBCTL_CAM_LIMIT_SET 0x00000003 #define PIARBCTL_CAM_LIMIT_CLR 0xfffffffc #define PIARBCTL_CAM_LIMIT_MSB 1 #define PIARBCTL_CAM_LIMIT_LSB 0 #define PIARBCTL_CAM_LIMIT_RESET 0x0