// This file was generated by the create_regs script #define ASB_BASE 0x7e00a000 #define ASB_APB_ID 0x62726467 #define ASB_AXI_BRDG_VERSION HW_REGISTER_RW( 0x7e00a000 ) #define ASB_AXI_BRDG_VERSION_MASK 0x000000ff #define ASB_AXI_BRDG_VERSION_WIDTH 8 #define ASB_AXI_BRDG_VERSION_RESET 0000000000 #define ASB_CPR_CTRL HW_REGISTER_RW( 0x7e00a004 ) #define ASB_CPR_CTRL_MASK 0x00ffffff #define ASB_CPR_CTRL_WIDTH 24 #define ASB_CPR_CTRL_RESET 0x00000007 #define ASB_CPR_CTRL_CLR_REQ_BITS 0:0 #define ASB_CPR_CTRL_CLR_REQ_SET 0x00000001 #define ASB_CPR_CTRL_CLR_REQ_CLR 0xfffffffe #define ASB_CPR_CTRL_CLR_REQ_MSB 0 #define ASB_CPR_CTRL_CLR_REQ_LSB 0 #define ASB_CPR_CTRL_CLR_ACK_BITS 1:1 #define ASB_CPR_CTRL_CLR_ACK_SET 0x00000002 #define ASB_CPR_CTRL_CLR_ACK_CLR 0xfffffffd #define ASB_CPR_CTRL_CLR_ACK_MSB 1 #define ASB_CPR_CTRL_CLR_ACK_LSB 1 #define ASB_CPR_CTRL_EMPTY_BITS 2:2 #define ASB_CPR_CTRL_EMPTY_SET 0x00000004 #define ASB_CPR_CTRL_EMPTY_CLR 0xfffffffb #define ASB_CPR_CTRL_EMPTY_MSB 2 #define ASB_CPR_CTRL_EMPTY_LSB 2 #define ASB_CPR_CTRL_FULL_BITS 3:3 #define ASB_CPR_CTRL_FULL_SET 0x00000008 #define ASB_CPR_CTRL_FULL_CLR 0xfffffff7 #define ASB_CPR_CTRL_FULL_MSB 3 #define ASB_CPR_CTRL_FULL_LSB 3 #define ASB_CPR_CTRL_RCOUNT_BITS 13:4 #define ASB_CPR_CTRL_RCOUNT_SET 0x00003ff0 #define ASB_CPR_CTRL_RCOUNT_CLR 0xffffc00f #define ASB_CPR_CTRL_RCOUNT_MSB 13 #define ASB_CPR_CTRL_RCOUNT_LSB 4 #define ASB_CPR_CTRL_WCOUNT_BITS 23:14 #define ASB_CPR_CTRL_WCOUNT_SET 0x00ffc000 #define ASB_CPR_CTRL_WCOUNT_CLR 0xff003fff #define ASB_CPR_CTRL_WCOUNT_MSB 23 #define ASB_CPR_CTRL_WCOUNT_LSB 14 #define ASB_V3D_S_CTRL HW_REGISTER_RW( 0x7e00a008 ) #define ASB_V3D_S_CTRL_MASK 0x00ffffff #define ASB_V3D_S_CTRL_WIDTH 24 #define ASB_V3D_S_CTRL_RESET 0x00000007 #define ASB_V3D_S_CTRL_CLR_REQ_BITS 0:0 #define ASB_V3D_S_CTRL_CLR_REQ_SET 0x00000001 #define ASB_V3D_S_CTRL_CLR_REQ_CLR 0xfffffffe #define ASB_V3D_S_CTRL_CLR_REQ_MSB 0 #define ASB_V3D_S_CTRL_CLR_REQ_LSB 0 #define ASB_V3D_S_CTRL_CLR_ACK_BITS 1:1 #define ASB_V3D_S_CTRL_CLR_ACK_SET 0x00000002 #define ASB_V3D_S_CTRL_CLR_ACK_CLR 0xfffffffd #define ASB_V3D_S_CTRL_CLR_ACK_MSB 1 #define ASB_V3D_S_CTRL_CLR_ACK_LSB 1 #define ASB_V3D_S_CTRL_EMPTY_BITS 2:2 #define ASB_V3D_S_CTRL_EMPTY_SET 0x00000004 #define ASB_V3D_S_CTRL_EMPTY_CLR 0xfffffffb #define ASB_V3D_S_CTRL_EMPTY_MSB 2 #define ASB_V3D_S_CTRL_EMPTY_LSB 2 #define ASB_V3D_S_CTRL_FULL_BITS 3:3 #define ASB_V3D_S_CTRL_FULL_SET 0x00000008 #define ASB_V3D_S_CTRL_FULL_CLR 0xfffffff7 #define ASB_V3D_S_CTRL_FULL_MSB 3 #define ASB_V3D_S_CTRL_FULL_LSB 3 #define ASB_V3D_S_CTRL_RCOUNT_BITS 13:4 #define ASB_V3D_S_CTRL_RCOUNT_SET 0x00003ff0 #define ASB_V3D_S_CTRL_RCOUNT_CLR 0xffffc00f #define ASB_V3D_S_CTRL_RCOUNT_MSB 13 #define ASB_V3D_S_CTRL_RCOUNT_LSB 4 #define ASB_V3D_S_CTRL_WCOUNT_BITS 23:14 #define ASB_V3D_S_CTRL_WCOUNT_SET 0x00ffc000 #define ASB_V3D_S_CTRL_WCOUNT_CLR 0xff003fff #define ASB_V3D_S_CTRL_WCOUNT_MSB 23 #define ASB_V3D_S_CTRL_WCOUNT_LSB 14 #define ASB_V3D_M_CTRL HW_REGISTER_RW( 0x7e00a00c ) #define ASB_V3D_M_CTRL_MASK 0x00ffffff #define ASB_V3D_M_CTRL_WIDTH 24 #define ASB_V3D_M_CTRL_RESET 0x00000007 #define ASB_V3D_M_CTRL_CLR_REQ_BITS 0:0 #define ASB_V3D_M_CTRL_CLR_REQ_SET 0x00000001 #define ASB_V3D_M_CTRL_CLR_REQ_CLR 0xfffffffe #define ASB_V3D_M_CTRL_CLR_REQ_MSB 0 #define ASB_V3D_M_CTRL_CLR_REQ_LSB 0 #define ASB_V3D_M_CTRL_CLR_ACK_BITS 1:1 #define ASB_V3D_M_CTRL_CLR_ACK_SET 0x00000002 #define ASB_V3D_M_CTRL_CLR_ACK_CLR 0xfffffffd #define ASB_V3D_M_CTRL_CLR_ACK_MSB 1 #define ASB_V3D_M_CTRL_CLR_ACK_LSB 1 #define ASB_V3D_M_CTRL_EMPTY_BITS 2:2 #define ASB_V3D_M_CTRL_EMPTY_SET 0x00000004 #define ASB_V3D_M_CTRL_EMPTY_CLR 0xfffffffb #define ASB_V3D_M_CTRL_EMPTY_MSB 2 #define ASB_V3D_M_CTRL_EMPTY_LSB 2 #define ASB_V3D_M_CTRL_FULL_BITS 3:3 #define ASB_V3D_M_CTRL_FULL_SET 0x00000008 #define ASB_V3D_M_CTRL_FULL_CLR 0xfffffff7 #define ASB_V3D_M_CTRL_FULL_MSB 3 #define ASB_V3D_M_CTRL_FULL_LSB 3 #define ASB_V3D_M_CTRL_RCOUNT_BITS 13:4 #define ASB_V3D_M_CTRL_RCOUNT_SET 0x00003ff0 #define ASB_V3D_M_CTRL_RCOUNT_CLR 0xffffc00f #define ASB_V3D_M_CTRL_RCOUNT_MSB 13 #define ASB_V3D_M_CTRL_RCOUNT_LSB 4 #define ASB_V3D_M_CTRL_WCOUNT_BITS 23:14 #define ASB_V3D_M_CTRL_WCOUNT_SET 0x00ffc000 #define ASB_V3D_M_CTRL_WCOUNT_CLR 0xff003fff #define ASB_V3D_M_CTRL_WCOUNT_MSB 23 #define ASB_V3D_M_CTRL_WCOUNT_LSB 14 #define ASB_ISP_S_CTRL HW_REGISTER_RW( 0x7e00a010 ) #define ASB_ISP_S_CTRL_MASK 0x00ffffff #define ASB_ISP_S_CTRL_WIDTH 24 #define ASB_ISP_S_CTRL_RESET 0x00000007 #define ASB_ISP_S_CTRL_CLR_REQ_BITS 0:0 #define ASB_ISP_S_CTRL_CLR_REQ_SET 0x00000001 #define ASB_ISP_S_CTRL_CLR_REQ_CLR 0xfffffffe #define ASB_ISP_S_CTRL_CLR_REQ_MSB 0 #define ASB_ISP_S_CTRL_CLR_REQ_LSB 0 #define ASB_ISP_S_CTRL_CLR_ACK_BITS 1:1 #define ASB_ISP_S_CTRL_CLR_ACK_SET 0x00000002 #define ASB_ISP_S_CTRL_CLR_ACK_CLR 0xfffffffd #define ASB_ISP_S_CTRL_CLR_ACK_MSB 1 #define ASB_ISP_S_CTRL_CLR_ACK_LSB 1 #define ASB_ISP_S_CTRL_EMPTY_BITS 2:2 #define ASB_ISP_S_CTRL_EMPTY_SET 0x00000004 #define ASB_ISP_S_CTRL_EMPTY_CLR 0xfffffffb #define ASB_ISP_S_CTRL_EMPTY_MSB 2 #define ASB_ISP_S_CTRL_EMPTY_LSB 2 #define ASB_ISP_S_CTRL_FULL_BITS 3:3 #define ASB_ISP_S_CTRL_FULL_SET 0x00000008 #define ASB_ISP_S_CTRL_FULL_CLR 0xfffffff7 #define ASB_ISP_S_CTRL_FULL_MSB 3 #define ASB_ISP_S_CTRL_FULL_LSB 3 #define ASB_ISP_S_CTRL_RCOUNT_BITS 13:4 #define ASB_ISP_S_CTRL_RCOUNT_SET 0x00003ff0 #define ASB_ISP_S_CTRL_RCOUNT_CLR 0xffffc00f #define ASB_ISP_S_CTRL_RCOUNT_MSB 13 #define ASB_ISP_S_CTRL_RCOUNT_LSB 4 #define ASB_ISP_S_CTRL_WCOUNT_BITS 23:14 #define ASB_ISP_S_CTRL_WCOUNT_SET 0x00ffc000 #define ASB_ISP_S_CTRL_WCOUNT_CLR 0xff003fff #define ASB_ISP_S_CTRL_WCOUNT_MSB 23 #define ASB_ISP_S_CTRL_WCOUNT_LSB 14 #define ASB_ISP_M_CTRL HW_REGISTER_RW( 0x7e00a014 ) #define ASB_ISP_M_CTRL_MASK 0x00ffffff #define ASB_ISP_M_CTRL_WIDTH 24 #define ASB_ISP_M_CTRL_RESET 0x00000007 #define ASB_ISP_M_CTRL_CLR_REQ_BITS 0:0 #define ASB_ISP_M_CTRL_CLR_REQ_SET 0x00000001 #define ASB_ISP_M_CTRL_CLR_REQ_CLR 0xfffffffe #define ASB_ISP_M_CTRL_CLR_REQ_MSB 0 #define ASB_ISP_M_CTRL_CLR_REQ_LSB 0 #define ASB_ISP_M_CTRL_CLR_ACK_BITS 1:1 #define ASB_ISP_M_CTRL_CLR_ACK_SET 0x00000002 #define ASB_ISP_M_CTRL_CLR_ACK_CLR 0xfffffffd #define ASB_ISP_M_CTRL_CLR_ACK_MSB 1 #define ASB_ISP_M_CTRL_CLR_ACK_LSB 1 #define ASB_ISP_M_CTRL_EMPTY_BITS 2:2 #define ASB_ISP_M_CTRL_EMPTY_SET 0x00000004 #define ASB_ISP_M_CTRL_EMPTY_CLR 0xfffffffb #define ASB_ISP_M_CTRL_EMPTY_MSB 2 #define ASB_ISP_M_CTRL_EMPTY_LSB 2 #define ASB_ISP_M_CTRL_FULL_BITS 3:3 #define ASB_ISP_M_CTRL_FULL_SET 0x00000008 #define ASB_ISP_M_CTRL_FULL_CLR 0xfffffff7 #define ASB_ISP_M_CTRL_FULL_MSB 3 #define ASB_ISP_M_CTRL_FULL_LSB 3 #define ASB_ISP_M_CTRL_RCOUNT_BITS 13:4 #define ASB_ISP_M_CTRL_RCOUNT_SET 0x00003ff0 #define ASB_ISP_M_CTRL_RCOUNT_CLR 0xffffc00f #define ASB_ISP_M_CTRL_RCOUNT_MSB 13 #define ASB_ISP_M_CTRL_RCOUNT_LSB 4 #define ASB_ISP_M_CTRL_WCOUNT_BITS 23:14 #define ASB_ISP_M_CTRL_WCOUNT_SET 0x00ffc000 #define ASB_ISP_M_CTRL_WCOUNT_CLR 0xff003fff #define ASB_ISP_M_CTRL_WCOUNT_MSB 23 #define ASB_ISP_M_CTRL_WCOUNT_LSB 14 #define ASB_H264_S_CTRL HW_REGISTER_RW( 0x7e00a018 ) #define ASB_H264_S_CTRL_MASK 0x00ffffff #define ASB_H264_S_CTRL_WIDTH 24 #define ASB_H264_S_CTRL_RESET 0x00000007 #define ASB_H264_S_CTRL_CLR_REQ_BITS 0:0 #define ASB_H264_S_CTRL_CLR_REQ_SET 0x00000001 #define ASB_H264_S_CTRL_CLR_REQ_CLR 0xfffffffe #define ASB_H264_S_CTRL_CLR_REQ_MSB 0 #define ASB_H264_S_CTRL_CLR_REQ_LSB 0 #define ASB_H264_S_CTRL_CLR_ACK_BITS 1:1 #define ASB_H264_S_CTRL_CLR_ACK_SET 0x00000002 #define ASB_H264_S_CTRL_CLR_ACK_CLR 0xfffffffd #define ASB_H264_S_CTRL_CLR_ACK_MSB 1 #define ASB_H264_S_CTRL_CLR_ACK_LSB 1 #define ASB_H264_S_CTRL_EMPTY_BITS 2:2 #define ASB_H264_S_CTRL_EMPTY_SET 0x00000004 #define ASB_H264_S_CTRL_EMPTY_CLR 0xfffffffb #define ASB_H264_S_CTRL_EMPTY_MSB 2 #define ASB_H264_S_CTRL_EMPTY_LSB 2 #define ASB_H264_S_CTRL_FULL_BITS 3:3 #define ASB_H264_S_CTRL_FULL_SET 0x00000008 #define ASB_H264_S_CTRL_FULL_CLR 0xfffffff7 #define ASB_H264_S_CTRL_FULL_MSB 3 #define ASB_H264_S_CTRL_FULL_LSB 3 #define ASB_H264_S_CTRL_RCOUNT_BITS 13:4 #define ASB_H264_S_CTRL_RCOUNT_SET 0x00003ff0 #define ASB_H264_S_CTRL_RCOUNT_CLR 0xffffc00f #define ASB_H264_S_CTRL_RCOUNT_MSB 13 #define ASB_H264_S_CTRL_RCOUNT_LSB 4 #define ASB_H264_S_CTRL_WCOUNT_BITS 23:14 #define ASB_H264_S_CTRL_WCOUNT_SET 0x00ffc000 #define ASB_H264_S_CTRL_WCOUNT_CLR 0xff003fff #define ASB_H264_S_CTRL_WCOUNT_MSB 23 #define ASB_H264_S_CTRL_WCOUNT_LSB 14 #define ASB_H264_M_CTRL HW_REGISTER_RW( 0x7e00a01c ) #define ASB_H264_M_CTRL_MASK 0x00ffffff #define ASB_H264_M_CTRL_WIDTH 24 #define ASB_H264_M_CTRL_RESET 0x00000007 #define ASB_H264_M_CTRL_CLR_REQ_BITS 0:0 #define ASB_H264_M_CTRL_CLR_REQ_SET 0x00000001 #define ASB_H264_M_CTRL_CLR_REQ_CLR 0xfffffffe #define ASB_H264_M_CTRL_CLR_REQ_MSB 0 #define ASB_H264_M_CTRL_CLR_REQ_LSB 0 #define ASB_H264_M_CTRL_CLR_ACK_BITS 1:1 #define ASB_H264_M_CTRL_CLR_ACK_SET 0x00000002 #define ASB_H264_M_CTRL_CLR_ACK_CLR 0xfffffffd #define ASB_H264_M_CTRL_CLR_ACK_MSB 1 #define ASB_H264_M_CTRL_CLR_ACK_LSB 1 #define ASB_H264_M_CTRL_EMPTY_BITS 2:2 #define ASB_H264_M_CTRL_EMPTY_SET 0x00000004 #define ASB_H264_M_CTRL_EMPTY_CLR 0xfffffffb #define ASB_H264_M_CTRL_EMPTY_MSB 2 #define ASB_H264_M_CTRL_EMPTY_LSB 2 #define ASB_H264_M_CTRL_FULL_BITS 3:3 #define ASB_H264_M_CTRL_FULL_SET 0x00000008 #define ASB_H264_M_CTRL_FULL_CLR 0xfffffff7 #define ASB_H264_M_CTRL_FULL_MSB 3 #define ASB_H264_M_CTRL_FULL_LSB 3 #define ASB_H264_M_CTRL_RCOUNT_BITS 13:4 #define ASB_H264_M_CTRL_RCOUNT_SET 0x00003ff0 #define ASB_H264_M_CTRL_RCOUNT_CLR 0xffffc00f #define ASB_H264_M_CTRL_RCOUNT_MSB 13 #define ASB_H264_M_CTRL_RCOUNT_LSB 4 #define ASB_H264_M_CTRL_WCOUNT_BITS 23:14 #define ASB_H264_M_CTRL_WCOUNT_SET 0x00ffc000 #define ASB_H264_M_CTRL_WCOUNT_CLR 0xff003fff #define ASB_H264_M_CTRL_WCOUNT_MSB 23 #define ASB_H264_M_CTRL_WCOUNT_LSB 14