// This file was generated by the create_regs script #define ST_BASE 0x7e003000 #define ST_CS HW_REGISTER_RW( 0x7e003000 ) #define ST_CS_MASK 0xffffffff #define ST_CS_WIDTH 32 #define ST_CS_RESET 0000000000 #if defined(__CC_ARM) #define ST_CLO vcos_getmicrosecs() #else #define ST_CLO HW_REGISTER_RO( 0x7e003004 ) #endif #define ST_CLO_MASK 0xffffffff #define ST_CLO_WIDTH 32 #define ST_CHI HW_REGISTER_RO( 0x7e003008 ) #define ST_CHI_MASK 0xffffffff #define ST_CHI_WIDTH 32 #define ST_C0 HW_REGISTER_RW( 0x7e00300c ) #define ST_C0_MASK 0xffffffff #define ST_C0_WIDTH 32 #define ST_C0_RESET 0000000000 #define ST_C1 HW_REGISTER_RW( 0x7e003010 ) #define ST_C1_MASK 0xffffffff #define ST_C1_WIDTH 32 #define ST_C1_RESET 0000000000 #define ST_C2 HW_REGISTER_RW( 0x7e003014 ) #define ST_C2_MASK 0xffffffff #define ST_C2_WIDTH 32 #define ST_C2_RESET 0000000000 #define ST_C3 HW_REGISTER_RW( 0x7e003018 ) #define ST_C3_MASK 0xffffffff #define ST_C3_WIDTH 32 #define ST_C3_RESET 0000000000