changelog update

This commit is contained in:
Wolfgang Spraul 2012-09-24 04:31:22 +02:00
parent c3b9317065
commit 090748386f
2 changed files with 8 additions and 5 deletions

9
README
View File

@ -24,7 +24,6 @@ FAQ
Libraries
- libfpga-test autotest suite
- libfpga-cores reusable cores
- libfpga-stdlib standard design elements on top of libfpga-control
- libfpga-control programmatic access to libfpga-model
@ -92,9 +91,13 @@ long-term:
ChangeLog
2012-09-24
* First design verified: hello_world is an AND gate design which was
verified in a xc6slx9.
2012-08-20
* Beginning of full fidelity circle with model, floorplan, conversion from
and to bitstream and floorplan formats.
* Beginning of full fidelity circle with model, floorplan, conversion
between floorplan and binary configuration formats.
2012-06-03
* Project started.

View File

@ -61,7 +61,7 @@ int main(int argc, char** argv)
return 0;
}
// read bitstream file
// read binary configuration file
{
FILE* fbits = fopen(argv[file_arg], "r");
if (!fbits) {
@ -73,7 +73,7 @@ int main(int argc, char** argv)
if (rc) FAIL(rc);
}
// fill model from bitstream
// fill model from binary configuration
if (pull_model)
if ((rc = extract_model(&model, &config.bits))) FAIL(rc);