changelog update
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9
README
9
README
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@ -24,7 +24,6 @@ FAQ
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Libraries
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- libfpga-test autotest suite
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- libfpga-cores reusable cores
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- libfpga-stdlib standard design elements on top of libfpga-control
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- libfpga-control programmatic access to libfpga-model
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@ -92,9 +91,13 @@ long-term:
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ChangeLog
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2012-09-24
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* First design verified: hello_world is an AND gate design which was
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verified in a xc6slx9.
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2012-08-20
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* Beginning of full fidelity circle with model, floorplan, conversion from
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and to bitstream and floorplan formats.
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* Beginning of full fidelity circle with model, floorplan, conversion
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between floorplan and binary configuration formats.
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2012-06-03
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* Project started.
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4
bit2fp.c
4
bit2fp.c
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@ -61,7 +61,7 @@ int main(int argc, char** argv)
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return 0;
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}
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// read bitstream file
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// read binary configuration file
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{
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FILE* fbits = fopen(argv[file_arg], "r");
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if (!fbits) {
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@ -73,7 +73,7 @@ int main(int argc, char** argv)
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if (rc) FAIL(rc);
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}
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// fill model from bitstream
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// fill model from binary configuration
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if (pull_model)
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if ((rc = extract_model(&model, &config.bits))) FAIL(rc);
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