Wolfgang Spraul
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c9c55822be
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more dirwire modeling
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2012-11-04 14:19:18 +01:00 |
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Wolfgang Spraul
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97f03a312c
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some work on horizontal wiring
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2012-10-29 06:44:01 +01:00 |
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Wolfgang Spraul
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2546288627
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LINKS cleanup
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2012-10-21 04:21:47 +02:00 |
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Wolfgang Spraul
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6200ea710c
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lut cleanup and support for more cases - unfinished
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2012-10-05 16:17:08 +02:00 |
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Wolfgang Spraul
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a356ac5b55
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support IO standards LVCMOS 33/25/18/15/12, LVTTL
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2012-10-03 15:19:59 +02:00 |
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Wolfgang Spraul
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1582b4833c
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ran into a wall with routing drawings, starting a C model of the chip
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2012-07-11 16:01:01 +02:00 |
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Wolfgang Spraul
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aedf4bd4b4
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a little DSP support, lots of reading and thinking
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2012-07-08 03:47:59 +02:00 |
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