Wolfgang Spraul
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1dadb4c381
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started with global clock wiring
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2012-07-27 16:01:34 +02:00 |
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Wolfgang Spraul
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ae2438cca0
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cleanup, wires, new_fp prints static connections
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2012-07-26 05:26:27 +02:00 |
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Wolfgang Spraul
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a17588fac5
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modeled first line - NN2
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2012-07-23 10:34:28 +02:00 |
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Wolfgang Spraul
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40cb5e88a0
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added new stub util new_floorplan
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2012-07-18 04:37:15 +02:00 |
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Wolfgang Spraul
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d1e8d5f557
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moved model into separate file so multiple utils can use it
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2012-07-17 10:58:07 +02:00 |
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Wolfgang Spraul
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f69912f094
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started modeling left side of chip
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2012-07-15 09:09:14 +02:00 |
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Wolfgang Spraul
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f99572195a
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working on C model
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2012-07-13 01:35:27 +00:00 |
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Wolfgang Spraul
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8a0bff748d
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incremental commit, some refactoring
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2012-06-27 04:07:54 +02:00 |
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Wolfgang Spraul
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bc12dd96f3
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ramb16 cleanup, going public domain, see unlicense.org
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2012-06-26 01:45:43 +02:00 |
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Wolfgang Spraul
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2490c266a0
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first steps
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2012-06-10 07:33:24 +02:00 |
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Wolfgang Spraul
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be5d3f6374
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parse .bit header strings
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2012-06-03 03:05:01 +02:00 |
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