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Fix ARMv7 build using Thumb-2 (#3431)

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This ensures that the moveq instruction is inside an IT block.
Backward compatible change - still builds on ARMv6 with Thumb.

This breakage is generally not noticeable on a RPi3 because, although the
CPU is ARMv7, it is generally running an ARMv6 OS.
This commit is contained in:
Paulo Matos 2020-10-09 18:10:57 +02:00 committed by GitHub
parent 77f0addb59
commit 67c00aaa7d
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2 changed files with 3 additions and 0 deletions
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1
racket/src/ChezScheme/c/atomic.h
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@ -83,6 +83,7 @@ FORCEINLINE int S_cas_any_fence(volatile void *addr, void *old_val, void *new_va
"strex r7, %3, [%1, #0]\n\t"
"cmp r7, #0\n\t"
"bne 1f\n\t"
"it eq\n\t"
"moveq %0, #1\n\t"
"1:\n\t"
: "=&r" (ret)

2
racket/src/ChezScheme/s/mkheader.ss
View File

@ -752,6 +752,7 @@
(pr " \"cmp r7, #0\\n\\t\"\\~%")
(pr " \"bne 0b\\n\\t\"\\~%")
(pr " \"cmp r12, #0\\n\\t\"\\~%")
(pr " \"it eq\\n\\t\"\\~%")
(pr " \"moveq %0, #1\\n\\t\"\\~%")
(pr " : \"=&r\" (ret)\\~%")
(pr " : \"r\" (addr)\\~%")
@ -767,6 +768,7 @@
(pr " \"cmp r7, #0\\n\\t\"\\~%")
(pr " \"bne 0b\\n\\t\"\\~%")
(pr " \"cmp r12, #0\\n\\t\"\\~%")
(pr " \"it eq\\n\\t\"\\~%")
(pr " \"moveq %0, #1\\n\\t\"\\~%")
(pr " : \"=&r\" (ret)\\~%")
(pr " : \"r\" (addr)\\~%")