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Chez Scheme: fix fence preproceddore conditional for AArch64

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The memory-fence macros were not being used on non-Apple AArch64.
This commit is contained in:
Matthew Flatt 2021-04-30 12:21:16 -06:00
parent b058be9bfc
commit c0af3a253b
1 changed files with 2 additions and 2 deletions
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4
racket/src/ChezScheme/c/atomic.h
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@ -1,6 +1,6 @@
#if !defined(PTHREADS) #if !defined(PTHREADS)
# define STORE_FENCE() do { } while (0) # define STORE_FENCE() do { } while (0)
#elif defined(__arm64__) #elif defined(__arm64__) || defined(__aarch64__)
# define STORE_FENCE() __asm__ __volatile__ ("dmb ishst" : : : "memory") # define STORE_FENCE() __asm__ __volatile__ ("dmb ishst" : : : "memory")
# define ACQUIRE_FENCE() __asm__ __volatile__ ("dmb ish" : : : "memory") # define ACQUIRE_FENCE() __asm__ __volatile__ ("dmb ish" : : : "memory")
# define RELEASE_FENCE() ACQUIRE_FENCE() # define RELEASE_FENCE() ACQUIRE_FENCE()
@ -35,7 +35,7 @@
#if !defined(PTHREADS) #if !defined(PTHREADS)
# define CAS_ANY_FENCE(a, old, new) ((*(a) == (old)) ? (*(a) = (new), 1) : 0) # define CAS_ANY_FENCE(a, old, new) ((*(a) == (old)) ? (*(a) = (new), 1) : 0)
#elif defined(__arm64__) #elif defined(__arm64__) || defined(__aarch64__)
FORCEINLINE int CAS_LOAD_ACQUIRE(volatile void *addr, void *old_val, void *new_val) { FORCEINLINE int CAS_LOAD_ACQUIRE(volatile void *addr, void *old_val, void *new_val) {
long ret; long ret;
__asm__ __volatile__ ("mov %0, #0\n\t" __asm__ __volatile__ ("mov %0, #0\n\t"