200 lines
15 KiB
C
Executable File
200 lines
15 KiB
C
Executable File
// This file was generated by the create_regs script
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#define CAM1_BASE 0x7e801000
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#define CAM1_APB_ID 0x7563616d
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#define CAM1_CAMCTL HW_REGISTER_RW( 0x7e801000 )
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#define CAM1_CAMCTL_MASK 0xffffffff
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#define CAM1_CAMCTL_WIDTH 32
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#define CAM1_CAMCTL_RESET 0000000000
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#define CAM1_CAMSTA HW_REGISTER_RW( 0x7e801004 )
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#define CAM1_CAMSTA_MASK 0xffffffff
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#define CAM1_CAMSTA_WIDTH 32
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#define CAM1_CAMSTA_RESET 0000000000
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#define CAM1_CAMANA HW_REGISTER_RW( 0x7e801008 )
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#define CAM1_CAMANA_MASK 0xffffffff
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#define CAM1_CAMANA_WIDTH 32
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#define CAM1_CAMANA_RESET 0x00000777
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#define CAM1_CAMPRI HW_REGISTER_RW( 0x7e80100c )
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#define CAM1_CAMPRI_MASK 0xffffffff
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#define CAM1_CAMPRI_WIDTH 32
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#define CAM1_CAMPRI_RESET 0000000000
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#define CAM1_CAMCLK HW_REGISTER_RW( 0x7e801010 )
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#define CAM1_CAMCLK_MASK 0xffffffff
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#define CAM1_CAMCLK_WIDTH 32
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#define CAM1_CAMCLK_RESET 0x00000002
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#define CAM1_CAMCLT HW_REGISTER_RW( 0x7e801014 )
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#define CAM1_CAMCLT_MASK 0xffffffff
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#define CAM1_CAMCLT_WIDTH 32
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#define CAM1_CAMCLT_RESET 0000000000
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#define CAM1_CAMDAT0 HW_REGISTER_RW( 0x7e801018 )
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#define CAM1_CAMDAT0_MASK 0xffffffff
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#define CAM1_CAMDAT0_WIDTH 32
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#define CAM1_CAMDAT0_RESET 0x00000002
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#define CAM1_CAMDAT1 HW_REGISTER_RW( 0x7e80101c )
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#define CAM1_CAMDAT1_MASK 0xffffffff
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#define CAM1_CAMDAT1_WIDTH 32
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#define CAM1_CAMDAT1_RESET 0x00000002
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#define CAM1_CAMDAT2 HW_REGISTER_RW( 0x7e801020 )
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#define CAM1_CAMDAT2_MASK 0xffffffff
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#define CAM1_CAMDAT2_WIDTH 32
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#define CAM1_CAMDAT2_RESET 0x00000002
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#define CAM1_CAMDAT3 HW_REGISTER_RW( 0x7e801024 )
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#define CAM1_CAMDAT3_MASK 0xffffffff
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#define CAM1_CAMDAT3_WIDTH 32
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#define CAM1_CAMDAT3_RESET 0x00000002
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#define CAM1_CAMDLT HW_REGISTER_RW( 0x7e801028 )
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#define CAM1_CAMDLT_MASK 0xffffffff
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#define CAM1_CAMDLT_WIDTH 32
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#define CAM1_CAMDLT_RESET 0000000000
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#define CAM1_CAMCMP0 HW_REGISTER_RW( 0x7e80102c )
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#define CAM1_CAMCMP0_MASK 0xffffffff
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#define CAM1_CAMCMP0_WIDTH 32
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#define CAM1_CAMCMP0_RESET 0000000000
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#define CAM1_CAMCMP1 HW_REGISTER_RW( 0x7e801030 )
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#define CAM1_CAMCMP1_MASK 0xffffffff
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#define CAM1_CAMCMP1_WIDTH 32
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#define CAM1_CAMCMP1_RESET 0000000000
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#define CAM1_CAMCAP0 HW_REGISTER_RW( 0x7e801034 )
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#define CAM1_CAMCAP0_MASK 0xffffffff
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#define CAM1_CAMCAP0_WIDTH 32
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#define CAM1_CAMCAP0_RESET 0000000000
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#define CAM1_CAMCAP1 HW_REGISTER_RW( 0x7e801038 )
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#define CAM1_CAMCAP1_MASK 0xffffffff
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#define CAM1_CAMCAP1_WIDTH 32
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#define CAM1_CAMCAP1_RESET 0000000000
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#define CAM1_CAMDBG0 HW_REGISTER_RW( 0x7e8010f0 )
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#define CAM1_CAMDBG0_MASK 0xffffffff
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#define CAM1_CAMDBG0_WIDTH 32
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#define CAM1_CAMDBG0_RESET 0000000000
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#define CAM1_CAMDBG1 HW_REGISTER_RW( 0x7e8010f4 )
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#define CAM1_CAMDBG1_MASK 0xffffffff
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#define CAM1_CAMDBG1_WIDTH 32
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#define CAM1_CAMDBG1_RESET 0000000000
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#define CAM1_CAMDBG2 HW_REGISTER_RW( 0x7e8010f8 )
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#define CAM1_CAMDBG2_MASK 0xffffffff
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#define CAM1_CAMDBG2_WIDTH 32
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#define CAM1_CAMDBG2_RESET 0000000000
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#define CAM1_CAMDBG3 HW_REGISTER_RW( 0x7e8010fc )
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#define CAM1_CAMDBG3_MASK 0xffffffff
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#define CAM1_CAMDBG3_WIDTH 32
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#define CAM1_CAMDBG3_RESET 0000000000
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#define CAM1_CAMICTL HW_REGISTER_RW( 0x7e801100 )
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#define CAM1_CAMICTL_MASK 0xffffffff
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#define CAM1_CAMICTL_WIDTH 32
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#define CAM1_CAMICTL_RESET 0000000000
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#define CAM1_CAMISTA HW_REGISTER_RW( 0x7e801104 )
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#define CAM1_CAMISTA_MASK 0xffffffff
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#define CAM1_CAMISTA_WIDTH 32
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#define CAM1_CAMISTA_RESET 0000000000
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#define CAM1_CAMIDI0 HW_REGISTER_RW( 0x7e801108 )
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#define CAM1_CAMIDI0_MASK 0xffffffff
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#define CAM1_CAMIDI0_WIDTH 32
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#define CAM1_CAMIDI0_RESET 0000000000
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#define CAM1_CAMIPIPE HW_REGISTER_RW( 0x7e80110c )
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#define CAM1_CAMIPIPE_MASK 0xffffffff
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#define CAM1_CAMIPIPE_WIDTH 32
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#define CAM1_CAMIPIPE_RESET 0000000000
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#define CAM1_CAMIBSA0 HW_REGISTER_RW( 0x7e801110 )
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#define CAM1_CAMIBSA0_MASK 0xffffffff
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#define CAM1_CAMIBSA0_WIDTH 32
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#define CAM1_CAMIBSA0_RESET 0000000000
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#define CAM1_CAMIBEA0 HW_REGISTER_RW( 0x7e801114 )
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#define CAM1_CAMIBEA0_MASK 0xffffffff
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#define CAM1_CAMIBEA0_WIDTH 32
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#define CAM1_CAMIBEA0_RESET 0000000000
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#define CAM1_CAMIBLS HW_REGISTER_RW( 0x7e801118 )
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#define CAM1_CAMIBLS_MASK 0xffffffff
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#define CAM1_CAMIBLS_WIDTH 32
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#define CAM1_CAMIBLS_RESET 0000000000
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#define CAM1_CAMIBWP HW_REGISTER_RW( 0x7e80111c )
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#define CAM1_CAMIBWP_MASK 0xffffffff
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#define CAM1_CAMIBWP_WIDTH 32
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#define CAM1_CAMIBWP_RESET 0000000000
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#define CAM1_CAMIHWIN HW_REGISTER_RW( 0x7e801120 )
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#define CAM1_CAMIHWIN_MASK 0xffffffff
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#define CAM1_CAMIHWIN_WIDTH 32
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#define CAM1_CAMIHWIN_RESET 0000000000
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#define CAM1_CAMIHSTA HW_REGISTER_RW( 0x7e801124 )
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#define CAM1_CAMIHSTA_MASK 0xffffffff
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#define CAM1_CAMIHSTA_WIDTH 32
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#define CAM1_CAMIHSTA_RESET 0000000000
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#define CAM1_CAMIVWIN HW_REGISTER_RW( 0x7e801128 )
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#define CAM1_CAMIVWIN_MASK 0xffffffff
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#define CAM1_CAMIVWIN_WIDTH 32
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#define CAM1_CAMIVWIN_RESET 0000000000
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#define CAM1_CAMIVSTA HW_REGISTER_RW( 0x7e80112c )
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#define CAM1_CAMIVSTA_MASK 0xffffffff
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#define CAM1_CAMIVSTA_WIDTH 32
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#define CAM1_CAMIVSTA_RESET 0000000000
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#define CAM1_CAMICC HW_REGISTER_RW( 0x7e801130 )
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#define CAM1_CAMICC_MASK 0xffffffff
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#define CAM1_CAMICC_WIDTH 32
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#define CAM1_CAMICC_RESET 0000000000
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#define CAM1_CAMICS HW_REGISTER_RW( 0x7e801134 )
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#define CAM1_CAMICS_MASK 0xffffffff
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#define CAM1_CAMICS_WIDTH 32
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#define CAM1_CAMICS_RESET 0000000000
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#define CAM1_CAMIDC HW_REGISTER_RW( 0x7e801138 )
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#define CAM1_CAMIDC_MASK 0xffffffff
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#define CAM1_CAMIDC_WIDTH 32
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#define CAM1_CAMIDC_RESET 0000000000
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#define CAM1_CAMIDPO HW_REGISTER_RW( 0x7e80113c )
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#define CAM1_CAMIDPO_MASK 0xffffffff
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#define CAM1_CAMIDPO_WIDTH 32
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#define CAM1_CAMIDPO_RESET 0000000000
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#define CAM1_CAMIDCA HW_REGISTER_RW( 0x7e801140 )
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#define CAM1_CAMIDCA_MASK 0xffffffff
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#define CAM1_CAMIDCA_WIDTH 32
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#define CAM1_CAMIDCA_RESET 0000000000
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#define CAM1_CAMIDCD HW_REGISTER_RW( 0x7e801144 )
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#define CAM1_CAMIDCD_MASK 0xffffffff
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#define CAM1_CAMIDCD_WIDTH 32
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#define CAM1_CAMIDCD_RESET 0000000000
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#define CAM1_CAMIDS HW_REGISTER_RW( 0x7e801148 )
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#define CAM1_CAMIDS_MASK 0xffffffff
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#define CAM1_CAMIDS_WIDTH 32
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#define CAM1_CAMIDS_RESET 0000000000
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#define CAM1_CAMDCS HW_REGISTER_RW( 0x7e801200 )
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#define CAM1_CAMDCS_MASK 0xffffffff
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#define CAM1_CAMDCS_WIDTH 32
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#define CAM1_CAMDCS_RESET 0000000000
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#define CAM1_CAMDBSA0 HW_REGISTER_RW( 0x7e801204 )
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#define CAM1_CAMDBSA0_MASK 0xffffffff
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#define CAM1_CAMDBSA0_WIDTH 32
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#define CAM1_CAMDBSA0_RESET 0000000000
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#define CAM1_CAMDBEA0 HW_REGISTER_RW( 0x7e801208 )
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#define CAM1_CAMDBEA0_MASK 0xffffffff
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#define CAM1_CAMDBEA0_WIDTH 32
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#define CAM1_CAMDBEA0_RESET 0000000000
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#define CAM1_CAMDBWP HW_REGISTER_RW( 0x7e80120c )
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#define CAM1_CAMDBWP_MASK 0xffffffff
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#define CAM1_CAMDBWP_WIDTH 32
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#define CAM1_CAMDBWP_RESET 0000000000
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#define CAM1_CAMDBCTL HW_REGISTER_RW( 0x7e801300 )
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#define CAM1_CAMDBCTL_MASK 0xffffffff
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#define CAM1_CAMDBCTL_WIDTH 32
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#define CAM1_CAMDBCTL_RESET 0000000000
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#define CAM1_CAMIBSA1 HW_REGISTER_RW( 0x7e801304 )
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#define CAM1_CAMIBSA1_MASK 0xffffffff
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#define CAM1_CAMIBSA1_WIDTH 32
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#define CAM1_CAMIBSA1_RESET 0000000000
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#define CAM1_CAMIBEA1 HW_REGISTER_RW( 0x7e801308 )
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#define CAM1_CAMIBEA1_MASK 0xffffffff
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#define CAM1_CAMIBEA1_WIDTH 32
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#define CAM1_CAMIBEA1_RESET 0000000000
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#define CAM1_CAMIDI1 HW_REGISTER_RW( 0x7e80130c )
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#define CAM1_CAMIDI1_MASK 0xffffffff
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#define CAM1_CAMIDI1_WIDTH 32
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#define CAM1_CAMIDI1_RESET 0000000000
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#define CAM1_CAMDBSA1 HW_REGISTER_RW( 0x7e801310 )
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#define CAM1_CAMDBSA1_MASK 0xffffffff
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#define CAM1_CAMDBSA1_WIDTH 32
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#define CAM1_CAMDBSA1_RESET 0000000000
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#define CAM1_CAMDBEA1 HW_REGISTER_RW( 0x7e801314 )
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#define CAM1_CAMDBEA1_MASK 0xffffffff
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#define CAM1_CAMDBEA1_WIDTH 32
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#define CAM1_CAMDBEA1_RESET 0000000000
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#define CAM1_CAMMISC HW_REGISTER_RW( 0x7e801400 )
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#define CAM1_CAMMISC_MASK 0xffffffff
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#define CAM1_CAMMISC_WIDTH 32
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#define CAM1_CAMMISC_RESET 0000000000
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