143 lines
7.6 KiB
C
Executable File
143 lines
7.6 KiB
C
Executable File
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// macro definitions plus aliases to maintain some old reg names
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// Commented out to reveal fake defines
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//#include "register_map_macros.h"
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// Necessary macros to make C code understand registers
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#if defined(_ATHENA_)
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#define HW_REGISTER_RW(addr) ((addr))
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#else
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#define HW_REGISTER_RW(addr) (*(volatile unsigned long *)(addr))
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#endif
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#define HW_REGISTER_RO(addr) (*(const volatile unsigned long *)(addr))
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#define HW_POINTER_TO_ADDRESS(pointer) ((uint32_t)(void *)&(pointer))
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//interrupt definitions
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#define INTERRUPT_HW_NUM (64)
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#define INTERRUPT_HW_OFFSET (64)
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#define INTERRUPT_SW_OFFSET (32)
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#define INTERRUPT_SW_NUM (32)
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#define INTERRUPT_TIMER0 (INTERRUPT_HW_OFFSET + 0 )
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#define INTERRUPT_TIMER1 (INTERRUPT_HW_OFFSET + 1 )
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#define INTERRUPT_TIMER2 (INTERRUPT_HW_OFFSET + 2 )
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#define INTERRUPT_TIMER3 (INTERRUPT_HW_OFFSET + 3 )
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#define INTERRUPT_CODEC0 (INTERRUPT_HW_OFFSET + 4 )
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#define INTERRUPT_CODEC1 (INTERRUPT_HW_OFFSET + 5 )
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#define INTERRUPT_CODEC2 (INTERRUPT_HW_OFFSET + 6 )
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#define INTERRUPT_JPEG (INTERRUPT_HW_OFFSET + 7 )
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#define INTERRUPT_ISP (INTERRUPT_HW_OFFSET + 8 )
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#define INTERRUPT_USB (INTERRUPT_HW_OFFSET + 9 )
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#define INTERRUPT_3D (INTERRUPT_HW_OFFSET + 10 )
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#define INTERRUPT_TRANSPOSER (INTERRUPT_HW_OFFSET + 11 )
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#define INTERRUPT_MULTICORESYNC0 (INTERRUPT_HW_OFFSET + 12 )
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#define INTERRUPT_MULTICORESYNC1 (INTERRUPT_HW_OFFSET + 13 )
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#define INTERRUPT_MULTICORESYNC2 (INTERRUPT_HW_OFFSET + 14 )
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#define INTERRUPT_MULTICORESYNC3 (INTERRUPT_HW_OFFSET + 15 )
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#define INTERRUPT_DMA0 (INTERRUPT_HW_OFFSET + 16 )
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#define INTERRUPT_DMA1 (INTERRUPT_HW_OFFSET + 17 )
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#define INTERRUPT_DMA2 (INTERRUPT_HW_OFFSET + 18 )
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#define INTERRUPT_DMA3 (INTERRUPT_HW_OFFSET + 19 )
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#define INTERRUPT_DMA4 (INTERRUPT_HW_OFFSET + 20 )
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#define INTERRUPT_DMA5 (INTERRUPT_HW_OFFSET + 21 )
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#define INTERRUPT_DMA6 (INTERRUPT_HW_OFFSET + 22 )
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#define INTERRUPT_DMA7 (INTERRUPT_HW_OFFSET + 23 )
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#define INTERRUPT_DMA8 (INTERRUPT_HW_OFFSET + 24 )
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#define INTERRUPT_DMA9 (INTERRUPT_HW_OFFSET + 25 )
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#define INTERRUPT_DMA10 (INTERRUPT_HW_OFFSET + 26 )
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#define INTERRUPT_DMA11 (INTERRUPT_HW_OFFSET + 27 )
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#define INTERRUPT_DMA12 (INTERRUPT_HW_OFFSET + 28 )
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#define INTERRUPT_DMA13 (INTERRUPT_HW_OFFSET + 29 )
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#define INTERRUPT_DMA14 (INTERRUPT_HW_OFFSET + 30 )
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#define INTERRUPT_DMA15 (INTERRUPT_HW_OFFSET + 31 )
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#define INTERRUPT_HOSTPORT (INTERRUPT_HW_OFFSET + 32 )
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#define INTERRUPT_VIDEOSCALER (INTERRUPT_HW_OFFSET + 33 )
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#define INTERRUPT_CCP2TX (INTERRUPT_HW_OFFSET + 34 )
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#define INTERRUPT_SDC (INTERRUPT_HW_OFFSET + 35 )
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#define INTERRUPT_DSI0 (INTERRUPT_HW_OFFSET + 36 )
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#define INTERRUPT_SPARE2 (INTERRUPT_HW_OFFSET + 37 )
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#define INTERRUPT_CAM0 (INTERRUPT_HW_OFFSET + 38 )
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#define INTERRUPT_CAM1 (INTERRUPT_HW_OFFSET + 39 )
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#define INTERRUPT_HDMI0 (INTERRUPT_HW_OFFSET + 40 )
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#define INTERRUPT_HDMI1 (INTERRUPT_HW_OFFSET + 41 )
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#define INTERRUPT_PIXELVALVE1 (INTERRUPT_HW_OFFSET + 42 )
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#define INTERRUPT_SPARE3 (INTERRUPT_HW_OFFSET + 43 )
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#define INTERRUPT_DSI1 (INTERRUPT_HW_OFFSET + 44 )
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#define INTERRUPT_PWA0 (INTERRUPT_HW_OFFSET + 45 )
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#define INTERRUPT_PWA1 (INTERRUPT_HW_OFFSET + 46 )
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#define INTERRUPT_CPR (INTERRUPT_HW_OFFSET + 47 )
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#define INTERRUPT_SMI (INTERRUPT_HW_OFFSET + 48 )
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#define INTERRUPT_GPIO0 (INTERRUPT_HW_OFFSET + 49 )
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#define INTERRUPT_GPIO1 (INTERRUPT_HW_OFFSET + 50 )
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#define INTERRUPT_GPIO2 (INTERRUPT_HW_OFFSET + 51 )
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#define INTERRUPT_GPIO3 (INTERRUPT_HW_OFFSET + 52 )
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#define INTERRUPT_I2C (INTERRUPT_HW_OFFSET + 53 )
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#define INTERRUPT_SPI (INTERRUPT_HW_OFFSET + 54 )
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#define INTERRUPT_I2SPCM (INTERRUPT_HW_OFFSET + 55 )
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#define INTERRUPT_SDIO (INTERRUPT_HW_OFFSET + 56 )
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#define INTERRUPT_UART (INTERRUPT_HW_OFFSET + 57 )
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#define INTERRUPT_SLIMBUS (INTERRUPT_HW_OFFSET + 58 )
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#define INTERRUPT_VEC (INTERRUPT_HW_OFFSET + 59 )
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#define INTERRUPT_CPG (INTERRUPT_HW_OFFSET + 60 )
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#define INTERRUPT_RNG (INTERRUPT_HW_OFFSET + 61 )
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#define INTERRUPT_SPARE4 (INTERRUPT_HW_OFFSET + 62 )
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#define INTERRUPT_SPARE5 (INTERRUPT_HW_OFFSET + 63 )
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#define INTERRUPT_DUMMY (INTERRUPT_HW_OFFSET + 63 )
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#define ISRC0_0 IC0_SRC0
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#define ISRC0_1 IC1_SRC0
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#define ISRC1_0 IC0_SRC1
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#define ISRC1_1 IC1_SRC1
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/*---------------------------------------------------------------------------*/
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// auto generated regestermap
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#include "register_map.h"
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/*---------------------------------------------------------------------------*/
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/* DMA Source Definitions */
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// port 0 is wired as permanently on inside the DMA
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#define CAM_DMA (0<<DMA0_TI_PERMAP_LSB)
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#define DISP_DMA (0<<DMA0_TI_PERMAP_LSB)
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#define MS_DMA (0<<DMA0_TI_PERMAP_LSB)
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#define BIT_STREAM_DMA (0<<DMA0_TI_PERMAP_LSB)
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#define ACIS_DMA (0<<DMA0_TI_PERMAP_LSB)
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#define SDRAM_CTRL_DMA (0<<DMA0_TI_PERMAP_LSB)
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#define DSI_DMA ( 1<<DMA0_TI_PERMAP_LSB)
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#define PCM_TX_DMA ( 2<<DMA0_TI_PERMAP_LSB)
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#define PCM_RX_DMA ( 3<<DMA0_TI_PERMAP_LSB)
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#define SMI_DMA ( 4<<DMA0_TI_PERMAP_LSB)
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#define PWM_DMA ( 5<<DMA0_TI_PERMAP_LSB)
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#define SPI_TX_DMA ( 6<<DMA0_TI_PERMAP_LSB)
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#define SPI_RX_DMA ( 7<<DMA0_TI_PERMAP_LSB)
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#define SLIM_DTX_DMA ( 8<<DMA0_TI_PERMAP_LSB)
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#define SLIM_DRX_DMA ( 9<<DMA0_TI_PERMAP_LSB)
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#define SLIM_CTX_DMA (10<<DMA0_TI_PERMAP_LSB)
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#define SLIM_CRX_DMA (11<<DMA0_TI_PERMAP_LSB)
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#define UNUSED_DMA_12 (12<<DMA0_TI_PERMAP_LSB)
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#define SD_HOST_DMA (13<<DMA0_TI_PERMAP_LSB)
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#define UNUSED_DMA_14 (14<<DMA0_TI_PERMAP_LSB)
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#define DSI1_DMA (15<<DMA0_TI_PERMAP_LSB)
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#define UNUSED_DMA_16 (16<<DMA0_TI_PERMAP_LSB)
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#define HDMI_DMA (17<<DMA0_TI_PERMAP_LSB)
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#define UNUSED_DMA_18 (18<<DMA0_TI_PERMAP_LSB)
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#define CRYPTO_IP_DMA (19<<DMA0_TI_PERMAP_LSB)
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#define CRYPTO_OP_DMA (20<<DMA0_TI_PERMAP_LSB)
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#define SCALER_0_DMA (21<<DMA0_TI_PERMAP_LSB)
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#define SCALER_1_DMA (22<<DMA0_TI_PERMAP_LSB)
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#define SCALER_2_DMA (23<<DMA0_TI_PERMAP_LSB)
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#define SMI_SCALER_0_DMA (24<<DMA0_TI_PERMAP_LSB)
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#define SMI_SCALER_1_DMA (25<<DMA0_TI_PERMAP_LSB)
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#define SMI_SCALER_2_DMA (26<<DMA0_TI_PERMAP_LSB)
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// 27-32 unused
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#define DMA_TI_S_128 (1<<9)
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#define DMA_TI_S_INC (1<<8)
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#define DMA_TI_D_32 0
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#define DMA_TI_D_DREQ (1<<6)
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#define DMA_TI_PER_MAP(n) (((n) & 0x1f) <<16)
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