277 lines
20 KiB
C
Executable File
277 lines
20 KiB
C
Executable File
// This file was generated by the create_regs script
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#define PWM_BASE 0x7e20c000
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#define PWM_APB_ID 0x70776d30
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#define PWM_CTL HW_REGISTER_RW( 0x7e20c000 )
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#define PWM_CTL_MASK 0xbfbfbfff
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#define PWM_CTL_WIDTH 32
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#define PWM_CTL_RESET 0000000000
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#define PWM_CTL_PWEN1_BITS 0:0
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#define PWM_CTL_PWEN1_SET 0x00000001
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#define PWM_CTL_PWEN1_CLR 0xfffffffe
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#define PWM_CTL_PWEN1_MSB 0
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#define PWM_CTL_PWEN1_LSB 0
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#define PWM_CTL_MODE1_BITS 1:1
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#define PWM_CTL_MODE1_SET 0x00000002
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#define PWM_CTL_MODE1_CLR 0xfffffffd
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#define PWM_CTL_MODE1_MSB 1
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#define PWM_CTL_MODE1_LSB 1
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#define PWM_CTL_RPTL1_BITS 2:2
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#define PWM_CTL_RPTL1_SET 0x00000004
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#define PWM_CTL_RPTL1_CLR 0xfffffffb
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#define PWM_CTL_RPTL1_MSB 2
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#define PWM_CTL_RPTL1_LSB 2
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#define PWM_CTL_SBIT1_BITS 3:3
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#define PWM_CTL_SBIT1_SET 0x00000008
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#define PWM_CTL_SBIT1_CLR 0xfffffff7
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#define PWM_CTL_SBIT1_MSB 3
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#define PWM_CTL_SBIT1_LSB 3
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#define PWM_CTL_POLA1_BITS 4:4
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#define PWM_CTL_POLA1_SET 0x00000010
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#define PWM_CTL_POLA1_CLR 0xffffffef
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#define PWM_CTL_POLA1_MSB 4
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#define PWM_CTL_POLA1_LSB 4
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#define PWM_CTL_USEF1_BITS 5:5
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#define PWM_CTL_USEF1_SET 0x00000020
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#define PWM_CTL_USEF1_CLR 0xffffffdf
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#define PWM_CTL_USEF1_MSB 5
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#define PWM_CTL_USEF1_LSB 5
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#define PWM_CTL_CLRF1_BITS 6:6
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#define PWM_CTL_CLRF1_SET 0x00000040
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#define PWM_CTL_CLRF1_CLR 0xffffffbf
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#define PWM_CTL_CLRF1_MSB 6
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#define PWM_CTL_CLRF1_LSB 6
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#define PWM_CTL_MSEN1_BITS 7:7
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#define PWM_CTL_MSEN1_SET 0x00000080
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#define PWM_CTL_MSEN1_CLR 0xffffff7f
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#define PWM_CTL_MSEN1_MSB 7
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#define PWM_CTL_MSEN1_LSB 7
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#define PWM_CTL_PWEN2_BITS 8:8
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#define PWM_CTL_PWEN2_SET 0x00000100
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#define PWM_CTL_PWEN2_CLR 0xfffffeff
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#define PWM_CTL_PWEN2_MSB 8
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#define PWM_CTL_PWEN2_LSB 8
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#define PWM_CTL_MODE2_BITS 9:9
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#define PWM_CTL_MODE2_SET 0x00000200
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#define PWM_CTL_MODE2_CLR 0xfffffdff
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#define PWM_CTL_MODE2_MSB 9
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#define PWM_CTL_MODE2_LSB 9
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#define PWM_CTL_RPTL2_BITS 10:10
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#define PWM_CTL_RPTL2_SET 0x00000400
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#define PWM_CTL_RPTL2_CLR 0xfffffbff
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#define PWM_CTL_RPTL2_MSB 10
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#define PWM_CTL_RPTL2_LSB 10
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#define PWM_CTL_SBIT2_BITS 11:11
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#define PWM_CTL_SBIT2_SET 0x00000800
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#define PWM_CTL_SBIT2_CLR 0xfffff7ff
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#define PWM_CTL_SBIT2_MSB 11
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#define PWM_CTL_SBIT2_LSB 11
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#define PWM_CTL_POLA2_BITS 12:12
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#define PWM_CTL_POLA2_SET 0x00001000
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#define PWM_CTL_POLA2_CLR 0xffffefff
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#define PWM_CTL_POLA2_MSB 12
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#define PWM_CTL_POLA2_LSB 12
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#define PWM_CTL_USEF2_BITS 13:13
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#define PWM_CTL_USEF2_SET 0x00002000
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#define PWM_CTL_USEF2_CLR 0xffffdfff
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#define PWM_CTL_USEF2_MSB 13
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#define PWM_CTL_USEF2_LSB 13
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#define PWM_CTL_MSEN2_BITS 15:15
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#define PWM_CTL_MSEN2_SET 0x00008000
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#define PWM_CTL_MSEN2_CLR 0xffff7fff
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#define PWM_CTL_MSEN2_MSB 15
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#define PWM_CTL_MSEN2_LSB 15
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#define PWM_CTL_PWEN3_BITS 16:16
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#define PWM_CTL_PWEN3_SET 0x00010000
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#define PWM_CTL_PWEN3_CLR 0xfffeffff
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#define PWM_CTL_PWEN3_MSB 16
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#define PWM_CTL_PWEN3_LSB 16
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#define PWM_CTL_MODE3_BITS 17:17
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#define PWM_CTL_MODE3_SET 0x00020000
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#define PWM_CTL_MODE3_CLR 0xfffdffff
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#define PWM_CTL_MODE3_MSB 17
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#define PWM_CTL_MODE3_LSB 17
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#define PWM_CTL_RPTL3_BITS 18:18
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#define PWM_CTL_RPTL3_SET 0x00040000
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#define PWM_CTL_RPTL3_CLR 0xfffbffff
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#define PWM_CTL_RPTL3_MSB 18
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#define PWM_CTL_RPTL3_LSB 18
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#define PWM_CTL_SBIT3_BITS 19:19
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#define PWM_CTL_SBIT3_SET 0x00080000
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#define PWM_CTL_SBIT3_CLR 0xfff7ffff
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#define PWM_CTL_SBIT3_MSB 19
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#define PWM_CTL_SBIT3_LSB 19
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#define PWM_CTL_POLA3_BITS 20:20
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#define PWM_CTL_POLA3_SET 0x00100000
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#define PWM_CTL_POLA3_CLR 0xffefffff
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#define PWM_CTL_POLA3_MSB 20
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#define PWM_CTL_POLA3_LSB 20
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#define PWM_CTL_USEF3_BITS 21:21
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#define PWM_CTL_USEF3_SET 0x00200000
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#define PWM_CTL_USEF3_CLR 0xffdfffff
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#define PWM_CTL_USEF3_MSB 21
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#define PWM_CTL_USEF3_LSB 21
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#define PWM_CTL_MSEN3_BITS 23:23
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#define PWM_CTL_MSEN3_SET 0x00800000
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#define PWM_CTL_MSEN3_CLR 0xff7fffff
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#define PWM_CTL_MSEN3_MSB 23
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#define PWM_CTL_MSEN3_LSB 23
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#define PWM_CTL_PWEN4_BITS 24:24
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#define PWM_CTL_PWEN4_SET 0x01000000
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#define PWM_CTL_PWEN4_CLR 0xfeffffff
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#define PWM_CTL_PWEN4_MSB 24
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#define PWM_CTL_PWEN4_LSB 24
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#define PWM_CTL_MODE4_BITS 25:25
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#define PWM_CTL_MODE4_SET 0x02000000
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#define PWM_CTL_MODE4_CLR 0xfdffffff
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#define PWM_CTL_MODE4_MSB 25
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#define PWM_CTL_MODE4_LSB 25
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#define PWM_CTL_RPTL4_BITS 26:26
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#define PWM_CTL_RPTL4_SET 0x04000000
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#define PWM_CTL_RPTL4_CLR 0xfbffffff
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#define PWM_CTL_RPTL4_MSB 26
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#define PWM_CTL_RPTL4_LSB 26
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#define PWM_CTL_SBIT4_BITS 27:27
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#define PWM_CTL_SBIT4_SET 0x08000000
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#define PWM_CTL_SBIT4_CLR 0xf7ffffff
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#define PWM_CTL_SBIT4_MSB 27
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#define PWM_CTL_SBIT4_LSB 27
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#define PWM_CTL_POLA4_BITS 28:28
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#define PWM_CTL_POLA4_SET 0x10000000
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#define PWM_CTL_POLA4_CLR 0xefffffff
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#define PWM_CTL_POLA4_MSB 28
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#define PWM_CTL_POLA4_LSB 28
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#define PWM_CTL_USEF4_BITS 29:29
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#define PWM_CTL_USEF4_SET 0x20000000
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#define PWM_CTL_USEF4_CLR 0xdfffffff
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#define PWM_CTL_USEF4_MSB 29
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#define PWM_CTL_USEF4_LSB 29
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#define PWM_CTL_MSEN4_BITS 31:31
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#define PWM_CTL_MSEN4_SET 0x80000000
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#define PWM_CTL_MSEN4_CLR 0x7fffffff
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#define PWM_CTL_MSEN4_MSB 31
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#define PWM_CTL_MSEN4_LSB 31
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#define PWM_STA HW_REGISTER_RW( 0x7e20c004 )
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#define PWM_STA_MASK 0x00001fff
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#define PWM_STA_WIDTH 13
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#define PWM_STA_RESET 0000000000
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#define PWM_STA_FULL1_BITS 0:0
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#define PWM_STA_FULL1_SET 0x00000001
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#define PWM_STA_FULL1_CLR 0xfffffffe
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#define PWM_STA_FULL1_MSB 0
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#define PWM_STA_FULL1_LSB 0
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#define PWM_STA_EMPT1_BITS 1:1
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#define PWM_STA_EMPT1_SET 0x00000002
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#define PWM_STA_EMPT1_CLR 0xfffffffd
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#define PWM_STA_EMPT1_MSB 1
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#define PWM_STA_EMPT1_LSB 1
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#define PWM_STA_WERR1_BITS 2:2
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#define PWM_STA_WERR1_SET 0x00000004
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#define PWM_STA_WERR1_CLR 0xfffffffb
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#define PWM_STA_WERR1_MSB 2
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#define PWM_STA_WERR1_LSB 2
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#define PWM_STA_RERR1_BITS 3:3
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#define PWM_STA_RERR1_SET 0x00000008
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#define PWM_STA_RERR1_CLR 0xfffffff7
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#define PWM_STA_RERR1_MSB 3
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#define PWM_STA_RERR1_LSB 3
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#define PWM_STA_GAPO1_BITS 4:4
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#define PWM_STA_GAPO1_SET 0x00000010
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#define PWM_STA_GAPO1_CLR 0xffffffef
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#define PWM_STA_GAPO1_MSB 4
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#define PWM_STA_GAPO1_LSB 4
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#define PWM_STA_GAPO2_BITS 5:5
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#define PWM_STA_GAPO2_SET 0x00000020
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#define PWM_STA_GAPO2_CLR 0xffffffdf
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#define PWM_STA_GAPO2_MSB 5
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#define PWM_STA_GAPO2_LSB 5
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#define PWM_STA_GAPO3_BITS 6:6
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#define PWM_STA_GAPO3_SET 0x00000040
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#define PWM_STA_GAPO3_CLR 0xffffffbf
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#define PWM_STA_GAPO3_MSB 6
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#define PWM_STA_GAPO3_LSB 6
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#define PWM_STA_GAPO4_BITS 7:7
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#define PWM_STA_GAPO4_SET 0x00000080
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#define PWM_STA_GAPO4_CLR 0xffffff7f
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#define PWM_STA_GAPO4_MSB 7
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#define PWM_STA_GAPO4_LSB 7
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#define PWM_STA_BERR_BITS 8:8
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#define PWM_STA_BERR_SET 0x00000100
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#define PWM_STA_BERR_CLR 0xfffffeff
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#define PWM_STA_BERR_MSB 8
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#define PWM_STA_BERR_LSB 8
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#define PWM_STA_STA1_BITS 9:9
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#define PWM_STA_STA1_SET 0x00000200
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#define PWM_STA_STA1_CLR 0xfffffdff
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#define PWM_STA_STA1_MSB 9
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#define PWM_STA_STA1_LSB 9
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#define PWM_STA_STA2_BITS 10:10
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#define PWM_STA_STA2_SET 0x00000400
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#define PWM_STA_STA2_CLR 0xfffffbff
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#define PWM_STA_STA2_MSB 10
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#define PWM_STA_STA2_LSB 10
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#define PWM_STA_STA3_BITS 11:11
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#define PWM_STA_STA3_SET 0x00000800
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#define PWM_STA_STA3_CLR 0xfffff7ff
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#define PWM_STA_STA3_MSB 11
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#define PWM_STA_STA3_LSB 11
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#define PWM_STA_STA4_BITS 12:12
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#define PWM_STA_STA4_SET 0x00001000
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#define PWM_STA_STA4_CLR 0xffffefff
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#define PWM_STA_STA4_MSB 12
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#define PWM_STA_STA4_LSB 12
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#define PWM_DMAC HW_REGISTER_RW( 0x7e20c008 )
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#define PWM_DMAC_MASK 0x8000ffff
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#define PWM_DMAC_WIDTH 32
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#define PWM_DMAC_RESET 0x00000707
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#define PWM_DMAC_DREQ_BITS 7:0
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#define PWM_DMAC_DREQ_SET 0x000000ff
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#define PWM_DMAC_DREQ_CLR 0xffffff00
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#define PWM_DMAC_DREQ_MSB 7
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#define PWM_DMAC_DREQ_LSB 0
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#define PWM_DMAC_PANIC_BITS 15:8
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#define PWM_DMAC_PANIC_SET 0x0000ff00
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#define PWM_DMAC_PANIC_CLR 0xffff00ff
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#define PWM_DMAC_PANIC_MSB 15
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#define PWM_DMAC_PANIC_LSB 8
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#define PWM_DMAC_ENAB_BITS 31:31
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#define PWM_DMAC_ENAB_SET 0x80000000
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#define PWM_DMAC_ENAB_CLR 0x7fffffff
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#define PWM_DMAC_ENAB_MSB 31
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#define PWM_DMAC_ENAB_LSB 31
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#define PWM_RNG1 HW_REGISTER_RW( 0x7e20c010 )
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#define PWM_RNG1_MASK 0xffffffff
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#define PWM_RNG1_WIDTH 32
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#define PWM_RNG1_RESET 0x00000020
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#define PWM_DAT1 HW_REGISTER_RW( 0x7e20c014 )
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#define PWM_DAT1_MASK 0xffffffff
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#define PWM_DAT1_WIDTH 32
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#define PWM_DAT1_RESET 0000000000
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#define PWM_FIF1 HW_REGISTER_RW( 0x7e20c018 )
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#define PWM_FIF1_MASK 0xffffffff
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#define PWM_FIF1_WIDTH 32
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#define PWM_FIF1_RESET 0000000000
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#define PWM_RNG2 HW_REGISTER_RW( 0x7e20c020 )
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#define PWM_RNG2_MASK 0xffffffff
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#define PWM_RNG2_WIDTH 32
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#define PWM_RNG2_RESET 0x00000020
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#define PWM_DAT2 HW_REGISTER_RW( 0x7e20c024 )
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#define PWM_DAT2_MASK 0xffffffff
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#define PWM_DAT2_WIDTH 32
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#define PWM_DAT2_RESET 0000000000
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#define PWM_RNG3 HW_REGISTER_RW( 0x7e20c030 )
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#define PWM_RNG3_MASK 0000000000
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#define PWM_RNG3_WIDTH 0
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#define PWM_RNG3_RESET 0x00000020
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#define PWM_DAT3 HW_REGISTER_RW( 0x7e20c034 )
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#define PWM_DAT3_MASK 0000000000
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#define PWM_DAT3_WIDTH 0
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#define PWM_DAT3_RESET 0000000000
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#define PWM_RNG4 HW_REGISTER_RW( 0x7e20c040 )
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#define PWM_RNG4_MASK 0000000000
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#define PWM_RNG4_WIDTH 0
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#define PWM_RNG4_RESET 0x00000020
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#define PWM_DAT4 HW_REGISTER_RW( 0x7e20c044 )
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#define PWM_DAT4_MASK 0000000000
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#define PWM_DAT4_WIDTH 0
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#define PWM_DAT4_RESET 0000000000
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