11456 lines
672 KiB
C
Executable File
11456 lines
672 KiB
C
Executable File
/*****************************************************************************
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* *
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* Copyright (c) 2003, 2004, 2005 Broadcom *
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* All Rights Reserved *
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* *
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* Confidential and Proprietary. *
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* The copyright notice above does not evidence any actual or intended *
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* publication. Possession, use, or copying is authorized only pursuant to a *
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* valid written license from Sand Video. *
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* *
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* *
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******************************************************************************/
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/* DO NOT ADD INCLUDE GUARDS TO THIS FILE. IT IS INTENTIONALLY INCLUDED */
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/* MULTIPLE TIMES */
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#define VCMODS_REGMAP
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/* */
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/* THIS IS A DERIVED FILE!!! DO NOT EDIT THIS FILE!! */
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/* */
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/* THIS FILE IS DERIVED FROM .../hw/doc/Register map.xls */
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/* */
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// Function formats:
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// RegFunc(<Region name>, <Region absolute addr>, <Register name>, <Register offset>,
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// <Unique Register name>, <Unique Register absolute addr>)
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// FdFunc(<Unique Register name>, <Field name>, <Field lsb>, <Field width>)
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#ifndef RegAreaFunc
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#define RegAreaFunc(a,b,c)
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#endif
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#ifndef RegFunc
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#define RegFunc(mod, modbase, regname, offset, name, addr)
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#endif
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#ifndef FldFunc
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#define FldFunc(a,b,c,d)
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#endif
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//******************************************************************************
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//
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// Decoder Ring Bus Node
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//
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//******************************************************************************
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#ifndef EXCLUDE_DECODER
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RegAreaFunc(DecodeRbnodeRegsBase, 0x0, 0x7F)
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RegFunc(DecodeRbnodeRegs, 0x0, RbConfig , 0x0, DecRRs_RbConfig , 0x0)
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FldFunc(DecRRs_RbConfig , RdPostEna, 1, 1)
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FldFunc(DecRRs_RbConfig , RdBypEna, 0, 1)
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RegFunc(DecodeRbnodeRegs, 0x0, RbStickyError, 0x4, DecRRs_RbStickyError, 0x4)
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FldFunc(DecRRs_RbStickyError, Node, 1, 1)
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FldFunc(DecRRs_RbStickyError, Tgt, 0, 1)
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RegFunc(DecodeRbnodeRegs, 0x0, RbCurrentError, 0x8, DecRRs_RbCurrentError, 0x8)
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FldFunc(DecRRs_RbCurrentError, Node, 1, 1)
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FldFunc(DecRRs_RbCurrentError, Tgt, 0, 1)
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RegFunc(DecodeRbnodeRegs, 0x0, RbReadData, 0xC, DecRRs_RbReadData, 0xc)
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FldFunc(DecRRs_RbReadData, Data, 0, 32)
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RegAreaFunc(DecodeRingbusDebugRegsBase, 0x80, 0xFF)
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RegFunc(DecodeRingbusDebugRegs, 0x80, RbDebugConfig, 0x0, DecRDRs_RbDebugConfig, 0x80)
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FldFunc(DecRDRs_RbDebugConfig, Addr3WrStat, 15, 1)
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FldFunc(DecRDRs_RbDebugConfig, Addr2WrStat, 14, 1)
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FldFunc(DecRDRs_RbDebugConfig, Addr1WrStat, 13, 1)
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FldFunc(DecRDRs_RbDebugConfig, Addr0WrStat, 12, 1)
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FldFunc(DecRDRs_RbDebugConfig, Addr3RdStat, 11, 1)
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FldFunc(DecRDRs_RbDebugConfig, Addr2RdStat, 10, 1)
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FldFunc(DecRDRs_RbDebugConfig, Addr1RdStat, 9, 1)
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FldFunc(DecRDRs_RbDebugConfig, Addr0RdStat, 8, 1)
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FldFunc(DecRDRs_RbDebugConfig, Addr3WrEna, 7, 1)
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FldFunc(DecRDRs_RbDebugConfig, Addr2WrEna, 6, 1)
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FldFunc(DecRDRs_RbDebugConfig, Addr1WrEna, 5, 1)
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FldFunc(DecRDRs_RbDebugConfig, Addr0WrEna, 4, 1)
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FldFunc(DecRDRs_RbDebugConfig, Addr3RdEna, 3, 1)
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FldFunc(DecRDRs_RbDebugConfig, Addr2RdEna, 2, 1)
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FldFunc(DecRDRs_RbDebugConfig, Addr1RdEna, 1, 1)
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FldFunc(DecRDRs_RbDebugConfig, Addr0RdEna, 0, 1)
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RegFunc(DecodeRingbusDebugRegs, 0x80, RbDebugReg0Addr, 0x4, DecRDRs_RbDebugReg0Addr, 0x84)
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FldFunc(DecRDRs_RbDebugReg0Addr, Addr, 0, 16)
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RegFunc(DecodeRingbusDebugRegs, 0x80, RbDebugReg1Addr, 0x8, DecRDRs_RbDebugReg1Addr, 0x88)
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FldFunc(DecRDRs_RbDebugReg1Addr, Addr, 0, 16)
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RegFunc(DecodeRingbusDebugRegs, 0x80, RbDebugReg2Addr, 0xC, DecRDRs_RbDebugReg2Addr, 0x8c)
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FldFunc(DecRDRs_RbDebugReg2Addr, Addr, 0, 16)
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RegFunc(DecodeRingbusDebugRegs, 0x80, RbDebugReg3Addr, 0x10, DecRDRs_RbDebugReg3Addr, 0x90)
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FldFunc(DecRDRs_RbDebugReg3Addr, Addr, 0, 16)
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RegFunc(DecodeRingbusDebugRegs, 0x80, RbDebugOutputReg, 0x14, DecRDRs_RbDebugOutputReg, 0x94)
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FldFunc(DecRDRs_RbDebugOutputReg, DspRst, 1, 1)
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FldFunc(DecRDRs_RbDebugOutputReg, FmmRst, 0, 1)
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RegAreaFunc(DecodeMainBase, 0x100, 0x1FF)
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RegFunc(DecodeMain, 0x100, RegMainctl, 0x0, DecMn_RegMainctl, 0x100)
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FldFunc(DecMn_RegMainctl, Use2Off, 31, 1)
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FldFunc(DecMn_RegMainctl, QpcOffset2, 24, 5)
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FldFunc(DecMn_RegMainctl, QpcOffset, 16, 5)
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FldFunc(DecMn_RegMainctl, Fls, 15, 1)
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FldFunc(DecMn_RegMainctl, Standard, 7, 3)
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FldFunc(DecMn_RegMainctl, Profile, 4, 3)
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FldFunc(DecMn_RegMainctl, Rst, 0, 1)
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RegFunc(DecodeMain, 0x100, RegFramesize, 0x4, DecMn_RegFramesize, 0x104)
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FldFunc(DecMn_RegFramesize, Lines, 16, 12)
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FldFunc(DecMn_RegFramesize, Pixels, 0, 12)
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RegFunc(DecodeMain, 0x100, RegDecVersion, 0x8, DecMn_RegDecVersion, 0x108)
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FldFunc(DecMn_RegDecVersion, Major, 16, 16)
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FldFunc(DecMn_RegDecVersion, Minor, 8, 8)
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FldFunc(DecMn_RegDecVersion, Fixid, 0, 8)
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RegFunc(DecodeMain, 0x100, RegStatus, 0x10, DecMn_RegStatus, 0x110)
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FldFunc(DecMn_RegStatus, Ixfm, 30, 2)
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FldFunc(DecMn_RegStatus, Spre, 28, 2)
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FldFunc(DecMn_RegStatus, Mcom, 26, 2)
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FldFunc(DecMn_RegStatus, InpbufOverflow, 16, 6)
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FldFunc(DecMn_RegStatus, Output, 12, 2)
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FldFunc(DecMn_RegStatus, Dblk, 10, 2)
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FldFunc(DecMn_RegStatus, Recon, 8, 2)
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RegFunc(DecodeMain, 0x100, RegPmonctl, 0x20, DecMn_RegPmonctl, 0x120)
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FldFunc(DecMn_RegPmonctl, Cnt1Sel, 8, 4)
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FldFunc(DecMn_RegPmonctl, Cnt0Sel, 0, 4)
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RegFunc(DecodeMain, 0x100, RegPmoncnt0, 0x24, DecMn_RegPmoncnt0, 0x124)
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FldFunc(DecMn_RegPmoncnt0, Data, 16, 16)
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FldFunc(DecMn_RegPmoncnt0, Count, 0, 12)
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RegFunc(DecodeMain, 0x100, RegPmoncnt1, 0x28, DecMn_RegPmoncnt1, 0x128)
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FldFunc(DecMn_RegPmoncnt1, Data, 16, 16)
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FldFunc(DecMn_RegPmoncnt1, Count, 0, 12)
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RegFunc(DecodeMain, 0x100, RegPmonMbctl, 0x2C, DecMn_RegPmonMbctl, 0x12c)
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FldFunc(DecMn_RegPmonMbctl, SwPmon, 1, 1)
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FldFunc(DecMn_RegPmonMbctl, Mbctlena, 0, 1)
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RegAreaFunc(SdramDebugBase, 0x200, 0x27F)
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RegFunc(SdramDebug, 0x200, SdDebugConfig , 0x0, SdrDg_SdDebugConfig , 0x200)
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FldFunc(SdrDg_SdDebugConfig , Inv, 0, 1)
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RegFunc(SdramDebug, 0x200, SdDebugStart, 0x4, SdrDg_SdDebugStart, 0x204)
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FldFunc(SdrDg_SdDebugStart, DramAddress, 0, 28)
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RegFunc(SdramDebug, 0x200, SdDebugEnd, 0x8, SdrDg_SdDebugEnd, 0x208)
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FldFunc(SdrDg_SdDebugEnd, DramAddress, 0, 28)
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RegFunc(SdramDebug, 0x200, SdDebugRmask , 0xC, SdrDg_SdDebugRmask , 0x20c)
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FldFunc(SdrDg_SdDebugRmask , Deblock, 11, 1)
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FldFunc(SdrDg_SdDebugRmask , Cabac, 10, 1)
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FldFunc(SdrDg_SdDebugRmask , Iloop, 9, 1)
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FldFunc(SdrDg_SdDebugRmask , Oloop, 8, 1)
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FldFunc(SdrDg_SdDebugRmask , Codein, 7, 1)
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FldFunc(SdrDg_SdDebugRmask , Host, 6, 1)
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FldFunc(SdrDg_SdDebugRmask , Stream, 5, 1)
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FldFunc(SdrDg_SdDebugRmask , Audio, 4, 1)
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FldFunc(SdrDg_SdDebugRmask , VppOutput, 3, 1)
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FldFunc(SdrDg_SdDebugRmask , Mocomp, 2, 1)
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FldFunc(SdrDg_SdDebugRmask , VppFetch, 1, 1)
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RegFunc(SdramDebug, 0x200, SdDebugWmask , 0x10, SdrDg_SdDebugWmask , 0x210)
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FldFunc(SdrDg_SdDebugWmask , Deblock, 11, 1)
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FldFunc(SdrDg_SdDebugWmask , Cabac, 10, 1)
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FldFunc(SdrDg_SdDebugWmask , Iloop, 9, 1)
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FldFunc(SdrDg_SdDebugWmask , Oloop, 8, 1)
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FldFunc(SdrDg_SdDebugWmask , Codein, 7, 1)
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FldFunc(SdrDg_SdDebugWmask , Host, 6, 1)
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FldFunc(SdrDg_SdDebugWmask , Stream, 5, 1)
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FldFunc(SdrDg_SdDebugWmask , Audio, 4, 1)
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FldFunc(SdrDg_SdDebugWmask , VppOutput, 3, 1)
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FldFunc(SdrDg_SdDebugWmask , Mocomp, 2, 1)
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FldFunc(SdrDg_SdDebugWmask , VppFetch, 1, 1)
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RegFunc(SdramDebug, 0x200, SdDebugRstatus , 0x14, SdrDg_SdDebugRstatus , 0x214)
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FldFunc(SdrDg_SdDebugRstatus , Deblock, 11, 1)
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FldFunc(SdrDg_SdDebugRstatus , Cabac, 10, 1)
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FldFunc(SdrDg_SdDebugRstatus , Iloop, 9, 1)
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FldFunc(SdrDg_SdDebugRstatus , Oloop, 8, 1)
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FldFunc(SdrDg_SdDebugRstatus , Codein, 7, 1)
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FldFunc(SdrDg_SdDebugRstatus , Host, 6, 1)
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FldFunc(SdrDg_SdDebugRstatus , Stream, 5, 1)
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FldFunc(SdrDg_SdDebugRstatus , Audio, 4, 1)
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FldFunc(SdrDg_SdDebugRstatus , VppOutput, 3, 1)
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FldFunc(SdrDg_SdDebugRstatus , Mocomp, 2, 1)
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FldFunc(SdrDg_SdDebugRstatus , VppFetch, 1, 1)
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RegFunc(SdramDebug, 0x200, SdDebugWstatus , 0x18, SdrDg_SdDebugWstatus , 0x218)
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FldFunc(SdrDg_SdDebugWstatus , Deblock, 11, 1)
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FldFunc(SdrDg_SdDebugWstatus , Cabac, 10, 1)
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FldFunc(SdrDg_SdDebugWstatus , Iloop, 9, 1)
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FldFunc(SdrDg_SdDebugWstatus , Oloop, 8, 1)
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FldFunc(SdrDg_SdDebugWstatus , Codein, 7, 1)
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FldFunc(SdrDg_SdDebugWstatus , Host, 6, 1)
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FldFunc(SdrDg_SdDebugWstatus , Stream, 5, 1)
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FldFunc(SdrDg_SdDebugWstatus , Audio, 4, 1)
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FldFunc(SdrDg_SdDebugWstatus , VppOutput, 3, 1)
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FldFunc(SdrDg_SdDebugWstatus , Mocomp, 2, 1)
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FldFunc(SdrDg_SdDebugWstatus , VppFetch, 1, 1)
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RegFunc(SdramDebug, 0x200, SdPmonConfig, 0x20, SdrDg_SdPmonConfig, 0x220)
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FldFunc(SdrDg_SdPmonConfig, Eventselbins, 24, 3)
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FldFunc(SdrDg_SdPmonConfig, Eventselport, 16, 4)
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FldFunc(SdrDg_SdPmonConfig, Eventselsize, 3, 1)
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FldFunc(SdrDg_SdPmonConfig, Eventselread, 2, 1)
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FldFunc(SdrDg_SdPmonConfig, Eventdis, 1, 1)
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FldFunc(SdrDg_SdPmonConfig, Sdramdis, 0, 1)
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RegFunc(SdramDebug, 0x200, SdSdramCycles, 0x24, SdrDg_SdSdramCycles, 0x224)
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FldFunc(SdrDg_SdSdramCycles, Count, 0, 24)
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RegFunc(SdramDebug, 0x200, SdSdramIdles, 0x28, SdrDg_SdSdramIdles, 0x228)
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FldFunc(SdrDg_SdSdramIdles, Count, 0, 24)
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RegFunc(SdramDebug, 0x200, SdSdramWrites, 0x2C, SdrDg_SdSdramWrites, 0x22c)
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FldFunc(SdrDg_SdSdramWrites, Count, 0, 24)
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RegFunc(SdramDebug, 0x200, SdSdramReadsa, 0x30, SdrDg_SdSdramReadsa, 0x230)
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FldFunc(SdrDg_SdSdramReadsa, Count, 0, 24)
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RegFunc(SdramDebug, 0x200, SdSdramReadsb, 0x34, SdrDg_SdSdramReadsb, 0x234)
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FldFunc(SdrDg_SdSdramReadsb, Count, 0, 24)
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RegFunc(SdramDebug, 0x200, SdEventCount, 0x40, SdrDg_SdEventCount, 0x240)
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FldFunc(SdrDg_SdEventCount, Events, 0, 24)
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RegFunc(SdramDebug, 0x200, SdEventSum, 0x44, SdrDg_SdEventSum, 0x244)
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FldFunc(SdrDg_SdEventSum, Delay, 0, 24)
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RegFunc(SdramDebug, 0x200, SdEventMax, 0x48, SdrDg_SdEventMax, 0x248)
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FldFunc(SdrDg_SdEventMax, Delay, 0, 24)
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RegFunc(SdramDebug, 0x200, SdEventBin0, 0x60, SdrDg_SdEventBin0, 0x260)
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FldFunc(SdrDg_SdEventBin0, Count, 0, 24)
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RegFunc(SdramDebug, 0x200, SdEventBin1, 0x64, SdrDg_SdEventBin1, 0x264)
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FldFunc(SdrDg_SdEventBin1, Count, 0, 24)
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RegFunc(SdramDebug, 0x200, SdEventBin2, 0x68, SdrDg_SdEventBin2, 0x268)
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FldFunc(SdrDg_SdEventBin2, Count, 0, 24)
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RegFunc(SdramDebug, 0x200, SdEventBin3, 0x6C, SdrDg_SdEventBin3, 0x26c)
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FldFunc(SdrDg_SdEventBin3, Count, 0, 24)
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RegFunc(SdramDebug, 0x200, SdEventBin4, 0x70, SdrDg_SdEventBin4, 0x270)
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FldFunc(SdrDg_SdEventBin4, Count, 0, 24)
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RegFunc(SdramDebug, 0x200, SdEventBin5, 0x74, SdrDg_SdEventBin5, 0x274)
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FldFunc(SdrDg_SdEventBin5, Count, 0, 24)
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RegFunc(SdramDebug, 0x200, SdEventBin6, 0x78, SdrDg_SdEventBin6, 0x278)
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FldFunc(SdrDg_SdEventBin6, Count, 0, 24)
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RegFunc(SdramDebug, 0x200, SdEventBin7, 0x7C, SdrDg_SdEventBin7, 0x27c)
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FldFunc(SdrDg_SdEventBin7, Count, 0, 24)
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RegAreaFunc(DecodeMcomBase, 0x300, 0x31F)
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RegFunc(DecodeMcom, 0x300, RegMcomCtl, 0x0, DecMm_RegMcomCtl, 0x300)
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FldFunc(DecMm_RegMcomCtl, Bintl, 31, 1)
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FldFunc(DecMm_RegMcomCtl, Bref, 24, 7)
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FldFunc(DecMm_RegMcomCtl, Aintl, 23, 1)
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FldFunc(DecMm_RegMcomCtl, Aref, 16, 7)
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FldFunc(DecMm_RegMcomCtl, Subblock, 12, 4)
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FldFunc(DecMm_RegMcomCtl, Bbot, 11, 1)
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FldFunc(DecMm_RegMcomCtl, Bfld, 10, 1)
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FldFunc(DecMm_RegMcomCtl, Abot, 9, 1)
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FldFunc(DecMm_RegMcomCtl, Afld, 8, 1)
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FldFunc(DecMm_RegMcomCtl, Ysize, 6, 2)
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FldFunc(DecMm_RegMcomCtl, Xsize, 4, 2)
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FldFunc(DecMm_RegMcomCtl, Luma, 3, 1)
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FldFunc(DecMm_RegMcomCtl, Filter261, 2, 1)
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FldFunc(DecMm_RegMcomCtl, Mde, 1, 1)
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FldFunc(DecMm_RegMcomCtl, Back, 0, 1)
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RegFunc(DecodeMcom, 0x300, RegMcomSrcA, 0x4, DecMm_RegMcomSrcA, 0x304)
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FldFunc(DecMm_RegMcomSrcA, Ysrc, 16, 16)
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FldFunc(DecMm_RegMcomSrcA, Xsrc, 0, 16)
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RegFunc(DecodeMcom, 0x300, RegMcomSrcB, 0x8, DecMm_RegMcomSrcB, 0x308)
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FldFunc(DecMm_RegMcomSrcB, Ysrc, 16, 16)
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FldFunc(DecMm_RegMcomSrcB, Xsrc, 0, 16)
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RegFunc(DecodeMcom, 0x300, RegWprdVc1Pic, 0xC, DecMm_RegWprdVc1Pic, 0x30c)
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FldFunc(DecMm_RegWprdVc1Pic, 2isoffscrn, 28, 1)
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FldFunc(DecMm_RegWprdVc1Pic, Shift2, 22, 6)
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FldFunc(DecMm_RegWprdVc1Pic, Scale2, 16, 6)
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FldFunc(DecMm_RegWprdVc1Pic, Shift1, 10, 6)
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FldFunc(DecMm_RegWprdVc1Pic, Scale1, 4, 6)
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FldFunc(DecMm_RegWprdVc1Pic, Bicubic, 1, 1)
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FldFunc(DecMm_RegWprdVc1Pic, Rnd, 0, 1)
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RegFunc(DecodeMcom, 0x300, RegWprdVc1BotPic, 0x10, DecMm_RegWprdVc1BotPic, 0x310)
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FldFunc(DecMm_RegWprdVc1BotPic, 2isoffscrn, 28, 1)
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FldFunc(DecMm_RegWprdVc1BotPic, Shift2, 22, 6)
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FldFunc(DecMm_RegWprdVc1BotPic, Scale2, 16, 6)
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FldFunc(DecMm_RegWprdVc1BotPic, Shift1, 10, 6)
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FldFunc(DecMm_RegWprdVc1BotPic, Scale1, 4, 6)
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RegFunc(DecodeMcom, 0x300, RegWprdSel, 0x14, DecMm_RegWprdSel, 0x314)
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FldFunc(DecMm_RegWprdSel, Wt0, 31, 1)
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FldFunc(DecMm_RegWprdSel, A0l1, 30, 1)
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FldFunc(DecMm_RegWprdSel, Vecawtsel0, 25, 5)
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FldFunc(DecMm_RegWprdSel, Vecbwtsel0, 16, 9)
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FldFunc(DecMm_RegWprdSel, Wt1, 15, 1)
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FldFunc(DecMm_RegWprdSel, A1l1, 14, 1)
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FldFunc(DecMm_RegWprdSel, Vecawtsel1, 9, 5)
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FldFunc(DecMm_RegWprdSel, Vecbwtsel1, 0, 9)
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RegFunc(DecodeMcom, 0x300, RegWprdVc1BackPic, 0x18, DecMm_RegWprdVc1BackPic, 0x318)
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FldFunc(DecMm_RegWprdVc1BackPic, Shift1, 10, 6)
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FldFunc(DecMm_RegWprdVc1BackPic, Scale1, 4, 6)
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FldFunc(DecMm_RegWprdVc1BackPic, Bot, 0, 1)
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RegAreaFunc(DecodeSpreBase, 0x320, 0x33F)
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RegFunc(DecodeSpre, 0x320, RegSpreCtl, 0x0, DecSe_RegSpreCtl, 0x320)
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FldFunc(DecSe_RegSpreCtl, Clumode, 16, 2)
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FldFunc(DecSe_RegSpreCtl, Predtype, 8, 2)
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FldFunc(DecSe_RegSpreCtl, CnstIntra, 4, 1)
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FldFunc(DecSe_RegSpreCtl, Ulft, 3, 1)
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FldFunc(DecSe_RegSpreCtl, Top, 2, 1)
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FldFunc(DecSe_RegSpreCtl, Left, 1, 1)
|
|
FldFunc(DecSe_RegSpreCtl, Urt, 0, 1)
|
|
RegFunc(DecodeSpre, 0x320, RegSpreMode, 0x4, DecSe_RegSpreMode, 0x324)
|
|
FldFunc(DecSe_RegSpreMode, Mode7, 28, 4)
|
|
FldFunc(DecSe_RegSpreMode, Mode6, 24, 4)
|
|
FldFunc(DecSe_RegSpreMode, Mode5, 20, 4)
|
|
FldFunc(DecSe_RegSpreMode, Mode4, 16, 4)
|
|
FldFunc(DecSe_RegSpreMode, Mode3, 12, 4)
|
|
FldFunc(DecSe_RegSpreMode, Mode2, 8, 4)
|
|
FldFunc(DecSe_RegSpreMode, Mode1, 4, 4)
|
|
FldFunc(DecSe_RegSpreMode, Mode0, 0, 4)
|
|
|
|
RegAreaFunc(DecodeWprdBase, 0x340, 0x35F)
|
|
RegFunc(DecodeWprd, 0x340, RegWprdCtl, 0x0, DecWd_RegWprdCtl, 0x340)
|
|
FldFunc(DecWd_RegWprdCtl, Chromadenom, 12, 3)
|
|
FldFunc(DecWd_RegWprdCtl, Lumdenom, 8, 3)
|
|
FldFunc(DecWd_RegWprdCtl, Predtype, 0, 2)
|
|
|
|
RegAreaFunc(DecodeDqntBase, 0x400, 0x45F)
|
|
|
|
RegAreaFunc(DecodeDqnt8x8Base, 0x500, 0x57F)
|
|
|
|
RegAreaFunc(DecodeXfrmBase, 0x700, 0x71F)
|
|
RegFunc(DecodeXfrm, 0x700, RegIxfmCtl, 0x0, DecXm_RegIxfmCtl, 0x700)
|
|
FldFunc(DecXm_RegIxfmCtl, Xfm, 30, 2)
|
|
FldFunc(DecXm_RegIxfmCtl, Scan, 29, 1)
|
|
FldFunc(DecXm_RegIxfmCtl, UseQsTab, 28, 1)
|
|
FldFunc(DecXm_RegIxfmCtl, Fld, 26, 1)
|
|
FldFunc(DecXm_RegIxfmCtl, Odd, 25, 1)
|
|
FldFunc(DecXm_RegIxfmCtl, Type, 24, 1)
|
|
FldFunc(DecXm_RegIxfmCtl, Qpy, 16, 7)
|
|
|
|
//----------------------------------------------------------------------
|
|
// DecXm_RegIxfmCtl
|
|
//----------------------------------------------------------------------
|
|
// #define OVERLAPTXM_BIT_SHIFT bit12
|
|
FldFunc(DecXm_RegIxfmCtl, OverlaptxmBitShift, 12, 1)
|
|
|
|
FldFunc(DecXm_RegIxfmCtl, Nonuniform, 11, 1)
|
|
FldFunc(DecXm_RegIxfmCtl, Acpred, 10, 1)
|
|
FldFunc(DecXm_RegIxfmCtl, Halfqp, 9, 1)
|
|
FldFunc(DecXm_RegIxfmCtl, Topavail, 8, 1)
|
|
FldFunc(DecXm_RegIxfmCtl, Cbp, 0, 5)
|
|
RegFunc(DecodeXfrm, 0x700, RegIxfmCoef, 0x4, DecXm_RegIxfmCoef, 0x704)
|
|
FldFunc(DecXm_RegIxfmCoef, Run0, 28, 4)
|
|
FldFunc(DecXm_RegIxfmCoef, Coef0, 16, 12)
|
|
FldFunc(DecXm_RegIxfmCoef, Run1, 12, 4)
|
|
FldFunc(DecXm_RegIxfmCoef, Coef1, 0, 12)
|
|
RegFunc(DecodeXfrm, 0x700, RegIxfmPcm, 0xC, DecXm_RegIxfmPcm, 0x70c)
|
|
FldFunc(DecXm_RegIxfmPcm, Pixel0, 24, 8)
|
|
FldFunc(DecXm_RegIxfmPcm, Pixel1, 16, 8)
|
|
FldFunc(DecXm_RegIxfmPcm, Pixel2, 8, 8)
|
|
FldFunc(DecXm_RegIxfmPcm, Pixel3, 0, 8)
|
|
RegFunc(DecodeXfrm, 0x700, RegIxfm264CoefNorun, 0x10, DecXm_RegIxfm264CoefNorun, 0x710)
|
|
FldFunc(DecXm_RegIxfm264CoefNorun, Coef1, 16, 16)
|
|
FldFunc(DecXm_RegIxfm264CoefNorun, Coef0, 0, 16)
|
|
RegFunc(DecodeXfrm, 0x700, RegIxfmBlkSize, 0x14, DecXm_RegIxfmBlkSize, 0x714)
|
|
FldFunc(DecXm_RegIxfmBlkSize, Intra, 2, 1)
|
|
FldFunc(DecXm_RegIxfmBlkSize, Size, 0, 2)
|
|
|
|
RegAreaFunc(DecodeDblkBase, 0x720, 0x73F)
|
|
RegFunc(DecodeDblk, 0x720, RegDblkCtl, 0x0, DecDk_RegDblkCtl, 0x720)
|
|
FldFunc(DecDk_RegDblkCtl, Mpeg, 8, 1)
|
|
FldFunc(DecDk_RegDblkCtl, H2648x8, 7, 1)
|
|
FldFunc(DecDk_RegDblkCtl, Mono, 6, 1)
|
|
FldFunc(DecDk_RegDblkCtl, IsLast, 5, 1)
|
|
FldFunc(DecDk_RegDblkCtl, Intra, 4, 1)
|
|
FldFunc(DecDk_RegDblkCtl, Fleft, 3, 1)
|
|
FldFunc(DecDk_RegDblkCtl, Ftop, 2, 1)
|
|
FldFunc(DecDk_RegDblkCtl, Fint, 1, 1)
|
|
FldFunc(DecDk_RegDblkCtl, Ces, 0, 1)
|
|
RegFunc(DecodeDblk, 0x720, RegDblkOut, 0x4, DecDk_RegDblkOut, 0x724)
|
|
FldFunc(DecDk_RegDblkOut, Out2, 16, 1)
|
|
FldFunc(DecDk_RegDblkOut, Picnum2, 8, 8)
|
|
FldFunc(DecDk_RegDblkOut, Picnum, 0, 8)
|
|
RegFunc(DecodeDblk, 0x720, RegOlapXform, 0x8, DecDk_RegOlapXform, 0x728)
|
|
FldFunc(DecDk_RegOlapXform, Topvintra, 29, 1)
|
|
FldFunc(DecDk_RegOlapXform, Topuintra, 28, 1)
|
|
FldFunc(DecDk_RegOlapXform, Toplintra, 24, 4)
|
|
FldFunc(DecDk_RegOlapXform, Vintra, 21, 1)
|
|
FldFunc(DecDk_RegOlapXform, Uintra, 20, 1)
|
|
FldFunc(DecDk_RegOlapXform, Lumaintra, 16, 4)
|
|
FldFunc(DecDk_RegOlapXform, Vv, 11, 1)
|
|
FldFunc(DecDk_RegOlapXform, Vh, 10, 1)
|
|
FldFunc(DecDk_RegOlapXform, Uv, 9, 1)
|
|
FldFunc(DecDk_RegOlapXform, Uh, 8, 1)
|
|
FldFunc(DecDk_RegOlapXform, Lumavert, 4, 4)
|
|
FldFunc(DecDk_RegOlapXform, Lumahoriz, 0, 4)
|
|
RegFunc(DecodeDblk, 0x720, RegDblkQnt, 0xC, DecDk_RegDblkQnt, 0x72c)
|
|
FldFunc(DecDk_RegDblkQnt, Opvtoptop, 16, 8)
|
|
FldFunc(DecDk_RegDblkQnt, Opvtop, 8, 8)
|
|
FldFunc(DecDk_RegDblkQnt, Opv, 0, 8)
|
|
RegFunc(DecodeDblk, 0x720, RegDblkOffset, 0x10, DecDk_RegDblkOffset, 0x730)
|
|
FldFunc(DecDk_RegDblkOffset, Offsetb, 8, 8)
|
|
FldFunc(DecDk_RegDblkOffset, Offseta, 0, 8)
|
|
RegFunc(DecodeDblk, 0x720, RegDblkTopCtx, 0x14, DecDk_RegDblkTopCtx, 0x734)
|
|
FldFunc(DecDk_RegDblkTopCtx, Tb15, 21, 1)
|
|
FldFunc(DecDk_RegDblkTopCtx, Tb14, 20, 1)
|
|
FldFunc(DecDk_RegDblkTopCtx, Tb11, 19, 1)
|
|
FldFunc(DecDk_RegDblkTopCtx, Tb10, 18, 1)
|
|
FldFunc(DecDk_RegDblkTopCtx, Tintra, 16, 1)
|
|
FldFunc(DecDk_RegDblkTopCtx, B15, 5, 1)
|
|
FldFunc(DecDk_RegDblkTopCtx, B14, 4, 1)
|
|
FldFunc(DecDk_RegDblkTopCtx, B11, 3, 1)
|
|
FldFunc(DecDk_RegDblkTopCtx, B10, 2, 1)
|
|
FldFunc(DecDk_RegDblkTopCtx, Field, 1, 1)
|
|
FldFunc(DecDk_RegDblkTopCtx, Intra, 0, 1)
|
|
RegFunc(DecodeDblk, 0x720, RegDblkXzero, 0x18, DecDk_RegDblkXzero, 0x738)
|
|
FldFunc(DecDk_RegDblkXzero, B15, 15, 1)
|
|
FldFunc(DecDk_RegDblkXzero, B14, 14, 1)
|
|
FldFunc(DecDk_RegDblkXzero, B13, 13, 1)
|
|
FldFunc(DecDk_RegDblkXzero, B12, 12, 1)
|
|
FldFunc(DecDk_RegDblkXzero, B11, 11, 1)
|
|
FldFunc(DecDk_RegDblkXzero, B10, 10, 1)
|
|
FldFunc(DecDk_RegDblkXzero, B9, 9, 1)
|
|
FldFunc(DecDk_RegDblkXzero, B8, 8, 1)
|
|
FldFunc(DecDk_RegDblkXzero, B7, 7, 1)
|
|
FldFunc(DecDk_RegDblkXzero, B6, 6, 1)
|
|
FldFunc(DecDk_RegDblkXzero, B5, 5, 1)
|
|
FldFunc(DecDk_RegDblkXzero, B4, 4, 1)
|
|
FldFunc(DecDk_RegDblkXzero, B3, 3, 1)
|
|
FldFunc(DecDk_RegDblkXzero, B2, 2, 1)
|
|
FldFunc(DecDk_RegDblkXzero, B1, 1, 1)
|
|
FldFunc(DecDk_RegDblkXzero, B0, 0, 1)
|
|
RegFunc(DecodeDblk, 0x720, RegDblkMvdiff, 0x1C, DecDk_RegDblkMvdiff, 0x73c)
|
|
FldFunc(DecDk_RegDblkMvdiff, V15, 31, 1)
|
|
FldFunc(DecDk_RegDblkMvdiff, V14, 30, 1)
|
|
FldFunc(DecDk_RegDblkMvdiff, V13, 29, 1)
|
|
FldFunc(DecDk_RegDblkMvdiff, V12, 28, 1)
|
|
FldFunc(DecDk_RegDblkMvdiff, V11, 27, 1)
|
|
FldFunc(DecDk_RegDblkMvdiff, V10, 26, 1)
|
|
FldFunc(DecDk_RegDblkMvdiff, V9, 25, 1)
|
|
FldFunc(DecDk_RegDblkMvdiff, V8, 24, 1)
|
|
FldFunc(DecDk_RegDblkMvdiff, V7, 23, 1)
|
|
FldFunc(DecDk_RegDblkMvdiff, V6, 22, 1)
|
|
FldFunc(DecDk_RegDblkMvdiff, V5, 21, 1)
|
|
FldFunc(DecDk_RegDblkMvdiff, V4, 20, 1)
|
|
FldFunc(DecDk_RegDblkMvdiff, V3, 19, 1)
|
|
FldFunc(DecDk_RegDblkMvdiff, V2, 18, 1)
|
|
FldFunc(DecDk_RegDblkMvdiff, V1, 17, 1)
|
|
FldFunc(DecDk_RegDblkMvdiff, V0, 16, 1)
|
|
FldFunc(DecDk_RegDblkMvdiff, H15, 15, 1)
|
|
FldFunc(DecDk_RegDblkMvdiff, H14, 14, 1)
|
|
FldFunc(DecDk_RegDblkMvdiff, H13, 13, 1)
|
|
FldFunc(DecDk_RegDblkMvdiff, H12, 12, 1)
|
|
FldFunc(DecDk_RegDblkMvdiff, H11, 11, 1)
|
|
FldFunc(DecDk_RegDblkMvdiff, H10, 10, 1)
|
|
FldFunc(DecDk_RegDblkMvdiff, H9, 9, 1)
|
|
FldFunc(DecDk_RegDblkMvdiff, H8, 8, 1)
|
|
FldFunc(DecDk_RegDblkMvdiff, H7, 7, 1)
|
|
FldFunc(DecDk_RegDblkMvdiff, H6, 6, 1)
|
|
FldFunc(DecDk_RegDblkMvdiff, H5, 5, 1)
|
|
FldFunc(DecDk_RegDblkMvdiff, H4, 4, 1)
|
|
FldFunc(DecDk_RegDblkMvdiff, H3, 3, 1)
|
|
FldFunc(DecDk_RegDblkMvdiff, H2, 2, 1)
|
|
FldFunc(DecDk_RegDblkMvdiff, H1, 1, 1)
|
|
FldFunc(DecDk_RegDblkMvdiff, H0, 0, 1)
|
|
|
|
RegAreaFunc(DecodeMbBase, 0x740, 0x75F)
|
|
RegFunc(DecodeMb, 0x740, RegMbCtl, 0x0, DecMb_RegMbCtl, 0x740)
|
|
FldFunc(DecMb_RegMbCtl, Fcm, 26, 2)
|
|
FldFunc(DecMb_RegMbCtl, Type, 24, 2)
|
|
FldFunc(DecMb_RegMbCtl, Mbaff, 18, 1)
|
|
FldFunc(DecMb_RegMbCtl, Top, 17, 1)
|
|
FldFunc(DecMb_RegMbCtl, Fld, 16, 1)
|
|
FldFunc(DecMb_RegMbCtl, Ydestmb, 8, 7)
|
|
FldFunc(DecMb_RegMbCtl, Rv, 7, 1)
|
|
FldFunc(DecMb_RegMbCtl, Xdestmb, 0, 7)
|
|
|
|
RegAreaFunc(DecodeIpShimBase, 0x60000, 0x6002F)
|
|
RegFunc(DecodeIpShim, 0x60000, Stc0Reg, 0x0, DecISm_Stc0Reg, 0x60000)
|
|
FldFunc(DecISm_Stc0Reg, Stc, 0, 32)
|
|
RegFunc(DecodeIpShim, 0x60000, Stc1Reg, 0x4, DecISm_Stc1Reg, 0x60004)
|
|
FldFunc(DecISm_Stc1Reg, Stc, 0, 32)
|
|
RegFunc(DecodeIpShim, 0x60000, EndianReg, 0x8, DecISm_EndianReg, 0x60008)
|
|
FldFunc(DecISm_EndianReg, B1l0, 0, 1)
|
|
RegFunc(DecodeIpShim, 0x60000, BvnIntReg, 0xC, DecISm_BvnIntReg, 0x6000c)
|
|
FldFunc(DecISm_BvnIntReg, Desc, 1, 1)
|
|
FldFunc(DecISm_BvnIntReg, Trigger, 0, 1)
|
|
RegFunc(DecodeIpShim, 0x60000, CpuId, 0x10, DecISm_CpuId, 0x60010)
|
|
FldFunc(DecISm_CpuId, CpuId, 0, 8)
|
|
RegFunc(DecodeIpShim, 0x60000, RbusPageReg, 0x14, DecISm_RbusPageReg, 0x60014)
|
|
FldFunc(DecISm_RbusPageReg, PageNum, 0, 32)
|
|
RegFunc(DecodeIpShim, 0x60000, PfriReg, 0x18, DecISm_PfriReg, 0x60018)
|
|
FldFunc(DecISm_PfriReg, PfriError, 16, 1)
|
|
FldFunc(DecISm_PfriReg, RstRdPtr, 2, 1)
|
|
FldFunc(DecISm_PfriReg, RstWrPtr, 1, 1)
|
|
FldFunc(DecISm_PfriReg, RstPfriError, 0, 1)
|
|
RegFunc(DecodeIpShim, 0x60000, ScbReg, 0x1C, DecISm_ScbReg, 0x6001c)
|
|
RegFunc(DecodeIpShim, 0x60000, ScbPageReg, 0x20, DecISm_ScbPageReg, 0x60020)
|
|
FldFunc(DecISm_ScbPageReg, Ena, 31, 1)
|
|
FldFunc(DecISm_ScbPageReg, PageVal, 0, 29)
|
|
RegFunc(DecodeIpShim, 0x60000, PfriPageReg, 0x24, DecISm_PfriPageReg, 0x60024)
|
|
FldFunc(DecISm_PfriPageReg, Ena, 31, 1)
|
|
FldFunc(DecISm_PfriPageReg, PageVal, 0, 30)
|
|
RegFunc(DecodeIpShim, 0x60000, IntPageReg, 0x28, DecISm_IntPageReg, 0x60028)
|
|
FldFunc(DecISm_IntPageReg, PageVal, 2, 30)
|
|
FldFunc(DecISm_IntPageReg, Ena, 1, 1)
|
|
FldFunc(DecISm_IntPageReg, Id, 0, 1)
|
|
RegFunc(DecodeIpShim, 0x60000, DbPageReg, 0x2C, DecISm_DbPageReg, 0x6002c)
|
|
FldFunc(DecISm_DbPageReg, Ena, 31, 1)
|
|
FldFunc(DecISm_DbPageReg, PageVal, 0, 29)
|
|
|
|
RegAreaFunc(DecodeCinABase, 0xA00, 0xA1F)
|
|
RegFunc(DecodeCinA, 0xA00, RegCinCtl, 0x0, DecCA_RegCinCtl, 0xa00)
|
|
FldFunc(DecCA_RegCinCtl, Emu, 1, 1)
|
|
FldFunc(DecCA_RegCinCtl, Ena, 0, 1)
|
|
RegFunc(DecodeCinA, 0xA00, RegCinWrPtr, 0x4, DecCA_RegCinWrPtr, 0xa04)
|
|
FldFunc(DecCA_RegCinWrPtr, Wrptr, 5, 27)
|
|
RegFunc(DecodeCinA, 0xA00, RegCinRdPtr, 0x8, DecCA_RegCinRdPtr, 0xa08)
|
|
FldFunc(DecCA_RegCinRdPtr, Rdptr, 5, 27)
|
|
RegFunc(DecodeCinA, 0xA00, RegCinBase, 0xC, DecCA_RegCinBase, 0xa0c)
|
|
FldFunc(DecCA_RegCinBase, Base, 6, 26)
|
|
RegFunc(DecodeCinA, 0xA00, RegCinEnd, 0x10, DecCA_RegCinEnd, 0xa10)
|
|
FldFunc(DecCA_RegCinEnd, End, 6, 26)
|
|
RegFunc(DecodeCinA, 0xA00, RegCinChannel, 0x14, DecCA_RegCinChannel, 0xa14)
|
|
FldFunc(DecCA_RegCinChannel, Channel, 0, 4)
|
|
RegFunc(DecodeCinA, 0xA00, RegCinChannelCtl, 0x18, DecCA_RegCinChannelCtl, 0xa18)
|
|
FldFunc(DecCA_RegCinChannelCtl, Emul, 1, 1)
|
|
FldFunc(DecCA_RegCinChannelCtl, Ena, 0, 1)
|
|
|
|
RegAreaFunc(DecodeCinBBase, 0xA20, 0xA3F)
|
|
RegFunc(DecodeCinB, 0xA20, RegCinCtl, 0x0, DecCB_RegCinCtl, 0xa20)
|
|
FldFunc(DecCB_RegCinCtl, Emu, 1, 1)
|
|
FldFunc(DecCB_RegCinCtl, Ena, 0, 1)
|
|
RegFunc(DecodeCinB, 0xA20, RegCinWrPtr, 0x4, DecCB_RegCinWrPtr, 0xa24)
|
|
FldFunc(DecCB_RegCinWrPtr, Wrptr, 5, 27)
|
|
RegFunc(DecodeCinB, 0xA20, RegCinRdPtr, 0x8, DecCB_RegCinRdPtr, 0xa28)
|
|
FldFunc(DecCB_RegCinRdPtr, Rdptr, 5, 27)
|
|
RegFunc(DecodeCinB, 0xA20, RegCinBase, 0xC, DecCB_RegCinBase, 0xa2c)
|
|
FldFunc(DecCB_RegCinBase, Base, 6, 26)
|
|
RegFunc(DecodeCinB, 0xA20, RegCinEnd, 0x10, DecCB_RegCinEnd, 0xa30)
|
|
FldFunc(DecCB_RegCinEnd, End, 6, 26)
|
|
RegFunc(DecodeCinB, 0xA20, RegCinChannel, 0x14, DecCB_RegCinChannel, 0xa34)
|
|
FldFunc(DecCB_RegCinChannel, Channel, 0, 4)
|
|
RegFunc(DecodeCinB, 0xA20, RegCinChannelCtl, 0x18, DecCB_RegCinChannelCtl, 0xa38)
|
|
FldFunc(DecCB_RegCinChannelCtl, Emul, 1, 1)
|
|
FldFunc(DecCB_RegCinChannelCtl, Ena, 0, 1)
|
|
|
|
RegAreaFunc(RegCabac2binsBase, 0xB00, 0xBFF)
|
|
RegFunc(RegCabac2bins, 0xB00, RegCabac2binsImgCtxLast, 0xBC, RegCs_RegCabac2binsImgCtxLast, 0xbbc)
|
|
FldFunc(RegCs_RegCabac2binsImgCtxLast, Ctxlast, 0, 9)
|
|
RegFunc(RegCabac2bins, 0xB00, RegCabac2binsRdContextBaseAddr, 0xD0, RegCs_RegCabac2binsRdContextBaseAddr, 0xbd0)
|
|
FldFunc(RegCs_RegCabac2binsRdContextBaseAddr, Addr, 0, 32)
|
|
RegFunc(RegCabac2bins, 0xB00, RegCabac2binsWrContextBaseAddr, 0xD4, RegCs_RegCabac2binsWrContextBaseAddr, 0xbd4)
|
|
FldFunc(RegCs_RegCabac2binsWrContextBaseAddr, Addr, 0, 32)
|
|
|
|
RegAreaFunc(DecodeSintBase, 0xC00, 0xDFF)
|
|
RegFunc(DecodeSint, 0xC00, RegSintDmaAddr, 0x0, DecSt_RegSintDmaAddr, 0xc00)
|
|
FldFunc(DecSt_RegSintDmaAddr, Addr, 5, 27)
|
|
RegFunc(DecodeSint, 0xC00, RegSintDmaLen, 0x4, DecSt_RegSintDmaLen, 0xc04)
|
|
FldFunc(DecSt_RegSintDmaLen, Length, 5, 27)
|
|
RegFunc(DecodeSint, 0xC00, RegSintDmaBase, 0x8, DecSt_RegSintDmaBase, 0xc08)
|
|
FldFunc(DecSt_RegSintDmaBase, Base, 6, 26)
|
|
RegFunc(DecodeSint, 0xC00, RegSintDmaEnd, 0xC, DecSt_RegSintDmaEnd, 0xc0c)
|
|
FldFunc(DecSt_RegSintDmaEnd, End, 6, 26)
|
|
RegFunc(DecodeSint, 0xC00, RegSintStrmPos, 0x10, DecSt_RegSintStrmPos, 0xc10)
|
|
FldFunc(DecSt_RegSintStrmPos, BitPos, 0, 32)
|
|
RegFunc(DecodeSint, 0xC00, RegSintStrmStat, 0x14, DecSt_RegSintStrmStat, 0xc14)
|
|
FldFunc(DecSt_RegSintStrmStat, Rst, 16, 1)
|
|
FldFunc(DecSt_RegSintStrmStat, MvdAvail, 10, 1)
|
|
FldFunc(DecSt_RegSintStrmStat, Derr, 9, 1)
|
|
FldFunc(DecSt_RegSintStrmStat, Serr, 8, 1)
|
|
FldFunc(DecSt_RegSintStrmStat, Ccac, 6, 1)
|
|
FldFunc(DecSt_RegSintStrmStat, Vcac, 5, 1)
|
|
FldFunc(DecSt_RegSintStrmStat, Vact, 4, 1)
|
|
FldFunc(DecSt_RegSintStrmStat, Dact, 3, 1)
|
|
FldFunc(DecSt_RegSintStrmStat, Sact, 2, 1)
|
|
FldFunc(DecSt_RegSintStrmStat, Cact, 1, 1)
|
|
FldFunc(DecSt_RegSintStrmStat, Sval, 0, 1)
|
|
RegFunc(DecodeSint, 0xC00, RegSintIena, 0x18, DecSt_RegSintIena, 0xc18)
|
|
FldFunc(DecSt_RegSintIena, Derr, 9, 1)
|
|
FldFunc(DecSt_RegSintIena, Serr, 8, 1)
|
|
RegFunc(DecodeSint, 0xC00, RegSintStrmBits, 0x1C, DecSt_RegSintStrmBits, 0xc1c)
|
|
FldFunc(DecSt_RegSintStrmBits, StreamBits, 0, 32)
|
|
RegFunc(DecodeSint, 0xC00, RegSintGetSymb, 0x20, DecSt_RegSintGetSymb, 0xc20)
|
|
FldFunc(DecSt_RegSintGetSymb, Type, 12, 4)
|
|
FldFunc(DecSt_RegSintGetSymb, Subtype, 8, 4)
|
|
FldFunc(DecSt_RegSintGetSymb, N, 0, 8)
|
|
RegFunc(DecodeSint, 0xC00, RegSintMpegDc, 0x24, DecSt_RegSintMpegDc, 0xc24)
|
|
FldFunc(DecSt_RegSintMpegDc, Comp, 12, 2)
|
|
FldFunc(DecSt_RegSintMpegDc, DcPred, 0, 12)
|
|
RegFunc(DecodeSint, 0xC00, RegSintDoResid, 0x28, DecSt_RegSintDoResid, 0xc28)
|
|
FldFunc(DecSt_RegSintDoResid, Type, 14, 2)
|
|
FldFunc(DecSt_RegSintDoResid, Subtype, 12, 2)
|
|
FldFunc(DecSt_RegSintDoResid, Wrxnzero, 10, 1)
|
|
FldFunc(DecSt_RegSintDoResid, Dcprecision, 8, 2)
|
|
FldFunc(DecSt_RegSintDoResid, Vlctable1, 7, 1)
|
|
FldFunc(DecSt_RegSintDoResid, Intra, 6, 1)
|
|
FldFunc(DecSt_RegSintDoResid, Cbp, 0, 6)
|
|
RegFunc(DecodeSint, 0xC00, RegSintXnzero, 0x2C, DecSt_RegSintXnzero, 0xc2c)
|
|
FldFunc(DecSt_RegSintXnzero, B15, 15, 1)
|
|
FldFunc(DecSt_RegSintXnzero, B14, 14, 1)
|
|
FldFunc(DecSt_RegSintXnzero, B13, 13, 1)
|
|
FldFunc(DecSt_RegSintXnzero, B12, 12, 1)
|
|
FldFunc(DecSt_RegSintXnzero, B11, 11, 1)
|
|
FldFunc(DecSt_RegSintXnzero, B10, 10, 1)
|
|
FldFunc(DecSt_RegSintXnzero, B9, 9, 1)
|
|
FldFunc(DecSt_RegSintXnzero, B8, 8, 1)
|
|
FldFunc(DecSt_RegSintXnzero, B7, 7, 1)
|
|
FldFunc(DecSt_RegSintXnzero, B6, 6, 1)
|
|
FldFunc(DecSt_RegSintXnzero, B5, 5, 1)
|
|
FldFunc(DecSt_RegSintXnzero, B4, 4, 1)
|
|
FldFunc(DecSt_RegSintXnzero, B3, 3, 1)
|
|
FldFunc(DecSt_RegSintXnzero, B2, 2, 1)
|
|
FldFunc(DecSt_RegSintXnzero, B1, 1, 1)
|
|
FldFunc(DecSt_RegSintXnzero, B0, 0, 1)
|
|
RegFunc(DecodeSint, 0xC00, RegSintVecMbtype, 0x30, DecSt_RegSintVecMbtype, 0xc30)
|
|
FldFunc(DecSt_RegSintVecMbtype, Submbtype3, 21, 4)
|
|
FldFunc(DecSt_RegSintVecMbtype, Submbtype2, 16, 4)
|
|
FldFunc(DecSt_RegSintVecMbtype, Submbtype1, 11, 4)
|
|
FldFunc(DecSt_RegSintVecMbtype, Submbtype0, 6, 4)
|
|
FldFunc(DecSt_RegSintVecMbtype, Mbtype, 1, 5)
|
|
FldFunc(DecSt_RegSintVecMbtype, Isb, 0, 1)
|
|
RegFunc(DecodeSint, 0xC00, RegSintVecRegstart, 0x30, DecSt_RegSintVecRegstart, 0xc30)
|
|
RegFunc(DecodeSint, 0xC00, RegSintVecResid, 0x34, DecSt_RegSintVecResid, 0xc34)
|
|
FldFunc(DecSt_RegSintVecResid, YResidual, 16, 16)
|
|
FldFunc(DecSt_RegSintVecResid, XResidual, 0, 16)
|
|
RegFunc(DecodeSint, 0xC00, RegSintVecDmode, 0x38, DecSt_RegSintVecDmode, 0xc38)
|
|
FldFunc(DecSt_RegSintVecDmode, Dmode, 0, 4)
|
|
RegFunc(DecodeSint, 0xC00, RegSintVecTopLd, 0x3C, DecSt_RegSintVecTopLd, 0xc3c)
|
|
FldFunc(DecSt_RegSintVecTopLd, TopRow, 30, 2)
|
|
FldFunc(DecSt_RegSintVecTopLd, TtropOffset, 16, 8)
|
|
FldFunc(DecSt_RegSintVecTopLd, UrtOffset, 8, 8)
|
|
FldFunc(DecSt_RegSintVecTopLd, TopOffest, 0, 8)
|
|
RegFunc(DecodeSint, 0xC00, RegSintVecDoConst, 0x40, DecSt_RegSintVecDoConst, 0xc40)
|
|
FldFunc(DecSt_RegSintVecDoConst, Mvdiff, 9, 1)
|
|
FldFunc(DecSt_RegSintVecDoConst, Rolt, 8, 1)
|
|
FldFunc(DecSt_RegSintVecDoConst, Lcpy, 7, 1)
|
|
FldFunc(DecSt_RegSintVecDoConst, Ulfld, 6, 1)
|
|
FldFunc(DecSt_RegSintVecDoConst, Pskip, 5, 1)
|
|
FldFunc(DecSt_RegSintVecDoConst, Intra, 4, 1)
|
|
RegFunc(DecodeSint, 0xC00, RegSintVecMvdiff, 0x44, DecSt_RegSintVecMvdiff, 0xc44)
|
|
FldFunc(DecSt_RegSintVecMvdiff, V15, 31, 1)
|
|
FldFunc(DecSt_RegSintVecMvdiff, V14, 30, 1)
|
|
FldFunc(DecSt_RegSintVecMvdiff, V13, 29, 1)
|
|
FldFunc(DecSt_RegSintVecMvdiff, V12, 28, 1)
|
|
FldFunc(DecSt_RegSintVecMvdiff, V11, 27, 1)
|
|
FldFunc(DecSt_RegSintVecMvdiff, V10, 26, 1)
|
|
FldFunc(DecSt_RegSintVecMvdiff, V9, 25, 1)
|
|
FldFunc(DecSt_RegSintVecMvdiff, V8, 24, 1)
|
|
FldFunc(DecSt_RegSintVecMvdiff, V7, 23, 1)
|
|
FldFunc(DecSt_RegSintVecMvdiff, V6, 22, 1)
|
|
FldFunc(DecSt_RegSintVecMvdiff, V5, 21, 1)
|
|
FldFunc(DecSt_RegSintVecMvdiff, V4, 20, 1)
|
|
FldFunc(DecSt_RegSintVecMvdiff, V3, 19, 1)
|
|
FldFunc(DecSt_RegSintVecMvdiff, V2, 18, 1)
|
|
FldFunc(DecSt_RegSintVecMvdiff, V1, 17, 1)
|
|
FldFunc(DecSt_RegSintVecMvdiff, V0, 16, 1)
|
|
FldFunc(DecSt_RegSintVecMvdiff, H15, 15, 1)
|
|
FldFunc(DecSt_RegSintVecMvdiff, H14, 14, 1)
|
|
FldFunc(DecSt_RegSintVecMvdiff, H13, 13, 1)
|
|
FldFunc(DecSt_RegSintVecMvdiff, H12, 12, 1)
|
|
FldFunc(DecSt_RegSintVecMvdiff, H11, 11, 1)
|
|
FldFunc(DecSt_RegSintVecMvdiff, H10, 10, 1)
|
|
FldFunc(DecSt_RegSintVecMvdiff, H9, 9, 1)
|
|
FldFunc(DecSt_RegSintVecMvdiff, H8, 8, 1)
|
|
FldFunc(DecSt_RegSintVecMvdiff, H7, 7, 1)
|
|
FldFunc(DecSt_RegSintVecMvdiff, H6, 6, 1)
|
|
FldFunc(DecSt_RegSintVecMvdiff, H5, 5, 1)
|
|
FldFunc(DecSt_RegSintVecMvdiff, H4, 4, 1)
|
|
FldFunc(DecSt_RegSintVecMvdiff, H3, 3, 1)
|
|
FldFunc(DecSt_RegSintVecMvdiff, H2, 2, 1)
|
|
FldFunc(DecSt_RegSintVecMvdiff, H1, 1, 1)
|
|
FldFunc(DecSt_RegSintVecMvdiff, H0, 0, 1)
|
|
RegFunc(DecodeSint, 0xC00, RegSintVecRefidx, 0x48, DecSt_RegSintVecRefidx, 0xc48)
|
|
FldFunc(DecSt_RegSintVecRefidx, Refidx3, 24, 6)
|
|
FldFunc(DecSt_RegSintVecRefidx, Refidx2, 16, 6)
|
|
FldFunc(DecSt_RegSintVecRefidx, Refidx1, 8, 6)
|
|
FldFunc(DecSt_RegSintVecRefidx, Refidx0, 0, 6)
|
|
RegFunc(DecodeSint, 0xC00, RegSintVecTopref, 0x4C, DecSt_RegSintVecTopref, 0xc4c)
|
|
FldFunc(DecSt_RegSintVecTopref, L1refb1, 24, 8)
|
|
FldFunc(DecSt_RegSintVecTopref, L1refb0, 16, 8)
|
|
FldFunc(DecSt_RegSintVecTopref, L0refb1, 8, 8)
|
|
FldFunc(DecSt_RegSintVecTopref, L0refb0, 0, 8)
|
|
RegFunc(DecodeSint, 0xC00, RegSintVecToppic, 0x5C, DecSt_RegSintVecToppic, 0xc5c)
|
|
FldFunc(DecSt_RegSintVecToppic, L1picb1, 24, 8)
|
|
FldFunc(DecSt_RegSintVecToppic, L1picb0, 16, 8)
|
|
FldFunc(DecSt_RegSintVecToppic, L0picb1, 8, 8)
|
|
FldFunc(DecSt_RegSintVecToppic, L0picb0, 0, 8)
|
|
RegFunc(DecodeSint, 0xC00, RegSintVecToptopref, 0x50, DecSt_RegSintVecToptopref, 0xc50)
|
|
FldFunc(DecSt_RegSintVecToptopref, L1picb1, 24, 8)
|
|
FldFunc(DecSt_RegSintVecToptopref, L0picb1, 8, 8)
|
|
RegFunc(DecodeSint, 0xC00, RegSintVecColType, 0x54, DecSt_RegSintVecColType, 0xc54)
|
|
FldFunc(DecSt_RegSintVecColType, Mbaff, 31, 1)
|
|
FldFunc(DecSt_RegSintVecColType, Tfld, 30, 1)
|
|
FldFunc(DecSt_RegSintVecColType, Field, 29, 1)
|
|
FldFunc(DecSt_RegSintVecColType, Sub3, 8, 2)
|
|
FldFunc(DecSt_RegSintVecColType, Sub2, 6, 2)
|
|
FldFunc(DecSt_RegSintVecColType, Sub1, 4, 2)
|
|
FldFunc(DecSt_RegSintVecColType, Sub0, 2, 2)
|
|
FldFunc(DecSt_RegSintVecColType, Type, 0, 2)
|
|
RegFunc(DecodeSint, 0xC00, RegSintVecColRefid, 0x58, DecSt_RegSintVecColRefid, 0xc58)
|
|
FldFunc(DecSt_RegSintVecColRefid, Refidx3, 24, 5)
|
|
FldFunc(DecSt_RegSintVecColRefid, Refidx2, 16, 5)
|
|
FldFunc(DecSt_RegSintVecColRefid, Refidx1, 8, 5)
|
|
FldFunc(DecSt_RegSintVecColRefid, Refidx0, 0, 5)
|
|
RegFunc(DecodeSint, 0xC00, RegSintVecVc1Info, 0x60, DecSt_RegSintVecVc1Info, 0xc60)
|
|
FldFunc(DecSt_RegSintVecVc1Info, IntraFlags, 16, 6)
|
|
FldFunc(DecSt_RegSintVecVc1Info, Cbpcy, 8, 6)
|
|
FldFunc(DecSt_RegSintVecVc1Info, BmvType, 4, 2)
|
|
FldFunc(DecSt_RegSintVecVc1Info, 4mv, 3, 1)
|
|
FldFunc(DecSt_RegSintVecVc1Info, GetAcPred, 2, 1)
|
|
FldFunc(DecSt_RegSintVecVc1Info, CoefsPres, 1, 1)
|
|
FldFunc(DecSt_RegSintVecVc1Info, Intra, 0, 1)
|
|
RegFunc(DecodeSint, 0xC00, RegSintVecRefpic, 0x64, DecSt_RegSintVecRefpic, 0xc64)
|
|
FldFunc(DecSt_RegSintVecRefpic, Hwimpiwt, 2, 1)
|
|
FldFunc(DecSt_RegSintVecRefpic, Userrev, 1, 1)
|
|
FldFunc(DecSt_RegSintVecRefpic, Ramsel, 0, 1)
|
|
RegFunc(DecodeSint, 0xC00, RegSintVecCount, 0x68, DecSt_RegSintVecCount, 0xc68)
|
|
FldFunc(DecSt_RegSintVecCount, Cnt8x8ua, 16, 16)
|
|
FldFunc(DecSt_RegSintVecCount, Cnt8x8, 0, 16)
|
|
RegFunc(DecodeSint, 0xC00, RegSintVecMvdFifo, 0x6C, DecSt_RegSintVecMvdFifo, 0xc6c)
|
|
FldFunc(DecSt_RegSintVecMvdFifo, Data, 0, 32)
|
|
RegFunc(DecodeSint, 0xC00, RegSintVecRegend, 0x7F, DecSt_RegSintVecRegend, 0xc7f)
|
|
RegFunc(DecodeSint, 0xC00, RegSintCtl, 0x80, DecSt_RegSintCtl, 0xc80)
|
|
FldFunc(DecSt_RegSintCtl, Vc1, 31, 1)
|
|
|
|
//----------------------------------------------------------------------
|
|
// DecSt_RegSintCtl
|
|
//----------------------------------------------------------------------
|
|
//#define SINT_VC1_PROFILE bit22..23
|
|
FldFunc(DecSt_RegSintCtl, Profile, 22, 2)
|
|
|
|
FldFunc(DecSt_RegSintCtl, Iwtpred, 21, 1)
|
|
FldFunc(DecSt_RegSintCtl, Wtpred, 20, 1)
|
|
FldFunc(DecSt_RegSintCtl, L1Eq2, 17, 1)
|
|
FldFunc(DecSt_RegSintCtl, L1Eq1, 16, 1)
|
|
FldFunc(DecSt_RegSintCtl, L0Eq2, 15, 1)
|
|
FldFunc(DecSt_RegSintCtl, L0Eq1, 14, 1)
|
|
FldFunc(DecSt_RegSintCtl, Dir8x8, 11, 1)
|
|
FldFunc(DecSt_RegSintCtl, SpaDir, 10, 1)
|
|
FldFunc(DecSt_RegSintCtl, Ptype, 8, 2)
|
|
FldFunc(DecSt_RegSintCtl, Mbaff, 7, 1)
|
|
FldFunc(DecSt_RegSintCtl, Tfld, 6, 1)
|
|
FldFunc(DecSt_RegSintCtl, Field, 5, 1)
|
|
FldFunc(DecSt_RegSintCtl, Cavlc, 4, 1)
|
|
FldFunc(DecSt_RegSintCtl, Uleft, 3, 1)
|
|
FldFunc(DecSt_RegSintCtl, Top, 2, 1)
|
|
FldFunc(DecSt_RegSintCtl, Left, 1, 1)
|
|
FldFunc(DecSt_RegSintCtl, Urtavail, 0, 1)
|
|
RegFunc(DecodeSint, 0xC00, RegSintVlcTopctx, 0x84, DecSt_RegSintVlcTopctx, 0xc84)
|
|
FldFunc(DecSt_RegSintVlcTopctx, V2, 28, 4)
|
|
FldFunc(DecSt_RegSintVlcTopctx, V3, 24, 4)
|
|
FldFunc(DecSt_RegSintVlcTopctx, U2, 20, 4)
|
|
FldFunc(DecSt_RegSintVlcTopctx, U3, 16, 4)
|
|
FldFunc(DecSt_RegSintVlcTopctx, Lum10, 12, 4)
|
|
FldFunc(DecSt_RegSintVlcTopctx, Lum11, 8, 4)
|
|
FldFunc(DecSt_RegSintVlcTopctx, Lum14, 4, 4)
|
|
FldFunc(DecSt_RegSintVlcTopctx, Lum15, 0, 4)
|
|
RegFunc(DecodeSint, 0xC00, RegSintSliceId, 0x88, DecSt_RegSintSliceId, 0xc88)
|
|
FldFunc(DecSt_RegSintSliceId, Sliceid, 0, 12)
|
|
RegFunc(DecodeSint, 0xC00, RegSintQp, 0x8C, DecSt_RegSintQp, 0xc8c)
|
|
FldFunc(DecSt_RegSintQp, Qp, 0, 6)
|
|
RegFunc(DecodeSint, 0xC00, RegSintTopBaseAddr, 0x90, DecSt_RegSintTopBaseAddr, 0xc90)
|
|
FldFunc(DecSt_RegSintTopBaseAddr, Addr, 0, 32)
|
|
RegFunc(DecodeSint, 0xC00, RegSintDirctxWrAddr, 0x94, DecSt_RegSintDirctxWrAddr, 0xc94)
|
|
FldFunc(DecSt_RegSintDirctxWrAddr, Addr, 0, 32)
|
|
RegFunc(DecodeSint, 0xC00, RegSintTopctxData, 0x98, DecSt_RegSintTopctxData, 0xc98)
|
|
FldFunc(DecSt_RegSintTopctxData, Data, 0, 32)
|
|
RegFunc(DecodeSint, 0xC00, RegSintXferSymb, 0x9C, DecSt_RegSintXferSymb, 0xc9c)
|
|
FldFunc(DecSt_RegSintXferSymb, Type, 8, 8)
|
|
FldFunc(DecSt_RegSintXferSymb, N, 0, 8)
|
|
RegFunc(DecodeSint, 0xC00, RegSintSmodeBase, 0xA0, DecSt_RegSintSmodeBase, 0xca0)
|
|
RegFunc(DecodeSint, 0xC00, RegSintSmodeEnd, 0xAC, DecSt_RegSintSmodeEnd, 0xcac)
|
|
RegFunc(DecodeSint, 0xC00, RegSintSmodeData, 0xA0, DecSt_RegSintSmodeData, 0xca0)
|
|
FldFunc(DecSt_RegSintSmodeData, Mode0, 28, 4)
|
|
FldFunc(DecSt_RegSintSmodeData, Mode1, 24, 4)
|
|
FldFunc(DecSt_RegSintSmodeData, Mode2, 20, 4)
|
|
FldFunc(DecSt_RegSintSmodeData, Mode3, 16, 4)
|
|
FldFunc(DecSt_RegSintSmodeData, Mode4, 12, 4)
|
|
FldFunc(DecSt_RegSintSmodeData, Mode5, 8, 4)
|
|
FldFunc(DecSt_RegSintSmodeData, Mode6, 4, 4)
|
|
FldFunc(DecSt_RegSintSmodeData, Mode7, 0, 4)
|
|
RegFunc(DecodeSint, 0xC00, RegSintSmodeLeft, 0xA4, DecSt_RegSintSmodeLeft, 0xca4)
|
|
FldFunc(DecSt_RegSintSmodeLeft, Leftmode5, 12, 4)
|
|
FldFunc(DecSt_RegSintSmodeLeft, Leftmode7, 8, 4)
|
|
FldFunc(DecSt_RegSintSmodeLeft, Leftmode13, 4, 4)
|
|
FldFunc(DecSt_RegSintSmodeLeft, Leftmode15, 0, 4)
|
|
RegFunc(DecodeSint, 0xC00, RegSintSmodeTop, 0xA8, DecSt_RegSintSmodeTop, 0xca8)
|
|
FldFunc(DecSt_RegSintSmodeTop, Topmode10, 12, 4)
|
|
FldFunc(DecSt_RegSintSmodeTop, Topmode11, 8, 4)
|
|
FldFunc(DecSt_RegSintSmodeTop, Topmode14, 4, 4)
|
|
FldFunc(DecSt_RegSintSmodeTop, Topmode15, 0, 4)
|
|
RegFunc(DecodeSint, 0xC00, RegSintCtxInit, 0xB0, DecSt_RegSintCtxInit, 0xcb0)
|
|
FldFunc(DecSt_RegSintCtxInit, Mbaff, 24, 1)
|
|
FldFunc(DecSt_RegSintCtxInit, Mbwidth, 16, 8)
|
|
FldFunc(DecSt_RegSintCtxInit, Ypos, 8, 8)
|
|
FldFunc(DecSt_RegSintCtxInit, Xpos, 0, 8)
|
|
RegFunc(DecodeSint, 0xC00, RegSintTopCtx, 0xB4, DecSt_RegSintTopCtx, 0xcb4)
|
|
FldFunc(DecSt_RegSintTopCtx, TopTop, 4, 1)
|
|
FldFunc(DecSt_RegSintTopCtx, RdOffset, 0, 4)
|
|
RegFunc(DecodeSint, 0xC00, RegSintVc1Tabsel, 0xB8, DecSt_RegSintVc1Tabsel, 0xcb8)
|
|
FldFunc(DecSt_RegSintVc1Tabsel, EscLvlSz, 23, 1)
|
|
FldFunc(DecSt_RegSintVc1Tabsel, Ttype, 21, 2)
|
|
FldFunc(DecSt_RegSintVc1Tabsel, InterAc, 19, 2)
|
|
FldFunc(DecSt_RegSintVc1Tabsel, YIntraAc, 17, 2)
|
|
FldFunc(DecSt_RegSintVc1Tabsel, Dctable, 16, 1)
|
|
FldFunc(DecSt_RegSintVc1Tabsel, Mbmode, 12, 3)
|
|
FldFunc(DecSt_RegSintVc1Tabsel, 2ref, 11, 1)
|
|
FldFunc(DecSt_RegSintVc1Tabsel, Cppcy, 4, 3)
|
|
FldFunc(DecSt_RegSintVc1Tabsel, 2mbPat, 2, 2)
|
|
FldFunc(DecSt_RegSintVc1Tabsel, 4mbPat, 0, 2)
|
|
RegFunc(DecodeSint, 0xC00, RegSintCnstIntra, 0xBC, DecSt_RegSintCnstIntra, 0xcbc)
|
|
FldFunc(DecSt_RegSintCnstIntra, Ulftavail, 3, 1)
|
|
FldFunc(DecSt_RegSintCnstIntra, Topavail, 2, 1)
|
|
FldFunc(DecSt_RegSintCnstIntra, Leftavail, 1, 1)
|
|
FldFunc(DecSt_RegSintCnstIntra, Urtavail, 0, 1)
|
|
RegFunc(DecodeSint, 0xC00, RegSintOpicMemBase, 0xC0, DecSt_RegSintOpicMemBase, 0xcc0)
|
|
FldFunc(DecSt_RegSintOpicMemBase, Outpic3, 24, 8)
|
|
FldFunc(DecSt_RegSintOpicMemBase, Outpic2, 16, 8)
|
|
FldFunc(DecSt_RegSintOpicMemBase, Outpic1, 8, 8)
|
|
FldFunc(DecSt_RegSintOpicMemBase, Outpic0, 0, 8)
|
|
RegFunc(DecodeSint, 0xC00, RegSintVecMemBase, 0x100, DecSt_RegSintVecMemBase, 0xd00)
|
|
FldFunc(DecSt_RegSintVecMemBase, VectorYDelta, 16, 16)
|
|
FldFunc(DecSt_RegSintVecMemBase, VectorXDelta, 0, 16)
|
|
RegFunc(DecodeSint, 0xC00, RegSintOpicMemEnd, 0xFF, DecSt_RegSintOpicMemEnd, 0xcff)
|
|
RegFunc(DecodeSint, 0xC00, RegSintVecMemEnd, 0x1FF, DecSt_RegSintVecMemEnd, 0xdff)
|
|
|
|
RegAreaFunc(DecodeRvcBase, 0xE00, 0xEFF)
|
|
RegFunc(DecodeRvc, 0xE00, RegRvcCtl, 0x0, DecRc_RegRvcCtl, 0xe00)
|
|
FldFunc(DecRc_RegRvcCtl, Ena, 0, 1)
|
|
RegFunc(DecodeRvc, 0xE00, RegRvcPut, 0x4, DecRc_RegRvcPut, 0xe04)
|
|
FldFunc(DecRc_RegRvcPut, PutPtr, 0, 32)
|
|
RegFunc(DecodeRvc, 0xE00, RegRvcGet, 0x8, DecRc_RegRvcGet, 0xe08)
|
|
FldFunc(DecRc_RegRvcGet, GetPtr, 5, 23)
|
|
RegFunc(DecodeRvc, 0xE00, RegRvcBase, 0xC, DecRc_RegRvcBase, 0xe0c)
|
|
FldFunc(DecRc_RegRvcBase, BaseAddr, 20, 8)
|
|
RegFunc(DecodeRvc, 0xE00, RegRvcEnd, 0x10, DecRc_RegRvcEnd, 0xe10)
|
|
FldFunc(DecRc_RegRvcEnd, EndAddr, 20, 8)
|
|
|
|
RegAreaFunc(DecodeCpuregsBase, 0xF00, 0xF7F)
|
|
RegFunc(DecodeCpuregs, 0xF00, RegHst2cpuMbx, 0x0, DecCs_RegHst2cpuMbx, 0xf00)
|
|
FldFunc(DecCs_RegHst2cpuMbx, Value, 0, 32)
|
|
RegFunc(DecodeCpuregs, 0xF00, RegCpu2hstMbx, 0x4, DecCs_RegCpu2hstMbx, 0xf04)
|
|
FldFunc(DecCs_RegCpu2hstMbx, Value, 0, 32)
|
|
RegFunc(DecodeCpuregs, 0xF00, RegMbxStat, 0x8, DecCs_RegMbxStat, 0xf08)
|
|
FldFunc(DecCs_RegMbxStat, C2h, 1, 1)
|
|
FldFunc(DecCs_RegMbxStat, H2c, 0, 1)
|
|
RegFunc(DecodeCpuregs, 0xF00, RegCpuIntEna, 0x10, DecCs_RegCpuIntEna, 0xf10)
|
|
FldFunc(DecCs_RegCpuIntEna, Mbx, 31, 1)
|
|
FldFunc(DecCs_RegCpuIntEna, Com7, 23, 1)
|
|
FldFunc(DecCs_RegCpuIntEna, Com6, 22, 1)
|
|
FldFunc(DecCs_RegCpuIntEna, Com5, 21, 1)
|
|
FldFunc(DecCs_RegCpuIntEna, Com4, 20, 1)
|
|
FldFunc(DecCs_RegCpuIntEna, Com3, 19, 1)
|
|
FldFunc(DecCs_RegCpuIntEna, Com2, 18, 1)
|
|
FldFunc(DecCs_RegCpuIntEna, Com1, 17, 1)
|
|
FldFunc(DecCs_RegCpuIntEna, Com0, 16, 1)
|
|
FldFunc(DecCs_RegCpuIntEna, Hw7, 15, 1)
|
|
FldFunc(DecCs_RegCpuIntEna, Hw6, 14, 1)
|
|
FldFunc(DecCs_RegCpuIntEna, Hw5, 13, 1)
|
|
FldFunc(DecCs_RegCpuIntEna, Hw4, 12, 1)
|
|
FldFunc(DecCs_RegCpuIntEna, Hw3, 11, 1)
|
|
FldFunc(DecCs_RegCpuIntEna, Hw2, 10, 1)
|
|
FldFunc(DecCs_RegCpuIntEna, Hw1, 9, 1)
|
|
FldFunc(DecCs_RegCpuIntEna, Hw0, 8, 1)
|
|
FldFunc(DecCs_RegCpuIntEna, Db7, 7, 1)
|
|
FldFunc(DecCs_RegCpuIntEna, Db6, 6, 1)
|
|
FldFunc(DecCs_RegCpuIntEna, Db5, 5, 1)
|
|
FldFunc(DecCs_RegCpuIntEna, Db4, 4, 1)
|
|
FldFunc(DecCs_RegCpuIntEna, Db3, 3, 1)
|
|
FldFunc(DecCs_RegCpuIntEna, Db2, 2, 1)
|
|
FldFunc(DecCs_RegCpuIntEna, Db1, 1, 1)
|
|
FldFunc(DecCs_RegCpuIntEna, Db0, 0, 1)
|
|
RegFunc(DecodeCpuregs, 0xF00, StreamCpuIntEna, 0x10, DecCs_StreamCpuIntEna, 0xf10)
|
|
FldFunc(DecCs_StreamCpuIntEna, Mbx, 31, 1)
|
|
FldFunc(DecCs_StreamCpuIntEna, Dec, 18, 1)
|
|
FldFunc(DecCs_StreamCpuIntEna, Aud, 17, 1)
|
|
FldFunc(DecCs_StreamCpuIntEna, M2m, 15, 1)
|
|
FldFunc(DecCs_StreamCpuIntEna, Pci, 14, 1)
|
|
FldFunc(DecCs_StreamCpuIntEna, Ts1, 13, 1)
|
|
FldFunc(DecCs_StreamCpuIntEna, Ts0, 12, 1)
|
|
FldFunc(DecCs_StreamCpuIntEna, GpioHi, 11, 1)
|
|
FldFunc(DecCs_StreamCpuIntEna, GpioLo, 10, 1)
|
|
FldFunc(DecCs_StreamCpuIntEna, Vpp1, 9, 1)
|
|
FldFunc(DecCs_StreamCpuIntEna, Vpp0, 8, 1)
|
|
FldFunc(DecCs_StreamCpuIntEna, Rb, 1, 1)
|
|
FldFunc(DecCs_StreamCpuIntEna, Sd, 0, 1)
|
|
RegFunc(DecodeCpuregs, 0xF00, Dec0CpuIntEna, 0x10, DecCs_Dec0CpuIntEna, 0xf10)
|
|
FldFunc(DecCs_Dec0CpuIntEna, Mbx, 31, 1)
|
|
FldFunc(DecCs_Dec0CpuIntEna, Dec, 16, 1)
|
|
FldFunc(DecCs_Dec0CpuIntEna, Si, 8, 1)
|
|
FldFunc(DecCs_Dec0CpuIntEna, Rb, 1, 1)
|
|
FldFunc(DecCs_Dec0CpuIntEna, Sd, 0, 1)
|
|
RegFunc(DecodeCpuregs, 0xF00, Dec1CpuIntEna, 0x10, DecCs_Dec1CpuIntEna, 0xf10)
|
|
FldFunc(DecCs_Dec1CpuIntEna, Mbx, 31, 1)
|
|
FldFunc(DecCs_Dec1CpuIntEna, Cab, 9, 1)
|
|
FldFunc(DecCs_Dec1CpuIntEna, Si, 8, 1)
|
|
FldFunc(DecCs_Dec1CpuIntEna, Rb, 1, 1)
|
|
FldFunc(DecCs_Dec1CpuIntEna, Sd, 0, 1)
|
|
RegFunc(DecodeCpuregs, 0xF00, RegCpuIntStat, 0x14, DecCs_RegCpuIntStat, 0xf14)
|
|
FldFunc(DecCs_RegCpuIntStat, Mbx, 31, 1)
|
|
FldFunc(DecCs_RegCpuIntStat, Com7, 23, 1)
|
|
FldFunc(DecCs_RegCpuIntStat, Com6, 22, 1)
|
|
FldFunc(DecCs_RegCpuIntStat, Com5, 21, 1)
|
|
FldFunc(DecCs_RegCpuIntStat, Com4, 20, 1)
|
|
FldFunc(DecCs_RegCpuIntStat, Com3, 19, 1)
|
|
FldFunc(DecCs_RegCpuIntStat, Com2, 18, 1)
|
|
FldFunc(DecCs_RegCpuIntStat, Com1, 17, 1)
|
|
FldFunc(DecCs_RegCpuIntStat, Com0, 16, 1)
|
|
FldFunc(DecCs_RegCpuIntStat, Hw7, 15, 1)
|
|
FldFunc(DecCs_RegCpuIntStat, Hw6, 14, 1)
|
|
FldFunc(DecCs_RegCpuIntStat, Hw5, 13, 1)
|
|
FldFunc(DecCs_RegCpuIntStat, Hw4, 12, 1)
|
|
FldFunc(DecCs_RegCpuIntStat, Hw3, 11, 1)
|
|
FldFunc(DecCs_RegCpuIntStat, Hw2, 10, 1)
|
|
FldFunc(DecCs_RegCpuIntStat, Hw1, 9, 1)
|
|
FldFunc(DecCs_RegCpuIntStat, Hw0, 8, 1)
|
|
FldFunc(DecCs_RegCpuIntStat, Db7, 7, 1)
|
|
FldFunc(DecCs_RegCpuIntStat, Db6, 6, 1)
|
|
FldFunc(DecCs_RegCpuIntStat, Db5, 5, 1)
|
|
FldFunc(DecCs_RegCpuIntStat, Db4, 4, 1)
|
|
FldFunc(DecCs_RegCpuIntStat, Db3, 3, 1)
|
|
FldFunc(DecCs_RegCpuIntStat, Db2, 2, 1)
|
|
FldFunc(DecCs_RegCpuIntStat, Db1, 1, 1)
|
|
FldFunc(DecCs_RegCpuIntStat, Db0, 0, 1)
|
|
RegFunc(DecodeCpuregs, 0xF00, StreamCpuIntStat, 0x14, DecCs_StreamCpuIntStat, 0xf14)
|
|
FldFunc(DecCs_StreamCpuIntStat, Mbx, 31, 1)
|
|
FldFunc(DecCs_StreamCpuIntStat, Dec, 18, 1)
|
|
FldFunc(DecCs_StreamCpuIntStat, Aud, 17, 1)
|
|
FldFunc(DecCs_StreamCpuIntStat, M2m, 15, 1)
|
|
FldFunc(DecCs_StreamCpuIntStat, Pci, 14, 1)
|
|
FldFunc(DecCs_StreamCpuIntStat, Ts1, 13, 1)
|
|
FldFunc(DecCs_StreamCpuIntStat, Ts0, 12, 1)
|
|
FldFunc(DecCs_StreamCpuIntStat, GpioHi, 11, 1)
|
|
FldFunc(DecCs_StreamCpuIntStat, GpioLo, 10, 1)
|
|
FldFunc(DecCs_StreamCpuIntStat, Vpp1, 9, 1)
|
|
FldFunc(DecCs_StreamCpuIntStat, Vpp0, 8, 1)
|
|
FldFunc(DecCs_StreamCpuIntStat, Rb, 1, 1)
|
|
FldFunc(DecCs_StreamCpuIntStat, Sd, 0, 1)
|
|
RegFunc(DecodeCpuregs, 0xF00, Dec0CpuIntStat, 0x14, DecCs_Dec0CpuIntStat, 0xf14)
|
|
FldFunc(DecCs_Dec0CpuIntStat, Mbx, 31, 1)
|
|
FldFunc(DecCs_Dec0CpuIntStat, Dec, 16, 1)
|
|
FldFunc(DecCs_Dec0CpuIntStat, Si, 8, 1)
|
|
FldFunc(DecCs_Dec0CpuIntStat, Rb, 1, 1)
|
|
FldFunc(DecCs_Dec0CpuIntStat, Sd, 0, 1)
|
|
RegFunc(DecodeCpuregs, 0xF00, Dec1CpuIntStat, 0x14, DecCs_Dec1CpuIntStat, 0xf14)
|
|
FldFunc(DecCs_Dec1CpuIntStat, Mbx, 31, 1)
|
|
FldFunc(DecCs_Dec1CpuIntStat, Cab, 9, 1)
|
|
FldFunc(DecCs_Dec1CpuIntStat, Si, 8, 1)
|
|
FldFunc(DecCs_Dec1CpuIntStat, Rb, 1, 1)
|
|
FldFunc(DecCs_Dec1CpuIntStat, Sd, 0, 1)
|
|
RegFunc(DecodeCpuregs, 0xF00, RegHst2cpuStat, 0x18, DecCs_RegHst2cpuStat, 0xf18)
|
|
FldFunc(DecCs_RegHst2cpuStat, Value, 0, 32)
|
|
RegFunc(DecodeCpuregs, 0xF00, RegCpu2hstStat, 0x1C, DecCs_RegCpu2hstStat, 0xf1c)
|
|
FldFunc(DecCs_RegCpu2hstStat, Value, 0, 32)
|
|
RegFunc(DecodeCpuregs, 0xF00, RegCpuIntgenSet, 0x20, DecCs_RegCpuIntgenSet, 0xf20)
|
|
FldFunc(DecCs_RegCpuIntgenSet, Cpu2HstMbx, 31, 1)
|
|
FldFunc(DecCs_RegCpuIntgenSet, Int15, 15, 1)
|
|
FldFunc(DecCs_RegCpuIntgenSet, Int14, 14, 1)
|
|
FldFunc(DecCs_RegCpuIntgenSet, Int13, 13, 1)
|
|
FldFunc(DecCs_RegCpuIntgenSet, Int12, 12, 1)
|
|
FldFunc(DecCs_RegCpuIntgenSet, Int11, 11, 1)
|
|
FldFunc(DecCs_RegCpuIntgenSet, Int10, 10, 1)
|
|
FldFunc(DecCs_RegCpuIntgenSet, Int9, 9, 1)
|
|
FldFunc(DecCs_RegCpuIntgenSet, Int8, 8, 1)
|
|
FldFunc(DecCs_RegCpuIntgenSet, Int7, 7, 1)
|
|
FldFunc(DecCs_RegCpuIntgenSet, Int6, 6, 1)
|
|
FldFunc(DecCs_RegCpuIntgenSet, Int5, 5, 1)
|
|
FldFunc(DecCs_RegCpuIntgenSet, Int4, 4, 1)
|
|
FldFunc(DecCs_RegCpuIntgenSet, Int3, 3, 1)
|
|
FldFunc(DecCs_RegCpuIntgenSet, Int2, 2, 1)
|
|
FldFunc(DecCs_RegCpuIntgenSet, Int1, 1, 1)
|
|
FldFunc(DecCs_RegCpuIntgenSet, Int0, 0, 1)
|
|
RegFunc(DecodeCpuregs, 0xF00, RegCpuIntgenClr, 0x24, DecCs_RegCpuIntgenClr, 0xf24)
|
|
FldFunc(DecCs_RegCpuIntgenClr, Cpu2HstMbx, 31, 1)
|
|
// parameter REG_CPU_INTGEN_CLR_1__WATCHDOG_TIMER_WIDTH = 1;
|
|
// parameter REG_CPU_INTGEN_CLR_1__WATCHDOG_TIMER_MSB = 30;
|
|
// parameter REG_CPU_INTGEN_CLR_1__WATCHDOG_TIMER_LSB = 30;
|
|
FldFunc(DecCs_RegCpuIntgenClr, WatchdogTimer, 30, 1)
|
|
FldFunc(DecCs_RegCpuIntgenClr, Int15, 15, 1)
|
|
FldFunc(DecCs_RegCpuIntgenClr, Int14, 14, 1)
|
|
FldFunc(DecCs_RegCpuIntgenClr, Int13, 13, 1)
|
|
FldFunc(DecCs_RegCpuIntgenClr, Int12, 12, 1)
|
|
FldFunc(DecCs_RegCpuIntgenClr, Int11, 11, 1)
|
|
FldFunc(DecCs_RegCpuIntgenClr, Int10, 10, 1)
|
|
FldFunc(DecCs_RegCpuIntgenClr, Int9, 9, 1)
|
|
FldFunc(DecCs_RegCpuIntgenClr, Int8, 8, 1)
|
|
FldFunc(DecCs_RegCpuIntgenClr, Int7, 7, 1)
|
|
FldFunc(DecCs_RegCpuIntgenClr, Int6, 6, 1)
|
|
FldFunc(DecCs_RegCpuIntgenClr, Int5, 5, 1)
|
|
FldFunc(DecCs_RegCpuIntgenClr, Int4, 4, 1)
|
|
FldFunc(DecCs_RegCpuIntgenClr, Int3, 3, 1)
|
|
FldFunc(DecCs_RegCpuIntgenClr, Int2, 2, 1)
|
|
FldFunc(DecCs_RegCpuIntgenClr, Int1, 1, 1)
|
|
FldFunc(DecCs_RegCpuIntgenClr, Int0, 0, 1)
|
|
RegFunc(DecodeCpuregs, 0xF00, RegCpuIcacheMiss, 0x28, DecCs_RegCpuIcacheMiss, 0xf28)
|
|
FldFunc(DecCs_RegCpuIcacheMiss, Count, 0, 32)
|
|
RegFunc(DecodeCpuregs, 0xF00, RegCpuIntgenMask, 0x2C, DecCs_RegCpuIntgenMask, 0xf2c)
|
|
FldFunc(DecCs_RegCpuIntgenMask, Cpu2HstMbx, 31, 1)
|
|
// parameter REG_CPU_INTGEN_MASK_1__WATCHDOG_TIMER_WIDTH = 1;
|
|
// parameter REG_CPU_INTGEN_MASK_1__WATCHDOG_TIMER_MSB = 30;
|
|
// parameter REG_CPU_INTGEN_MASK_1__WATCHDOG_TIMER_LSB = 30;
|
|
FldFunc(DecCs_RegCpuIntgenMask, WatchdogTimer, 30, 1)
|
|
FldFunc(DecCs_RegCpuIntgenMask, Int15, 15, 1)
|
|
FldFunc(DecCs_RegCpuIntgenMask, Int14, 14, 1)
|
|
FldFunc(DecCs_RegCpuIntgenMask, Int13, 13, 1)
|
|
FldFunc(DecCs_RegCpuIntgenMask, Int12, 12, 1)
|
|
FldFunc(DecCs_RegCpuIntgenMask, Int11, 11, 1)
|
|
FldFunc(DecCs_RegCpuIntgenMask, Int10, 10, 1)
|
|
FldFunc(DecCs_RegCpuIntgenMask, Int9, 9, 1)
|
|
FldFunc(DecCs_RegCpuIntgenMask, Int8, 8, 1)
|
|
FldFunc(DecCs_RegCpuIntgenMask, Int7, 7, 1)
|
|
FldFunc(DecCs_RegCpuIntgenMask, Int6, 6, 1)
|
|
FldFunc(DecCs_RegCpuIntgenMask, Int5, 5, 1)
|
|
FldFunc(DecCs_RegCpuIntgenMask, Int4, 4, 1)
|
|
FldFunc(DecCs_RegCpuIntgenMask, Int3, 3, 1)
|
|
FldFunc(DecCs_RegCpuIntgenMask, Int2, 2, 1)
|
|
FldFunc(DecCs_RegCpuIntgenMask, Int1, 1, 1)
|
|
FldFunc(DecCs_RegCpuIntgenMask, Int0, 0, 1)
|
|
|
|
RegFunc(DecodeCpuregs, 0xF00, RegInstBase, 0x30, DecCs_RegInstBase, 0xf0c)
|
|
FldFunc(DecCs_RegInstBase, Instbase, 10, 22)
|
|
|
|
RegFunc(DecodeCpuregs, 0xF00, RegEndOfCode, 0x34, DecCs_RegEndOfCode, 0xf34)
|
|
FldFunc(DecCs_RegEndOfCode, Endofcode, 10, 22)
|
|
|
|
RegFunc(DecodeCpuregs, 0xF00, RegGlobalIoBase, 0x38, DecCs_RegGlobalIoBase, 0xf38)
|
|
FldFunc(DecCs_RegGlobalIoBase, Globaliobase, 10, 22)
|
|
|
|
// parameter REG_WATCHDOG_TMR_LIMIT = 32'h48;
|
|
// parameter REG_WATCHDOG_TMR_LIMIT__VALUE_WIDTH = 32;
|
|
// parameter REG_WATCHDOG_TMR_LIMIT__VALUE_MSB = 31;
|
|
// parameter REG_WATCHDOG_TMR_LIMIT__VALUE_LSB = 0;
|
|
RegFunc(DecodeCpuregs, 0xF00, RegWatchdogTmrLimit, 0x48, DecCs_RegWatchdogTmrLimit, 0xf48)
|
|
FldFunc(DecCs_RegWatchdogTmrLimit, Value, 0, 32)
|
|
// parameter REG_WATCHDOG_TMR = 32'h4C;
|
|
// parameter REG_WATCHDOG_TMR__VALUE_WIDTH = 32;
|
|
// parameter REG_WATCHDOG_TMR__VALUE_MSB = 31;
|
|
// parameter REG_WATCHDOG_TMR__VALUE_LSB = 0;
|
|
RegFunc(DecodeCpuregs, 0xF00, RegWatchdogTmr, 0x4C, DecCs_RegWatchdogTmr, 0xf4c)
|
|
FldFunc(DecCs_RegWatchdogTmr, Value, 0, 32)
|
|
RegFunc(DecodeCpuregs, 0xF00, RegSdramStatus, 0x50, DecCs_RegSdramStatus, 0xf50)
|
|
FldFunc(DecCs_RegSdramStatus, Iswrite, 1, 1)
|
|
FldFunc(DecCs_RegSdramStatus, Busy, 0, 1)
|
|
|
|
RegAreaFunc(DecodeCpuregs2Base, 0xF80, 0xFFF)
|
|
RegFunc(DecodeCpuregs2, 0xF80, RegHst2cpuMbx, 0x0, DecC2_RegHst2cpuMbx, 0xf80)
|
|
FldFunc(DecC2_RegHst2cpuMbx, Value, 0, 32)
|
|
RegFunc(DecodeCpuregs2, 0xF80, RegCpu2hstMbx, 0x4, DecC2_RegCpu2hstMbx, 0xf84)
|
|
FldFunc(DecC2_RegCpu2hstMbx, Value, 0, 32)
|
|
RegFunc(DecodeCpuregs2, 0xF80, RegMbxStat, 0x8, DecC2_RegMbxStat, 0xf88)
|
|
FldFunc(DecC2_RegMbxStat, C2h, 1, 1)
|
|
FldFunc(DecC2_RegMbxStat, H2c, 0, 1)
|
|
RegFunc(DecodeCpuregs2, 0xF80, RegCpuIntEna, 0x10, DecC2_RegCpuIntEna, 0xf90)
|
|
FldFunc(DecC2_RegCpuIntEna, Mbx, 31, 1)
|
|
FldFunc(DecC2_RegCpuIntEna, Com7, 23, 1)
|
|
FldFunc(DecC2_RegCpuIntEna, Com6, 22, 1)
|
|
FldFunc(DecC2_RegCpuIntEna, Com5, 21, 1)
|
|
FldFunc(DecC2_RegCpuIntEna, Com4, 20, 1)
|
|
FldFunc(DecC2_RegCpuIntEna, Com3, 19, 1)
|
|
FldFunc(DecC2_RegCpuIntEna, Com2, 18, 1)
|
|
FldFunc(DecC2_RegCpuIntEna, Com1, 17, 1)
|
|
FldFunc(DecC2_RegCpuIntEna, Com0, 16, 1)
|
|
FldFunc(DecC2_RegCpuIntEna, Hw7, 15, 1)
|
|
FldFunc(DecC2_RegCpuIntEna, Hw6, 14, 1)
|
|
FldFunc(DecC2_RegCpuIntEna, Hw5, 13, 1)
|
|
FldFunc(DecC2_RegCpuIntEna, Hw4, 12, 1)
|
|
FldFunc(DecC2_RegCpuIntEna, Hw3, 11, 1)
|
|
FldFunc(DecC2_RegCpuIntEna, Hw2, 10, 1)
|
|
FldFunc(DecC2_RegCpuIntEna, Hw1, 9, 1)
|
|
FldFunc(DecC2_RegCpuIntEna, Hw0, 8, 1)
|
|
FldFunc(DecC2_RegCpuIntEna, Db7, 7, 1)
|
|
FldFunc(DecC2_RegCpuIntEna, Db6, 6, 1)
|
|
FldFunc(DecC2_RegCpuIntEna, Db5, 5, 1)
|
|
FldFunc(DecC2_RegCpuIntEna, Db4, 4, 1)
|
|
FldFunc(DecC2_RegCpuIntEna, Db3, 3, 1)
|
|
FldFunc(DecC2_RegCpuIntEna, Db2, 2, 1)
|
|
FldFunc(DecC2_RegCpuIntEna, Db1, 1, 1)
|
|
FldFunc(DecC2_RegCpuIntEna, Db0, 0, 1)
|
|
RegFunc(DecodeCpuregs2, 0xF80, StreamCpuIntEna, 0x10, DecC2_StreamCpuIntEna, 0xf90)
|
|
FldFunc(DecC2_StreamCpuIntEna, Mbx, 31, 1)
|
|
FldFunc(DecC2_StreamCpuIntEna, Dec, 18, 1)
|
|
FldFunc(DecC2_StreamCpuIntEna, Aud, 17, 1)
|
|
FldFunc(DecC2_StreamCpuIntEna, M2m, 15, 1)
|
|
FldFunc(DecC2_StreamCpuIntEna, Pci, 14, 1)
|
|
FldFunc(DecC2_StreamCpuIntEna, Ts1, 13, 1)
|
|
FldFunc(DecC2_StreamCpuIntEna, Ts0, 12, 1)
|
|
FldFunc(DecC2_StreamCpuIntEna, GpioHi, 11, 1)
|
|
FldFunc(DecC2_StreamCpuIntEna, GpioLo, 10, 1)
|
|
FldFunc(DecC2_StreamCpuIntEna, Vpp1, 9, 1)
|
|
FldFunc(DecC2_StreamCpuIntEna, Vpp0, 8, 1)
|
|
FldFunc(DecC2_StreamCpuIntEna, Rb, 1, 1)
|
|
FldFunc(DecC2_StreamCpuIntEna, Sd, 0, 1)
|
|
RegFunc(DecodeCpuregs2, 0xF80, Dec0CpuIntEna, 0x10, DecC2_Dec0CpuIntEna, 0xf90)
|
|
FldFunc(DecC2_Dec0CpuIntEna, Mbx, 31, 1)
|
|
FldFunc(DecC2_Dec0CpuIntEna, Dec, 16, 1)
|
|
FldFunc(DecC2_Dec0CpuIntEna, Si, 8, 1)
|
|
FldFunc(DecC2_Dec0CpuIntEna, Rb, 1, 1)
|
|
FldFunc(DecC2_Dec0CpuIntEna, Sd, 0, 1)
|
|
RegFunc(DecodeCpuregs2, 0xF80, Dec1CpuIntEna, 0x10, DecC2_Dec1CpuIntEna, 0xf90)
|
|
FldFunc(DecC2_Dec1CpuIntEna, Mbx, 31, 1)
|
|
FldFunc(DecC2_Dec1CpuIntEna, Cab, 9, 1)
|
|
FldFunc(DecC2_Dec1CpuIntEna, Si, 8, 1)
|
|
FldFunc(DecC2_Dec1CpuIntEna, Rb, 1, 1)
|
|
FldFunc(DecC2_Dec1CpuIntEna, Sd, 0, 1)
|
|
RegFunc(DecodeCpuregs2, 0xF80, RegCpuIntStat, 0x14, DecC2_RegCpuIntStat, 0xf94)
|
|
FldFunc(DecC2_RegCpuIntStat, Mbx, 31, 1)
|
|
FldFunc(DecC2_RegCpuIntStat, Com7, 23, 1)
|
|
FldFunc(DecC2_RegCpuIntStat, Com6, 22, 1)
|
|
FldFunc(DecC2_RegCpuIntStat, Com5, 21, 1)
|
|
FldFunc(DecC2_RegCpuIntStat, Com4, 20, 1)
|
|
FldFunc(DecC2_RegCpuIntStat, Com3, 19, 1)
|
|
FldFunc(DecC2_RegCpuIntStat, Com2, 18, 1)
|
|
FldFunc(DecC2_RegCpuIntStat, Com1, 17, 1)
|
|
FldFunc(DecC2_RegCpuIntStat, Com0, 16, 1)
|
|
FldFunc(DecC2_RegCpuIntStat, Hw7, 15, 1)
|
|
FldFunc(DecC2_RegCpuIntStat, Hw6, 14, 1)
|
|
FldFunc(DecC2_RegCpuIntStat, Hw5, 13, 1)
|
|
FldFunc(DecC2_RegCpuIntStat, Hw4, 12, 1)
|
|
FldFunc(DecC2_RegCpuIntStat, Hw3, 11, 1)
|
|
FldFunc(DecC2_RegCpuIntStat, Hw2, 10, 1)
|
|
FldFunc(DecC2_RegCpuIntStat, Hw1, 9, 1)
|
|
FldFunc(DecC2_RegCpuIntStat, Hw0, 8, 1)
|
|
FldFunc(DecC2_RegCpuIntStat, Db7, 7, 1)
|
|
FldFunc(DecC2_RegCpuIntStat, Db6, 6, 1)
|
|
FldFunc(DecC2_RegCpuIntStat, Db5, 5, 1)
|
|
FldFunc(DecC2_RegCpuIntStat, Db4, 4, 1)
|
|
FldFunc(DecC2_RegCpuIntStat, Db3, 3, 1)
|
|
FldFunc(DecC2_RegCpuIntStat, Db2, 2, 1)
|
|
FldFunc(DecC2_RegCpuIntStat, Db1, 1, 1)
|
|
FldFunc(DecC2_RegCpuIntStat, Db0, 0, 1)
|
|
RegFunc(DecodeCpuregs2, 0xF80, StreamCpuIntStat, 0x14, DecC2_StreamCpuIntStat, 0xf94)
|
|
FldFunc(DecC2_StreamCpuIntStat, Mbx, 31, 1)
|
|
FldFunc(DecC2_StreamCpuIntStat, Dec, 18, 1)
|
|
FldFunc(DecC2_StreamCpuIntStat, Aud, 17, 1)
|
|
FldFunc(DecC2_StreamCpuIntStat, M2m, 15, 1)
|
|
FldFunc(DecC2_StreamCpuIntStat, Pci, 14, 1)
|
|
FldFunc(DecC2_StreamCpuIntStat, Ts1, 13, 1)
|
|
FldFunc(DecC2_StreamCpuIntStat, Ts0, 12, 1)
|
|
FldFunc(DecC2_StreamCpuIntStat, GpioHi, 11, 1)
|
|
FldFunc(DecC2_StreamCpuIntStat, GpioLo, 10, 1)
|
|
FldFunc(DecC2_StreamCpuIntStat, Vpp1, 9, 1)
|
|
FldFunc(DecC2_StreamCpuIntStat, Vpp0, 8, 1)
|
|
FldFunc(DecC2_StreamCpuIntStat, Rb, 1, 1)
|
|
FldFunc(DecC2_StreamCpuIntStat, Sd, 0, 1)
|
|
RegFunc(DecodeCpuregs2, 0xF80, Dec0CpuIntStat, 0x14, DecC2_Dec0CpuIntStat, 0xf94)
|
|
FldFunc(DecC2_Dec0CpuIntStat, Mbx, 31, 1)
|
|
FldFunc(DecC2_Dec0CpuIntStat, Dec, 16, 1)
|
|
FldFunc(DecC2_Dec0CpuIntStat, Si, 8, 1)
|
|
FldFunc(DecC2_Dec0CpuIntStat, Rb, 1, 1)
|
|
FldFunc(DecC2_Dec0CpuIntStat, Sd, 0, 1)
|
|
RegFunc(DecodeCpuregs2, 0xF80, Dec1CpuIntStat, 0x14, DecC2_Dec1CpuIntStat, 0xf94)
|
|
FldFunc(DecC2_Dec1CpuIntStat, Mbx, 31, 1)
|
|
FldFunc(DecC2_Dec1CpuIntStat, Cab, 9, 1)
|
|
FldFunc(DecC2_Dec1CpuIntStat, Si, 8, 1)
|
|
FldFunc(DecC2_Dec1CpuIntStat, Rb, 1, 1)
|
|
FldFunc(DecC2_Dec1CpuIntStat, Sd, 0, 1)
|
|
RegFunc(DecodeCpuregs2, 0xF80, RegHst2cpuStat, 0x18, DecC2_RegHst2cpuStat, 0xf98)
|
|
FldFunc(DecC2_RegHst2cpuStat, Value, 0, 32)
|
|
RegFunc(DecodeCpuregs2, 0xF80, RegCpu2hstStat, 0x1C, DecC2_RegCpu2hstStat, 0xf9c)
|
|
FldFunc(DecC2_RegCpu2hstStat, Value, 0, 32)
|
|
RegFunc(DecodeCpuregs2, 0xF80, RegCpuIntgenSet, 0x20, DecC2_RegCpuIntgenSet, 0xfa0)
|
|
FldFunc(DecC2_RegCpuIntgenSet, Cpu2HstMbx, 31, 1)
|
|
FldFunc(DecC2_RegCpuIntgenSet, Int15, 15, 1)
|
|
FldFunc(DecC2_RegCpuIntgenSet, Int14, 14, 1)
|
|
FldFunc(DecC2_RegCpuIntgenSet, Int13, 13, 1)
|
|
FldFunc(DecC2_RegCpuIntgenSet, Int12, 12, 1)
|
|
FldFunc(DecC2_RegCpuIntgenSet, Int11, 11, 1)
|
|
FldFunc(DecC2_RegCpuIntgenSet, Int10, 10, 1)
|
|
FldFunc(DecC2_RegCpuIntgenSet, Int9, 9, 1)
|
|
FldFunc(DecC2_RegCpuIntgenSet, Int8, 8, 1)
|
|
FldFunc(DecC2_RegCpuIntgenSet, Int7, 7, 1)
|
|
FldFunc(DecC2_RegCpuIntgenSet, Int6, 6, 1)
|
|
FldFunc(DecC2_RegCpuIntgenSet, Int5, 5, 1)
|
|
FldFunc(DecC2_RegCpuIntgenSet, Int4, 4, 1)
|
|
FldFunc(DecC2_RegCpuIntgenSet, Int3, 3, 1)
|
|
FldFunc(DecC2_RegCpuIntgenSet, Int2, 2, 1)
|
|
FldFunc(DecC2_RegCpuIntgenSet, Int1, 1, 1)
|
|
FldFunc(DecC2_RegCpuIntgenSet, Int0, 0, 1)
|
|
RegFunc(DecodeCpuregs2, 0xF80, RegCpuIntgenClr, 0x24, DecC2_RegCpuIntgenClr, 0xfa4)
|
|
FldFunc(DecC2_RegCpuIntgenClr, Cpu2HstMbx, 31, 1)
|
|
FldFunc(DecC2_RegCpuIntgenClr, Int15, 15, 1)
|
|
FldFunc(DecC2_RegCpuIntgenClr, Int14, 14, 1)
|
|
FldFunc(DecC2_RegCpuIntgenClr, Int13, 13, 1)
|
|
FldFunc(DecC2_RegCpuIntgenClr, Int12, 12, 1)
|
|
FldFunc(DecC2_RegCpuIntgenClr, Int11, 11, 1)
|
|
FldFunc(DecC2_RegCpuIntgenClr, Int10, 10, 1)
|
|
FldFunc(DecC2_RegCpuIntgenClr, Int9, 9, 1)
|
|
FldFunc(DecC2_RegCpuIntgenClr, Int8, 8, 1)
|
|
FldFunc(DecC2_RegCpuIntgenClr, Int7, 7, 1)
|
|
FldFunc(DecC2_RegCpuIntgenClr, Int6, 6, 1)
|
|
FldFunc(DecC2_RegCpuIntgenClr, Int5, 5, 1)
|
|
FldFunc(DecC2_RegCpuIntgenClr, Int4, 4, 1)
|
|
FldFunc(DecC2_RegCpuIntgenClr, Int3, 3, 1)
|
|
FldFunc(DecC2_RegCpuIntgenClr, Int2, 2, 1)
|
|
FldFunc(DecC2_RegCpuIntgenClr, Int1, 1, 1)
|
|
FldFunc(DecC2_RegCpuIntgenClr, Int0, 0, 1)
|
|
RegFunc(DecodeCpuregs2, 0xF80, RegCpuIcacheMiss, 0x28, DecC2_RegCpuIcacheMiss, 0xfa8)
|
|
FldFunc(DecC2_RegCpuIcacheMiss, Count, 0, 32)
|
|
RegFunc(DecodeCpuregs2, 0xF80, RegCpuIntgenMask, 0x2C, DecC2_RegCpuIntgenMask, 0xfac)
|
|
FldFunc(DecC2_RegCpuIntgenMask, Cpu2HstMbx, 31, 1)
|
|
FldFunc(DecC2_RegCpuIntgenMask, Int15, 15, 1)
|
|
FldFunc(DecC2_RegCpuIntgenMask, Int14, 14, 1)
|
|
FldFunc(DecC2_RegCpuIntgenMask, Int13, 13, 1)
|
|
FldFunc(DecC2_RegCpuIntgenMask, Int12, 12, 1)
|
|
FldFunc(DecC2_RegCpuIntgenMask, Int11, 11, 1)
|
|
FldFunc(DecC2_RegCpuIntgenMask, Int10, 10, 1)
|
|
FldFunc(DecC2_RegCpuIntgenMask, Int9, 9, 1)
|
|
FldFunc(DecC2_RegCpuIntgenMask, Int8, 8, 1)
|
|
FldFunc(DecC2_RegCpuIntgenMask, Int7, 7, 1)
|
|
FldFunc(DecC2_RegCpuIntgenMask, Int6, 6, 1)
|
|
FldFunc(DecC2_RegCpuIntgenMask, Int5, 5, 1)
|
|
FldFunc(DecC2_RegCpuIntgenMask, Int4, 4, 1)
|
|
FldFunc(DecC2_RegCpuIntgenMask, Int3, 3, 1)
|
|
FldFunc(DecC2_RegCpuIntgenMask, Int2, 2, 1)
|
|
FldFunc(DecC2_RegCpuIntgenMask, Int1, 1, 1)
|
|
FldFunc(DecC2_RegCpuIntgenMask, Int0, 0, 1)
|
|
|
|
RegFunc(DecodeCpuregs2, 0xF80, RegInstBase, 0x30, DecC2_RegInstBase, 0xf8c)
|
|
FldFunc(DecC2_RegInstBase, Instbase, 10, 22)
|
|
RegFunc(DecodeCpuregs2, 0xF80, RegEndOfCode, 0x34, DecC2_RegEndOfCode, 0xfb4)
|
|
FldFunc(DecC2_RegEndOfCode, Endofcode, 10, 22)
|
|
RegFunc(DecodeCpuregs2, 0xF80, RegGlobalIoBase, 0x38, DecC2_RegGlobalIoBase, 0xfb8)
|
|
FldFunc(DecC2_RegGlobalIoBase, Globaliobase, 10, 22)
|
|
|
|
// parameter REG_DEBUG_TRACE_FIFO_WR = 32'hBC;
|
|
// parameter REG_DEBUG_TRACE_FIFO_WR__VALUE_WIDTH = 8;
|
|
// parameter REG_DEBUG_TRACE_FIFO_WR__VALUE_MSB = 7;
|
|
// parameter REG_DEBUG_TRACE_FIFO_WR__VALUE_LSB = 0;
|
|
RegFunc(DecodeCpuregs2, 0xF80, RegDebugTraceFifoWr, 0x3C, DecC2_RegDebugTraceFifoWr, 0xfbc)
|
|
FldFunc(DecC2_RegDebugTraceFifoWr, Value, 0, 8)
|
|
// parameter REG_DEBUG_TRACE_FIFO_RD = 32'hC0;
|
|
// parameter REG_DEBUG_TRACE_FIFO_RD__VALUE_WIDTH = 8;
|
|
// parameter REG_DEBUG_TRACE_FIFO_RD__VALUE_MSB = 7;
|
|
// parameter REG_DEBUG_TRACE_FIFO_RD__VALUE_LSB = 0;
|
|
RegFunc(DecodeCpuregs2, 0xF80, RegDebugTraceFifoRd, 0x40, DecC2_RegDebugTraceFifoRd, 0xfc0)
|
|
FldFunc(DecC2_RegDebugTraceFifoRd, Value, 0, 8)
|
|
// parameter REG_DEBUG_TRACE_FIFO_CTL = 32'hC4;
|
|
// parameter REG_DEBUG_TRACE_FIFO_CTL__FREEZE_WIDTH = 1;
|
|
// parameter REG_DEBUG_TRACE_FIFO_CTL__FREEZE_MSB = 2;
|
|
// parameter REG_DEBUG_TRACE_FIFO_CTL__FREEZE_LSB = 2;
|
|
// parameter REG_DEBUG_TRACE_FIFO_CTL__START_READ_WIDTH = 1;
|
|
// parameter REG_DEBUG_TRACE_FIFO_CTL__START_READ_MSB = 1;
|
|
// parameter REG_DEBUG_TRACE_FIFO_CTL__START_READ_LSB = 1;
|
|
// parameter REG_DEBUG_TRACE_FIFO_CTL__CLEAR_WIDTH = 1;
|
|
// parameter REG_DEBUG_TRACE_FIFO_CTL__CLEAR_MSB = 0;
|
|
// parameter REG_DEBUG_TRACE_FIFO_CTL__CLEAR_LSB
|
|
RegFunc(DecodeCpuregs2, 0xF80, RegDebugTraceFifoCtl, 0x44, DecC2_RegDebugTraceFifoCtl, 0xfc4)
|
|
FldFunc(DecC2_RegDebugTraceFifoCtl, Freeze, 2, 1)
|
|
FldFunc(DecC2_RegDebugTraceFifoCtl, StartRead, 1, 1)
|
|
FldFunc(DecC2_RegDebugTraceFifoCtl, Clear, 0, 1)
|
|
// parameter REG_WATCHDOG_TMR_LIMIT_1 = 32'h48;
|
|
// parameter REG_WATCHDOG_TMR_LIMIT_1__VALUE_WIDTH = 32;
|
|
// parameter REG_WATCHDOG_TMR_LIMIT_1__VALUE_MSB = 31;
|
|
// parameter REG_WATCHDOG_TMR_LIMIT_1__VALUE_LSB = 0;
|
|
RegFunc(DecodeCpuregs2, 0xF80, RegWatchdogTmrLimit, 0x48, DecC2_RegWatchdogTmrLimit, 0xfc8)
|
|
FldFunc(DecC2_RegWatchdogTmrLimit, Value, 0, 32)
|
|
// parameter REG_WATCHDOG_TMR = 32'h4C;
|
|
// parameter REG_WATCHDOG_TMR__VALUE_WIDTH = 32;
|
|
// parameter REG_WATCHDOG_TMR__VALUE_MSB = 31;
|
|
// parameter REG_WATCHDOG_TMR__VALUE_LSB = 0;
|
|
RegFunc(DecodeCpuregs2, 0xF80, RegWatchdogTmr, 0x4C, DecC2_RegWatchdogTmr, 0xfcc)
|
|
FldFunc(DecC2_RegWatchdogTmr, Value, 0, 32)
|
|
RegFunc(DecodeCpuregs2, 0xF80, RegSdramStatus, 0x50, DecC2_RegSdramStatus, 0xfd0)
|
|
FldFunc(DecC2_RegSdramStatus, Iswrite, 1, 1)
|
|
FldFunc(DecC2_RegSdramStatus, Busy, 0, 1)
|
|
|
|
/*
|
|
RegAreaFunc(DecodeCpudmaBase, 0x1800, 0x18FF)
|
|
RegFunc(DecodeCpudma, 0x1800, RegDma0SdAddr, 0x0, DecCa_RegDma0SdAddr, 0x1800)
|
|
FldFunc(DecCa_RegDma0SdAddr, SdAddr, 0, 32)
|
|
RegFunc(DecodeCpudma, 0x1800, RegDma0LclAddr, 0x4, DecCa_RegDma0LclAddr, 0x1804)
|
|
FldFunc(DecCa_RegDma0LclAddr, Addr, 2, 8)
|
|
RegFunc(DecodeCpudma, 0x1800, RegDma0Len, 0x8, DecCa_RegDma0Len, 0x1808)
|
|
FldFunc(DecCa_RegDma0Len, Length, 2, 9)
|
|
RegFunc(DecodeCpudma, 0x1800, RegDma1SdAddr, 0x10, DecCa_RegDma1SdAddr, 0x1810)
|
|
FldFunc(DecCa_RegDma1SdAddr, SdAddr, 0, 32)
|
|
RegFunc(DecodeCpudma, 0x1800, RegDma1LclAddr, 0x14, DecCa_RegDma1LclAddr, 0x1814)
|
|
FldFunc(DecCa_RegDma1LclAddr, Addr, 2, 8)
|
|
RegFunc(DecodeCpudma, 0x1800, RegDma1Len, 0x18, DecCa_RegDma1Len, 0x1818)
|
|
FldFunc(DecCa_RegDma1Len, Length, 2, 9)
|
|
RegFunc(DecodeCpudma, 0x1800, RegDma2SdAddr, 0x20, DecCa_RegDma2SdAddr, 0x1820)
|
|
FldFunc(DecCa_RegDma2SdAddr, SdAddr, 0, 32)
|
|
RegFunc(DecodeCpudma, 0x1800, RegDma2LclAddr, 0x24, DecCa_RegDma2LclAddr, 0x1824)
|
|
FldFunc(DecCa_RegDma2LclAddr, Addr, 2, 8)
|
|
RegFunc(DecodeCpudma, 0x1800, RegDma2Len, 0x28, DecCa_RegDma2Len, 0x1828)
|
|
FldFunc(DecCa_RegDma2Len, Length, 2, 9)
|
|
RegFunc(DecodeCpudma, 0x1800, RegDma3SdAddr, 0x30, DecCa_RegDma3SdAddr, 0x1830)
|
|
FldFunc(DecCa_RegDma3SdAddr, SdAddr, 0, 32)
|
|
RegFunc(DecodeCpudma, 0x1800, RegDma3LclAddr, 0x34, DecCa_RegDma3LclAddr, 0x1834)
|
|
FldFunc(DecCa_RegDma3LclAddr, Addr, 2, 8)
|
|
RegFunc(DecodeCpudma, 0x1800, RegDma3Len, 0x38, DecCa_RegDma3Len, 0x1838)
|
|
FldFunc(DecCa_RegDma3Len, Length, 2, 9)
|
|
RegFunc(DecodeCpudma, 0x1800, RegDmaStatus, 0x40, DecCa_RegDmaStatus, 0x1840)
|
|
FldFunc(DecCa_RegDmaStatus, Act3, 3, 1)
|
|
FldFunc(DecCa_RegDmaStatus, Act2, 2, 1)
|
|
FldFunc(DecCa_RegDmaStatus, Act1, 1, 1)
|
|
FldFunc(DecCa_RegDmaStatus, Act0, 0, 1)
|
|
|
|
RegAreaFunc(DecodeDmamemBase, 0x1A00, 0x21FF)
|
|
RegFunc(DecodeDmamem, 0x1A00, DmaMem, 0x0, DecDm_DmaMem, 0x1a00)
|
|
FldFunc(DecDm_DmaMem, Data, 0, 32)
|
|
*/
|
|
|
|
RegAreaFunc(RegCabac2bins2Base, 0x2400, 0x27FF)
|
|
RegFunc(RegCabac2bins2, 0x2400, RegCabac2binsRdContextId, 0x178, RegC2_RegCabac2binsRdContextId, 0x2578)
|
|
FldFunc(RegC2_RegCabac2binsRdContextId, Id, 0, 6)
|
|
RegFunc(RegCabac2bins2, 0x2400, RegCabac2binsRdBuffAddr, 0x188, RegC2_RegCabac2binsRdBuffAddr, 0x2588)
|
|
FldFunc(RegC2_RegCabac2binsRdBuffAddr, Addr, 0, 32)
|
|
RegFunc(RegCabac2bins2, 0x2400, RegCabac2binsRdBuffCtl, 0x18C, RegC2_RegCabac2binsRdBuffCtl, 0x258c)
|
|
FldFunc(RegC2_RegCabac2binsRdBuffCtl, AtMark, 4, 1)
|
|
FldFunc(RegC2_RegCabac2binsRdBuffCtl, NotRdy, 3, 1)
|
|
FldFunc(RegC2_RegCabac2binsRdBuffCtl, WrapEn, 2, 1)
|
|
FldFunc(RegC2_RegCabac2binsRdBuffCtl, Init, 1, 1)
|
|
FldFunc(RegC2_RegCabac2binsRdBuffCtl, BuffEn, 0, 1)
|
|
RegFunc(RegCabac2bins2, 0x2400, RegCabac2binsRdBuffStartAddr, 0x194, RegC2_RegCabac2binsRdBuffStartAddr, 0x2594)
|
|
FldFunc(RegC2_RegCabac2binsRdBuffStartAddr, Addr, 0, 32)
|
|
RegFunc(RegCabac2bins2, 0x2400, RegCabac2binsRdBuffEndAddr, 0x198, RegC2_RegCabac2binsRdBuffEndAddr, 0x2598)
|
|
FldFunc(RegC2_RegCabac2binsRdBuffEndAddr, Addr, 0, 32)
|
|
RegFunc(RegCabac2bins2, 0x2400, RegCabac2binsRdBuffMarkAddr, 0x17C, RegC2_RegCabac2binsRdBuffMarkAddr, 0x257c)
|
|
FldFunc(RegC2_RegCabac2binsRdBuffMarkAddr, Addr, 0, 32)
|
|
RegFunc(RegCabac2bins2, 0x2400, RegCabac2binsRdBuffStallCnt, 0x19C, RegC2_RegCabac2binsRdBuffStallCnt, 0x259c)
|
|
FldFunc(RegC2_RegCabac2binsRdBuffStallCnt, Count, 0, 32)
|
|
RegFunc(RegCabac2bins2, 0x2400, RegCabac2binsWrBuffStartAddr, 0x1A8, RegC2_RegCabac2binsWrBuffStartAddr, 0x25a8)
|
|
FldFunc(RegC2_RegCabac2binsWrBuffStartAddr, Addr, 0, 32)
|
|
RegFunc(RegCabac2bins2, 0x2400, RegCabac2binsWrBuffCtl, 0x1AC, RegC2_RegCabac2binsWrBuffCtl, 0x25ac)
|
|
FldFunc(RegC2_RegCabac2binsWrBuffCtl, BuffClose, 2, 1)
|
|
FldFunc(RegC2_RegCabac2binsWrBuffCtl, Init, 1, 1)
|
|
FldFunc(RegC2_RegCabac2binsWrBuffCtl, BuffEn, 0, 1)
|
|
RegFunc(RegCabac2bins2, 0x2400, RegCabac2binsWrBuffEndAddr, 0x1B0, RegC2_RegCabac2binsWrBuffEndAddr, 0x25b0)
|
|
FldFunc(RegC2_RegCabac2binsWrBuffEndAddr, Addr, 0, 32)
|
|
RegFunc(RegCabac2bins2, 0x2400, RegCabac2binsWrBuffMarkAddr, 0x1B4, RegC2_RegCabac2binsWrBuffMarkAddr, 0x25b4)
|
|
FldFunc(RegC2_RegCabac2binsWrBuffMarkAddr, Addr, 0, 32)
|
|
RegFunc(RegCabac2bins2, 0x2400, RegCabac2binsWrBuffStallCnt, 0x1B8, RegC2_RegCabac2binsWrBuffStallCnt, 0x25b8)
|
|
FldFunc(RegC2_RegCabac2binsWrBuffStallCnt, Count, 0, 32)
|
|
RegFunc(RegCabac2bins2, 0x2400, RegCabac2binsWrBuffAddr, 0x1BC, RegC2_RegCabac2binsWrBuffAddr, 0x25bc)
|
|
FldFunc(RegC2_RegCabac2binsWrBuffAddr, Addr, 0, 32)
|
|
RegFunc(RegCabac2bins2, 0x2400, RegCabac2binsWrContextId, 0x1C0, RegC2_RegCabac2binsWrContextId, 0x25c0)
|
|
FldFunc(RegC2_RegCabac2binsWrContextId, Id, 0, 6)
|
|
RegFunc(RegCabac2bins2, 0x2400, RegCabac2binsNotIdleCycles, 0x220, RegC2_RegCabac2binsNotIdleCycles, 0x2620)
|
|
FldFunc(RegC2_RegCabac2binsNotIdleCycles, CycleCount, 0, 32)
|
|
RegFunc(RegCabac2bins2, 0x2400, RegCabac2binsState0, 0x230, RegC2_RegCabac2binsState0, 0x2630)
|
|
FldFunc(RegC2_RegCabac2binsState0, State, 0, 11)
|
|
RegFunc(RegCabac2bins2, 0x2400, RegCabac2binsState1, 0x234, RegC2_RegCabac2binsState1, 0x2634)
|
|
FldFunc(RegC2_RegCabac2binsState1, State, 0, 11)
|
|
RegFunc(RegCabac2bins2, 0x2400, RegCabac2binsUpstripembBaseAddr, 0x300, RegC2_RegCabac2binsUpstripembBaseAddr, 0x2700)
|
|
FldFunc(RegC2_RegCabac2binsUpstripembBaseAddr, Addr, 0, 32)
|
|
RegFunc(RegCabac2bins2, 0x2400, RegCabac2binsCommandBufferAddr, 0x310, RegC2_RegCabac2binsCommandBufferAddr, 0x2710)
|
|
FldFunc(RegC2_RegCabac2binsCommandBufferAddr, Addr, 0, 32)
|
|
RegFunc(RegCabac2bins2, 0x2400, RegCabac2binsCommandBufferCount, 0x314, RegC2_RegCabac2binsCommandBufferCount, 0x2714)
|
|
FldFunc(RegC2_RegCabac2binsCommandBufferCount, CommandBufferCount, 0, 11)
|
|
RegFunc(RegCabac2bins2, 0x2400, RegCabac2binsCommandBufferLogSize, 0x318, RegC2_RegCabac2binsCommandBufferLogSize, 0x2718)
|
|
FldFunc(RegC2_RegCabac2binsCommandBufferLogSize, CommandBufferSize, 0, 5)
|
|
RegFunc(RegCabac2bins2, 0x2400, RegCabac2binsCtl, 0x32C, RegC2_RegCabac2binsCtl, 0x272c)
|
|
FldFunc(RegC2_RegCabac2binsCtl, Int, 11, 1)
|
|
FldFunc(RegC2_RegCabac2binsCtl, Busy, 10, 1)
|
|
FldFunc(RegC2_RegCabac2binsCtl, Wrnr, 9, 1)
|
|
FldFunc(RegC2_RegCabac2binsCtl, Rdnr, 8, 1)
|
|
FldFunc(RegC2_RegCabac2binsCtl, Wrmk, 7, 1)
|
|
FldFunc(RegC2_RegCabac2binsCtl, Rdmk, 6, 1)
|
|
FldFunc(RegC2_RegCabac2binsCtl, Sdpre, 5, 1)
|
|
FldFunc(RegC2_RegCabac2binsCtl, Sdq, 4, 1)
|
|
FldFunc(RegC2_RegCabac2binsCtl, Sdwr, 3, 1)
|
|
FldFunc(RegC2_RegCabac2binsCtl, Sdact, 2, 1)
|
|
FldFunc(RegC2_RegCabac2binsCtl, Sdreq, 1, 1)
|
|
FldFunc(RegC2_RegCabac2binsCtl, Reset, 0, 1)
|
|
|
|
RegAreaFunc(DecodeWptblBase, 0x3000, 0x31FF)
|
|
RegFunc(DecodeWptbl, 0x3000, DecodeWptbl, 0x0, DecWl_DecodeWptbl, 0x3000)
|
|
|
|
RegAreaFunc(DecodeSintOloopBase, 0xCC00, 0xCCFF)
|
|
RegFunc(DecodeSintOloop, 0xCC00, DecSintDmaAddr, 0x0, DecSOp_DecSintDmaAddr, 0xcc00)
|
|
FldFunc(DecSOp_DecSintDmaAddr, Addr, 5, 27)
|
|
RegFunc(DecodeSintOloop, 0xCC00, DecSintDmaLen, 0x4, DecSOp_DecSintDmaLen, 0xcc04)
|
|
FldFunc(DecSOp_DecSintDmaLen, Length, 5, 27)
|
|
RegFunc(DecodeSintOloop, 0xCC00, DecSintDmaBase, 0x8, DecSOp_DecSintDmaBase, 0xcc08)
|
|
FldFunc(DecSOp_DecSintDmaBase, Base, 6, 26)
|
|
RegFunc(DecodeSintOloop, 0xCC00, DecSintDmaEnd, 0xC, DecSOp_DecSintDmaEnd, 0xcc0c)
|
|
FldFunc(DecSOp_DecSintDmaEnd, End, 6, 26)
|
|
RegFunc(DecodeSintOloop, 0xCC00, DecSintStrmPos, 0x10, DecSOp_DecSintStrmPos, 0xcc10)
|
|
FldFunc(DecSOp_DecSintStrmPos, BitPos, 0, 32)
|
|
RegFunc(DecodeSintOloop, 0xCC00, DecSintStrmStat, 0x14, DecSOp_DecSintStrmStat, 0xcc14)
|
|
FldFunc(DecSOp_DecSintStrmStat, Rst, 16, 1)
|
|
FldFunc(DecSOp_DecSintStrmStat, Derr, 9, 1)
|
|
FldFunc(DecSOp_DecSintStrmStat, Serr, 8, 1)
|
|
FldFunc(DecSOp_DecSintStrmStat, Ccac, 6, 1)
|
|
FldFunc(DecSOp_DecSintStrmStat, Vcac, 5, 1)
|
|
FldFunc(DecSOp_DecSintStrmStat, Vact, 4, 1)
|
|
FldFunc(DecSOp_DecSintStrmStat, Dact, 3, 1)
|
|
FldFunc(DecSOp_DecSintStrmStat, Sact, 2, 1)
|
|
FldFunc(DecSOp_DecSintStrmStat, Cact, 1, 1)
|
|
FldFunc(DecSOp_DecSintStrmStat, Sval, 0, 1)
|
|
RegFunc(DecodeSintOloop, 0xCC00, DecSintIena, 0x18, DecSOp_DecSintIena, 0xcc18)
|
|
FldFunc(DecSOp_DecSintIena, Derr, 9, 1)
|
|
FldFunc(DecSOp_DecSintIena, Serr, 8, 1)
|
|
RegFunc(DecodeSintOloop, 0xCC00, DecSintStrmBits, 0x1C, DecSOp_DecSintStrmBits, 0xcc1c)
|
|
FldFunc(DecSOp_DecSintStrmBits, StreamBits, 0, 32)
|
|
RegFunc(DecodeSintOloop, 0xCC00, DecSintGetSymb, 0x20, DecSOp_DecSintGetSymb, 0xcc20)
|
|
FldFunc(DecSOp_DecSintGetSymb, Type, 12, 4)
|
|
FldFunc(DecSOp_DecSintGetSymb, Subtype, 8, 4)
|
|
FldFunc(DecSOp_DecSintGetSymb, N, 0, 8)
|
|
|
|
RegAreaFunc(DecodeSdBase, 0x40800, 0x40FFF)
|
|
RegFunc(DecodeSd, 0x40800, RegSdParam, 0x4, DecSd_RegSdParam, 0x40804)
|
|
FldFunc(DecSd_RegSdParam, BstLow, 31, 1)
|
|
FldFunc(DecSd_RegSdParam, BstVidb, 30, 1)
|
|
FldFunc(DecSd_RegSdParam, BstVida, 29, 1)
|
|
FldFunc(DecSd_RegSdParam, BstMoCmp, 28, 1)
|
|
FldFunc(DecSd_RegSdParam, Rdwr, 26, 2)
|
|
FldFunc(DecSd_RegSdParam, ClkePin, 25, 1)
|
|
FldFunc(DecSd_RegSdParam, ColmBits, 23, 2)
|
|
FldFunc(DecSd_RegSdParam, Rfc, 19, 4)
|
|
FldFunc(DecSd_RegSdParam, Wtr, 16, 3)
|
|
FldFunc(DecSd_RegSdParam, Wr, 12, 3)
|
|
FldFunc(DecSd_RegSdParam, Rrd, 10, 2)
|
|
FldFunc(DecSd_RegSdParam, Rp, 7, 3)
|
|
FldFunc(DecSd_RegSdParam, Rcd, 4, 3)
|
|
FldFunc(DecSd_RegSdParam, Ras, 0, 4)
|
|
RegFunc(DecodeSd, 0x40800, RegSdRefresh, 0x8, DecSd_RegSdRefresh, 0x40808)
|
|
FldFunc(DecSd_RegSdRefresh, En, 12, 1)
|
|
FldFunc(DecSd_RegSdRefresh, Period, 0, 12)
|
|
RegFunc(DecodeSd, 0x40800, RegSdSemaphore0, 0xC, DecSd_RegSdSemaphore0, 0x4080c)
|
|
FldFunc(DecSd_RegSdSemaphore0, Tas, 0, 1)
|
|
RegFunc(DecodeSd, 0x40800, RegSdSemaphore1, 0x10, DecSd_RegSdSemaphore1, 0x40810)
|
|
FldFunc(DecSd_RegSdSemaphore1, Tas, 0, 1)
|
|
RegFunc(DecodeSd, 0x40800, RegSdSemaphore2, 0x14, DecSd_RegSdSemaphore2, 0x40814)
|
|
FldFunc(DecSd_RegSdSemaphore2, Tas, 0, 1)
|
|
RegFunc(DecodeSd, 0x40800, RegSdSemaphore3, 0x18, DecSd_RegSdSemaphore3, 0x40818)
|
|
FldFunc(DecSd_RegSdSemaphore3, Tas, 0, 1)
|
|
RegFunc(DecodeSd, 0x40800, RegSdScratch, 0x1C, DecSd_RegSdScratch, 0x4081c)
|
|
FldFunc(DecSd_RegSdScratch, Data, 0, 32)
|
|
RegFunc(DecodeSd, 0x40800, RegSdBoostPrio, 0x20, DecSd_RegSdBoostPrio, 0x40820)
|
|
FldFunc(DecSd_RegSdBoostPrio, Mask, 0, 32)
|
|
RegFunc(DecodeSd, 0x40800, RegSdDelayAck, 0x30, DecSd_RegSdDelayAck, 0x40830)
|
|
FldFunc(DecSd_RegSdDelayAck, Delaylo, 16, 3)
|
|
FldFunc(DecSd_RegSdDelayAck, Delayhi, 12, 3)
|
|
FldFunc(DecSd_RegSdDelayAck, Delayoff, 8, 4)
|
|
FldFunc(DecSd_RegSdDelayAck, Delayon, 4, 4)
|
|
FldFunc(DecSd_RegSdDelayAck, Ena, 0, 1)
|
|
RegFunc(DecodeSd, 0x40800, RegSdDelayRd1, 0x34, DecSd_RegSdDelayRd1, 0x40834)
|
|
FldFunc(DecSd_RegSdDelayRd1, Delaylo, 16, 3)
|
|
FldFunc(DecSd_RegSdDelayRd1, Delayhi, 12, 3)
|
|
FldFunc(DecSd_RegSdDelayRd1, Delayoff, 8, 4)
|
|
FldFunc(DecSd_RegSdDelayRd1, Delayon, 4, 4)
|
|
FldFunc(DecSd_RegSdDelayRd1, Ena, 0, 1)
|
|
RegFunc(DecodeSd, 0x40800, RegSdDelayRd2, 0x38, DecSd_RegSdDelayRd2, 0x40838)
|
|
FldFunc(DecSd_RegSdDelayRd2, Delaylo, 16, 3)
|
|
FldFunc(DecSd_RegSdDelayRd2, Delayhi, 12, 3)
|
|
FldFunc(DecSd_RegSdDelayRd2, Delayoff, 8, 4)
|
|
FldFunc(DecSd_RegSdDelayRd2, Delayon, 4, 4)
|
|
FldFunc(DecSd_RegSdDelayRd2, Ena, 0, 1)
|
|
RegFunc(DecodeSd, 0x40800, RegSdRefCmd, 0x90, DecSd_RegSdRefCmd, 0x40890)
|
|
RegFunc(DecodeSd, 0x40800, RegSdLdModeCmd, 0xa0, DecSd_RegSdLdModeCmd, 0x408a0)
|
|
RegFunc(DecodeSd, 0x40800, RegSdLdEmodeCmd, 0xA4, DecSd_RegSdLdEmodeCmd, 0x408a4)
|
|
RegFunc(DecodeSd, 0x40800, RegSdPrechCmd, 0xb0, DecSd_RegSdPrechCmd, 0x408b0)
|
|
RegFunc(DecodeSd, 0x40800, RegSdPictBaseNew, 0x400, DecSd_RegSdPictBaseNew, 0x40c00)
|
|
FldFunc(DecSd_RegSdPictBaseNew, Addr, 0, 20)
|
|
RegFunc(DecodeSd, 0x40800, RegSdStripeNew, 0x100, DecSd_RegSdStripeNew, 0x40900)
|
|
FldFunc(DecSd_RegSdStripeNew, Height, 2, 11)
|
|
FldFunc(DecSd_RegSdStripeNew, Width, 0, 2)
|
|
|
|
RegAreaFunc(DecodeDqsCtlBase, 0x40700, 0x407FF)
|
|
RegFunc(DecodeDqsCtl, 0x40700, RegSdDqsCtl, 0x0, DecDCl_RegSdDqsCtl, 0x40700)
|
|
FldFunc(DecDCl_RegSdDqsCtl, ClIs2pt5, 26, 1)
|
|
FldFunc(DecDCl_RegSdDqsCtl, SampleEn, 25, 1)
|
|
FldFunc(DecDCl_RegSdDqsCtl, DqsDelayOverride, 24, 1)
|
|
FldFunc(DecDCl_RegSdDqsCtl, Mhz, 20, 4)
|
|
FldFunc(DecDCl_RegSdDqsCtl, PulseWidth, 16, 4)
|
|
FldFunc(DecDCl_RegSdDqsCtl, Dqs3Delay, 12, 4)
|
|
FldFunc(DecDCl_RegSdDqsCtl, Dqs2Delay, 8, 4)
|
|
FldFunc(DecDCl_RegSdDqsCtl, Dqs1Delay, 4, 4)
|
|
FldFunc(DecDCl_RegSdDqsCtl, Dqs0Delay, 0, 4)
|
|
RegFunc(DecodeDqsCtl, 0x40700, RegSdDdrDriverCtl , 0x4, DecDCl_RegSdDdrDriverCtl , 0x40704)
|
|
FldFunc(DecDCl_RegSdDdrDriverCtl , Class2Ctl, 12, 1)
|
|
FldFunc(DecDCl_RegSdDdrDriverCtl , SCtl, 10, 2)
|
|
FldFunc(DecDCl_RegSdDdrDriverCtl , DCtl, 8, 2)
|
|
FldFunc(DecDCl_RegSdDdrDriverCtl , Class2Dq, 4, 1)
|
|
FldFunc(DecDCl_RegSdDdrDriverCtl , SDq, 2, 2)
|
|
FldFunc(DecDCl_RegSdDdrDriverCtl , DDq, 0, 2)
|
|
|
|
RegAreaFunc(DecodeIndSdramRegsBase, 0x41000, 0x4107F)
|
|
RegFunc(DecodeIndSdramRegs, 0x41000, RegSdramInc, 0x0, DecISRs_RegSdramInc, 0x41000)
|
|
FldFunc(DecISRs_RegSdramInc, Inc, 0, 1)
|
|
RegFunc(DecodeIndSdramRegs, 0x41000, RegSdramAddr, 0x4, DecISRs_RegSdramAddr, 0x41004)
|
|
FldFunc(DecISRs_RegSdramAddr, Addr, 0, 32)
|
|
RegFunc(DecodeIndSdramRegs, 0x41000, RegSdramData, 0x8, DecISRs_RegSdramData, 0x41008)
|
|
FldFunc(DecISRs_RegSdramData, Data, 0, 32)
|
|
RegFunc(DecodeIndSdramRegs, 0x41000, RegCpuDbg, 0x10, DecISRs_RegCpuDbg, 0x41010)
|
|
FldFunc(DecISRs_RegCpuDbg, Hst, 0, 1)
|
|
|
|
//parameter REG_SDRAM_STAT = 32'h14;
|
|
// parameter REG_SDRAM_STAT__ISWRITE_WIDTH = 1;
|
|
// parameter REG_SDRAM_STAT__ISWRITE_MSB = 1;
|
|
// parameter REG_SDRAM_STAT__ISWRITE_LSB = 1;
|
|
// parameter REG_SDRAM_STAT__BUSY_WIDTH = 1;
|
|
// parameter REG_SDRAM_STAT__BUSY_MSB = 0;
|
|
// parameter REG_SDRAM_STAT__BUSY_LSB = 0;
|
|
//RegFunc(DecodeIndSdramRegs, 0x41000, RegSdramStat, 0x14, DecISRs_RegSdramStat, 0x41014)
|
|
//FldFunc(DecISRs_RegSdramStat, Iswrite, 1, 1)
|
|
//FldFunc(DecISRs_RegSdramStat, Busy, 0, 1)
|
|
|
|
RegAreaFunc(DecodeCpucoreBase, 0x44000, 0x44FFF)
|
|
RegFunc(DecodeCpucore, 0x44000, CpucoreReg, 0x0, DecCe_CpucoreReg, 0x44000)
|
|
FldFunc(DecCe_CpucoreReg, Addr, 0, 32)
|
|
|
|
RegAreaFunc(DecodeCpuauxBase, 0x45000, 0x45FFF)
|
|
RegFunc(DecodeCpuaux, 0x45000, CpuauxReg, 0x0, DecCx_CpuauxReg, 0x45000)
|
|
FldFunc(DecCx_CpuauxReg, Addr, 0, 32)
|
|
|
|
RegAreaFunc(DecodeCpuimemBase, 0x46000, 0x47FFF)
|
|
RegFunc(DecodeCpuimem, 0x46000, CpuimemReg, 0x0, DecCm_CpuimemReg, 0x46000)
|
|
FldFunc(DecCm_CpuimemReg, Addr, 0, 32)
|
|
|
|
RegAreaFunc(DecodeCpudmemBase, 0x48000, 0x4FFFF)
|
|
RegFunc(DecodeCpudmem, 0x48000, CpudmemReg, 0x0, DecCm_CpudmemReg, 0x48000)
|
|
FldFunc(DecCm_CpudmemReg, Addr, 0, 32)
|
|
|
|
RegAreaFunc(DecodeIndSdramRegs2Base, 0x51000, 0x5107F)
|
|
RegFunc(DecodeIndSdramRegs2, 0x51000, RegSdramInc, 0x0, DecISR2_RegSdramInc, 0x51000)
|
|
FldFunc(DecISR2_RegSdramInc, Inc, 0, 1)
|
|
RegFunc(DecodeIndSdramRegs2, 0x51000, RegSdramAddr, 0x4, DecISR2_RegSdramAddr, 0x51004)
|
|
FldFunc(DecISR2_RegSdramAddr, Addr, 0, 32)
|
|
RegFunc(DecodeIndSdramRegs2, 0x51000, RegSdramData, 0x8, DecISR2_RegSdramData, 0x51008)
|
|
FldFunc(DecISR2_RegSdramData, Data, 0, 32)
|
|
RegFunc(DecodeIndSdramRegs2, 0x51000, RegCpuDbg, 0x10, DecISR2_RegCpuDbg, 0x51010)
|
|
FldFunc(DecISR2_RegCpuDbg, Hst, 0, 1)
|
|
|
|
//parameter REG_SDRAM_STAT_1 = 32'h14;
|
|
// parameter REG_SDRAM_STAT_1__ISWRITE_WIDTH = 1;
|
|
// parameter REG_SDRAM_STAT_1__ISWRITE_MSB = 1;
|
|
// parameter REG_SDRAM_STAT_1__ISWRITE_LSB = 1;
|
|
// parameter REG_SDRAM_STAT_1__BUSY_WIDTH = 1;
|
|
// parameter REG_SDRAM_STAT_1__BUSY_MSB = 0;
|
|
// parameter REG_SDRAM_STAT_1__BUSY_LSB = 0;
|
|
//RegFunc(DecodeIndSdramRegs2, 0x51000, RegSdramStat, 0x14, DecISR2_RegSdramStat, 0x51014)
|
|
//FldFunc(DecISR2_RegSdramStat, Iswrite, 1, 1)
|
|
//FldFunc(DecISR2_RegSdramStat, Busy, 0, 1)
|
|
|
|
RegAreaFunc(DecodeCpudma2Base, 0x51800, 0x518FF)
|
|
RegFunc(DecodeCpudma2, 0x51800, RegDma0SdAddr, 0x0, DecC2_RegDma0SdAddr, 0x51800)
|
|
FldFunc(DecC2_RegDma0SdAddr, SdAddr, 0, 32)
|
|
RegFunc(DecodeCpudma2, 0x51800, RegDma0LclAddr, 0x4, DecC2_RegDma0LclAddr, 0x51804)
|
|
FldFunc(DecC2_RegDma0LclAddr, Addr, 2, 8)
|
|
RegFunc(DecodeCpudma2, 0x51800, RegDma0Len, 0x8, DecC2_RegDma0Len, 0x51808)
|
|
FldFunc(DecC2_RegDma0Len, Length, 2, 9)
|
|
RegFunc(DecodeCpudma2, 0x51800, RegDma1SdAddr, 0x10, DecC2_RegDma1SdAddr, 0x51810)
|
|
FldFunc(DecC2_RegDma1SdAddr, SdAddr, 0, 32)
|
|
RegFunc(DecodeCpudma2, 0x51800, RegDma1LclAddr, 0x14, DecC2_RegDma1LclAddr, 0x51814)
|
|
FldFunc(DecC2_RegDma1LclAddr, Addr, 2, 8)
|
|
RegFunc(DecodeCpudma2, 0x51800, RegDma1Len, 0x18, DecC2_RegDma1Len, 0x51818)
|
|
FldFunc(DecC2_RegDma1Len, Length, 2, 9)
|
|
RegFunc(DecodeCpudma2, 0x51800, RegDma2SdAddr, 0x20, DecC2_RegDma2SdAddr, 0x51820)
|
|
FldFunc(DecC2_RegDma2SdAddr, SdAddr, 0, 32)
|
|
RegFunc(DecodeCpudma2, 0x51800, RegDma2LclAddr, 0x24, DecC2_RegDma2LclAddr, 0x51824)
|
|
FldFunc(DecC2_RegDma2LclAddr, Addr, 2, 8)
|
|
RegFunc(DecodeCpudma2, 0x51800, RegDma2Len, 0x28, DecC2_RegDma2Len, 0x51828)
|
|
FldFunc(DecC2_RegDma2Len, Length, 2, 9)
|
|
RegFunc(DecodeCpudma2, 0x51800, RegDma3SdAddr, 0x30, DecC2_RegDma3SdAddr, 0x51830)
|
|
FldFunc(DecC2_RegDma3SdAddr, SdAddr, 0, 32)
|
|
RegFunc(DecodeCpudma2, 0x51800, RegDma3LclAddr, 0x34, DecC2_RegDma3LclAddr, 0x51834)
|
|
FldFunc(DecC2_RegDma3LclAddr, Addr, 2, 8)
|
|
RegFunc(DecodeCpudma2, 0x51800, RegDma3Len, 0x38, DecC2_RegDma3Len, 0x51838)
|
|
FldFunc(DecC2_RegDma3Len, Length, 2, 9)
|
|
RegFunc(DecodeCpudma2, 0x51800, RegDmaStatus, 0x40, DecC2_RegDmaStatus, 0x51840)
|
|
FldFunc(DecC2_RegDmaStatus, Act3, 3, 1)
|
|
FldFunc(DecC2_RegDmaStatus, Act2, 2, 1)
|
|
FldFunc(DecC2_RegDmaStatus, Act1, 1, 1)
|
|
FldFunc(DecC2_RegDmaStatus, Act0, 0, 1)
|
|
|
|
RegAreaFunc(DecodeDmamem2Base, 0x51A00, 0x521FF)
|
|
RegFunc(DecodeDmamem2, 0x51A00, DmaMem, 0x0, DecD2_DmaMem, 0x51a00)
|
|
FldFunc(DecD2_DmaMem, Data, 0, 32)
|
|
|
|
RegAreaFunc(DecodeCpucore2Base, 0x54000, 0x54FFF)
|
|
RegFunc(DecodeCpucore2, 0x54000, CpucoreReg, 0x0, DecC2_CpucoreReg, 0x54000)
|
|
FldFunc(DecC2_CpucoreReg, Addr, 0, 32)
|
|
|
|
RegAreaFunc(DecodeCpuaux2Base, 0x55000, 0x55FFF)
|
|
RegFunc(DecodeCpuaux2, 0x55000, CpuauxReg, 0x0, DecC2_CpuauxReg, 0x55000)
|
|
FldFunc(DecC2_CpuauxReg, Addr, 0, 32)
|
|
|
|
RegAreaFunc(DecodeCpuimem2Base, 0x56000, 0x57FFF)
|
|
RegFunc(DecodeCpuimem2, 0x56000, CpuimemReg, 0x0, DecC2_CpuimemReg, 0x56000)
|
|
FldFunc(DecC2_CpuimemReg, Addr, 0, 32)
|
|
|
|
RegAreaFunc(DecodeCpudmem2Base, 0x58000, 0x5FFFF)
|
|
RegFunc(DecodeCpudmem2, 0x58000, CpudmemReg, 0x0, DecC2_CpudmemReg, 0x58000)
|
|
FldFunc(DecC2_CpudmemReg, Addr, 0, 32)
|
|
|
|
#endif
|
|
|
|
|
|
//******************************************************************************
|
|
//
|
|
// Stream Processor Ring Bus Node
|
|
//
|
|
//******************************************************************************
|
|
#ifndef EXCLUDE_STREAM_PROCESSOR
|
|
|
|
RegAreaFunc(StreamRbnodeRegsBase, 0x100000, 0x10007F)
|
|
RegFunc(StreamRbnodeRegs, 0x100000, RbConfig , 0x0, StrRRs_RbConfig , 0x100000)
|
|
FldFunc(StrRRs_RbConfig , RdPostEna, 1, 1)
|
|
FldFunc(StrRRs_RbConfig , RdBypEna, 0, 1)
|
|
RegFunc(StreamRbnodeRegs, 0x100000, RbStickyError, 0x4, StrRRs_RbStickyError, 0x100004)
|
|
FldFunc(StrRRs_RbStickyError, Node, 1, 1)
|
|
FldFunc(StrRRs_RbStickyError, Tgt, 0, 1)
|
|
RegFunc(StreamRbnodeRegs, 0x100000, RbCurrentError, 0x8, StrRRs_RbCurrentError, 0x100008)
|
|
FldFunc(StrRRs_RbCurrentError, Node, 1, 1)
|
|
FldFunc(StrRRs_RbCurrentError, Tgt, 0, 1)
|
|
RegFunc(StreamRbnodeRegs, 0x100000, RbReadData, 0xC, StrRRs_RbReadData, 0x10000c)
|
|
FldFunc(StrRRs_RbReadData, Data, 0, 32)
|
|
|
|
RegAreaFunc(StreamRingbusDebugRegsBase, 0x100080, 0x1000FF)
|
|
RegFunc(StreamRingbusDebugRegs, 0x100080, RbDebugConfig, 0x0, StrRDRs_RbDebugConfig, 0x100080)
|
|
FldFunc(StrRDRs_RbDebugConfig, Addr3WrStat, 15, 1)
|
|
FldFunc(StrRDRs_RbDebugConfig, Addr2WrStat, 14, 1)
|
|
FldFunc(StrRDRs_RbDebugConfig, Addr1WrStat, 13, 1)
|
|
FldFunc(StrRDRs_RbDebugConfig, Addr0WrStat, 12, 1)
|
|
FldFunc(StrRDRs_RbDebugConfig, Addr3RdStat, 11, 1)
|
|
FldFunc(StrRDRs_RbDebugConfig, Addr2RdStat, 10, 1)
|
|
FldFunc(StrRDRs_RbDebugConfig, Addr1RdStat, 9, 1)
|
|
FldFunc(StrRDRs_RbDebugConfig, Addr0RdStat, 8, 1)
|
|
FldFunc(StrRDRs_RbDebugConfig, Addr3WrEna, 7, 1)
|
|
FldFunc(StrRDRs_RbDebugConfig, Addr2WrEna, 6, 1)
|
|
FldFunc(StrRDRs_RbDebugConfig, Addr1WrEna, 5, 1)
|
|
FldFunc(StrRDRs_RbDebugConfig, Addr0WrEna, 4, 1)
|
|
FldFunc(StrRDRs_RbDebugConfig, Addr3RdEna, 3, 1)
|
|
FldFunc(StrRDRs_RbDebugConfig, Addr2RdEna, 2, 1)
|
|
FldFunc(StrRDRs_RbDebugConfig, Addr1RdEna, 1, 1)
|
|
FldFunc(StrRDRs_RbDebugConfig, Addr0RdEna, 0, 1)
|
|
RegFunc(StreamRingbusDebugRegs, 0x100080, RbDebugReg0Addr, 0x4, StrRDRs_RbDebugReg0Addr, 0x100084)
|
|
FldFunc(StrRDRs_RbDebugReg0Addr, Addr, 0, 16)
|
|
RegFunc(StreamRingbusDebugRegs, 0x100080, RbDebugReg1Addr, 0x8, StrRDRs_RbDebugReg1Addr, 0x100088)
|
|
FldFunc(StrRDRs_RbDebugReg1Addr, Addr, 0, 16)
|
|
RegFunc(StreamRingbusDebugRegs, 0x100080, RbDebugReg2Addr, 0xC, StrRDRs_RbDebugReg2Addr, 0x10008c)
|
|
FldFunc(StrRDRs_RbDebugReg2Addr, Addr, 0, 16)
|
|
RegFunc(StreamRingbusDebugRegs, 0x100080, RbDebugReg3Addr, 0x10, StrRDRs_RbDebugReg3Addr, 0x100090)
|
|
FldFunc(StrRDRs_RbDebugReg3Addr, Addr, 0, 16)
|
|
RegFunc(StreamRingbusDebugRegs, 0x100080, RbDebugOutputReg, 0x14, StrRDRs_RbDebugOutputReg, 0x100094)
|
|
FldFunc(StrRDRs_RbDebugOutputReg, DspRst, 1, 1)
|
|
FldFunc(StrRDRs_RbDebugOutputReg, FmmRst, 0, 1)
|
|
|
|
RegAreaFunc(StreamTsRegsABase, 0x100400, 0x1005FF)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsCtl, 0x0, StrTRA_TsCtl, 0x100400)
|
|
FldFunc(StrTRA_TsCtl, Aao, 22, 1)
|
|
FldFunc(StrTRA_TsCtl, Dcd, 21, 1)
|
|
FldFunc(StrTRA_TsCtl, Rtsu, 20, 1)
|
|
FldFunc(StrTRA_TsCtl, Rte, 19, 1)
|
|
FldFunc(StrTRA_TsCtl, Efs, 18, 1)
|
|
FldFunc(StrTRA_TsCtl, Via, 17, 1)
|
|
FldFunc(StrTRA_TsCtl, Spi, 16, 1)
|
|
FldFunc(StrTRA_TsCtl, Udtaf, 15, 1)
|
|
FldFunc(StrTRA_TsCtl, Dd, 14, 1)
|
|
FldFunc(StrTRA_TsCtl, Rde, 12, 1)
|
|
FldFunc(StrTRA_TsCtl, Rse, 11, 1)
|
|
FldFunc(StrTRA_TsCtl, Im, 10, 1)
|
|
FldFunc(StrTRA_TsCtl, Serm, 9, 1)
|
|
FldFunc(StrTRA_TsCtl, Syncm, 8, 1)
|
|
FldFunc(StrTRA_TsCtl, Tsm, 7, 1)
|
|
FldFunc(StrTRA_TsCtl, Tsdm, 6, 1)
|
|
FldFunc(StrTRA_TsCtl, Pcru, 5, 1)
|
|
FldFunc(StrTRA_TsCtl, Vm, 4, 1)
|
|
FldFunc(StrTRA_TsCtl, Psm, 3, 1)
|
|
FldFunc(StrTRA_TsCtl, Sync, 2, 1)
|
|
FldFunc(StrTRA_TsCtl, Ss, 1, 1)
|
|
FldFunc(StrTRA_TsCtl, Byps, 0, 1)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsPcrRx0, 0x4, StrTRA_TsPcrRx0, 0x100404)
|
|
FldFunc(StrTRA_TsPcrRx0, Rpcrb, 16, 16)
|
|
FldFunc(StrTRA_TsPcrRx0, Rpcre, 0, 9)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsPcrRx1, 0x8, StrTRA_TsPcrRx1, 0x100408)
|
|
FldFunc(StrTRA_TsPcrRx1, Rpcrb, 0, 17)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsStcCntr0, 0xC, StrTRA_TsStcCntr0, 0x10040c)
|
|
FldFunc(StrTRA_TsStcCntr0, Ppcrb, 16, 16)
|
|
FldFunc(StrTRA_TsStcCntr0, Ppcre, 0, 5)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsStcCntr1, 0x10, StrTRA_TsStcCntr1, 0x100410)
|
|
FldFunc(StrTRA_TsStcCntr1, Ppcrb, 0, 17)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsPidVid, 0x14, StrTRA_TsPidVid, 0x100414)
|
|
FldFunc(StrTRA_TsPidVid, Siee, 26, 1)
|
|
FldFunc(StrTRA_TsPidVid, Sube, 25, 1)
|
|
FldFunc(StrTRA_TsPidVid, Priv, 23, 2)
|
|
FldFunc(StrTRA_TsPidVid, Typ, 22, 1)
|
|
FldFunc(StrTRA_TsPidVid, Piu, 21, 1)
|
|
FldFunc(StrTRA_TsPidVid, Si, 13, 8)
|
|
FldFunc(StrTRA_TsPidVid, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsPidPcr, 0x18, StrTRA_TsPidPcr, 0x100418)
|
|
FldFunc(StrTRA_TsPidPcr, Piu, 21, 1)
|
|
FldFunc(StrTRA_TsPidPcr, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUpdate0, 0x1C, StrTRA_TsUpdate0, 0x10041c)
|
|
FldFunc(StrTRA_TsUpdate0, Cpcrb, 16, 16)
|
|
FldFunc(StrTRA_TsUpdate0, Cpcre, 0, 9)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUpdate1, 0x20, StrTRA_TsUpdate1, 0x100420)
|
|
FldFunc(StrTRA_TsUpdate1, Cpcrb, 0, 17)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsRefCnt, 0x24, StrTRA_TsRefCnt, 0x100424)
|
|
FldFunc(StrTRA_TsRefCnt, Rfcnt, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsPidAud0, 0x28, StrTRA_TsPidAud0, 0x100428)
|
|
FldFunc(StrTRA_TsPidAud0, Siee, 26, 1)
|
|
FldFunc(StrTRA_TsPidAud0, Sube, 25, 1)
|
|
FldFunc(StrTRA_TsPidAud0, Priv, 23, 2)
|
|
FldFunc(StrTRA_TsPidAud0, Typ, 22, 1)
|
|
FldFunc(StrTRA_TsPidAud0, Piu, 21, 1)
|
|
FldFunc(StrTRA_TsPidAud0, Si, 13, 8)
|
|
FldFunc(StrTRA_TsPidAud0, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsPidAud1, 0x2C, StrTRA_TsPidAud1, 0x10042c)
|
|
FldFunc(StrTRA_TsPidAud1, Siee, 26, 1)
|
|
FldFunc(StrTRA_TsPidAud1, Sube, 25, 1)
|
|
FldFunc(StrTRA_TsPidAud1, Priv, 23, 2)
|
|
FldFunc(StrTRA_TsPidAud1, Typ, 22, 1)
|
|
FldFunc(StrTRA_TsPidAud1, Piu, 21, 1)
|
|
FldFunc(StrTRA_TsPidAud1, Si, 13, 8)
|
|
FldFunc(StrTRA_TsPidAud1, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsPidAud2, 0x30, StrTRA_TsPidAud2, 0x100430)
|
|
FldFunc(StrTRA_TsPidAud2, Siee, 26, 1)
|
|
FldFunc(StrTRA_TsPidAud2, Sube, 25, 1)
|
|
FldFunc(StrTRA_TsPidAud2, Priv, 23, 2)
|
|
FldFunc(StrTRA_TsPidAud2, Typ, 22, 1)
|
|
FldFunc(StrTRA_TsPidAud2, Piu, 21, 1)
|
|
FldFunc(StrTRA_TsPidAud2, Si, 13, 8)
|
|
FldFunc(StrTRA_TsPidAud2, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsPidUser0, 0x34, StrTRA_TsPidUser0, 0x100434)
|
|
FldFunc(StrTRA_TsPidUser0, Piu, 21, 1)
|
|
FldFunc(StrTRA_TsPidUser0, Si, 13, 8)
|
|
FldFunc(StrTRA_TsPidUser0, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsPidUser1, 0x38, StrTRA_TsPidUser1, 0x100438)
|
|
FldFunc(StrTRA_TsPidUser1, Piu, 21, 1)
|
|
FldFunc(StrTRA_TsPidUser1, Si, 13, 8)
|
|
FldFunc(StrTRA_TsPidUser1, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsPidUser2, 0x3C, StrTRA_TsPidUser2, 0x10043c)
|
|
FldFunc(StrTRA_TsPidUser2, Piu, 21, 1)
|
|
FldFunc(StrTRA_TsPidUser2, Si, 13, 8)
|
|
FldFunc(StrTRA_TsPidUser2, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsPidUser3, 0x40, StrTRA_TsPidUser3, 0x100440)
|
|
FldFunc(StrTRA_TsPidUser3, Piu, 21, 1)
|
|
FldFunc(StrTRA_TsPidUser3, Si, 13, 8)
|
|
FldFunc(StrTRA_TsPidUser3, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsPidUser4, 0x44, StrTRA_TsPidUser4, 0x100444)
|
|
FldFunc(StrTRA_TsPidUser4, Piu, 21, 1)
|
|
FldFunc(StrTRA_TsPidUser4, Si, 13, 8)
|
|
FldFunc(StrTRA_TsPidUser4, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsPcrChanged, 0x48, StrTRA_TsPcrChanged, 0x100448)
|
|
FldFunc(StrTRA_TsPcrChanged, Pcrc, 0, 1)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsFifoStatus, 0x4C, StrTRA_TsFifoStatus, 0x10044c)
|
|
FldFunc(StrTRA_TsFifoStatus, Ue, 20, 1)
|
|
FldFunc(StrTRA_TsFifoStatus, Uaf, 19, 1)
|
|
FldFunc(StrTRA_TsFifoStatus, Dfaf, 16, 1)
|
|
FldFunc(StrTRA_TsFifoStatus, Dfe, 15, 1)
|
|
FldFunc(StrTRA_TsFifoStatus, Vaf, 13, 1)
|
|
FldFunc(StrTRA_TsFifoStatus, De, 12, 1)
|
|
FldFunc(StrTRA_TsFifoStatus, Daf, 11, 1)
|
|
FldFunc(StrTRA_TsFifoStatus, Pe, 10, 1)
|
|
FldFunc(StrTRA_TsFifoStatus, Paf, 9, 1)
|
|
FldFunc(StrTRA_TsFifoStatus, Hfo, 8, 1)
|
|
FldFunc(StrTRA_TsFifoStatus, Hfhe, 7, 1)
|
|
FldFunc(StrTRA_TsFifoStatus, Hfe, 6, 1)
|
|
FldFunc(StrTRA_TsFifoStatus, Hfaf, 5, 1)
|
|
FldFunc(StrTRA_TsFifoStatus, Efo, 4, 1)
|
|
FldFunc(StrTRA_TsFifoStatus, Efhe, 3, 1)
|
|
FldFunc(StrTRA_TsFifoStatus, Efe, 2, 1)
|
|
FldFunc(StrTRA_TsFifoStatus, Efaf, 1, 1)
|
|
FldFunc(StrTRA_TsFifoStatus, Eff, 0, 1)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsSoftReset, 0x50, StrTRA_TsSoftReset, 0x100450)
|
|
FldFunc(StrTRA_TsSoftReset, Srst, 0, 1)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsOosCnt, 0x54, StrTRA_TsOosCnt, 0x100454)
|
|
FldFunc(StrTRA_TsOosCnt, Oosc, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsDiscontCnt, 0x58, StrTRA_TsDiscontCnt, 0x100458)
|
|
FldFunc(StrTRA_TsDiscontCnt, Dc, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsSpmresyncCnt, 0x5C, StrTRA_TsSpmresyncCnt, 0x10045c)
|
|
FldFunc(StrTRA_TsSpmresyncCnt, Spmrc, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUserOflwDone, 0x60, StrTRA_TsUserOflwDone, 0x100460)
|
|
FldFunc(StrTRA_TsUserOflwDone, U4d, 4, 1)
|
|
FldFunc(StrTRA_TsUserOflwDone, U3d, 3, 1)
|
|
FldFunc(StrTRA_TsUserOflwDone, U2d, 2, 1)
|
|
FldFunc(StrTRA_TsUserOflwDone, U1d, 1, 1)
|
|
FldFunc(StrTRA_TsUserOflwDone, U0d, 0, 1)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser0Base, 0x64, StrTRA_TsUser0Base, 0x100464)
|
|
FldFunc(StrTRA_TsUser0Base, Base, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser0Rptr, 0x68, StrTRA_TsUser0Rptr, 0x100468)
|
|
FldFunc(StrTRA_TsUser0Rptr, Rptr, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser0Wrptr, 0x6C, StrTRA_TsUser0Wrptr, 0x10046c)
|
|
FldFunc(StrTRA_TsUser0Wrptr, Wrptr, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser0Len, 0x70, StrTRA_TsUser0Len, 0x100470)
|
|
FldFunc(StrTRA_TsUser0Len, Len, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser0End, 0x74, StrTRA_TsUser0End, 0x100474)
|
|
FldFunc(StrTRA_TsUser0End, End, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser0Empty, 0x78, StrTRA_TsUser0Empty, 0x100478)
|
|
FldFunc(StrTRA_TsUser0Empty, E, 0, 1)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser1Base, 0x7C, StrTRA_TsUser1Base, 0x10047c)
|
|
FldFunc(StrTRA_TsUser1Base, Base, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser1Rptr, 0x80, StrTRA_TsUser1Rptr, 0x100480)
|
|
FldFunc(StrTRA_TsUser1Rptr, Rptr, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser1Wrptr, 0x84, StrTRA_TsUser1Wrptr, 0x100484)
|
|
FldFunc(StrTRA_TsUser1Wrptr, Wrptr, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser1Len, 0x88, StrTRA_TsUser1Len, 0x100488)
|
|
FldFunc(StrTRA_TsUser1Len, Len, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser1End, 0x8C, StrTRA_TsUser1End, 0x10048c)
|
|
FldFunc(StrTRA_TsUser1End, End, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser1Empty, 0x90, StrTRA_TsUser1Empty, 0x100490)
|
|
FldFunc(StrTRA_TsUser1Empty, E, 0, 1)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser2Base, 0x94, StrTRA_TsUser2Base, 0x100494)
|
|
FldFunc(StrTRA_TsUser2Base, Base, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser2Rptr, 0x98, StrTRA_TsUser2Rptr, 0x100498)
|
|
FldFunc(StrTRA_TsUser2Rptr, Rptr, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser2Wrptr, 0x9C, StrTRA_TsUser2Wrptr, 0x10049c)
|
|
FldFunc(StrTRA_TsUser2Wrptr, Wrptr, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser2Len, 0xA0, StrTRA_TsUser2Len, 0x1004a0)
|
|
FldFunc(StrTRA_TsUser2Len, Len, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser2End, 0xA4, StrTRA_TsUser2End, 0x1004a4)
|
|
FldFunc(StrTRA_TsUser2End, End, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser2Empty, 0xA8, StrTRA_TsUser2Empty, 0x1004a8)
|
|
FldFunc(StrTRA_TsUser2Empty, E, 0, 1)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser3Base, 0xAC, StrTRA_TsUser3Base, 0x1004ac)
|
|
FldFunc(StrTRA_TsUser3Base, Base, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser3Rptr, 0xB0, StrTRA_TsUser3Rptr, 0x1004b0)
|
|
FldFunc(StrTRA_TsUser3Rptr, Rptr, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser3Wrptr, 0xB4, StrTRA_TsUser3Wrptr, 0x1004b4)
|
|
FldFunc(StrTRA_TsUser3Wrptr, Wrptr, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser3Len, 0xB8, StrTRA_TsUser3Len, 0x1004b8)
|
|
FldFunc(StrTRA_TsUser3Len, Len, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser3End, 0xBC, StrTRA_TsUser3End, 0x1004bc)
|
|
FldFunc(StrTRA_TsUser3End, End, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser3Empty, 0xC0, StrTRA_TsUser3Empty, 0x1004c0)
|
|
FldFunc(StrTRA_TsUser3Empty, E, 0, 1)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser4Base, 0xC4, StrTRA_TsUser4Base, 0x1004c4)
|
|
FldFunc(StrTRA_TsUser4Base, Base, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser4Rptr, 0xC8, StrTRA_TsUser4Rptr, 0x1004c8)
|
|
FldFunc(StrTRA_TsUser4Rptr, Rptr, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser4Wrptr, 0xCC, StrTRA_TsUser4Wrptr, 0x1004cc)
|
|
FldFunc(StrTRA_TsUser4Wrptr, Wrptr, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser4Len, 0xD0, StrTRA_TsUser4Len, 0x1004d0)
|
|
FldFunc(StrTRA_TsUser4Len, Len, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser4End, 0xD4, StrTRA_TsUser4End, 0x1004d4)
|
|
FldFunc(StrTRA_TsUser4End, End, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser4Empty, 0xD8, StrTRA_TsUser4Empty, 0x1004d8)
|
|
FldFunc(StrTRA_TsUser4Empty, E, 0, 1)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsPktDropCnt, 0xDC, StrTRA_TsPktDropCnt, 0x1004dc)
|
|
FldFunc(StrTRA_TsPktDropCnt, Cnt, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsPktErrCnt, 0xE0, StrTRA_TsPktErrCnt, 0x1004e0)
|
|
FldFunc(StrTRA_TsPktErrCnt, Cnt, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsVidPktCnt, 0xE4, StrTRA_TsVidPktCnt, 0x1004e4)
|
|
FldFunc(StrTRA_TsVidPktCnt, Cnt, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsAud0PktCnt, 0xE8, StrTRA_TsAud0PktCnt, 0x1004e8)
|
|
FldFunc(StrTRA_TsAud0PktCnt, Cnt, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsAud1PktCnt, 0xEC, StrTRA_TsAud1PktCnt, 0x1004ec)
|
|
FldFunc(StrTRA_TsAud1PktCnt, Cnt, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsAud2PktCnt, 0xF0, StrTRA_TsAud2PktCnt, 0x1004f0)
|
|
FldFunc(StrTRA_TsAud2PktCnt, Cnt, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUserPktCnt, 0xF4, StrTRA_TsUserPktCnt, 0x1004f4)
|
|
FldFunc(StrTRA_TsUserPktCnt, Cnt, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsDescramCtl, 0xF8, StrTRA_TsDescramCtl, 0x1004f8)
|
|
FldFunc(StrTRA_TsDescramCtl, Drph, 11, 1)
|
|
FldFunc(StrTRA_TsDescramCtl, Pkt, 10, 1)
|
|
FldFunc(StrTRA_TsDescramCtl, Est, 8, 2)
|
|
FldFunc(StrTRA_TsDescramCtl, Ost, 6, 2)
|
|
FldFunc(StrTRA_TsDescramCtl, Usc, 5, 1)
|
|
FldFunc(StrTRA_TsDescramCtl, Scctl, 4, 1)
|
|
FldFunc(StrTRA_TsDescramCtl, Scmod, 3, 1)
|
|
FldFunc(StrTRA_TsDescramCtl, Trmtyp, 2, 1)
|
|
FldFunc(StrTRA_TsDescramCtl, Type, 1, 1)
|
|
FldFunc(StrTRA_TsDescramCtl, En, 0, 1)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsKeyEven0, 0xFC, StrTRA_TsKeyEven0, 0x1004fc)
|
|
FldFunc(StrTRA_TsKeyEven0, Key310, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsKeyEven1, 0x100, StrTRA_TsKeyEven1, 0x100500)
|
|
FldFunc(StrTRA_TsKeyEven1, Key6332, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsKeyEven2, 0x104, StrTRA_TsKeyEven2, 0x100504)
|
|
FldFunc(StrTRA_TsKeyEven2, Key9564, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsKeyEven3, 0x108, StrTRA_TsKeyEven3, 0x100508)
|
|
FldFunc(StrTRA_TsKeyEven3, Key12796, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsKeyOdd0, 0x10C, StrTRA_TsKeyOdd0, 0x10050c)
|
|
FldFunc(StrTRA_TsKeyOdd0, Key310, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsKeyOdd1, 0x110, StrTRA_TsKeyOdd1, 0x100510)
|
|
FldFunc(StrTRA_TsKeyOdd1, Key6332, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsKeyOdd2, 0x114, StrTRA_TsKeyOdd2, 0x100514)
|
|
FldFunc(StrTRA_TsKeyOdd2, Key9564, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsKeyOdd3, 0x118, StrTRA_TsKeyOdd3, 0x100518)
|
|
FldFunc(StrTRA_TsKeyOdd3, Key12796, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsStcIsCrap, 0x11C, StrTRA_TsStcIsCrap, 0x10051c)
|
|
FldFunc(StrTRA_TsStcIsCrap, Typ, 1, 1)
|
|
FldFunc(StrTRA_TsStcIsCrap, Sic, 0, 1)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsTsdAdconfig, 0x120, StrTRA_TsTsdAdconfig, 0x100520)
|
|
FldFunc(StrTRA_TsTsdAdconfig, Rs, 12, 1)
|
|
FldFunc(StrTRA_TsTsdAdconfig, Pnty, 8, 4)
|
|
FldFunc(StrTRA_TsTsdAdconfig, Ost, 4, 4)
|
|
FldFunc(StrTRA_TsTsdAdconfig, Ist, 0, 4)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsStcref900, 0x124, StrTRA_TsStcref900, 0x100524)
|
|
FldFunc(StrTRA_TsStcref900, Ppcrb, 31, 1)
|
|
FldFunc(StrTRA_TsStcref900, Ppcre, 0, 9)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsStcref901, 0x128, StrTRA_TsStcref901, 0x100528)
|
|
FldFunc(StrTRA_TsStcref901, Ppcrb, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsRtsUpdate, 0x12C, StrTRA_TsRtsUpdate, 0x10052c)
|
|
FldFunc(StrTRA_TsRtsUpdate, Rtsu, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsStcref27, 0x130, StrTRA_TsStcref27, 0x100530)
|
|
FldFunc(StrTRA_TsStcref27, Stc27, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsRtsChanged, 0x134, StrTRA_TsRtsChanged, 0x100534)
|
|
FldFunc(StrTRA_TsRtsChanged, Rc, 0, 1)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsRtsRx, 0x138, StrTRA_TsRtsRx, 0x100538)
|
|
FldFunc(StrTRA_TsRtsRx, Rtsrx, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsRefcntSave, 0x13C, StrTRA_TsRefcntSave, 0x10053c)
|
|
FldFunc(StrTRA_TsRefcntSave, Ref, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsTsmConfig, 0x140, StrTRA_TsTsmConfig, 0x100540)
|
|
FldFunc(StrTRA_TsTsmConfig, Sras, 28, 1)
|
|
FldFunc(StrTRA_TsTsmConfig, Zvrc, 27, 1)
|
|
FldFunc(StrTRA_TsTsmConfig, Cs27, 26, 1)
|
|
FldFunc(StrTRA_TsTsmConfig, Cs90, 25, 1)
|
|
FldFunc(StrTRA_TsTsmConfig, Ppu, 24, 1)
|
|
FldFunc(StrTRA_TsTsmConfig, Spi, 23, 1)
|
|
FldFunc(StrTRA_TsTsmConfig, Un, 2, 1)
|
|
FldFunc(StrTRA_TsTsmConfig, Udm, 1, 1)
|
|
FldFunc(StrTRA_TsTsmConfig, Os, 0, 1)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsPcrTrigger, 0x144, StrTRA_TsPcrTrigger, 0x100544)
|
|
FldFunc(StrTRA_TsPcrTrigger, Pt, 0, 1)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsIntStat, 0x148, StrTRA_TsIntStat, 0x100548)
|
|
FldFunc(StrTRA_TsIntStat, U4o, 25, 1)
|
|
FldFunc(StrTRA_TsIntStat, U3o, 24, 1)
|
|
FldFunc(StrTRA_TsIntStat, U2o, 23, 1)
|
|
FldFunc(StrTRA_TsIntStat, U1o, 22, 1)
|
|
FldFunc(StrTRA_TsIntStat, U0o, 21, 1)
|
|
FldFunc(StrTRA_TsIntStat, U4sp, 20, 1)
|
|
FldFunc(StrTRA_TsIntStat, U3sp, 19, 1)
|
|
FldFunc(StrTRA_TsIntStat, U2sp, 18, 1)
|
|
FldFunc(StrTRA_TsIntStat, U1sp, 17, 1)
|
|
FldFunc(StrTRA_TsIntStat, U0sp, 16, 1)
|
|
FldFunc(StrTRA_TsIntStat, Psp, 15, 1)
|
|
FldFunc(StrTRA_TsIntStat, A2sp, 14, 1)
|
|
FldFunc(StrTRA_TsIntStat, A1sp, 13, 1)
|
|
FldFunc(StrTRA_TsIntStat, A0sp, 12, 1)
|
|
FldFunc(StrTRA_TsIntStat, Vsp, 11, 1)
|
|
FldFunc(StrTRA_TsIntStat, Va, 10, 1)
|
|
FldFunc(StrTRA_TsIntStat, I2o, 9, 1)
|
|
FldFunc(StrTRA_TsIntStat, I1o, 8, 1)
|
|
FldFunc(StrTRA_TsIntStat, I0o, 7, 1)
|
|
FldFunc(StrTRA_TsIntStat, C2o, 6, 1)
|
|
FldFunc(StrTRA_TsIntStat, C1o, 5, 1)
|
|
FldFunc(StrTRA_TsIntStat, C0o, 4, 1)
|
|
FldFunc(StrTRA_TsIntStat, Uf, 3, 1)
|
|
FldFunc(StrTRA_TsIntStat, Ho, 1, 1)
|
|
FldFunc(StrTRA_TsIntStat, Eo, 0, 1)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsIntMask, 0x14C, StrTRA_TsIntMask, 0x10054c)
|
|
FldFunc(StrTRA_TsIntMask, U4o, 25, 1)
|
|
FldFunc(StrTRA_TsIntMask, U3o, 24, 1)
|
|
FldFunc(StrTRA_TsIntMask, U2o, 23, 1)
|
|
FldFunc(StrTRA_TsIntMask, U1o, 22, 1)
|
|
FldFunc(StrTRA_TsIntMask, U0o, 21, 1)
|
|
FldFunc(StrTRA_TsIntMask, U4sp, 20, 1)
|
|
FldFunc(StrTRA_TsIntMask, U3sp, 19, 1)
|
|
FldFunc(StrTRA_TsIntMask, U2sp, 18, 1)
|
|
FldFunc(StrTRA_TsIntMask, U1sp, 17, 1)
|
|
FldFunc(StrTRA_TsIntMask, U0sp, 16, 1)
|
|
FldFunc(StrTRA_TsIntMask, Psp, 15, 1)
|
|
FldFunc(StrTRA_TsIntMask, A2sp, 14, 1)
|
|
FldFunc(StrTRA_TsIntMask, A1sp, 13, 1)
|
|
FldFunc(StrTRA_TsIntMask, A0sp, 12, 1)
|
|
FldFunc(StrTRA_TsIntMask, Vsp, 11, 1)
|
|
FldFunc(StrTRA_TsIntMask, Eva, 10, 1)
|
|
FldFunc(StrTRA_TsIntMask, Ei2o, 9, 1)
|
|
FldFunc(StrTRA_TsIntMask, Ei1o, 8, 1)
|
|
FldFunc(StrTRA_TsIntMask, Ei0o, 7, 1)
|
|
FldFunc(StrTRA_TsIntMask, Ec2o, 6, 1)
|
|
FldFunc(StrTRA_TsIntMask, Ec1o, 5, 1)
|
|
FldFunc(StrTRA_TsIntMask, Ec0o, 4, 1)
|
|
FldFunc(StrTRA_TsIntMask, Euf, 3, 1)
|
|
FldFunc(StrTRA_TsIntMask, Eho, 1, 1)
|
|
FldFunc(StrTRA_TsIntMask, Eeo, 0, 1)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsBtpCtl, 0x150, StrTRA_TsBtpCtl, 0x100550)
|
|
FldFunc(StrTRA_TsBtpCtl, Ebpc, 1, 1)
|
|
FldFunc(StrTRA_TsBtpCtl, Ebo, 0, 1)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsTsfifoByteCnt, 0x154, StrTRA_TsTsfifoByteCnt, 0x100554)
|
|
FldFunc(StrTRA_TsTsfifoByteCnt, Tfbc, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsPktbuffByteCnt, 0x158, StrTRA_TsPktbuffByteCnt, 0x100558)
|
|
FldFunc(StrTRA_TsPktbuffByteCnt, Pbc, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsSpliceEn, 0x15C, StrTRA_TsSpliceEn, 0x10055c)
|
|
FldFunc(StrTRA_TsSpliceEn, A2se, 13, 1)
|
|
FldFunc(StrTRA_TsSpliceEn, A1se, 12, 1)
|
|
FldFunc(StrTRA_TsSpliceEn, A0se, 11, 1)
|
|
FldFunc(StrTRA_TsSpliceEn, Vse, 10, 1)
|
|
FldFunc(StrTRA_TsSpliceEn, U4en, 9, 1)
|
|
FldFunc(StrTRA_TsSpliceEn, U3en, 8, 1)
|
|
FldFunc(StrTRA_TsSpliceEn, U2en, 7, 1)
|
|
FldFunc(StrTRA_TsSpliceEn, U1en, 6, 1)
|
|
FldFunc(StrTRA_TsSpliceEn, U0en, 5, 1)
|
|
FldFunc(StrTRA_TsSpliceEn, Pen, 4, 1)
|
|
FldFunc(StrTRA_TsSpliceEn, A2en, 3, 1)
|
|
FldFunc(StrTRA_TsSpliceEn, A1en, 2, 1)
|
|
FldFunc(StrTRA_TsSpliceEn, A0en, 1, 1)
|
|
FldFunc(StrTRA_TsSpliceEn, Ven, 0, 1)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsVidspliceBuf, 0x160, StrTRA_TsVidspliceBuf, 0x100560)
|
|
FldFunc(StrTRA_TsVidspliceBuf, Ne, 16, 1)
|
|
FldFunc(StrTRA_TsVidspliceBuf, Full, 15, 1)
|
|
FldFunc(StrTRA_TsVidspliceBuf, Se, 13, 2)
|
|
FldFunc(StrTRA_TsVidspliceBuf, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsAud0spliceBuf, 0x164, StrTRA_TsAud0spliceBuf, 0x100564)
|
|
FldFunc(StrTRA_TsAud0spliceBuf, Ne, 16, 1)
|
|
FldFunc(StrTRA_TsAud0spliceBuf, Full, 15, 1)
|
|
FldFunc(StrTRA_TsAud0spliceBuf, Se, 13, 2)
|
|
FldFunc(StrTRA_TsAud0spliceBuf, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsAud1spliceBuf, 0x168, StrTRA_TsAud1spliceBuf, 0x100568)
|
|
FldFunc(StrTRA_TsAud1spliceBuf, Ne, 16, 1)
|
|
FldFunc(StrTRA_TsAud1spliceBuf, Full, 15, 1)
|
|
FldFunc(StrTRA_TsAud1spliceBuf, Se, 13, 2)
|
|
FldFunc(StrTRA_TsAud1spliceBuf, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsAud2spliceBuf, 0x16C, StrTRA_TsAud2spliceBuf, 0x10056c)
|
|
FldFunc(StrTRA_TsAud2spliceBuf, Ne, 16, 1)
|
|
FldFunc(StrTRA_TsAud2spliceBuf, Full, 15, 1)
|
|
FldFunc(StrTRA_TsAud2spliceBuf, Se, 13, 2)
|
|
FldFunc(StrTRA_TsAud2spliceBuf, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsPcrspliceBuf, 0x170, StrTRA_TsPcrspliceBuf, 0x100570)
|
|
FldFunc(StrTRA_TsPcrspliceBuf, Ne, 14, 1)
|
|
FldFunc(StrTRA_TsPcrspliceBuf, Full, 13, 1)
|
|
FldFunc(StrTRA_TsPcrspliceBuf, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUnmarkedThresh, 0x174, StrTRA_TsUnmarkedThresh, 0x100574)
|
|
FldFunc(StrTRA_TsUnmarkedThresh, Ut, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsVidspliceCnt, 0x178, StrTRA_TsVidspliceCnt, 0x100578)
|
|
FldFunc(StrTRA_TsVidspliceCnt, Act, 8, 1)
|
|
FldFunc(StrTRA_TsVidspliceCnt, Cnt, 0, 8)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsAud0spliceCnt, 0x17C, StrTRA_TsAud0spliceCnt, 0x10057c)
|
|
FldFunc(StrTRA_TsAud0spliceCnt, Act, 8, 1)
|
|
FldFunc(StrTRA_TsAud0spliceCnt, Cnt, 0, 8)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsAud1spliceCnt, 0x180, StrTRA_TsAud1spliceCnt, 0x100580)
|
|
FldFunc(StrTRA_TsAud1spliceCnt, Act, 8, 1)
|
|
FldFunc(StrTRA_TsAud1spliceCnt, Cnt, 0, 8)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsAud2spliceCnt, 0x184, StrTRA_TsAud2spliceCnt, 0x100584)
|
|
FldFunc(StrTRA_TsAud2spliceCnt, Act, 8, 1)
|
|
FldFunc(StrTRA_TsAud2spliceCnt, Cnt, 0, 8)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsPcrspliceCnt, 0x188, StrTRA_TsPcrspliceCnt, 0x100588)
|
|
FldFunc(StrTRA_TsPcrspliceCnt, Act, 8, 1)
|
|
FldFunc(StrTRA_TsPcrspliceCnt, Cnt, 0, 8)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsPesStrmidRange, 0x18C, StrTRA_TsPesStrmidRange, 0x10058c)
|
|
FldFunc(StrTRA_TsPesStrmidRange, Hi, 8, 8)
|
|
FldFunc(StrTRA_TsPesStrmidRange, Lo, 0, 8)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsVidStrmidRange, 0x190, StrTRA_TsVidStrmidRange, 0x100590)
|
|
FldFunc(StrTRA_TsVidStrmidRange, Hi, 8, 8)
|
|
FldFunc(StrTRA_TsVidStrmidRange, Lo, 0, 8)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsAud0StrmidRange, 0x194, StrTRA_TsAud0StrmidRange, 0x100594)
|
|
FldFunc(StrTRA_TsAud0StrmidRange, Hi, 8, 8)
|
|
FldFunc(StrTRA_TsAud0StrmidRange, Lo, 0, 8)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsAud1StrmidRange, 0x198, StrTRA_TsAud1StrmidRange, 0x100598)
|
|
FldFunc(StrTRA_TsAud1StrmidRange, Hi, 8, 8)
|
|
FldFunc(StrTRA_TsAud1StrmidRange, Lo, 0, 8)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsAud2StrmidRange, 0x19C, StrTRA_TsAud2StrmidRange, 0x10059c)
|
|
FldFunc(StrTRA_TsAud2StrmidRange, Hi, 8, 8)
|
|
FldFunc(StrTRA_TsAud2StrmidRange, Lo, 0, 8)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsPesNoext0, 0x1A0, StrTRA_TsPesNoext0, 0x1005a0)
|
|
FldFunc(StrTRA_TsPesNoext0, En2, 26, 1)
|
|
FldFunc(StrTRA_TsPesNoext0, En1, 25, 1)
|
|
FldFunc(StrTRA_TsPesNoext0, En0, 24, 1)
|
|
FldFunc(StrTRA_TsPesNoext0, Ext2, 16, 8)
|
|
FldFunc(StrTRA_TsPesNoext0, Ext1, 8, 8)
|
|
FldFunc(StrTRA_TsPesNoext0, Ext0, 0, 8)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsPesNoext1, 0x1A4, StrTRA_TsPesNoext1, 0x1005a4)
|
|
FldFunc(StrTRA_TsPesNoext1, En2, 26, 1)
|
|
FldFunc(StrTRA_TsPesNoext1, En1, 25, 1)
|
|
FldFunc(StrTRA_TsPesNoext1, En0, 24, 1)
|
|
FldFunc(StrTRA_TsPesNoext1, Ext2, 16, 8)
|
|
FldFunc(StrTRA_TsPesNoext1, Ext1, 8, 8)
|
|
FldFunc(StrTRA_TsPesNoext1, Ext0, 0, 8)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsPesNoext2, 0x1A8, StrTRA_TsPesNoext2, 0x1005a8)
|
|
FldFunc(StrTRA_TsPesNoext2, En2, 26, 1)
|
|
FldFunc(StrTRA_TsPesNoext2, En1, 25, 1)
|
|
FldFunc(StrTRA_TsPesNoext2, En0, 24, 1)
|
|
FldFunc(StrTRA_TsPesNoext2, Ext2, 16, 8)
|
|
FldFunc(StrTRA_TsPesNoext2, Ext1, 8, 8)
|
|
FldFunc(StrTRA_TsPesNoext2, Ext0, 0, 8)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsPesNoext3, 0x1AC, StrTRA_TsPesNoext3, 0x1005ac)
|
|
FldFunc(StrTRA_TsPesNoext3, En2, 26, 1)
|
|
FldFunc(StrTRA_TsPesNoext3, En1, 25, 1)
|
|
FldFunc(StrTRA_TsPesNoext3, En0, 24, 1)
|
|
FldFunc(StrTRA_TsPesNoext3, Ext2, 16, 8)
|
|
FldFunc(StrTRA_TsPesNoext3, Ext1, 8, 8)
|
|
FldFunc(StrTRA_TsPesNoext3, Ext0, 0, 8)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsPesNoext4, 0x1B0, StrTRA_TsPesNoext4, 0x1005b0)
|
|
FldFunc(StrTRA_TsPesNoext4, En2, 26, 1)
|
|
FldFunc(StrTRA_TsPesNoext4, En1, 25, 1)
|
|
FldFunc(StrTRA_TsPesNoext4, En0, 24, 1)
|
|
FldFunc(StrTRA_TsPesNoext4, Ext2, 16, 8)
|
|
FldFunc(StrTRA_TsPesNoext4, Ext1, 8, 8)
|
|
FldFunc(StrTRA_TsPesNoext4, Ext0, 0, 8)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsPesNoext5, 0x1B4, StrTRA_TsPesNoext5, 0x1005b4)
|
|
FldFunc(StrTRA_TsPesNoext5, En2, 26, 1)
|
|
FldFunc(StrTRA_TsPesNoext5, En1, 25, 1)
|
|
FldFunc(StrTRA_TsPesNoext5, En0, 24, 1)
|
|
FldFunc(StrTRA_TsPesNoext5, Ext2, 16, 8)
|
|
FldFunc(StrTRA_TsPesNoext5, Ext1, 8, 8)
|
|
FldFunc(StrTRA_TsPesNoext5, Ext0, 0, 8)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser0spliceCnt, 0x1B8, StrTRA_TsUser0spliceCnt, 0x1005b8)
|
|
FldFunc(StrTRA_TsUser0spliceCnt, Cnt, 1, 8)
|
|
FldFunc(StrTRA_TsUser0spliceCnt, Act, 0, 1)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser1spliceCnt, 0x1BC, StrTRA_TsUser1spliceCnt, 0x1005bc)
|
|
FldFunc(StrTRA_TsUser1spliceCnt, Cnt, 1, 8)
|
|
FldFunc(StrTRA_TsUser1spliceCnt, Act, 0, 1)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser2spliceCnt, 0x1C0, StrTRA_TsUser2spliceCnt, 0x1005c0)
|
|
FldFunc(StrTRA_TsUser2spliceCnt, Cnt, 1, 8)
|
|
FldFunc(StrTRA_TsUser2spliceCnt, Act, 0, 1)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser3spliceCnt, 0x1C4, StrTRA_TsUser3spliceCnt, 0x1005c4)
|
|
FldFunc(StrTRA_TsUser3spliceCnt, Cnt, 1, 8)
|
|
FldFunc(StrTRA_TsUser3spliceCnt, Act, 0, 1)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser4spliceCnt, 0x1C8, StrTRA_TsUser4spliceCnt, 0x1005c8)
|
|
FldFunc(StrTRA_TsUser4spliceCnt, Cnt, 1, 8)
|
|
FldFunc(StrTRA_TsUser4spliceCnt, Act, 0, 1)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser0spliceBuf, 0x1CC, StrTRA_TsUser0spliceBuf, 0x1005cc)
|
|
FldFunc(StrTRA_TsUser0spliceBuf, Ne, 16, 1)
|
|
FldFunc(StrTRA_TsUser0spliceBuf, Full, 15, 1)
|
|
FldFunc(StrTRA_TsUser0spliceBuf, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser1spliceBuf, 0x1D0, StrTRA_TsUser1spliceBuf, 0x1005d0)
|
|
FldFunc(StrTRA_TsUser1spliceBuf, Ne, 16, 1)
|
|
FldFunc(StrTRA_TsUser1spliceBuf, Full, 15, 1)
|
|
FldFunc(StrTRA_TsUser1spliceBuf, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser2spliceBuf, 0x1D4, StrTRA_TsUser2spliceBuf, 0x1005d4)
|
|
FldFunc(StrTRA_TsUser2spliceBuf, Ne, 16, 1)
|
|
FldFunc(StrTRA_TsUser2spliceBuf, Full, 15, 1)
|
|
FldFunc(StrTRA_TsUser2spliceBuf, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser3spliceBuf, 0x1D8, StrTRA_TsUser3spliceBuf, 0x1005d8)
|
|
FldFunc(StrTRA_TsUser3spliceBuf, Ne, 16, 1)
|
|
FldFunc(StrTRA_TsUser3spliceBuf, Full, 15, 1)
|
|
FldFunc(StrTRA_TsUser3spliceBuf, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUser4spliceBuf, 0x1DC, StrTRA_TsUser4spliceBuf, 0x1005dc)
|
|
FldFunc(StrTRA_TsUser4spliceBuf, Ne, 16, 1)
|
|
FldFunc(StrTRA_TsUser4spliceBuf, Full, 15, 1)
|
|
FldFunc(StrTRA_TsUser4spliceBuf, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUpdWaiting, 0x1E0, StrTRA_TsUpdWaiting, 0x1005e0)
|
|
FldFunc(StrTRA_TsUpdWaiting, Ruw, 1, 1)
|
|
FldFunc(StrTRA_TsUpdWaiting, Puw, 0, 1)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsAud0Extid, 0x1E4, StrTRA_TsAud0Extid, 0x1005e4)
|
|
FldFunc(StrTRA_TsAud0Extid, Eidv, 15, 1)
|
|
FldFunc(StrTRA_TsAud0Extid, Eid, 8, 7)
|
|
FldFunc(StrTRA_TsAud0Extid, Cidv, 7, 1)
|
|
FldFunc(StrTRA_TsAud0Extid, Cid, 0, 7)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsAud1Extid, 0x1E8, StrTRA_TsAud1Extid, 0x1005e8)
|
|
FldFunc(StrTRA_TsAud1Extid, Eidv, 15, 1)
|
|
FldFunc(StrTRA_TsAud1Extid, Eid, 8, 7)
|
|
FldFunc(StrTRA_TsAud1Extid, Cidv, 7, 1)
|
|
FldFunc(StrTRA_TsAud1Extid, Cid, 0, 7)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsAud2Extid, 0x1EC, StrTRA_TsAud2Extid, 0x1005ec)
|
|
FldFunc(StrTRA_TsAud2Extid, Eidv, 15, 1)
|
|
FldFunc(StrTRA_TsAud2Extid, Eid, 8, 7)
|
|
FldFunc(StrTRA_TsAud2Extid, Cidv, 7, 1)
|
|
FldFunc(StrTRA_TsAud2Extid, Cid, 0, 7)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsPcrOffset, 0x1F0, StrTRA_TsPcrOffset, 0x1005f0)
|
|
FldFunc(StrTRA_TsPcrOffset, Pcro, 0, 32)
|
|
RegFunc(StreamTsRegsA, 0x100400, TsUsePusi, 0x1F4, StrTRA_TsUsePusi, 0x1005f4)
|
|
FldFunc(StrTRA_TsUsePusi, A2up, 3, 1)
|
|
FldFunc(StrTRA_TsUsePusi, A1up, 2, 1)
|
|
FldFunc(StrTRA_TsUsePusi, A0up, 1, 1)
|
|
FldFunc(StrTRA_TsUsePusi, Vup, 0, 1)
|
|
|
|
RegAreaFunc(StreamTsRegsBBase, 0x100800, 0x1009FF)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsCtl, 0x0, StrTRB_TsCtl, 0x100800)
|
|
FldFunc(StrTRB_TsCtl, Aao, 22, 1)
|
|
FldFunc(StrTRB_TsCtl, Dcd, 21, 1)
|
|
FldFunc(StrTRB_TsCtl, Rtsu, 20, 1)
|
|
FldFunc(StrTRB_TsCtl, Rte, 19, 1)
|
|
FldFunc(StrTRB_TsCtl, Efs, 18, 1)
|
|
FldFunc(StrTRB_TsCtl, Via, 17, 1)
|
|
FldFunc(StrTRB_TsCtl, Spi, 16, 1)
|
|
FldFunc(StrTRB_TsCtl, Udtaf, 15, 1)
|
|
FldFunc(StrTRB_TsCtl, Dd, 14, 1)
|
|
FldFunc(StrTRB_TsCtl, Rde, 12, 1)
|
|
FldFunc(StrTRB_TsCtl, Rse, 11, 1)
|
|
FldFunc(StrTRB_TsCtl, Im, 10, 1)
|
|
FldFunc(StrTRB_TsCtl, Serm, 9, 1)
|
|
FldFunc(StrTRB_TsCtl, Syncm, 8, 1)
|
|
FldFunc(StrTRB_TsCtl, Tsm, 7, 1)
|
|
FldFunc(StrTRB_TsCtl, Tsdm, 6, 1)
|
|
FldFunc(StrTRB_TsCtl, Pcru, 5, 1)
|
|
FldFunc(StrTRB_TsCtl, Vm, 4, 1)
|
|
FldFunc(StrTRB_TsCtl, Psm, 3, 1)
|
|
FldFunc(StrTRB_TsCtl, Sync, 2, 1)
|
|
FldFunc(StrTRB_TsCtl, Ss, 1, 1)
|
|
FldFunc(StrTRB_TsCtl, Byps, 0, 1)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsPcrRx0, 0x4, StrTRB_TsPcrRx0, 0x100804)
|
|
FldFunc(StrTRB_TsPcrRx0, Rpcrb, 16, 16)
|
|
FldFunc(StrTRB_TsPcrRx0, Rpcre, 0, 9)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsPcrRx1, 0x8, StrTRB_TsPcrRx1, 0x100808)
|
|
FldFunc(StrTRB_TsPcrRx1, Rpcrb, 0, 17)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsStcCntr0, 0xC, StrTRB_TsStcCntr0, 0x10080c)
|
|
FldFunc(StrTRB_TsStcCntr0, Ppcrb, 16, 16)
|
|
FldFunc(StrTRB_TsStcCntr0, Ppcre, 0, 5)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsStcCntr1, 0x10, StrTRB_TsStcCntr1, 0x100810)
|
|
FldFunc(StrTRB_TsStcCntr1, Ppcrb, 0, 17)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsPidVid, 0x14, StrTRB_TsPidVid, 0x100814)
|
|
FldFunc(StrTRB_TsPidVid, Siee, 26, 1)
|
|
FldFunc(StrTRB_TsPidVid, Sube, 25, 1)
|
|
FldFunc(StrTRB_TsPidVid, Priv, 23, 2)
|
|
FldFunc(StrTRB_TsPidVid, Typ, 22, 1)
|
|
FldFunc(StrTRB_TsPidVid, Piu, 21, 1)
|
|
FldFunc(StrTRB_TsPidVid, Si, 13, 8)
|
|
FldFunc(StrTRB_TsPidVid, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsPidPcr, 0x18, StrTRB_TsPidPcr, 0x100818)
|
|
FldFunc(StrTRB_TsPidPcr, Piu, 21, 1)
|
|
FldFunc(StrTRB_TsPidPcr, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUpdate0, 0x1C, StrTRB_TsUpdate0, 0x10081c)
|
|
FldFunc(StrTRB_TsUpdate0, Cpcrb, 16, 16)
|
|
FldFunc(StrTRB_TsUpdate0, Cpcre, 0, 9)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUpdate1, 0x20, StrTRB_TsUpdate1, 0x100820)
|
|
FldFunc(StrTRB_TsUpdate1, Cpcrb, 0, 17)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsRefCnt, 0x24, StrTRB_TsRefCnt, 0x100824)
|
|
FldFunc(StrTRB_TsRefCnt, Rfcnt, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsPidAud0, 0x28, StrTRB_TsPidAud0, 0x100828)
|
|
FldFunc(StrTRB_TsPidAud0, Siee, 26, 1)
|
|
FldFunc(StrTRB_TsPidAud0, Sube, 25, 1)
|
|
FldFunc(StrTRB_TsPidAud0, Priv, 23, 2)
|
|
FldFunc(StrTRB_TsPidAud0, Typ, 22, 1)
|
|
FldFunc(StrTRB_TsPidAud0, Piu, 21, 1)
|
|
FldFunc(StrTRB_TsPidAud0, Si, 13, 8)
|
|
FldFunc(StrTRB_TsPidAud0, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsPidAud1, 0x2C, StrTRB_TsPidAud1, 0x10082c)
|
|
FldFunc(StrTRB_TsPidAud1, Siee, 26, 1)
|
|
FldFunc(StrTRB_TsPidAud1, Sube, 25, 1)
|
|
FldFunc(StrTRB_TsPidAud1, Priv, 23, 2)
|
|
FldFunc(StrTRB_TsPidAud1, Typ, 22, 1)
|
|
FldFunc(StrTRB_TsPidAud1, Piu, 21, 1)
|
|
FldFunc(StrTRB_TsPidAud1, Si, 13, 8)
|
|
FldFunc(StrTRB_TsPidAud1, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsPidAud2, 0x30, StrTRB_TsPidAud2, 0x100830)
|
|
FldFunc(StrTRB_TsPidAud2, Siee, 26, 1)
|
|
FldFunc(StrTRB_TsPidAud2, Sube, 25, 1)
|
|
FldFunc(StrTRB_TsPidAud2, Priv, 23, 2)
|
|
FldFunc(StrTRB_TsPidAud2, Typ, 22, 1)
|
|
FldFunc(StrTRB_TsPidAud2, Piu, 21, 1)
|
|
FldFunc(StrTRB_TsPidAud2, Si, 13, 8)
|
|
FldFunc(StrTRB_TsPidAud2, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsPidUser0, 0x34, StrTRB_TsPidUser0, 0x100834)
|
|
FldFunc(StrTRB_TsPidUser0, Piu, 21, 1)
|
|
FldFunc(StrTRB_TsPidUser0, Si, 13, 8)
|
|
FldFunc(StrTRB_TsPidUser0, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsPidUser1, 0x38, StrTRB_TsPidUser1, 0x100838)
|
|
FldFunc(StrTRB_TsPidUser1, Piu, 21, 1)
|
|
FldFunc(StrTRB_TsPidUser1, Si, 13, 8)
|
|
FldFunc(StrTRB_TsPidUser1, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsPidUser2, 0x3C, StrTRB_TsPidUser2, 0x10083c)
|
|
FldFunc(StrTRB_TsPidUser2, Piu, 21, 1)
|
|
FldFunc(StrTRB_TsPidUser2, Si, 13, 8)
|
|
FldFunc(StrTRB_TsPidUser2, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsPidUser3, 0x40, StrTRB_TsPidUser3, 0x100840)
|
|
FldFunc(StrTRB_TsPidUser3, Piu, 21, 1)
|
|
FldFunc(StrTRB_TsPidUser3, Si, 13, 8)
|
|
FldFunc(StrTRB_TsPidUser3, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsPidUser4, 0x44, StrTRB_TsPidUser4, 0x100844)
|
|
FldFunc(StrTRB_TsPidUser4, Piu, 21, 1)
|
|
FldFunc(StrTRB_TsPidUser4, Si, 13, 8)
|
|
FldFunc(StrTRB_TsPidUser4, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsPcrChanged, 0x48, StrTRB_TsPcrChanged, 0x100848)
|
|
FldFunc(StrTRB_TsPcrChanged, Pcrc, 0, 1)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsFifoStatus, 0x4C, StrTRB_TsFifoStatus, 0x10084c)
|
|
FldFunc(StrTRB_TsFifoStatus, Ue, 20, 1)
|
|
FldFunc(StrTRB_TsFifoStatus, Uaf, 19, 1)
|
|
FldFunc(StrTRB_TsFifoStatus, Dfaf, 16, 1)
|
|
FldFunc(StrTRB_TsFifoStatus, Dfe, 15, 1)
|
|
FldFunc(StrTRB_TsFifoStatus, Vaf, 13, 1)
|
|
FldFunc(StrTRB_TsFifoStatus, De, 12, 1)
|
|
FldFunc(StrTRB_TsFifoStatus, Daf, 11, 1)
|
|
FldFunc(StrTRB_TsFifoStatus, Pe, 10, 1)
|
|
FldFunc(StrTRB_TsFifoStatus, Paf, 9, 1)
|
|
FldFunc(StrTRB_TsFifoStatus, Hfo, 8, 1)
|
|
FldFunc(StrTRB_TsFifoStatus, Hfhe, 7, 1)
|
|
FldFunc(StrTRB_TsFifoStatus, Hfe, 6, 1)
|
|
FldFunc(StrTRB_TsFifoStatus, Hfaf, 5, 1)
|
|
FldFunc(StrTRB_TsFifoStatus, Efo, 4, 1)
|
|
FldFunc(StrTRB_TsFifoStatus, Efhe, 3, 1)
|
|
FldFunc(StrTRB_TsFifoStatus, Efe, 2, 1)
|
|
FldFunc(StrTRB_TsFifoStatus, Efaf, 1, 1)
|
|
FldFunc(StrTRB_TsFifoStatus, Eff, 0, 1)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsSoftReset, 0x50, StrTRB_TsSoftReset, 0x100850)
|
|
FldFunc(StrTRB_TsSoftReset, Srst, 0, 1)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsOosCnt, 0x54, StrTRB_TsOosCnt, 0x100854)
|
|
FldFunc(StrTRB_TsOosCnt, Oosc, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsDiscontCnt, 0x58, StrTRB_TsDiscontCnt, 0x100858)
|
|
FldFunc(StrTRB_TsDiscontCnt, Dc, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsSpmresyncCnt, 0x5C, StrTRB_TsSpmresyncCnt, 0x10085c)
|
|
FldFunc(StrTRB_TsSpmresyncCnt, Spmrc, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUserOflwDone, 0x60, StrTRB_TsUserOflwDone, 0x100860)
|
|
FldFunc(StrTRB_TsUserOflwDone, U4d, 4, 1)
|
|
FldFunc(StrTRB_TsUserOflwDone, U3d, 3, 1)
|
|
FldFunc(StrTRB_TsUserOflwDone, U2d, 2, 1)
|
|
FldFunc(StrTRB_TsUserOflwDone, U1d, 1, 1)
|
|
FldFunc(StrTRB_TsUserOflwDone, U0d, 0, 1)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser0Base, 0x64, StrTRB_TsUser0Base, 0x100864)
|
|
FldFunc(StrTRB_TsUser0Base, Base, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser0Rptr, 0x68, StrTRB_TsUser0Rptr, 0x100868)
|
|
FldFunc(StrTRB_TsUser0Rptr, Rptr, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser0Wrptr, 0x6C, StrTRB_TsUser0Wrptr, 0x10086c)
|
|
FldFunc(StrTRB_TsUser0Wrptr, Wrptr, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser0Len, 0x70, StrTRB_TsUser0Len, 0x100870)
|
|
FldFunc(StrTRB_TsUser0Len, Len, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser0End, 0x74, StrTRB_TsUser0End, 0x100874)
|
|
FldFunc(StrTRB_TsUser0End, End, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser0Empty, 0x78, StrTRB_TsUser0Empty, 0x100878)
|
|
FldFunc(StrTRB_TsUser0Empty, E, 0, 1)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser1Base, 0x7C, StrTRB_TsUser1Base, 0x10087c)
|
|
FldFunc(StrTRB_TsUser1Base, Base, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser1Rptr, 0x80, StrTRB_TsUser1Rptr, 0x100880)
|
|
FldFunc(StrTRB_TsUser1Rptr, Rptr, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser1Wrptr, 0x84, StrTRB_TsUser1Wrptr, 0x100884)
|
|
FldFunc(StrTRB_TsUser1Wrptr, Wrptr, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser1Len, 0x88, StrTRB_TsUser1Len, 0x100888)
|
|
FldFunc(StrTRB_TsUser1Len, Len, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser1End, 0x8C, StrTRB_TsUser1End, 0x10088c)
|
|
FldFunc(StrTRB_TsUser1End, End, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser1Empty, 0x90, StrTRB_TsUser1Empty, 0x100890)
|
|
FldFunc(StrTRB_TsUser1Empty, E, 0, 1)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser2Base, 0x94, StrTRB_TsUser2Base, 0x100894)
|
|
FldFunc(StrTRB_TsUser2Base, Base, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser2Rptr, 0x98, StrTRB_TsUser2Rptr, 0x100898)
|
|
FldFunc(StrTRB_TsUser2Rptr, Rptr, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser2Wrptr, 0x9C, StrTRB_TsUser2Wrptr, 0x10089c)
|
|
FldFunc(StrTRB_TsUser2Wrptr, Wrptr, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser2Len, 0xA0, StrTRB_TsUser2Len, 0x1008a0)
|
|
FldFunc(StrTRB_TsUser2Len, Len, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser2End, 0xA4, StrTRB_TsUser2End, 0x1008a4)
|
|
FldFunc(StrTRB_TsUser2End, End, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser2Empty, 0xA8, StrTRB_TsUser2Empty, 0x1008a8)
|
|
FldFunc(StrTRB_TsUser2Empty, E, 0, 1)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser3Base, 0xAC, StrTRB_TsUser3Base, 0x1008ac)
|
|
FldFunc(StrTRB_TsUser3Base, Base, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser3Rptr, 0xB0, StrTRB_TsUser3Rptr, 0x1008b0)
|
|
FldFunc(StrTRB_TsUser3Rptr, Rptr, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser3Wrptr, 0xB4, StrTRB_TsUser3Wrptr, 0x1008b4)
|
|
FldFunc(StrTRB_TsUser3Wrptr, Wrptr, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser3Len, 0xB8, StrTRB_TsUser3Len, 0x1008b8)
|
|
FldFunc(StrTRB_TsUser3Len, Len, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser3End, 0xBC, StrTRB_TsUser3End, 0x1008bc)
|
|
FldFunc(StrTRB_TsUser3End, End, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser3Empty, 0xC0, StrTRB_TsUser3Empty, 0x1008c0)
|
|
FldFunc(StrTRB_TsUser3Empty, E, 0, 1)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser4Base, 0xC4, StrTRB_TsUser4Base, 0x1008c4)
|
|
FldFunc(StrTRB_TsUser4Base, Base, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser4Rptr, 0xC8, StrTRB_TsUser4Rptr, 0x1008c8)
|
|
FldFunc(StrTRB_TsUser4Rptr, Rptr, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser4Wrptr, 0xCC, StrTRB_TsUser4Wrptr, 0x1008cc)
|
|
FldFunc(StrTRB_TsUser4Wrptr, Wrptr, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser4Len, 0xD0, StrTRB_TsUser4Len, 0x1008d0)
|
|
FldFunc(StrTRB_TsUser4Len, Len, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser4End, 0xD4, StrTRB_TsUser4End, 0x1008d4)
|
|
FldFunc(StrTRB_TsUser4End, End, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser4Empty, 0xD8, StrTRB_TsUser4Empty, 0x1008d8)
|
|
FldFunc(StrTRB_TsUser4Empty, E, 0, 1)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsPktDropCnt, 0xDC, StrTRB_TsPktDropCnt, 0x1008dc)
|
|
FldFunc(StrTRB_TsPktDropCnt, Cnt, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsPktErrCnt, 0xE0, StrTRB_TsPktErrCnt, 0x1008e0)
|
|
FldFunc(StrTRB_TsPktErrCnt, Cnt, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsVidPktCnt, 0xE4, StrTRB_TsVidPktCnt, 0x1008e4)
|
|
FldFunc(StrTRB_TsVidPktCnt, Cnt, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsAud0PktCnt, 0xE8, StrTRB_TsAud0PktCnt, 0x1008e8)
|
|
FldFunc(StrTRB_TsAud0PktCnt, Cnt, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsAud1PktCnt, 0xEC, StrTRB_TsAud1PktCnt, 0x1008ec)
|
|
FldFunc(StrTRB_TsAud1PktCnt, Cnt, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsAud2PktCnt, 0xF0, StrTRB_TsAud2PktCnt, 0x1008f0)
|
|
FldFunc(StrTRB_TsAud2PktCnt, Cnt, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUserPktCnt, 0xF4, StrTRB_TsUserPktCnt, 0x1008f4)
|
|
FldFunc(StrTRB_TsUserPktCnt, Cnt, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsDescramCtl, 0xF8, StrTRB_TsDescramCtl, 0x1008f8)
|
|
FldFunc(StrTRB_TsDescramCtl, Drph, 11, 1)
|
|
FldFunc(StrTRB_TsDescramCtl, Pkt, 10, 1)
|
|
FldFunc(StrTRB_TsDescramCtl, Est, 8, 2)
|
|
FldFunc(StrTRB_TsDescramCtl, Ost, 6, 2)
|
|
FldFunc(StrTRB_TsDescramCtl, Usc, 5, 1)
|
|
FldFunc(StrTRB_TsDescramCtl, Scctl, 4, 1)
|
|
FldFunc(StrTRB_TsDescramCtl, Scmod, 3, 1)
|
|
FldFunc(StrTRB_TsDescramCtl, Trmtyp, 2, 1)
|
|
FldFunc(StrTRB_TsDescramCtl, Type, 1, 1)
|
|
FldFunc(StrTRB_TsDescramCtl, En, 0, 1)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsKeyEven0, 0xFC, StrTRB_TsKeyEven0, 0x1008fc)
|
|
FldFunc(StrTRB_TsKeyEven0, Key310, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsKeyEven1, 0x100, StrTRB_TsKeyEven1, 0x100900)
|
|
FldFunc(StrTRB_TsKeyEven1, Key6332, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsKeyEven2, 0x104, StrTRB_TsKeyEven2, 0x100904)
|
|
FldFunc(StrTRB_TsKeyEven2, Key9564, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsKeyEven3, 0x108, StrTRB_TsKeyEven3, 0x100908)
|
|
FldFunc(StrTRB_TsKeyEven3, Key12796, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsKeyOdd0, 0x10C, StrTRB_TsKeyOdd0, 0x10090c)
|
|
FldFunc(StrTRB_TsKeyOdd0, Key310, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsKeyOdd1, 0x110, StrTRB_TsKeyOdd1, 0x100910)
|
|
FldFunc(StrTRB_TsKeyOdd1, Key6332, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsKeyOdd2, 0x114, StrTRB_TsKeyOdd2, 0x100914)
|
|
FldFunc(StrTRB_TsKeyOdd2, Key9564, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsKeyOdd3, 0x118, StrTRB_TsKeyOdd3, 0x100918)
|
|
FldFunc(StrTRB_TsKeyOdd3, Key12796, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsStcIsCrap, 0x11C, StrTRB_TsStcIsCrap, 0x10091c)
|
|
FldFunc(StrTRB_TsStcIsCrap, Typ, 1, 1)
|
|
FldFunc(StrTRB_TsStcIsCrap, Sic, 0, 1)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsTsdAdconfig, 0x120, StrTRB_TsTsdAdconfig, 0x100920)
|
|
FldFunc(StrTRB_TsTsdAdconfig, Rs, 12, 1)
|
|
FldFunc(StrTRB_TsTsdAdconfig, Pnty, 8, 4)
|
|
FldFunc(StrTRB_TsTsdAdconfig, Ost, 4, 4)
|
|
FldFunc(StrTRB_TsTsdAdconfig, Ist, 0, 4)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsStcref900, 0x124, StrTRB_TsStcref900, 0x100924)
|
|
FldFunc(StrTRB_TsStcref900, Ppcrb, 31, 1)
|
|
FldFunc(StrTRB_TsStcref900, Ppcre, 0, 9)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsStcref901, 0x128, StrTRB_TsStcref901, 0x100928)
|
|
FldFunc(StrTRB_TsStcref901, Ppcrb, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsRtsUpdate, 0x12C, StrTRB_TsRtsUpdate, 0x10092c)
|
|
FldFunc(StrTRB_TsRtsUpdate, Rtsu, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsStcref27, 0x130, StrTRB_TsStcref27, 0x100930)
|
|
FldFunc(StrTRB_TsStcref27, Stc27, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsRtsChanged, 0x134, StrTRB_TsRtsChanged, 0x100934)
|
|
FldFunc(StrTRB_TsRtsChanged, Rc, 0, 1)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsRtsRx, 0x138, StrTRB_TsRtsRx, 0x100938)
|
|
FldFunc(StrTRB_TsRtsRx, Rtsrx, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsRefcntSave, 0x13C, StrTRB_TsRefcntSave, 0x10093c)
|
|
FldFunc(StrTRB_TsRefcntSave, Ref, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsTsmConfig, 0x140, StrTRB_TsTsmConfig, 0x100940)
|
|
FldFunc(StrTRB_TsTsmConfig, Sras, 28, 1)
|
|
FldFunc(StrTRB_TsTsmConfig, Zvrc, 27, 1)
|
|
FldFunc(StrTRB_TsTsmConfig, Cs27, 26, 1)
|
|
FldFunc(StrTRB_TsTsmConfig, Cs90, 25, 1)
|
|
FldFunc(StrTRB_TsTsmConfig, Ppu, 24, 1)
|
|
FldFunc(StrTRB_TsTsmConfig, Spi, 23, 1)
|
|
FldFunc(StrTRB_TsTsmConfig, Un, 2, 1)
|
|
FldFunc(StrTRB_TsTsmConfig, Udm, 1, 1)
|
|
FldFunc(StrTRB_TsTsmConfig, Os, 0, 1)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsPcrTrigger, 0x144, StrTRB_TsPcrTrigger, 0x100944)
|
|
FldFunc(StrTRB_TsPcrTrigger, Pt, 0, 1)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsIntStat, 0x148, StrTRB_TsIntStat, 0x100948)
|
|
FldFunc(StrTRB_TsIntStat, U4o, 25, 1)
|
|
FldFunc(StrTRB_TsIntStat, U3o, 24, 1)
|
|
FldFunc(StrTRB_TsIntStat, U2o, 23, 1)
|
|
FldFunc(StrTRB_TsIntStat, U1o, 22, 1)
|
|
FldFunc(StrTRB_TsIntStat, U0o, 21, 1)
|
|
FldFunc(StrTRB_TsIntStat, U4sp, 20, 1)
|
|
FldFunc(StrTRB_TsIntStat, U3sp, 19, 1)
|
|
FldFunc(StrTRB_TsIntStat, U2sp, 18, 1)
|
|
FldFunc(StrTRB_TsIntStat, U1sp, 17, 1)
|
|
FldFunc(StrTRB_TsIntStat, U0sp, 16, 1)
|
|
FldFunc(StrTRB_TsIntStat, Psp, 15, 1)
|
|
FldFunc(StrTRB_TsIntStat, A2sp, 14, 1)
|
|
FldFunc(StrTRB_TsIntStat, A1sp, 13, 1)
|
|
FldFunc(StrTRB_TsIntStat, A0sp, 12, 1)
|
|
FldFunc(StrTRB_TsIntStat, Vsp, 11, 1)
|
|
FldFunc(StrTRB_TsIntStat, Va, 10, 1)
|
|
FldFunc(StrTRB_TsIntStat, I2o, 9, 1)
|
|
FldFunc(StrTRB_TsIntStat, I1o, 8, 1)
|
|
FldFunc(StrTRB_TsIntStat, I0o, 7, 1)
|
|
FldFunc(StrTRB_TsIntStat, C2o, 6, 1)
|
|
FldFunc(StrTRB_TsIntStat, C1o, 5, 1)
|
|
FldFunc(StrTRB_TsIntStat, C0o, 4, 1)
|
|
FldFunc(StrTRB_TsIntStat, Uf, 3, 1)
|
|
FldFunc(StrTRB_TsIntStat, Ho, 1, 1)
|
|
FldFunc(StrTRB_TsIntStat, Eo, 0, 1)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsIntMask, 0x14C, StrTRB_TsIntMask, 0x10094c)
|
|
FldFunc(StrTRB_TsIntMask, U4o, 25, 1)
|
|
FldFunc(StrTRB_TsIntMask, U3o, 24, 1)
|
|
FldFunc(StrTRB_TsIntMask, U2o, 23, 1)
|
|
FldFunc(StrTRB_TsIntMask, U1o, 22, 1)
|
|
FldFunc(StrTRB_TsIntMask, U0o, 21, 1)
|
|
FldFunc(StrTRB_TsIntMask, U4sp, 20, 1)
|
|
FldFunc(StrTRB_TsIntMask, U3sp, 19, 1)
|
|
FldFunc(StrTRB_TsIntMask, U2sp, 18, 1)
|
|
FldFunc(StrTRB_TsIntMask, U1sp, 17, 1)
|
|
FldFunc(StrTRB_TsIntMask, U0sp, 16, 1)
|
|
FldFunc(StrTRB_TsIntMask, Psp, 15, 1)
|
|
FldFunc(StrTRB_TsIntMask, A2sp, 14, 1)
|
|
FldFunc(StrTRB_TsIntMask, A1sp, 13, 1)
|
|
FldFunc(StrTRB_TsIntMask, A0sp, 12, 1)
|
|
FldFunc(StrTRB_TsIntMask, Vsp, 11, 1)
|
|
FldFunc(StrTRB_TsIntMask, Eva, 10, 1)
|
|
FldFunc(StrTRB_TsIntMask, Ei2o, 9, 1)
|
|
FldFunc(StrTRB_TsIntMask, Ei1o, 8, 1)
|
|
FldFunc(StrTRB_TsIntMask, Ei0o, 7, 1)
|
|
FldFunc(StrTRB_TsIntMask, Ec2o, 6, 1)
|
|
FldFunc(StrTRB_TsIntMask, Ec1o, 5, 1)
|
|
FldFunc(StrTRB_TsIntMask, Ec0o, 4, 1)
|
|
FldFunc(StrTRB_TsIntMask, Euf, 3, 1)
|
|
FldFunc(StrTRB_TsIntMask, Eho, 1, 1)
|
|
FldFunc(StrTRB_TsIntMask, Eeo, 0, 1)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsBtpCtl, 0x150, StrTRB_TsBtpCtl, 0x100950)
|
|
FldFunc(StrTRB_TsBtpCtl, Ebpc, 1, 1)
|
|
FldFunc(StrTRB_TsBtpCtl, Ebo, 0, 1)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsTsfifoByteCnt, 0x154, StrTRB_TsTsfifoByteCnt, 0x100954)
|
|
FldFunc(StrTRB_TsTsfifoByteCnt, Tfbc, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsPktbuffByteCnt, 0x158, StrTRB_TsPktbuffByteCnt, 0x100958)
|
|
FldFunc(StrTRB_TsPktbuffByteCnt, Pbc, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsSpliceEn, 0x15C, StrTRB_TsSpliceEn, 0x10095c)
|
|
FldFunc(StrTRB_TsSpliceEn, A2se, 13, 1)
|
|
FldFunc(StrTRB_TsSpliceEn, A1se, 12, 1)
|
|
FldFunc(StrTRB_TsSpliceEn, A0se, 11, 1)
|
|
FldFunc(StrTRB_TsSpliceEn, Vse, 10, 1)
|
|
FldFunc(StrTRB_TsSpliceEn, U4en, 9, 1)
|
|
FldFunc(StrTRB_TsSpliceEn, U3en, 8, 1)
|
|
FldFunc(StrTRB_TsSpliceEn, U2en, 7, 1)
|
|
FldFunc(StrTRB_TsSpliceEn, U1en, 6, 1)
|
|
FldFunc(StrTRB_TsSpliceEn, U0en, 5, 1)
|
|
FldFunc(StrTRB_TsSpliceEn, Pen, 4, 1)
|
|
FldFunc(StrTRB_TsSpliceEn, A2en, 3, 1)
|
|
FldFunc(StrTRB_TsSpliceEn, A1en, 2, 1)
|
|
FldFunc(StrTRB_TsSpliceEn, A0en, 1, 1)
|
|
FldFunc(StrTRB_TsSpliceEn, Ven, 0, 1)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsVidspliceBuf, 0x160, StrTRB_TsVidspliceBuf, 0x100960)
|
|
FldFunc(StrTRB_TsVidspliceBuf, Ne, 16, 1)
|
|
FldFunc(StrTRB_TsVidspliceBuf, Full, 15, 1)
|
|
FldFunc(StrTRB_TsVidspliceBuf, Se, 13, 2)
|
|
FldFunc(StrTRB_TsVidspliceBuf, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsAud0spliceBuf, 0x164, StrTRB_TsAud0spliceBuf, 0x100964)
|
|
FldFunc(StrTRB_TsAud0spliceBuf, Ne, 16, 1)
|
|
FldFunc(StrTRB_TsAud0spliceBuf, Full, 15, 1)
|
|
FldFunc(StrTRB_TsAud0spliceBuf, Se, 13, 2)
|
|
FldFunc(StrTRB_TsAud0spliceBuf, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsAud1spliceBuf, 0x168, StrTRB_TsAud1spliceBuf, 0x100968)
|
|
FldFunc(StrTRB_TsAud1spliceBuf, Ne, 16, 1)
|
|
FldFunc(StrTRB_TsAud1spliceBuf, Full, 15, 1)
|
|
FldFunc(StrTRB_TsAud1spliceBuf, Se, 13, 2)
|
|
FldFunc(StrTRB_TsAud1spliceBuf, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsAud2spliceBuf, 0x16C, StrTRB_TsAud2spliceBuf, 0x10096c)
|
|
FldFunc(StrTRB_TsAud2spliceBuf, Ne, 16, 1)
|
|
FldFunc(StrTRB_TsAud2spliceBuf, Full, 15, 1)
|
|
FldFunc(StrTRB_TsAud2spliceBuf, Se, 13, 2)
|
|
FldFunc(StrTRB_TsAud2spliceBuf, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsPcrspliceBuf, 0x170, StrTRB_TsPcrspliceBuf, 0x100970)
|
|
FldFunc(StrTRB_TsPcrspliceBuf, Ne, 14, 1)
|
|
FldFunc(StrTRB_TsPcrspliceBuf, Full, 13, 1)
|
|
FldFunc(StrTRB_TsPcrspliceBuf, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUnmarkedThresh, 0x174, StrTRB_TsUnmarkedThresh, 0x100974)
|
|
FldFunc(StrTRB_TsUnmarkedThresh, Ut, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsVidspliceCnt, 0x178, StrTRB_TsVidspliceCnt, 0x100978)
|
|
FldFunc(StrTRB_TsVidspliceCnt, Act, 8, 1)
|
|
FldFunc(StrTRB_TsVidspliceCnt, Cnt, 0, 8)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsAud0spliceCnt, 0x17C, StrTRB_TsAud0spliceCnt, 0x10097c)
|
|
FldFunc(StrTRB_TsAud0spliceCnt, Act, 8, 1)
|
|
FldFunc(StrTRB_TsAud0spliceCnt, Cnt, 0, 8)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsAud1spliceCnt, 0x180, StrTRB_TsAud1spliceCnt, 0x100980)
|
|
FldFunc(StrTRB_TsAud1spliceCnt, Act, 8, 1)
|
|
FldFunc(StrTRB_TsAud1spliceCnt, Cnt, 0, 8)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsAud2spliceCnt, 0x184, StrTRB_TsAud2spliceCnt, 0x100984)
|
|
FldFunc(StrTRB_TsAud2spliceCnt, Act, 8, 1)
|
|
FldFunc(StrTRB_TsAud2spliceCnt, Cnt, 0, 8)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsPcrspliceCnt, 0x188, StrTRB_TsPcrspliceCnt, 0x100988)
|
|
FldFunc(StrTRB_TsPcrspliceCnt, Act, 8, 1)
|
|
FldFunc(StrTRB_TsPcrspliceCnt, Cnt, 0, 8)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsPesStrmidRange, 0x18C, StrTRB_TsPesStrmidRange, 0x10098c)
|
|
FldFunc(StrTRB_TsPesStrmidRange, Hi, 8, 8)
|
|
FldFunc(StrTRB_TsPesStrmidRange, Lo, 0, 8)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsVidStrmidRange, 0x190, StrTRB_TsVidStrmidRange, 0x100990)
|
|
FldFunc(StrTRB_TsVidStrmidRange, Hi, 8, 8)
|
|
FldFunc(StrTRB_TsVidStrmidRange, Lo, 0, 8)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsAud0StrmidRange, 0x194, StrTRB_TsAud0StrmidRange, 0x100994)
|
|
FldFunc(StrTRB_TsAud0StrmidRange, Hi, 8, 8)
|
|
FldFunc(StrTRB_TsAud0StrmidRange, Lo, 0, 8)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsAud1StrmidRange, 0x198, StrTRB_TsAud1StrmidRange, 0x100998)
|
|
FldFunc(StrTRB_TsAud1StrmidRange, Hi, 8, 8)
|
|
FldFunc(StrTRB_TsAud1StrmidRange, Lo, 0, 8)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsAud2StrmidRange, 0x19C, StrTRB_TsAud2StrmidRange, 0x10099c)
|
|
FldFunc(StrTRB_TsAud2StrmidRange, Hi, 8, 8)
|
|
FldFunc(StrTRB_TsAud2StrmidRange, Lo, 0, 8)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsPesNoext0, 0x1A0, StrTRB_TsPesNoext0, 0x1009a0)
|
|
FldFunc(StrTRB_TsPesNoext0, En2, 26, 1)
|
|
FldFunc(StrTRB_TsPesNoext0, En1, 25, 1)
|
|
FldFunc(StrTRB_TsPesNoext0, En0, 24, 1)
|
|
FldFunc(StrTRB_TsPesNoext0, Ext2, 16, 8)
|
|
FldFunc(StrTRB_TsPesNoext0, Ext1, 8, 8)
|
|
FldFunc(StrTRB_TsPesNoext0, Ext0, 0, 8)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsPesNoext1, 0x1A4, StrTRB_TsPesNoext1, 0x1009a4)
|
|
FldFunc(StrTRB_TsPesNoext1, En2, 26, 1)
|
|
FldFunc(StrTRB_TsPesNoext1, En1, 25, 1)
|
|
FldFunc(StrTRB_TsPesNoext1, En0, 24, 1)
|
|
FldFunc(StrTRB_TsPesNoext1, Ext2, 16, 8)
|
|
FldFunc(StrTRB_TsPesNoext1, Ext1, 8, 8)
|
|
FldFunc(StrTRB_TsPesNoext1, Ext0, 0, 8)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsPesNoext2, 0x1A8, StrTRB_TsPesNoext2, 0x1009a8)
|
|
FldFunc(StrTRB_TsPesNoext2, En2, 26, 1)
|
|
FldFunc(StrTRB_TsPesNoext2, En1, 25, 1)
|
|
FldFunc(StrTRB_TsPesNoext2, En0, 24, 1)
|
|
FldFunc(StrTRB_TsPesNoext2, Ext2, 16, 8)
|
|
FldFunc(StrTRB_TsPesNoext2, Ext1, 8, 8)
|
|
FldFunc(StrTRB_TsPesNoext2, Ext0, 0, 8)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsPesNoext3, 0x1AC, StrTRB_TsPesNoext3, 0x1009ac)
|
|
FldFunc(StrTRB_TsPesNoext3, En2, 26, 1)
|
|
FldFunc(StrTRB_TsPesNoext3, En1, 25, 1)
|
|
FldFunc(StrTRB_TsPesNoext3, En0, 24, 1)
|
|
FldFunc(StrTRB_TsPesNoext3, Ext2, 16, 8)
|
|
FldFunc(StrTRB_TsPesNoext3, Ext1, 8, 8)
|
|
FldFunc(StrTRB_TsPesNoext3, Ext0, 0, 8)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsPesNoext4, 0x1B0, StrTRB_TsPesNoext4, 0x1009b0)
|
|
FldFunc(StrTRB_TsPesNoext4, En2, 26, 1)
|
|
FldFunc(StrTRB_TsPesNoext4, En1, 25, 1)
|
|
FldFunc(StrTRB_TsPesNoext4, En0, 24, 1)
|
|
FldFunc(StrTRB_TsPesNoext4, Ext2, 16, 8)
|
|
FldFunc(StrTRB_TsPesNoext4, Ext1, 8, 8)
|
|
FldFunc(StrTRB_TsPesNoext4, Ext0, 0, 8)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsPesNoext5, 0x1B4, StrTRB_TsPesNoext5, 0x1009b4)
|
|
FldFunc(StrTRB_TsPesNoext5, En2, 26, 1)
|
|
FldFunc(StrTRB_TsPesNoext5, En1, 25, 1)
|
|
FldFunc(StrTRB_TsPesNoext5, En0, 24, 1)
|
|
FldFunc(StrTRB_TsPesNoext5, Ext2, 16, 8)
|
|
FldFunc(StrTRB_TsPesNoext5, Ext1, 8, 8)
|
|
FldFunc(StrTRB_TsPesNoext5, Ext0, 0, 8)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser0spliceCnt, 0x1B8, StrTRB_TsUser0spliceCnt, 0x1009b8)
|
|
FldFunc(StrTRB_TsUser0spliceCnt, Cnt, 1, 8)
|
|
FldFunc(StrTRB_TsUser0spliceCnt, Act, 0, 1)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser1spliceCnt, 0x1BC, StrTRB_TsUser1spliceCnt, 0x1009bc)
|
|
FldFunc(StrTRB_TsUser1spliceCnt, Cnt, 1, 8)
|
|
FldFunc(StrTRB_TsUser1spliceCnt, Act, 0, 1)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser2spliceCnt, 0x1C0, StrTRB_TsUser2spliceCnt, 0x1009c0)
|
|
FldFunc(StrTRB_TsUser2spliceCnt, Cnt, 1, 8)
|
|
FldFunc(StrTRB_TsUser2spliceCnt, Act, 0, 1)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser3spliceCnt, 0x1C4, StrTRB_TsUser3spliceCnt, 0x1009c4)
|
|
FldFunc(StrTRB_TsUser3spliceCnt, Cnt, 1, 8)
|
|
FldFunc(StrTRB_TsUser3spliceCnt, Act, 0, 1)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser4spliceCnt, 0x1C8, StrTRB_TsUser4spliceCnt, 0x1009c8)
|
|
FldFunc(StrTRB_TsUser4spliceCnt, Cnt, 1, 8)
|
|
FldFunc(StrTRB_TsUser4spliceCnt, Act, 0, 1)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser0spliceBuf, 0x1CC, StrTRB_TsUser0spliceBuf, 0x1009cc)
|
|
FldFunc(StrTRB_TsUser0spliceBuf, Ne, 16, 1)
|
|
FldFunc(StrTRB_TsUser0spliceBuf, Full, 15, 1)
|
|
FldFunc(StrTRB_TsUser0spliceBuf, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser1spliceBuf, 0x1D0, StrTRB_TsUser1spliceBuf, 0x1009d0)
|
|
FldFunc(StrTRB_TsUser1spliceBuf, Ne, 16, 1)
|
|
FldFunc(StrTRB_TsUser1spliceBuf, Full, 15, 1)
|
|
FldFunc(StrTRB_TsUser1spliceBuf, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser2spliceBuf, 0x1D4, StrTRB_TsUser2spliceBuf, 0x1009d4)
|
|
FldFunc(StrTRB_TsUser2spliceBuf, Ne, 16, 1)
|
|
FldFunc(StrTRB_TsUser2spliceBuf, Full, 15, 1)
|
|
FldFunc(StrTRB_TsUser2spliceBuf, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser3spliceBuf, 0x1D8, StrTRB_TsUser3spliceBuf, 0x1009d8)
|
|
FldFunc(StrTRB_TsUser3spliceBuf, Ne, 16, 1)
|
|
FldFunc(StrTRB_TsUser3spliceBuf, Full, 15, 1)
|
|
FldFunc(StrTRB_TsUser3spliceBuf, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUser4spliceBuf, 0x1DC, StrTRB_TsUser4spliceBuf, 0x1009dc)
|
|
FldFunc(StrTRB_TsUser4spliceBuf, Ne, 16, 1)
|
|
FldFunc(StrTRB_TsUser4spliceBuf, Full, 15, 1)
|
|
FldFunc(StrTRB_TsUser4spliceBuf, Pid, 0, 13)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUpdWaiting, 0x1E0, StrTRB_TsUpdWaiting, 0x1009e0)
|
|
FldFunc(StrTRB_TsUpdWaiting, Ruw, 1, 1)
|
|
FldFunc(StrTRB_TsUpdWaiting, Puw, 0, 1)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsAud0Extid, 0x1E4, StrTRB_TsAud0Extid, 0x1009e4)
|
|
FldFunc(StrTRB_TsAud0Extid, Eidv, 15, 1)
|
|
FldFunc(StrTRB_TsAud0Extid, Eid, 8, 7)
|
|
FldFunc(StrTRB_TsAud0Extid, Cidv, 7, 1)
|
|
FldFunc(StrTRB_TsAud0Extid, Cid, 0, 7)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsAud1Extid, 0x1E8, StrTRB_TsAud1Extid, 0x1009e8)
|
|
FldFunc(StrTRB_TsAud1Extid, Eidv, 15, 1)
|
|
FldFunc(StrTRB_TsAud1Extid, Eid, 8, 7)
|
|
FldFunc(StrTRB_TsAud1Extid, Cidv, 7, 1)
|
|
FldFunc(StrTRB_TsAud1Extid, Cid, 0, 7)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsAud2Extid, 0x1EC, StrTRB_TsAud2Extid, 0x1009ec)
|
|
FldFunc(StrTRB_TsAud2Extid, Eidv, 15, 1)
|
|
FldFunc(StrTRB_TsAud2Extid, Eid, 8, 7)
|
|
FldFunc(StrTRB_TsAud2Extid, Cidv, 7, 1)
|
|
FldFunc(StrTRB_TsAud2Extid, Cid, 0, 7)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsPcrOffset, 0x1F0, StrTRB_TsPcrOffset, 0x1009f0)
|
|
FldFunc(StrTRB_TsPcrOffset, Pcro, 0, 32)
|
|
RegFunc(StreamTsRegsB, 0x100800, TsUsePusi, 0x1F4, StrTRB_TsUsePusi, 0x1009f4)
|
|
FldFunc(StrTRB_TsUsePusi, A2up, 3, 1)
|
|
FldFunc(StrTRB_TsUsePusi, A1up, 2, 1)
|
|
FldFunc(StrTRB_TsUsePusi, A0up, 1, 1)
|
|
FldFunc(StrTRB_TsUsePusi, Vup, 0, 1)
|
|
|
|
RegAreaFunc(StreamMiscBase, 0x100300, 0x1003FE)
|
|
RegFunc(StreamMisc, 0x100300, UartSelectA, 0x0, StrMc_UartSelectA, 0x100300)
|
|
FldFunc(StrMc_UartSelectA, Us, 0, 4)
|
|
RegFunc(StreamMisc, 0x100300, UartSelectB, 0x4, StrMc_UartSelectB, 0x100304)
|
|
FldFunc(StrMc_UartSelectB, Us, 0, 4)
|
|
RegFunc(StreamMisc, 0x100300, CsSelect, 0x8, StrMc_CsSelect, 0x100308)
|
|
FldFunc(StrMc_CsSelect, Sel, 0, 1)
|
|
RegFunc(StreamMisc, 0x100300, TsAudcdb0Base, 0xC, StrMc_TsAudcdb0Base, 0x10030c)
|
|
FldFunc(StrMc_TsAudcdb0Base, Base, 6, 26)
|
|
RegFunc(StreamMisc, 0x100300, TsAudcdb0End, 0x10, StrMc_TsAudcdb0End, 0x100310)
|
|
FldFunc(StrMc_TsAudcdb0End, End, 6, 26)
|
|
RegFunc(StreamMisc, 0x100300, TsAudcdb0Wrptr, 0x14, StrMc_TsAudcdb0Wrptr, 0x100314)
|
|
FldFunc(StrMc_TsAudcdb0Wrptr, Wrptr, 0, 32)
|
|
RegFunc(StreamMisc, 0x100300, TsAudcdb0Rdptr, 0x18, StrMc_TsAudcdb0Rdptr, 0x100318)
|
|
FldFunc(StrMc_TsAudcdb0Rdptr, Rdptr, 0, 32)
|
|
RegFunc(StreamMisc, 0x100300, TsAudcdb0Empty, 0x1C, StrMc_TsAudcdb0Empty, 0x10031c)
|
|
FldFunc(StrMc_TsAudcdb0Empty, Em, 0, 1)
|
|
RegFunc(StreamMisc, 0x100300, TsAudcdb0WrapPtr, 0x20, StrMc_TsAudcdb0WrapPtr, 0x100320)
|
|
FldFunc(StrMc_TsAudcdb0WrapPtr, Wrap, 0, 32)
|
|
RegFunc(StreamMisc, 0x100300, TsAuditb0Base, 0x24, StrMc_TsAuditb0Base, 0x100324)
|
|
FldFunc(StrMc_TsAuditb0Base, Base, 6, 26)
|
|
RegFunc(StreamMisc, 0x100300, TsAuditb0End, 0x28, StrMc_TsAuditb0End, 0x100328)
|
|
FldFunc(StrMc_TsAuditb0End, End, 6, 26)
|
|
RegFunc(StreamMisc, 0x100300, TsAuditb0Wrptr, 0x2C, StrMc_TsAuditb0Wrptr, 0x10032c)
|
|
FldFunc(StrMc_TsAuditb0Wrptr, Wrptr, 0, 32)
|
|
RegFunc(StreamMisc, 0x100300, TsAuditb0Rdptr, 0x30, StrMc_TsAuditb0Rdptr, 0x100330)
|
|
FldFunc(StrMc_TsAuditb0Rdptr, Rdptr, 0, 32)
|
|
RegFunc(StreamMisc, 0x100300, TsAuditb0Empty, 0x34, StrMc_TsAuditb0Empty, 0x100334)
|
|
FldFunc(StrMc_TsAuditb0Empty, Em, 0, 1)
|
|
RegFunc(StreamMisc, 0x100300, TsAuditb0WrapPtr, 0x38, StrMc_TsAuditb0WrapPtr, 0x100338)
|
|
FldFunc(StrMc_TsAuditb0WrapPtr, Wrap, 0, 32)
|
|
RegFunc(StreamMisc, 0x100300, TsAudcdb1Base, 0x3C, StrMc_TsAudcdb1Base, 0x10033c)
|
|
FldFunc(StrMc_TsAudcdb1Base, Base, 6, 26)
|
|
RegFunc(StreamMisc, 0x100300, TsAudcdb1End, 0x40, StrMc_TsAudcdb1End, 0x100340)
|
|
FldFunc(StrMc_TsAudcdb1End, End, 6, 26)
|
|
RegFunc(StreamMisc, 0x100300, TsAudcdb1Wrptr, 0x44, StrMc_TsAudcdb1Wrptr, 0x100344)
|
|
FldFunc(StrMc_TsAudcdb1Wrptr, Wrptr, 0, 32)
|
|
RegFunc(StreamMisc, 0x100300, TsAudcdb1Rdptr, 0x48, StrMc_TsAudcdb1Rdptr, 0x100348)
|
|
FldFunc(StrMc_TsAudcdb1Rdptr, Rdptr, 0, 32)
|
|
RegFunc(StreamMisc, 0x100300, TsAudcdb1Empty, 0x4C, StrMc_TsAudcdb1Empty, 0x10034c)
|
|
FldFunc(StrMc_TsAudcdb1Empty, Em, 0, 1)
|
|
RegFunc(StreamMisc, 0x100300, TsAudcdb1WrapPtr, 0x50, StrMc_TsAudcdb1WrapPtr, 0x100350)
|
|
FldFunc(StrMc_TsAudcdb1WrapPtr, Wrap, 0, 32)
|
|
RegFunc(StreamMisc, 0x100300, TsAuditb1Base, 0x54, StrMc_TsAuditb1Base, 0x100354)
|
|
FldFunc(StrMc_TsAuditb1Base, Base, 6, 26)
|
|
RegFunc(StreamMisc, 0x100300, TsAuditb1End, 0x58, StrMc_TsAuditb1End, 0x100358)
|
|
FldFunc(StrMc_TsAuditb1End, End, 6, 26)
|
|
RegFunc(StreamMisc, 0x100300, TsAuditb1Wrptr, 0x5C, StrMc_TsAuditb1Wrptr, 0x10035c)
|
|
FldFunc(StrMc_TsAuditb1Wrptr, Wrptr, 0, 32)
|
|
RegFunc(StreamMisc, 0x100300, TsAuditb1Rdptr, 0x60, StrMc_TsAuditb1Rdptr, 0x100360)
|
|
FldFunc(StrMc_TsAuditb1Rdptr, Rdptr, 0, 32)
|
|
RegFunc(StreamMisc, 0x100300, TsAuditb1Empty, 0x64, StrMc_TsAuditb1Empty, 0x100364)
|
|
FldFunc(StrMc_TsAuditb1Empty, Em, 0, 1)
|
|
RegFunc(StreamMisc, 0x100300, TsAuditb1WrapPtr, 0x68, StrMc_TsAuditb1WrapPtr, 0x100368)
|
|
FldFunc(StrMc_TsAuditb1WrapPtr, Wrap, 0, 32)
|
|
RegFunc(StreamMisc, 0x100300, TsAudcdb2Base, 0x6C, StrMc_TsAudcdb2Base, 0x10036c)
|
|
FldFunc(StrMc_TsAudcdb2Base, Base, 6, 26)
|
|
RegFunc(StreamMisc, 0x100300, TsAudcdb2End, 0x70, StrMc_TsAudcdb2End, 0x100370)
|
|
FldFunc(StrMc_TsAudcdb2End, End, 6, 26)
|
|
RegFunc(StreamMisc, 0x100300, TsAudcdb2Wrptr, 0x74, StrMc_TsAudcdb2Wrptr, 0x100374)
|
|
FldFunc(StrMc_TsAudcdb2Wrptr, Wrptr, 0, 32)
|
|
RegFunc(StreamMisc, 0x100300, TsAudcdb2Rdptr, 0x78, StrMc_TsAudcdb2Rdptr, 0x100378)
|
|
FldFunc(StrMc_TsAudcdb2Rdptr, Rdptr, 0, 32)
|
|
RegFunc(StreamMisc, 0x100300, TsAudcdb2Empty, 0x7C, StrMc_TsAudcdb2Empty, 0x10037c)
|
|
FldFunc(StrMc_TsAudcdb2Empty, Em, 0, 1)
|
|
RegFunc(StreamMisc, 0x100300, TsAudcdb2WrapPtr, 0x80, StrMc_TsAudcdb2WrapPtr, 0x100380)
|
|
FldFunc(StrMc_TsAudcdb2WrapPtr, Wrap, 0, 32)
|
|
RegFunc(StreamMisc, 0x100300, TsAuditb2Base, 0x84, StrMc_TsAuditb2Base, 0x100384)
|
|
FldFunc(StrMc_TsAuditb2Base, Base, 6, 26)
|
|
RegFunc(StreamMisc, 0x100300, TsAuditb2End, 0x88, StrMc_TsAuditb2End, 0x100388)
|
|
FldFunc(StrMc_TsAuditb2End, End, 6, 26)
|
|
RegFunc(StreamMisc, 0x100300, TsAuditb2Wrptr, 0x8C, StrMc_TsAuditb2Wrptr, 0x10038c)
|
|
FldFunc(StrMc_TsAuditb2Wrptr, Wrptr, 0, 32)
|
|
RegFunc(StreamMisc, 0x100300, TsAuditb2Rdptr, 0x90, StrMc_TsAuditb2Rdptr, 0x100390)
|
|
FldFunc(StrMc_TsAuditb2Rdptr, Rdptr, 0, 32)
|
|
RegFunc(StreamMisc, 0x100300, TsAuditb2Empty, 0x94, StrMc_TsAuditb2Empty, 0x100394)
|
|
FldFunc(StrMc_TsAuditb2Empty, Em, 0, 1)
|
|
RegFunc(StreamMisc, 0x100300, TsAuditb2WrapPtr, 0x98, StrMc_TsAuditb2WrapPtr, 0x100398)
|
|
FldFunc(StrMc_TsAuditb2WrapPtr, Wrap, 0, 32)
|
|
RegFunc(StreamMisc, 0x100300, TsAud0SoftReset, 0x9C, StrMc_TsAud0SoftReset, 0x10039c)
|
|
FldFunc(StrMc_TsAud0SoftReset, Sr, 0, 1)
|
|
RegFunc(StreamMisc, 0x100300, TsAud1SoftReset, 0xA0, StrMc_TsAud1SoftReset, 0x1003a0)
|
|
FldFunc(StrMc_TsAud1SoftReset, Sr, 0, 1)
|
|
RegFunc(StreamMisc, 0x100300, TsAud2SoftReset, 0xA4, StrMc_TsAud2SoftReset, 0x1003a4)
|
|
FldFunc(StrMc_TsAud2SoftReset, Sr, 0, 1)
|
|
RegFunc(StreamMisc, 0x100300, TsCdbitbDtaif0, 0xA8, StrMc_TsCdbitbDtaif0, 0x1003a8)
|
|
FldFunc(StrMc_TsCdbitbDtaif0, Dt, 0, 1)
|
|
RegFunc(StreamMisc, 0x100300, TsCdbitbDtaif1, 0xAC, StrMc_TsCdbitbDtaif1, 0x1003ac)
|
|
FldFunc(StrMc_TsCdbitbDtaif1, Dt, 0, 1)
|
|
RegFunc(StreamMisc, 0x100300, TsCdbitbDtaif2, 0xB0, StrMc_TsCdbitbDtaif2, 0x1003b0)
|
|
FldFunc(StrMc_TsCdbitbDtaif2, Dt, 0, 1)
|
|
RegFunc(StreamMisc, 0x100300, TsCdbitbSel0, 0xB4, StrMc_TsCdbitbSel0, 0x1003b4)
|
|
FldFunc(StrMc_TsCdbitbSel0, Sel, 0, 1)
|
|
RegFunc(StreamMisc, 0x100300, TsCdbitbSel1, 0xB8, StrMc_TsCdbitbSel1, 0x1003b8)
|
|
FldFunc(StrMc_TsCdbitbSel1, Sel, 0, 2)
|
|
RegFunc(StreamMisc, 0x100300, TsCdbitbSel2, 0xBC, StrMc_TsCdbitbSel2, 0x1003bc)
|
|
FldFunc(StrMc_TsCdbitbSel2, Sel, 0, 1)
|
|
RegFunc(StreamMisc, 0x100300, TsCdbitbThresh, 0xC0, StrMc_TsCdbitbThresh, 0x1003c0)
|
|
FldFunc(StrMc_TsCdbitbThresh, Thr, 0, 4)
|
|
|
|
RegAreaFunc(GpioBase, 0x103000, 0x1031FF)
|
|
RegFunc(Gpio, 0x103000, GpioCtl, 0x0, Gpio_GpioCtl, 0x103000)
|
|
FldFunc(Gpio_GpioCtl, Rddata, 16, 8)
|
|
FldFunc(Gpio_GpioCtl, Gpioen, 8, 8)
|
|
FldFunc(Gpio_GpioCtl, Wrdata, 0, 8)
|
|
RegFunc(Gpio, 0x103000, GpioChipRev, 0x4, Gpio_GpioChipRev, 0x103004)
|
|
RegFunc(Gpio, 0x103000, GpioPinMon0, 0x8, Gpio_GpioPinMon0, 0x103008)
|
|
RegFunc(Gpio, 0x103000, GpioPinMon1, 0xC, Gpio_GpioPinMon1, 0x10300c)
|
|
RegFunc(Gpio, 0x103000, GpioPinMon2, 0x10, Gpio_GpioPinMon2, 0x103010)
|
|
RegFunc(Gpio, 0x103000, GpioPinMon3, 0x14, Gpio_GpioPinMon3, 0x103014)
|
|
RegFunc(Gpio, 0x103000, GpioPinMonSelect, 0x18, Gpio_GpioPinMonSelect, 0x103018)
|
|
FldFunc(Gpio_GpioPinMonSelect, Block, 8, 3)
|
|
FldFunc(Gpio_GpioPinMonSelect, Group, 0, 8)
|
|
RegFunc(Gpio, 0x103000, GpioIntCtl, 0x1C, Gpio_GpioIntCtl, 0x10301c)
|
|
FldFunc(Gpio_GpioIntCtl, LoMsk, 8, 8)
|
|
FldFunc(Gpio_GpioIntCtl, HiMsk, 0, 8)
|
|
|
|
RegAreaFunc(StreamVcxoBase, 0x100100, 0x1002FF)
|
|
RegFunc(StreamVcxo, 0x100100, VcxoCtrlA, 0x0, StrVo_VcxoCtrlA, 0x100100)
|
|
FldFunc(StrVo_VcxoCtrlA, Dutycycle, 0, 16)
|
|
RegFunc(StreamVcxo, 0x100100, VcxoCtrlB, 0x4, StrVo_VcxoCtrlB, 0x100104)
|
|
FldFunc(StrVo_VcxoCtrlB, Dutycycle, 0, 16)
|
|
|
|
RegAreaFunc(StreamCpuregsBase, 0x100F00, 0x100F7F)
|
|
RegFunc(StreamCpuregs, 0x100F00, RegHst2cpuMbx, 0x0, StrCs_RegHst2cpuMbx, 0x100f00)
|
|
FldFunc(StrCs_RegHst2cpuMbx, Value, 0, 32)
|
|
RegFunc(StreamCpuregs, 0x100F00, RegCpu2hstMbx, 0x4, StrCs_RegCpu2hstMbx, 0x100f04)
|
|
FldFunc(StrCs_RegCpu2hstMbx, Value, 0, 32)
|
|
RegFunc(StreamCpuregs, 0x100F00, RegMbxStat, 0x8, StrCs_RegMbxStat, 0x100f08)
|
|
FldFunc(StrCs_RegMbxStat, C2h, 1, 1)
|
|
FldFunc(StrCs_RegMbxStat, H2c, 0, 1)
|
|
RegFunc(StreamCpuregs, 0x100F00, RegCpuIntBase, 0xC, StrCs_RegCpuIntBase, 0x100f0c)
|
|
FldFunc(StrCs_RegCpuIntBase, Addr, 8, 24)
|
|
RegFunc(StreamCpuregs, 0x100F00, RegCpuIntEna, 0x10, StrCs_RegCpuIntEna, 0x100f10)
|
|
FldFunc(StrCs_RegCpuIntEna, Mbx, 31, 1)
|
|
FldFunc(StrCs_RegCpuIntEna, Com7, 23, 1)
|
|
FldFunc(StrCs_RegCpuIntEna, Com6, 22, 1)
|
|
FldFunc(StrCs_RegCpuIntEna, Com5, 21, 1)
|
|
FldFunc(StrCs_RegCpuIntEna, Com4, 20, 1)
|
|
FldFunc(StrCs_RegCpuIntEna, Com3, 19, 1)
|
|
FldFunc(StrCs_RegCpuIntEna, Com2, 18, 1)
|
|
FldFunc(StrCs_RegCpuIntEna, Com1, 17, 1)
|
|
FldFunc(StrCs_RegCpuIntEna, Com0, 16, 1)
|
|
FldFunc(StrCs_RegCpuIntEna, Hw7, 15, 1)
|
|
FldFunc(StrCs_RegCpuIntEna, Hw6, 14, 1)
|
|
FldFunc(StrCs_RegCpuIntEna, Hw5, 13, 1)
|
|
FldFunc(StrCs_RegCpuIntEna, Hw4, 12, 1)
|
|
FldFunc(StrCs_RegCpuIntEna, Hw3, 11, 1)
|
|
FldFunc(StrCs_RegCpuIntEna, Hw2, 10, 1)
|
|
FldFunc(StrCs_RegCpuIntEna, Hw1, 9, 1)
|
|
FldFunc(StrCs_RegCpuIntEna, Hw0, 8, 1)
|
|
FldFunc(StrCs_RegCpuIntEna, Db7, 7, 1)
|
|
FldFunc(StrCs_RegCpuIntEna, Db6, 6, 1)
|
|
FldFunc(StrCs_RegCpuIntEna, Db5, 5, 1)
|
|
FldFunc(StrCs_RegCpuIntEna, Db4, 4, 1)
|
|
FldFunc(StrCs_RegCpuIntEna, Db3, 3, 1)
|
|
FldFunc(StrCs_RegCpuIntEna, Db2, 2, 1)
|
|
FldFunc(StrCs_RegCpuIntEna, Db1, 1, 1)
|
|
FldFunc(StrCs_RegCpuIntEna, Db0, 0, 1)
|
|
RegFunc(StreamCpuregs, 0x100F00, StreamCpuIntEna, 0x10, StrCs_StreamCpuIntEna, 0x100f10)
|
|
FldFunc(StrCs_StreamCpuIntEna, Mbx, 31, 1)
|
|
FldFunc(StrCs_StreamCpuIntEna, Dec, 18, 1)
|
|
FldFunc(StrCs_StreamCpuIntEna, Aud, 17, 1)
|
|
FldFunc(StrCs_StreamCpuIntEna, M2m, 15, 1)
|
|
FldFunc(StrCs_StreamCpuIntEna, Pci, 14, 1)
|
|
FldFunc(StrCs_StreamCpuIntEna, Ts1, 13, 1)
|
|
FldFunc(StrCs_StreamCpuIntEna, Ts0, 12, 1)
|
|
FldFunc(StrCs_StreamCpuIntEna, GpioHi, 11, 1)
|
|
FldFunc(StrCs_StreamCpuIntEna, GpioLo, 10, 1)
|
|
FldFunc(StrCs_StreamCpuIntEna, Vpp1, 9, 1)
|
|
FldFunc(StrCs_StreamCpuIntEna, Vpp0, 8, 1)
|
|
FldFunc(StrCs_StreamCpuIntEna, Rb, 1, 1)
|
|
FldFunc(StrCs_StreamCpuIntEna, Sd, 0, 1)
|
|
RegFunc(StreamCpuregs, 0x100F00, Dec0CpuIntEna, 0x10, StrCs_Dec0CpuIntEna, 0x100f10)
|
|
FldFunc(StrCs_Dec0CpuIntEna, Mbx, 31, 1)
|
|
FldFunc(StrCs_Dec0CpuIntEna, Dec, 16, 1)
|
|
FldFunc(StrCs_Dec0CpuIntEna, Si, 8, 1)
|
|
FldFunc(StrCs_Dec0CpuIntEna, Rb, 1, 1)
|
|
FldFunc(StrCs_Dec0CpuIntEna, Sd, 0, 1)
|
|
RegFunc(StreamCpuregs, 0x100F00, Dec1CpuIntEna, 0x10, StrCs_Dec1CpuIntEna, 0x100f10)
|
|
FldFunc(StrCs_Dec1CpuIntEna, Mbx, 31, 1)
|
|
FldFunc(StrCs_Dec1CpuIntEna, Cab, 9, 1)
|
|
FldFunc(StrCs_Dec1CpuIntEna, Si, 8, 1)
|
|
FldFunc(StrCs_Dec1CpuIntEna, Rb, 1, 1)
|
|
FldFunc(StrCs_Dec1CpuIntEna, Sd, 0, 1)
|
|
RegFunc(StreamCpuregs, 0x100F00, RegCpuIntStat, 0x14, StrCs_RegCpuIntStat, 0x100f14)
|
|
FldFunc(StrCs_RegCpuIntStat, Mbx, 31, 1)
|
|
FldFunc(StrCs_RegCpuIntStat, Com7, 23, 1)
|
|
FldFunc(StrCs_RegCpuIntStat, Com6, 22, 1)
|
|
FldFunc(StrCs_RegCpuIntStat, Com5, 21, 1)
|
|
FldFunc(StrCs_RegCpuIntStat, Com4, 20, 1)
|
|
FldFunc(StrCs_RegCpuIntStat, Com3, 19, 1)
|
|
FldFunc(StrCs_RegCpuIntStat, Com2, 18, 1)
|
|
FldFunc(StrCs_RegCpuIntStat, Com1, 17, 1)
|
|
FldFunc(StrCs_RegCpuIntStat, Com0, 16, 1)
|
|
FldFunc(StrCs_RegCpuIntStat, Hw7, 15, 1)
|
|
FldFunc(StrCs_RegCpuIntStat, Hw6, 14, 1)
|
|
FldFunc(StrCs_RegCpuIntStat, Hw5, 13, 1)
|
|
FldFunc(StrCs_RegCpuIntStat, Hw4, 12, 1)
|
|
FldFunc(StrCs_RegCpuIntStat, Hw3, 11, 1)
|
|
FldFunc(StrCs_RegCpuIntStat, Hw2, 10, 1)
|
|
FldFunc(StrCs_RegCpuIntStat, Hw1, 9, 1)
|
|
FldFunc(StrCs_RegCpuIntStat, Hw0, 8, 1)
|
|
FldFunc(StrCs_RegCpuIntStat, Db7, 7, 1)
|
|
FldFunc(StrCs_RegCpuIntStat, Db6, 6, 1)
|
|
FldFunc(StrCs_RegCpuIntStat, Db5, 5, 1)
|
|
FldFunc(StrCs_RegCpuIntStat, Db4, 4, 1)
|
|
FldFunc(StrCs_RegCpuIntStat, Db3, 3, 1)
|
|
FldFunc(StrCs_RegCpuIntStat, Db2, 2, 1)
|
|
FldFunc(StrCs_RegCpuIntStat, Db1, 1, 1)
|
|
FldFunc(StrCs_RegCpuIntStat, Db0, 0, 1)
|
|
RegFunc(StreamCpuregs, 0x100F00, StreamCpuIntStat, 0x14, StrCs_StreamCpuIntStat, 0x100f14)
|
|
FldFunc(StrCs_StreamCpuIntStat, Mbx, 31, 1)
|
|
FldFunc(StrCs_StreamCpuIntStat, Dec, 18, 1)
|
|
FldFunc(StrCs_StreamCpuIntStat, Aud, 17, 1)
|
|
FldFunc(StrCs_StreamCpuIntStat, M2m, 15, 1)
|
|
FldFunc(StrCs_StreamCpuIntStat, Pci, 14, 1)
|
|
FldFunc(StrCs_StreamCpuIntStat, Ts1, 13, 1)
|
|
FldFunc(StrCs_StreamCpuIntStat, Ts0, 12, 1)
|
|
FldFunc(StrCs_StreamCpuIntStat, GpioHi, 11, 1)
|
|
FldFunc(StrCs_StreamCpuIntStat, GpioLo, 10, 1)
|
|
FldFunc(StrCs_StreamCpuIntStat, Vpp1, 9, 1)
|
|
FldFunc(StrCs_StreamCpuIntStat, Vpp0, 8, 1)
|
|
FldFunc(StrCs_StreamCpuIntStat, Rb, 1, 1)
|
|
FldFunc(StrCs_StreamCpuIntStat, Sd, 0, 1)
|
|
RegFunc(StreamCpuregs, 0x100F00, Dec0CpuIntStat, 0x14, StrCs_Dec0CpuIntStat, 0x100f14)
|
|
FldFunc(StrCs_Dec0CpuIntStat, Mbx, 31, 1)
|
|
FldFunc(StrCs_Dec0CpuIntStat, Dec, 16, 1)
|
|
FldFunc(StrCs_Dec0CpuIntStat, Si, 8, 1)
|
|
FldFunc(StrCs_Dec0CpuIntStat, Rb, 1, 1)
|
|
FldFunc(StrCs_Dec0CpuIntStat, Sd, 0, 1)
|
|
RegFunc(StreamCpuregs, 0x100F00, Dec1CpuIntStat, 0x14, StrCs_Dec1CpuIntStat, 0x100f14)
|
|
FldFunc(StrCs_Dec1CpuIntStat, Mbx, 31, 1)
|
|
FldFunc(StrCs_Dec1CpuIntStat, Cab, 9, 1)
|
|
FldFunc(StrCs_Dec1CpuIntStat, Si, 8, 1)
|
|
FldFunc(StrCs_Dec1CpuIntStat, Rb, 1, 1)
|
|
FldFunc(StrCs_Dec1CpuIntStat, Sd, 0, 1)
|
|
RegFunc(StreamCpuregs, 0x100F00, RegHst2cpuStat, 0x18, StrCs_RegHst2cpuStat, 0x100f18)
|
|
FldFunc(StrCs_RegHst2cpuStat, Value, 0, 32)
|
|
RegFunc(StreamCpuregs, 0x100F00, RegCpu2hstStat, 0x1C, StrCs_RegCpu2hstStat, 0x100f1c)
|
|
FldFunc(StrCs_RegCpu2hstStat, Value, 0, 32)
|
|
RegFunc(StreamCpuregs, 0x100F00, RegCpuIntgenSet, 0x20, StrCs_RegCpuIntgenSet, 0x100f20)
|
|
FldFunc(StrCs_RegCpuIntgenSet, Cpu2HstMbx, 31, 1)
|
|
FldFunc(StrCs_RegCpuIntgenSet, Int15, 15, 1)
|
|
FldFunc(StrCs_RegCpuIntgenSet, Int14, 14, 1)
|
|
FldFunc(StrCs_RegCpuIntgenSet, Int13, 13, 1)
|
|
FldFunc(StrCs_RegCpuIntgenSet, Int12, 12, 1)
|
|
FldFunc(StrCs_RegCpuIntgenSet, Int11, 11, 1)
|
|
FldFunc(StrCs_RegCpuIntgenSet, Int10, 10, 1)
|
|
FldFunc(StrCs_RegCpuIntgenSet, Int9, 9, 1)
|
|
FldFunc(StrCs_RegCpuIntgenSet, Int8, 8, 1)
|
|
FldFunc(StrCs_RegCpuIntgenSet, Int7, 7, 1)
|
|
FldFunc(StrCs_RegCpuIntgenSet, Int6, 6, 1)
|
|
FldFunc(StrCs_RegCpuIntgenSet, Int5, 5, 1)
|
|
FldFunc(StrCs_RegCpuIntgenSet, Int4, 4, 1)
|
|
FldFunc(StrCs_RegCpuIntgenSet, Int3, 3, 1)
|
|
FldFunc(StrCs_RegCpuIntgenSet, Int2, 2, 1)
|
|
FldFunc(StrCs_RegCpuIntgenSet, Int1, 1, 1)
|
|
FldFunc(StrCs_RegCpuIntgenSet, Int0, 0, 1)
|
|
RegFunc(StreamCpuregs, 0x100F00, RegCpuIntgenClr, 0x24, StrCs_RegCpuIntgenClr, 0x100f24)
|
|
FldFunc(StrCs_RegCpuIntgenClr, Cpu2HstMbx, 31, 1)
|
|
// parameter REG_CPU_INTGEN_CLR__WATCHDOG_TIMER_WIDTH = 1;
|
|
// parameter REG_CPU_INTGEN_CLR__WATCHDOG_TIMER_MSB = 30;
|
|
// parameter REG_CPU_INTGEN_CLR__WATCHDOG_TIMER_LSB = 30;
|
|
FldFunc(StrCs_RegCpuIntgenClr, WatchdogTimer, 30, 1)
|
|
FldFunc(StrCs_RegCpuIntgenClr, Int15, 15, 1)
|
|
FldFunc(StrCs_RegCpuIntgenClr, Int14, 14, 1)
|
|
FldFunc(StrCs_RegCpuIntgenClr, Int13, 13, 1)
|
|
FldFunc(StrCs_RegCpuIntgenClr, Int12, 12, 1)
|
|
FldFunc(StrCs_RegCpuIntgenClr, Int11, 11, 1)
|
|
FldFunc(StrCs_RegCpuIntgenClr, Int10, 10, 1)
|
|
FldFunc(StrCs_RegCpuIntgenClr, Int9, 9, 1)
|
|
FldFunc(StrCs_RegCpuIntgenClr, Int8, 8, 1)
|
|
FldFunc(StrCs_RegCpuIntgenClr, Int7, 7, 1)
|
|
FldFunc(StrCs_RegCpuIntgenClr, Int6, 6, 1)
|
|
FldFunc(StrCs_RegCpuIntgenClr, Int5, 5, 1)
|
|
FldFunc(StrCs_RegCpuIntgenClr, Int4, 4, 1)
|
|
FldFunc(StrCs_RegCpuIntgenClr, Int3, 3, 1)
|
|
FldFunc(StrCs_RegCpuIntgenClr, Int2, 2, 1)
|
|
FldFunc(StrCs_RegCpuIntgenClr, Int1, 1, 1)
|
|
FldFunc(StrCs_RegCpuIntgenClr, Int0, 0, 1)
|
|
RegFunc(StreamCpuregs, 0x100F00, RegCpuIcacheMiss, 0x28, StrCs_RegCpuIcacheMiss, 0x100f28)
|
|
FldFunc(StrCs_RegCpuIcacheMiss, Count, 0, 32)
|
|
RegFunc(StreamCpuregs, 0x100F00, RegCpuIntgenMask, 0x2C, StrCs_RegCpuIntgenMask, 0x100f2c)
|
|
FldFunc(StrCs_RegCpuIntgenMask, Cpu2HstMbx, 31, 1)
|
|
// parameter REG_CPU_INTGEN_MASK__WATCHDOG_TIMER_WIDTH = 1;
|
|
// parameter REG_CPU_INTGEN_MASK__WATCHDOG_TIMER_MSB = 30;
|
|
// parameter REG_CPU_INTGEN_MASK__WATCHDOG_TIMER_LSB = 30;
|
|
FldFunc(StrCs_RegCpuIntgenMask, WatchdogTimer, 30, 1)
|
|
FldFunc(StrCs_RegCpuIntgenMask, Int15, 15, 1)
|
|
FldFunc(StrCs_RegCpuIntgenMask, Int14, 14, 1)
|
|
FldFunc(StrCs_RegCpuIntgenMask, Int13, 13, 1)
|
|
FldFunc(StrCs_RegCpuIntgenMask, Int12, 12, 1)
|
|
FldFunc(StrCs_RegCpuIntgenMask, Int11, 11, 1)
|
|
FldFunc(StrCs_RegCpuIntgenMask, Int10, 10, 1)
|
|
FldFunc(StrCs_RegCpuIntgenMask, Int9, 9, 1)
|
|
FldFunc(StrCs_RegCpuIntgenMask, Int8, 8, 1)
|
|
FldFunc(StrCs_RegCpuIntgenMask, Int7, 7, 1)
|
|
FldFunc(StrCs_RegCpuIntgenMask, Int6, 6, 1)
|
|
FldFunc(StrCs_RegCpuIntgenMask, Int5, 5, 1)
|
|
FldFunc(StrCs_RegCpuIntgenMask, Int4, 4, 1)
|
|
FldFunc(StrCs_RegCpuIntgenMask, Int3, 3, 1)
|
|
FldFunc(StrCs_RegCpuIntgenMask, Int2, 2, 1)
|
|
FldFunc(StrCs_RegCpuIntgenMask, Int1, 1, 1)
|
|
FldFunc(StrCs_RegCpuIntgenMask, Int0, 0, 1)
|
|
|
|
RegAreaFunc(StreamM2mBase, 0x101000, 0x1010FF)
|
|
RegFunc(StreamM2m, 0x101000, M2mRevision, 0x0, StrMm_M2mRevision, 0x101000)
|
|
FldFunc(StrMm_M2mRevision, Major, 8, 8)
|
|
FldFunc(StrMm_M2mRevision, Minor, 0, 8)
|
|
RegFunc(StreamM2m, 0x101000, M2mFirstDesc, 0x4, StrMm_M2mFirstDesc, 0x101004)
|
|
FldFunc(StrMm_M2mFirstDesc, Addr, 0, 28)
|
|
RegFunc(StreamM2m, 0x101000, M2mCtrl, 0x8, StrMm_M2mCtrl, 0x101008)
|
|
FldFunc(StrMm_M2mCtrl, Run, 0, 1)
|
|
RegFunc(StreamM2m, 0x101000, M2mWakeCtrl, 0xC, StrMm_M2mWakeCtrl, 0x10100c)
|
|
FldFunc(StrMm_M2mWakeCtrl, WakeMode, 1, 1)
|
|
FldFunc(StrMm_M2mWakeCtrl, Wake, 0, 1)
|
|
RegFunc(StreamM2m, 0x101000, M2mStatus, 0x14, StrMm_M2mStatus, 0x101014)
|
|
FldFunc(StrMm_M2mStatus, DmaStatus, 0, 2)
|
|
RegFunc(StreamM2m, 0x101000, M2mCurDesc, 0x18, StrMm_M2mCurDesc, 0x101018)
|
|
FldFunc(StrMm_M2mCurDesc, Addr, 0, 28)
|
|
RegFunc(StreamM2m, 0x101000, M2mCurByte, 0x1C, StrMm_M2mCurByte, 0x10101c)
|
|
FldFunc(StrMm_M2mCurByte, Count, 0, 25)
|
|
RegFunc(StreamM2m, 0x101000, M2mScratch, 0x24, StrMm_M2mScratch, 0x101024)
|
|
FldFunc(StrMm_M2mScratch, ScratchBit, 0, 32)
|
|
|
|
RegAreaFunc(StreamM2mKeysBase, 0x101100, 0x1011FF)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mKey0Lo, 0x0, StrMKs_M2mKey0Lo, 0x101100)
|
|
FldFunc(StrMKs_M2mKey0Lo, Key, 0, 32)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mKey0Hi, 0x4, StrMKs_M2mKey0Hi, 0x101104)
|
|
FldFunc(StrMKs_M2mKey0Hi, Key, 0, 32)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mKey1Lo, 0x8, StrMKs_M2mKey1Lo, 0x101108)
|
|
FldFunc(StrMKs_M2mKey1Lo, Key, 0, 32)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mKey1Hi, 0xC, StrMKs_M2mKey1Hi, 0x10110c)
|
|
FldFunc(StrMKs_M2mKey1Hi, Key, 0, 32)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mKey2Lo, 0x10, StrMKs_M2mKey2Lo, 0x101110)
|
|
FldFunc(StrMKs_M2mKey2Lo, Key, 0, 32)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mKey2Hi, 0x14, StrMKs_M2mKey2Hi, 0x101114)
|
|
FldFunc(StrMKs_M2mKey2Hi, Key, 0, 32)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mKey3Lo, 0x18, StrMKs_M2mKey3Lo, 0x101118)
|
|
FldFunc(StrMKs_M2mKey3Lo, Key, 0, 32)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mKey3Hi, 0x1C, StrMKs_M2mKey3Hi, 0x10111c)
|
|
FldFunc(StrMKs_M2mKey3Hi, Key, 0, 32)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mKey4Lo, 0x20, StrMKs_M2mKey4Lo, 0x101120)
|
|
FldFunc(StrMKs_M2mKey4Lo, Key, 0, 32)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mKey4Hi, 0x24, StrMKs_M2mKey4Hi, 0x101124)
|
|
FldFunc(StrMKs_M2mKey4Hi, Key, 0, 32)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mKey5Lo, 0x28, StrMKs_M2mKey5Lo, 0x101128)
|
|
FldFunc(StrMKs_M2mKey5Lo, Key, 0, 32)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mKey5Hi, 0x2C, StrMKs_M2mKey5Hi, 0x10112c)
|
|
FldFunc(StrMKs_M2mKey5Hi, Key, 0, 32)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mKey6Lo, 0x30, StrMKs_M2mKey6Lo, 0x101130)
|
|
FldFunc(StrMKs_M2mKey6Lo, Key, 0, 32)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mKey6Hi, 0x34, StrMKs_M2mKey6Hi, 0x101134)
|
|
FldFunc(StrMKs_M2mKey6Hi, Key, 0, 32)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mKey7Lo, 0x38, StrMKs_M2mKey7Lo, 0x101138)
|
|
FldFunc(StrMKs_M2mKey7Lo, Key, 0, 32)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mKey7Hi, 0x3C, StrMKs_M2mKey7Hi, 0x10113c)
|
|
FldFunc(StrMKs_M2mKey7Hi, Key, 0, 32)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mKey8Lo, 0x40, StrMKs_M2mKey8Lo, 0x101140)
|
|
FldFunc(StrMKs_M2mKey8Lo, Key, 0, 32)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mKey8Hi, 0x44, StrMKs_M2mKey8Hi, 0x101144)
|
|
FldFunc(StrMKs_M2mKey8Hi, Key, 0, 32)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mKey9Lo, 0x48, StrMKs_M2mKey9Lo, 0x101148)
|
|
FldFunc(StrMKs_M2mKey9Lo, Key, 0, 32)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mKey9Hi, 0x4C, StrMKs_M2mKey9Hi, 0x10114c)
|
|
FldFunc(StrMKs_M2mKey9Hi, Key, 0, 32)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mKey10Lo, 0x50, StrMKs_M2mKey10Lo, 0x101150)
|
|
FldFunc(StrMKs_M2mKey10Lo, Key, 0, 32)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mKey10Hi, 0x54, StrMKs_M2mKey10Hi, 0x101154)
|
|
FldFunc(StrMKs_M2mKey10Hi, Key, 0, 32)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mKey11Lo, 0x58, StrMKs_M2mKey11Lo, 0x101158)
|
|
FldFunc(StrMKs_M2mKey11Lo, Key, 0, 32)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mKey11Hi, 0x5C, StrMKs_M2mKey11Hi, 0x10115c)
|
|
FldFunc(StrMKs_M2mKey11Hi, Key, 0, 32)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mKey12Lo, 0x60, StrMKs_M2mKey12Lo, 0x101160)
|
|
FldFunc(StrMKs_M2mKey12Lo, Key, 0, 32)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mKey12Hi, 0x64, StrMKs_M2mKey12Hi, 0x101164)
|
|
FldFunc(StrMKs_M2mKey12Hi, Key, 0, 32)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mKey13Lo, 0x68, StrMKs_M2mKey13Lo, 0x101168)
|
|
FldFunc(StrMKs_M2mKey13Lo, Key, 0, 32)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mKey13Hi, 0x6C, StrMKs_M2mKey13Hi, 0x10116c)
|
|
FldFunc(StrMKs_M2mKey13Hi, Key, 0, 32)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mKey14Lo, 0x70, StrMKs_M2mKey14Lo, 0x101170)
|
|
FldFunc(StrMKs_M2mKey14Lo, Key, 0, 32)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mKey14Hi, 0x74, StrMKs_M2mKey14Hi, 0x101174)
|
|
FldFunc(StrMKs_M2mKey14Hi, Key, 0, 32)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mKey15Lo, 0x78, StrMKs_M2mKey15Lo, 0x101178)
|
|
FldFunc(StrMKs_M2mKey15Lo, Key, 0, 32)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mKey15Hi, 0x7C, StrMKs_M2mKey15Hi, 0x10117c)
|
|
FldFunc(StrMKs_M2mKey15Hi, Key, 0, 32)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mIntStat, 0x80, StrMKs_M2mIntStat, 0x101180)
|
|
FldFunc(StrMKs_M2mIntStat, Doc, 0, 1)
|
|
RegFunc(StreamM2mKeys, 0x101100, M2mIntMask, 0x84, StrMKs_M2mIntMask, 0x101184)
|
|
FldFunc(StrMKs_M2mIntMask, Doc, 0, 1)
|
|
|
|
RegAreaFunc(StreamCpudmaBase, 0x101800, 0x1018FF)
|
|
RegFunc(StreamCpudma, 0x101800, RegDma0SdAddr, 0x0, StrCa_RegDma0SdAddr, 0x101800)
|
|
FldFunc(StrCa_RegDma0SdAddr, SdAddr, 0, 32)
|
|
RegFunc(StreamCpudma, 0x101800, RegDma0LclAddr, 0x4, StrCa_RegDma0LclAddr, 0x101804)
|
|
FldFunc(StrCa_RegDma0LclAddr, Addr, 2, 7)
|
|
RegFunc(StreamCpudma, 0x101800, RegDma0Len, 0x8, StrCa_RegDma0Len, 0x101808)
|
|
FldFunc(StrCa_RegDma0Len, Length, 2, 8)
|
|
RegFunc(StreamCpudma, 0x101800, RegDma1SdAddr, 0x10, StrCa_RegDma1SdAddr, 0x101810)
|
|
FldFunc(StrCa_RegDma1SdAddr, SdAddr, 0, 32)
|
|
RegFunc(StreamCpudma, 0x101800, RegDma1LclAddr, 0x14, StrCa_RegDma1LclAddr, 0x101814)
|
|
FldFunc(StrCa_RegDma1LclAddr, Addr, 2, 7)
|
|
RegFunc(StreamCpudma, 0x101800, RegDma1Len, 0x18, StrCa_RegDma1Len, 0x101818)
|
|
FldFunc(StrCa_RegDma1Len, Length, 2, 8)
|
|
RegFunc(StreamCpudma, 0x101800, RegDma2SdAddr, 0x20, StrCa_RegDma2SdAddr, 0x101820)
|
|
FldFunc(StrCa_RegDma2SdAddr, SdAddr, 0, 32)
|
|
RegFunc(StreamCpudma, 0x101800, RegDma2LclAddr, 0x24, StrCa_RegDma2LclAddr, 0x101824)
|
|
FldFunc(StrCa_RegDma2LclAddr, Addr, 2, 7)
|
|
RegFunc(StreamCpudma, 0x101800, RegDma2Len, 0x28, StrCa_RegDma2Len, 0x101828)
|
|
FldFunc(StrCa_RegDma2Len, Length, 2, 8)
|
|
RegFunc(StreamCpudma, 0x101800, RegDma3SdAddr, 0x30, StrCa_RegDma3SdAddr, 0x101830)
|
|
FldFunc(StrCa_RegDma3SdAddr, SdAddr, 0, 32)
|
|
RegFunc(StreamCpudma, 0x101800, RegDma3LclAddr, 0x34, StrCa_RegDma3LclAddr, 0x101834)
|
|
FldFunc(StrCa_RegDma3LclAddr, Addr, 2, 7)
|
|
RegFunc(StreamCpudma, 0x101800, RegDma3Len, 0x38, StrCa_RegDma3Len, 0x101838)
|
|
FldFunc(StrCa_RegDma3Len, Length, 2, 8)
|
|
RegFunc(StreamCpudma, 0x101800, RegDmaStatus, 0x40, StrCa_RegDmaStatus, 0x101840)
|
|
FldFunc(StrCa_RegDmaStatus, Act3, 3, 1)
|
|
FldFunc(StrCa_RegDmaStatus, Act2, 2, 1)
|
|
FldFunc(StrCa_RegDmaStatus, Act1, 1, 1)
|
|
FldFunc(StrCa_RegDmaStatus, Act0, 0, 1)
|
|
|
|
RegAreaFunc(StreamDmamemBase, 0x101A00, 0x1021FF)
|
|
RegFunc(StreamDmamem, 0x101A00, DmaMem, 0x0, StrDm_DmaMem, 0x101a00)
|
|
FldFunc(StrDm_DmaMem, Data, 0, 32)
|
|
|
|
RegAreaFunc(StreamIndSdramRegsBase, 0x141000, 0x14107F)
|
|
RegFunc(StreamIndSdramRegs, 0x141000, RegSdramInc, 0x0, StrISRs_RegSdramInc, 0x141000)
|
|
FldFunc(StrISRs_RegSdramInc, Inc, 0, 1)
|
|
RegFunc(StreamIndSdramRegs, 0x141000, RegSdramAddr, 0x4, StrISRs_RegSdramAddr, 0x141004)
|
|
FldFunc(StrISRs_RegSdramAddr, Addr, 0, 32)
|
|
RegFunc(StreamIndSdramRegs, 0x141000, RegSdramData, 0x8, StrISRs_RegSdramData, 0x141008)
|
|
FldFunc(StrISRs_RegSdramData, Data, 0, 32)
|
|
RegFunc(StreamIndSdramRegs, 0x141000, RegCpuDbg, 0x10, StrISRs_RegCpuDbg, 0x141010)
|
|
FldFunc(StrISRs_RegCpuDbg, Hst, 0, 1)
|
|
|
|
RegAreaFunc(StreamCpucoreBase, 0x144000, 0x144FFF)
|
|
RegFunc(StreamCpucore, 0x144000, CpucoreReg, 0x0, StrCe_CpucoreReg, 0x144000)
|
|
FldFunc(StrCe_CpucoreReg, Addr, 0, 32)
|
|
|
|
RegAreaFunc(StreamCpuauxBase, 0x145000, 0x145FFF)
|
|
RegFunc(StreamCpuaux, 0x145000, CpuauxReg, 0x0, StrCx_CpuauxReg, 0x145000)
|
|
FldFunc(StrCx_CpuauxReg, Addr, 0, 32)
|
|
|
|
RegAreaFunc(StreamCpuimemBase, 0x146000, 0x147FFF)
|
|
RegFunc(StreamCpuimem, 0x146000, CpuimemReg, 0x0, StrCm_CpuimemReg, 0x146000)
|
|
FldFunc(StrCm_CpuimemReg, Addr, 0, 32)
|
|
|
|
RegAreaFunc(StreamCpudmemBase, 0x148000, 0x14FFFF)
|
|
RegFunc(StreamCpudmem, 0x148000, CpudmemReg, 0x0, StrCm_CpudmemReg, 0x148000)
|
|
FldFunc(StrCm_CpudmemReg, Addr, 0, 32)
|
|
|
|
#endif
|
|
|
|
|
|
//******************************************************************************
|
|
//
|
|
// Audio Processor Ring Bus Node
|
|
//
|
|
//******************************************************************************
|
|
#ifndef EXCLUDE_AUDIO_PROCESSOR
|
|
|
|
RegAreaFunc(RaptorRbnodeRegsBase, 0x200000, 0x20007F)
|
|
RegFunc(RaptorRbnodeRegs, 0x200000, RbConfig , 0x0, RapRRs_RbConfig , 0x200000)
|
|
FldFunc(RapRRs_RbConfig , RdPostEna, 1, 1)
|
|
FldFunc(RapRRs_RbConfig , RdBypEna, 0, 1)
|
|
RegFunc(RaptorRbnodeRegs, 0x200000, RbStickyError, 0x4, RapRRs_RbStickyError, 0x200004)
|
|
FldFunc(RapRRs_RbStickyError, Node, 1, 1)
|
|
FldFunc(RapRRs_RbStickyError, Tgt, 0, 1)
|
|
RegFunc(RaptorRbnodeRegs, 0x200000, RbCurrentError, 0x8, RapRRs_RbCurrentError, 0x200008)
|
|
FldFunc(RapRRs_RbCurrentError, Node, 1, 1)
|
|
FldFunc(RapRRs_RbCurrentError, Tgt, 0, 1)
|
|
RegFunc(RaptorRbnodeRegs, 0x200000, RbReadData, 0xC, RapRRs_RbReadData, 0x20000c)
|
|
FldFunc(RapRRs_RbReadData, Data, 0, 32)
|
|
|
|
RegAreaFunc(RaptorRingbusDebugRegs0Base, 0x200080, 0x2000FF)
|
|
RegFunc(RaptorRingbusDebugRegs0, 0x200080, RbDebugConfig, 0x0, RapRDR0_RbDebugConfig, 0x200080)
|
|
FldFunc(RapRDR0_RbDebugConfig, Addr3WrStat, 15, 1)
|
|
FldFunc(RapRDR0_RbDebugConfig, Addr2WrStat, 14, 1)
|
|
FldFunc(RapRDR0_RbDebugConfig, Addr1WrStat, 13, 1)
|
|
FldFunc(RapRDR0_RbDebugConfig, Addr0WrStat, 12, 1)
|
|
FldFunc(RapRDR0_RbDebugConfig, Addr3RdStat, 11, 1)
|
|
FldFunc(RapRDR0_RbDebugConfig, Addr2RdStat, 10, 1)
|
|
FldFunc(RapRDR0_RbDebugConfig, Addr1RdStat, 9, 1)
|
|
FldFunc(RapRDR0_RbDebugConfig, Addr0RdStat, 8, 1)
|
|
FldFunc(RapRDR0_RbDebugConfig, Addr3WrEna, 7, 1)
|
|
FldFunc(RapRDR0_RbDebugConfig, Addr2WrEna, 6, 1)
|
|
FldFunc(RapRDR0_RbDebugConfig, Addr1WrEna, 5, 1)
|
|
FldFunc(RapRDR0_RbDebugConfig, Addr0WrEna, 4, 1)
|
|
FldFunc(RapRDR0_RbDebugConfig, Addr3RdEna, 3, 1)
|
|
FldFunc(RapRDR0_RbDebugConfig, Addr2RdEna, 2, 1)
|
|
FldFunc(RapRDR0_RbDebugConfig, Addr1RdEna, 1, 1)
|
|
FldFunc(RapRDR0_RbDebugConfig, Addr0RdEna, 0, 1)
|
|
RegFunc(RaptorRingbusDebugRegs0, 0x200080, RbDebugReg0Addr, 0x4, RapRDR0_RbDebugReg0Addr, 0x200084)
|
|
FldFunc(RapRDR0_RbDebugReg0Addr, Addr, 0, 16)
|
|
RegFunc(RaptorRingbusDebugRegs0, 0x200080, RbDebugReg1Addr, 0x8, RapRDR0_RbDebugReg1Addr, 0x200088)
|
|
FldFunc(RapRDR0_RbDebugReg1Addr, Addr, 0, 16)
|
|
RegFunc(RaptorRingbusDebugRegs0, 0x200080, RbDebugReg2Addr, 0xC, RapRDR0_RbDebugReg2Addr, 0x20008c)
|
|
FldFunc(RapRDR0_RbDebugReg2Addr, Addr, 0, 16)
|
|
RegFunc(RaptorRingbusDebugRegs0, 0x200080, RbDebugReg3Addr, 0x10, RapRDR0_RbDebugReg3Addr, 0x200090)
|
|
FldFunc(RapRDR0_RbDebugReg3Addr, Addr, 0, 16)
|
|
RegFunc(RaptorRingbusDebugRegs0, 0x200080, RbDebugOutputReg, 0x14, RapRDR0_RbDebugOutputReg, 0x200094)
|
|
FldFunc(RapRDR0_RbDebugOutputReg, DspRst, 1, 1)
|
|
FldFunc(RapRDR0_RbDebugOutputReg, FmmRst, 0, 1)
|
|
|
|
RegAreaFunc(RaptorRingbusDebugRegs1Base, 0x200100, 0x20017F)
|
|
RegFunc(RaptorRingbusDebugRegs1, 0x200100, RbDebugConfig, 0x0, RapRDR1_RbDebugConfig, 0x200100)
|
|
FldFunc(RapRDR1_RbDebugConfig, Addr3WrStat, 15, 1)
|
|
FldFunc(RapRDR1_RbDebugConfig, Addr2WrStat, 14, 1)
|
|
FldFunc(RapRDR1_RbDebugConfig, Addr1WrStat, 13, 1)
|
|
FldFunc(RapRDR1_RbDebugConfig, Addr0WrStat, 12, 1)
|
|
FldFunc(RapRDR1_RbDebugConfig, Addr3RdStat, 11, 1)
|
|
FldFunc(RapRDR1_RbDebugConfig, Addr2RdStat, 10, 1)
|
|
FldFunc(RapRDR1_RbDebugConfig, Addr1RdStat, 9, 1)
|
|
FldFunc(RapRDR1_RbDebugConfig, Addr0RdStat, 8, 1)
|
|
FldFunc(RapRDR1_RbDebugConfig, Addr3WrEna, 7, 1)
|
|
FldFunc(RapRDR1_RbDebugConfig, Addr2WrEna, 6, 1)
|
|
FldFunc(RapRDR1_RbDebugConfig, Addr1WrEna, 5, 1)
|
|
FldFunc(RapRDR1_RbDebugConfig, Addr0WrEna, 4, 1)
|
|
FldFunc(RapRDR1_RbDebugConfig, Addr3RdEna, 3, 1)
|
|
FldFunc(RapRDR1_RbDebugConfig, Addr2RdEna, 2, 1)
|
|
FldFunc(RapRDR1_RbDebugConfig, Addr1RdEna, 1, 1)
|
|
FldFunc(RapRDR1_RbDebugConfig, Addr0RdEna, 0, 1)
|
|
RegFunc(RaptorRingbusDebugRegs1, 0x200100, RbDebugReg0Addr, 0x4, RapRDR1_RbDebugReg0Addr, 0x200104)
|
|
FldFunc(RapRDR1_RbDebugReg0Addr, Addr, 0, 16)
|
|
RegFunc(RaptorRingbusDebugRegs1, 0x200100, RbDebugReg1Addr, 0x8, RapRDR1_RbDebugReg1Addr, 0x200108)
|
|
FldFunc(RapRDR1_RbDebugReg1Addr, Addr, 0, 16)
|
|
RegFunc(RaptorRingbusDebugRegs1, 0x200100, RbDebugReg2Addr, 0xC, RapRDR1_RbDebugReg2Addr, 0x20010c)
|
|
FldFunc(RapRDR1_RbDebugReg2Addr, Addr, 0, 16)
|
|
RegFunc(RaptorRingbusDebugRegs1, 0x200100, RbDebugReg3Addr, 0x10, RapRDR1_RbDebugReg3Addr, 0x200110)
|
|
FldFunc(RapRDR1_RbDebugReg3Addr, Addr, 0, 16)
|
|
RegFunc(RaptorRingbusDebugRegs1, 0x200100, RbDebugOutputReg, 0x14, RapRDR1_RbDebugOutputReg, 0x200114)
|
|
FldFunc(RapRDR1_RbDebugOutputReg, DspRst, 1, 1)
|
|
FldFunc(RapRDR1_RbDebugOutputReg, FmmRst, 0, 1)
|
|
|
|
RegAreaFunc(AUD_DSP_MISC_BASE, 0x00240100, 0x0024011c)
|
|
RegFunc(AUD_DSP_MISC, 0x00240100, AUD_DSP_MISC_REVISION, 0x0, AUD_DSP_MISC_REVISION, 0x240100)
|
|
FldFunc(AUD_DSP_MISC_REVISION, MAJOR, 8, 8)
|
|
FldFunc(AUD_DSP_MISC_REVISION, MINOR, 0, 8)
|
|
RegFunc(AUD_DSP_MISC, 0x00240100, AUD_DSP_MISC_SOFT_RESET, 0x4, AUD_DSP_MISC_SOFT_RESET, 0x240104)
|
|
FldFunc(AUD_DSP_MISC_SOFT_RESET, RESET_SCBDMA0_B, 2, 1)
|
|
FldFunc(AUD_DSP_MISC_SOFT_RESET, RESET_PROC0_B, 1, 1)
|
|
FldFunc(AUD_DSP_MISC_SOFT_RESET, RESET0_B, 0, 1)
|
|
RegFunc(AUD_DSP_MISC, 0x00240100, AUD_DSP_MISC_SCB_BLOCKOUT_CTRL, 0xc, AUD_DSP_MISC_SCB_BLOCKOUT_CTRL, 0x24010c)
|
|
FldFunc(AUD_DSP_MISC_SCB_BLOCKOUT_CTRL, SCB_CLIENT1_BLOCKOUT, 8, 8)
|
|
FldFunc(AUD_DSP_MISC_SCB_BLOCKOUT_CTRL, SCB_CLIENT0_BLOCKOUT, 0, 8)
|
|
RegFunc(AUD_DSP_MISC, 0x00240100, AUD_DSP_MISC_SCB_BRIDGE0_STATUS, 0x10, AUD_DSP_MISC_SCB_BRIDGE0_STATUS, 0x240110)
|
|
FldFunc(AUD_DSP_MISC_SCB_BRIDGE0_STATUS, MV_RD_PENDING, 11, 1)
|
|
FldFunc(AUD_DSP_MISC_SCB_BRIDGE0_STATUS, FLOW_TO_DMA, 10, 1)
|
|
FldFunc(AUD_DSP_MISC_SCB_BRIDGE0_STATUS, CMD_RD_PTR, 9, 1)
|
|
FldFunc(AUD_DSP_MISC_SCB_BRIDGE0_STATUS, CMD_WR_PTR, 8, 1)
|
|
FldFunc(AUD_DSP_MISC_SCB_BRIDGE0_STATUS, BB_RD_PTR, 7, 1)
|
|
FldFunc(AUD_DSP_MISC_SCB_BRIDGE0_STATUS, BB_WR_PTR, 6, 1)
|
|
FldFunc(AUD_DSP_MISC_SCB_BRIDGE0_STATUS, BB_RD_CNT, 4, 2)
|
|
FldFunc(AUD_DSP_MISC_SCB_BRIDGE0_STATUS, BB_WR_CNT, 2, 2)
|
|
FldFunc(AUD_DSP_MISC_SCB_BRIDGE0_STATUS, SCB_REQ_CNT, 0, 2)
|
|
RegFunc(AUD_DSP_MISC, 0x00240100, AUD_DSP_MISC_SCB_MONITOR_CTRL, 0x14, AUD_DSP_MISC_SCB_MONITOR_CTRL, 0x240114)
|
|
FldFunc(AUD_DSP_MISC_SCB_MONITOR_CTRL, SCB_MONITOR_SELECT, 12, 2)
|
|
FldFunc(AUD_DSP_MISC_SCB_MONITOR_CTRL, SCB_LATENCY_LIMIT, 0, 12)
|
|
RegFunc(AUD_DSP_MISC, 0x00240100, AUD_DSP_MISC_SCB_MONITOR_CLEAR, 0x18, AUD_DSP_MISC_SCB_MONITOR_CLEAR, 0x240118)
|
|
FldFunc(AUD_DSP_MISC_SCB_MONITOR_CLEAR, SCB_CLEAR_MAX_LATENCY, 0, 1)
|
|
RegFunc(AUD_DSP_MISC, 0x00240100, AUD_DSP_MISC_SCB_MONITOR_STATUS, 0x1c, AUD_DSP_MISC_SCB_MONITOR_STATUS, 0x24011c)
|
|
FldFunc(AUD_DSP_MISC_SCB_MONITOR_STATUS, SCB_MAX_LATENCY, 0, 12)
|
|
|
|
RegAreaFunc(AUD_DSP_CTRL0_BASE, 0x00242000, 0x002421a4)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_CORE_ID, 0x0, AUD_DSP_CTRL0_CORE_ID, 0x242000)
|
|
FldFunc(AUD_DSP_CTRL0_CORE_ID, ID, 0, 1)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_CORE_BOOT_CONFIG, 0x4, AUD_DSP_CTRL0_CORE_BOOT_CONFIG, 0x242004)
|
|
FldFunc(AUD_DSP_CTRL0_CORE_BOOT_CONFIG, BOOT_CODE_SELDS, 0, 1)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_CORE_IBOOT, 0x8, AUD_DSP_CTRL0_CORE_IBOOT, 0x242008)
|
|
FldFunc(AUD_DSP_CTRL0_CORE_IBOOT, IBOOT, 0, 1)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_SEMAPHORE0, 0x10, AUD_DSP_CTRL0_SEMAPHORE0, 0x242010)
|
|
FldFunc(AUD_DSP_CTRL0_SEMAPHORE0, STATUS, 0, 8)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_SEMAPHORE1, 0x14, AUD_DSP_CTRL0_SEMAPHORE1, 0x242014)
|
|
FldFunc(AUD_DSP_CTRL0_SEMAPHORE1, STATUS, 0, 8)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_SEMAPHORE2, 0x18, AUD_DSP_CTRL0_SEMAPHORE2, 0x242018)
|
|
FldFunc(AUD_DSP_CTRL0_SEMAPHORE2, STATUS, 0, 8)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_SEMAPHORE3, 0x1c, AUD_DSP_CTRL0_SEMAPHORE3, 0x24201c)
|
|
FldFunc(AUD_DSP_CTRL0_SEMAPHORE3, STATUS, 0, 8)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_SEMAPHORE4, 0x20, AUD_DSP_CTRL0_SEMAPHORE4, 0x242020)
|
|
FldFunc(AUD_DSP_CTRL0_SEMAPHORE4, STATUS, 0, 8)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_SEMAPHORE5, 0x24, AUD_DSP_CTRL0_SEMAPHORE5, 0x242024)
|
|
FldFunc(AUD_DSP_CTRL0_SEMAPHORE5, STATUS, 0, 8)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_SEMAPHORE6, 0x28, AUD_DSP_CTRL0_SEMAPHORE6, 0x242028)
|
|
FldFunc(AUD_DSP_CTRL0_SEMAPHORE6, STATUS, 0, 8)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_SEMAPHORE7, 0x2c, AUD_DSP_CTRL0_SEMAPHORE7, 0x24202c)
|
|
FldFunc(AUD_DSP_CTRL0_SEMAPHORE7, STATUS, 0, 8)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_MAILBOX0, 0x30, AUD_DSP_CTRL0_MAILBOX0, 0x242030)
|
|
FldFunc(AUD_DSP_CTRL0_MAILBOX0, MPEG1_LAYER1, 0, 32)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_MAILBOX1, 0x34, AUD_DSP_CTRL0_MAILBOX1, 0x242034)
|
|
FldFunc(AUD_DSP_CTRL0_MAILBOX1, MAIL3, 0, 32)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_MAILBOX2, 0x38, AUD_DSP_CTRL0_MAILBOX2, 0x242038)
|
|
FldFunc(AUD_DSP_CTRL0_MAILBOX2, MAIL3, 0, 32)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_MAILBOX3, 0x3c, AUD_DSP_CTRL0_MAILBOX3, 0x24203c)
|
|
FldFunc(AUD_DSP_CTRL0_MAILBOX3, MAIL3, 0, 32)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_MAILBOX4, 0x40, AUD_DSP_CTRL0_MAILBOX4, 0x242040)
|
|
FldFunc(AUD_DSP_CTRL0_MAILBOX4, MAIL3, 0, 32)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_MAILBOX5, 0x44, AUD_DSP_CTRL0_MAILBOX5, 0x242044)
|
|
FldFunc(AUD_DSP_CTRL0_MAILBOX5, MAIL3, 0, 32)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_MAILBOX6, 0x48, AUD_DSP_CTRL0_MAILBOX6, 0x242048)
|
|
FldFunc(AUD_DSP_CTRL0_MAILBOX6, MAIL3, 0, 32)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_MAILBOX7, 0x4c, AUD_DSP_CTRL0_MAILBOX7, 0x24204c)
|
|
FldFunc(AUD_DSP_CTRL0_MAILBOX7, MAIL3, 0, 32)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_EXT_TIMER, 0x50, AUD_DSP_CTRL0_EXT_TIMER, 0x242050)
|
|
FldFunc(AUD_DSP_CTRL0_EXT_TIMER, ET, 31, 1)
|
|
FldFunc(AUD_DSP_CTRL0_EXT_TIMER, CM, 30, 1)
|
|
FldFunc(AUD_DSP_CTRL0_EXT_TIMER, COUNT, 0, 30)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_EXT_TIMERVALUE, 0x54, AUD_DSP_CTRL0_EXT_TIMERVALUE, 0x242054)
|
|
FldFunc(AUD_DSP_CTRL0_EXT_TIMERVALUE, TIME, 0, 32)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_WATCHDOG_TIMER, 0x58, AUD_DSP_CTRL0_WATCHDOG_TIMER, 0x242058)
|
|
FldFunc(AUD_DSP_CTRL0_WATCHDOG_TIMER, ET, 31, 1)
|
|
FldFunc(AUD_DSP_CTRL0_WATCHDOG_TIMER, CM, 30, 1)
|
|
FldFunc(AUD_DSP_CTRL0_WATCHDOG_TIMER, COUNT, 0, 30)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_WDOG_TIMERVALUE, 0x5c, AUD_DSP_CTRL0_WDOG_TIMERVALUE, 0x24205c)
|
|
FldFunc(AUD_DSP_CTRL0_WDOG_TIMERVALUE, TIME, 0, 32)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_RBASE_ADDR0, 0x80, AUD_DSP_CTRL0_RBASE_ADDR0, 0x242080)
|
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FldFunc(AUD_DSP_CTRL0_RBASE_ADDR0, ADDRESS, 0, 32)
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|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_RBASE_ADDR1, 0x84, AUD_DSP_CTRL0_RBASE_ADDR1, 0x242084)
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|
FldFunc(AUD_DSP_CTRL0_RBASE_ADDR1, ADDRESS, 0, 32)
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|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_RBASE_ADDR2, 0x88, AUD_DSP_CTRL0_RBASE_ADDR2, 0x242088)
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|
FldFunc(AUD_DSP_CTRL0_RBASE_ADDR2, ADDRESS, 0, 32)
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|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_RBASE_ADDR3, 0x8c, AUD_DSP_CTRL0_RBASE_ADDR3, 0x24208c)
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FldFunc(AUD_DSP_CTRL0_RBASE_ADDR3, ADDRESS, 0, 32)
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|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_RBASE_ADDR4, 0x90, AUD_DSP_CTRL0_RBASE_ADDR4, 0x242090)
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FldFunc(AUD_DSP_CTRL0_RBASE_ADDR4, ADDRESS, 0, 32)
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|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_RBASE_ADDR5, 0x94, AUD_DSP_CTRL0_RBASE_ADDR5, 0x242094)
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FldFunc(AUD_DSP_CTRL0_RBASE_ADDR5, ADDRESS, 0, 32)
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|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_RBASE_ADDR6, 0x98, AUD_DSP_CTRL0_RBASE_ADDR6, 0x242098)
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FldFunc(AUD_DSP_CTRL0_RBASE_ADDR6, ADDRESS, 0, 32)
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|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_RBASE_ADDR7, 0x9c, AUD_DSP_CTRL0_RBASE_ADDR7, 0x24209c)
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FldFunc(AUD_DSP_CTRL0_RBASE_ADDR7, ADDRESS, 0, 32)
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|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_RBASE_ADDR8, 0xa0, AUD_DSP_CTRL0_RBASE_ADDR8, 0x2420a0)
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FldFunc(AUD_DSP_CTRL0_RBASE_ADDR8, ADDRESS, 0, 32)
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|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_RBASE_ADDR9, 0xa4, AUD_DSP_CTRL0_RBASE_ADDR9, 0x2420a4)
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FldFunc(AUD_DSP_CTRL0_RBASE_ADDR9, ADDRESS, 0, 32)
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RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_RBASE_ADDR10, 0xa8, AUD_DSP_CTRL0_RBASE_ADDR10, 0x2420a8)
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FldFunc(AUD_DSP_CTRL0_RBASE_ADDR10, ADDRESS, 0, 32)
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|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_RBASE_ADDR11, 0xac, AUD_DSP_CTRL0_RBASE_ADDR11, 0x2420ac)
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FldFunc(AUD_DSP_CTRL0_RBASE_ADDR11, ADDRESS, 0, 32)
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|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_XRI_SWAP, 0xb0, AUD_DSP_CTRL0_XRI_SWAP, 0x2420b0)
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FldFunc(AUD_DSP_CTRL0_XRI_SWAP, RBUS2XRI, 2, 2)
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|
FldFunc(AUD_DSP_CTRL0_XRI_SWAP, XRI2RBUS, 0, 2)
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RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_XRI_TEST_STATUS, 0xb4, AUD_DSP_CTRL0_XRI_TEST_STATUS, 0x2420b4)
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FldFunc(AUD_DSP_CTRL0_XRI_TEST_STATUS, TEST_STATUS, 0, 32)
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|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_DMEM_SPARE, 0xbc, AUD_DSP_CTRL0_DMEM_SPARE, 0x2420bc)
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FldFunc(AUD_DSP_CTRL0_DMEM_SPARE, DATA3, 0, 32)
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|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_JMEM_F800, 0x100, AUD_DSP_CTRL0_JMEM_F800, 0x242100)
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FldFunc(AUD_DSP_CTRL0_JMEM_F800, INSTRUCTIONS, 0, 32)
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|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_JMEM_F802, 0x104, AUD_DSP_CTRL0_JMEM_F802, 0x242104)
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FldFunc(AUD_DSP_CTRL0_JMEM_F802, INSTRUCTIONS, 0, 32)
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|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_JMEM_F804, 0x108, AUD_DSP_CTRL0_JMEM_F804, 0x242108)
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|
FldFunc(AUD_DSP_CTRL0_JMEM_F804, INSTRUCTIONS, 0, 32)
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|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_JMEM_F806, 0x10c, AUD_DSP_CTRL0_JMEM_F806, 0x24210c)
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FldFunc(AUD_DSP_CTRL0_JMEM_F806, INSTRUCTIONS, 0, 32)
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|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_JMEM_F808, 0x110, AUD_DSP_CTRL0_JMEM_F808, 0x242110)
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FldFunc(AUD_DSP_CTRL0_JMEM_F808, INSTRUCTIONS, 0, 32)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_JMEM_F80A, 0x114, AUD_DSP_CTRL0_JMEM_F80A, 0x242114)
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FldFunc(AUD_DSP_CTRL0_JMEM_F80A, INSTRUCTIONS, 0, 32)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_JMEM_F80C, 0x118, AUD_DSP_CTRL0_JMEM_F80C, 0x242118)
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|
FldFunc(AUD_DSP_CTRL0_JMEM_F80C, INSTRUCTIONS, 0, 32)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_JMEM_F80E, 0x11c, AUD_DSP_CTRL0_JMEM_F80E, 0x24211c)
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|
FldFunc(AUD_DSP_CTRL0_JMEM_F80E, INSTRUCTIONS, 0, 32)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_JMEM_F810, 0x120, AUD_DSP_CTRL0_JMEM_F810, 0x242120)
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|
FldFunc(AUD_DSP_CTRL0_JMEM_F810, INSTRUCTIONS, 0, 32)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_JMEM_F812, 0x124, AUD_DSP_CTRL0_JMEM_F812, 0x242124)
|
|
FldFunc(AUD_DSP_CTRL0_JMEM_F812, INSTRUCTIONS, 0, 32)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_JMEM_F814, 0x128, AUD_DSP_CTRL0_JMEM_F814, 0x242128)
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|
FldFunc(AUD_DSP_CTRL0_JMEM_F814, INSTRUCTIONS, 0, 32)
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|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_JMEM_F816, 0x12c, AUD_DSP_CTRL0_JMEM_F816, 0x24212c)
|
|
FldFunc(AUD_DSP_CTRL0_JMEM_F816, INSTRUCTIONS, 0, 32)
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|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_JMEM_F818, 0x130, AUD_DSP_CTRL0_JMEM_F818, 0x242130)
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|
FldFunc(AUD_DSP_CTRL0_JMEM_F818, INSTRUCTIONS, 0, 32)
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|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_JMEM_F81A_FFFF, 0x134, AUD_DSP_CTRL0_JMEM_F81A_FFFF, 0x242134)
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|
FldFunc(AUD_DSP_CTRL0_JMEM_F81A_FFFF, INSTRUCTIONS, 0, 32)
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|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_EXT_IMEM0, 0x138, AUD_DSP_CTRL0_EXT_IMEM0, 0x242138)
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|
FldFunc(AUD_DSP_CTRL0_EXT_IMEM0, INSTRUCTIONS, 0, 32)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_EXT_IMEM1, 0x13c, AUD_DSP_CTRL0_EXT_IMEM1, 0x24213c)
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FldFunc(AUD_DSP_CTRL0_EXT_IMEM1, INSTRUCTIONS, 0, 32)
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|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_I2R_RDATA, 0x140, AUD_DSP_CTRL0_I2R_RDATA, 0x242140)
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|
FldFunc(AUD_DSP_CTRL0_I2R_RDATA, DATA3, 0, 32)
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|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_R2I_WDATA, 0x144, AUD_DSP_CTRL0_R2I_WDATA, 0x242144)
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|
FldFunc(AUD_DSP_CTRL0_R2I_WDATA, DATA3, 0, 32)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_R2I_CMD_ADDR, 0x148, AUD_DSP_CTRL0_R2I_CMD_ADDR, 0x242148)
|
|
FldFunc(AUD_DSP_CTRL0_R2I_CMD_ADDR, MEM, 19, 1)
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|
FldFunc(AUD_DSP_CTRL0_R2I_CMD_ADDR, RD_WR_CMD, 16, 3)
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|
FldFunc(AUD_DSP_CTRL0_R2I_CMD_ADDR, ADDRESS, 0, 16)
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|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_IMC_STAT, 0x14c, AUD_DSP_CTRL0_IMC_STAT, 0x24214c)
|
|
FldFunc(AUD_DSP_CTRL0_IMC_STAT, RBUS_BUSY, 4, 1)
|
|
FldFunc(AUD_DSP_CTRL0_IMC_STAT, RBUS, 3, 1)
|
|
FldFunc(AUD_DSP_CTRL0_IMC_STAT, DMA, 2, 1)
|
|
FldFunc(AUD_DSP_CTRL0_IMC_STAT, DSP_IMEM, 1, 1)
|
|
FldFunc(AUD_DSP_CTRL0_IMC_STAT, DSP_DMEM, 0, 1)
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|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_DMA_SRC_ADDR0, 0x180, AUD_DSP_CTRL0_DMA_SRC_ADDR0, 0x242180)
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|
FldFunc(AUD_DSP_CTRL0_DMA_SRC_ADDR0, SRC_ADDR, 0, 28)
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|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_DMA_DST_ADDR0, 0x184, AUD_DSP_CTRL0_DMA_DST_ADDR0, 0x242184)
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|
FldFunc(AUD_DSP_CTRL0_DMA_DST_ADDR0, DST_ADDR, 0, 28)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_DMA_TRANSFER0, 0x188, AUD_DSP_CTRL0_DMA_TRANSFER0, 0x242188)
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|
FldFunc(AUD_DSP_CTRL0_DMA_TRANSFER0, MW_SWAP_TYPE, 30, 2)
|
|
FldFunc(AUD_DSP_CTRL0_DMA_TRANSFER0, DATA_TYPE, 28, 2)
|
|
FldFunc(AUD_DSP_CTRL0_DMA_TRANSFER0, SWAP_TYPE, 26, 2)
|
|
FldFunc(AUD_DSP_CTRL0_DMA_TRANSFER0, TRAN_TYPE, 24, 2)
|
|
FldFunc(AUD_DSP_CTRL0_DMA_TRANSFER0, NUM_BYTES, 0, 17)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_DMA_ABORT0, 0x18c, AUD_DSP_CTRL0_DMA_ABORT0, 0x24218c)
|
|
FldFunc(AUD_DSP_CTRL0_DMA_ABORT0, ABORTDM, 0, 1)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_DMA_SRC_ADDR1, 0x190, AUD_DSP_CTRL0_DMA_SRC_ADDR1, 0x242190)
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|
FldFunc(AUD_DSP_CTRL0_DMA_SRC_ADDR1, SRC_ADDR, 0, 28)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_DMA_DST_ADDR1, 0x194, AUD_DSP_CTRL0_DMA_DST_ADDR1, 0x242194)
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|
FldFunc(AUD_DSP_CTRL0_DMA_DST_ADDR1, DST_ADDR, 0, 28)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_DMA_TRANSFER1, 0x198, AUD_DSP_CTRL0_DMA_TRANSFER1, 0x242198)
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|
FldFunc(AUD_DSP_CTRL0_DMA_TRANSFER1, MW_SWAP_TYPE, 30, 2)
|
|
FldFunc(AUD_DSP_CTRL0_DMA_TRANSFER1, DATA_TYPE, 28, 2)
|
|
FldFunc(AUD_DSP_CTRL0_DMA_TRANSFER1, SWAP_TYPE, 26, 2)
|
|
FldFunc(AUD_DSP_CTRL0_DMA_TRANSFER1, TRAN_TYPE, 24, 2)
|
|
FldFunc(AUD_DSP_CTRL0_DMA_TRANSFER1, NUM_BYTES, 0, 17)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_DMA_ABORT1, 0x19c, AUD_DSP_CTRL0_DMA_ABORT1, 0x24219c)
|
|
FldFunc(AUD_DSP_CTRL0_DMA_ABORT1, ABORTDM, 0, 1)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_DMA_STATUS, 0x1a0, AUD_DSP_CTRL0_DMA_STATUS, 0x2421a0)
|
|
FldFunc(AUD_DSP_CTRL0_DMA_STATUS, ABORT1DM, 10, 1)
|
|
FldFunc(AUD_DSP_CTRL0_DMA_STATUS, FINISHED1DM, 9, 1)
|
|
FldFunc(AUD_DSP_CTRL0_DMA_STATUS, BUSY1DM, 8, 1)
|
|
FldFunc(AUD_DSP_CTRL0_DMA_STATUS, ABORT0DM, 2, 1)
|
|
FldFunc(AUD_DSP_CTRL0_DMA_STATUS, FINISHED0DM, 1, 1)
|
|
FldFunc(AUD_DSP_CTRL0_DMA_STATUS, BUSY0DM, 0, 1)
|
|
RegFunc(AUD_DSP_CTRL0, 0x00242000, AUD_DSP_CTRL0_DMA_TEST_STATUS, 0x1a4, AUD_DSP_CTRL0_DMA_TEST_STATUS, 0x2421a4)
|
|
FldFunc(AUD_DSP_CTRL0_DMA_TEST_STATUS, TEST_STATUS, 0, 32)
|
|
|
|
RegAreaFunc(AUD_DSP_CFG0_BASE, 0x00242400, 0x002425fc)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_MASTER_IT_POINTER, 0x0, AUD_DSP_CFG0_MASTER_IT_POINTER, 0x242400)
|
|
FldFunc(AUD_DSP_CFG0_MASTER_IT_POINTER, MASTER_INDEX_TABLE_PTR, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_STC_MASTER_SELECT, 0x4, AUD_DSP_CFG0_STC_MASTER_SELECT, 0x242404)
|
|
FldFunc(AUD_DSP_CFG0_STC_MASTER_SELECT, SW_UNDEFINED, 1, 31)
|
|
FldFunc(AUD_DSP_CFG0_STC_MASTER_SELECT, STC_SELECT, 0, 1)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_SW_UNDEFINED_HOST, 0x8, AUD_DSP_CFG0_SW_UNDEFINED_HOST, 0x242408)
|
|
FldFunc(AUD_DSP_CFG0_SW_UNDEFINED_HOST, SW_UNDEFINED, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_RAVE_TIMEBASE_SEL_CXT0, 0x20, AUD_DSP_CFG0_RAVE_TIMEBASE_SEL_CXT0, 0x242420)
|
|
FldFunc(AUD_DSP_CFG0_RAVE_TIMEBASE_SEL_CXT0, SW_UNDEFINED, 16, 16)
|
|
FldFunc(AUD_DSP_CFG0_RAVE_TIMEBASE_SEL_CXT0, TIMEBASE_SEL, 12, 4)
|
|
FldFunc(AUD_DSP_CFG0_RAVE_TIMEBASE_SEL_CXT0, RAVE_CTXT_SEL, 8, 4)
|
|
FldFunc(AUD_DSP_CFG0_RAVE_TIMEBASE_SEL_CXT0, AUD_MODULE_ID, 4, 4)
|
|
FldFunc(AUD_DSP_CFG0_RAVE_TIMEBASE_SEL_CXT0, AUD_INPUT_TYPE, 0, 4)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_AV_OFFSET_CXT0, 0x24, AUD_DSP_CFG0_AV_OFFSET_CXT0, 0x242424)
|
|
FldFunc(AUD_DSP_CFG0_AV_OFFSET_CXT0, AV_OFFSET, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_PVR_OFFSET_CXT0, 0x28, AUD_DSP_CFG0_PVR_OFFSET_CXT0, 0x242428)
|
|
FldFunc(AUD_DSP_CFG0_PVR_OFFSET_CXT0, PVR_OFFSET, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_DECODE_OFFSET_CXT0, 0x2c, AUD_DSP_CFG0_DECODE_OFFSET_CXT0, 0x24242c)
|
|
FldFunc(AUD_DSP_CFG0_DECODE_OFFSET_CXT0, DECODE_OFFSET3, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_TSM_UPPER_THRESHOLD_CXT0, 0x30, AUD_DSP_CFG0_TSM_UPPER_THRESHOLD_CXT0, 0x242430)
|
|
FldFunc(AUD_DSP_CFG0_TSM_UPPER_THRESHOLD_CXT0, TSM_UPPER_THRESHOLD3, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_TSM_LOWER_THRESHOLD_CXT0, 0x34, AUD_DSP_CFG0_TSM_LOWER_THRESHOLD_CXT0, 0x242434)
|
|
FldFunc(AUD_DSP_CFG0_TSM_LOWER_THRESHOLD_CXT0, TSM_LOWER_THRESHOLD3, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_TSM_DISCARD_THRESHOLD_CXT0, 0x38, AUD_DSP_CFG0_TSM_DISCARD_THRESHOLD_CXT0, 0x242438)
|
|
FldFunc(AUD_DSP_CFG0_TSM_DISCARD_THRESHOLD_CXT0, TSM_DISCARD_THRESHOLD3, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT0, 0x3c, AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT0, 0x24243c)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT0, CH2_BUF_ID, 28, 4)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT0, CH2_SRC_ID, 25, 3)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT0, CH2_EN, 24, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT0, CH1_BUF_ID, 20, 4)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT0, CH1_SRC_ID, 17, 3)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT0, CH1_EN, 16, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT0, CH0_BUF_ID, 12, 4)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT0, CH0_SRC_ID, 9, 3)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT0, CH0_EN, 8, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT0, CMP_BUF_ID, 4, 4)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT0, CMP_SRC_ID, 1, 3)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT0, CMP_EN, 0, 1)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT0, 0x40, AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT0, 0x242440)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT0, SW_UNDEFINED, 24, 8)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT0, CH5_BUF_ID, 20, 4)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT0, CH5_SRC_ID, 17, 3)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT0, CH5_EN, 16, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT0, CH4_BUF_ID, 12, 4)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT0, CH4_SRC_ID, 9, 3)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT0, CH4_EN, 8, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT0, CH3_BUF_ID, 4, 4)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT0, CH3_SRC_ID, 1, 3)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT0, CH3_EN, 0, 1)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_FMM_DEST_CXT0, 0x44, AUD_DSP_CFG0_FMM_DEST_CXT0, 0x242444)
|
|
FldFunc(AUD_DSP_CFG0_FMM_DEST_CXT0, SW_UNDEFINED, 8, 24)
|
|
FldFunc(AUD_DSP_CFG0_FMM_DEST_CXT0, PLL3, 7, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_DEST_CXT0, PLL2, 6, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_DEST_CXT0, PLL1, 5, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_DEST_CXT0, PLL0, 4, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_DEST_CXT0, SPDIF1, 3, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_DEST_CXT0, SPDIF0, 2, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_DEST_CXT0, DAC1, 1, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_DEST_CXT0, DAC0, 0, 1)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_ALGO_ID_CXT0, 0x48, AUD_DSP_CFG0_ALGO_ID_CXT0, 0x242448)
|
|
FldFunc(AUD_DSP_CFG0_ALGO_ID_CXT0, SW_UNDEFINED, 8, 24)
|
|
FldFunc(AUD_DSP_CFG0_ALGO_ID_CXT0, DECODE_MODE, 5, 3)
|
|
FldFunc(AUD_DSP_CFG0_ALGO_ID_CXT0, ALGO_ID, 0, 5)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_CONTROL_REGISTER0_CXT0, 0x4c, AUD_DSP_CFG0_CONTROL_REGISTER0_CXT0, 0x24244c)
|
|
FldFunc(AUD_DSP_CFG0_CONTROL_REGISTER0_CXT0, AAC_LC, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_CONTROL_REGISTER1_CXT0, 0x50, AUD_DSP_CFG0_CONTROL_REGISTER1_CXT0, 0x242450)
|
|
FldFunc(AUD_DSP_CFG0_CONTROL_REGISTER1_CXT0, AAC_LC, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_CONTROL_REGISTER2_CXT0, 0x54, AUD_DSP_CFG0_CONTROL_REGISTER2_CXT0, 0x242454)
|
|
FldFunc(AUD_DSP_CFG0_CONTROL_REGISTER2_CXT0, AAC_LC, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_CONTROL_REGISTER3_CXT0, 0x58, AUD_DSP_CFG0_CONTROL_REGISTER3_CXT0, 0x242458)
|
|
FldFunc(AUD_DSP_CFG0_CONTROL_REGISTER3_CXT0, AAC_LC, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_CONTROL_REGISTER4_CXT0, 0x5c, AUD_DSP_CFG0_CONTROL_REGISTER4_CXT0, 0x24245c)
|
|
FldFunc(AUD_DSP_CFG0_CONTROL_REGISTER4_CXT0, AAC_LC, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_KARAOKE_CONFIG_CXT0, 0x60, AUD_DSP_CFG0_KARAOKE_CONFIG_CXT0, 0x242460)
|
|
FldFunc(AUD_DSP_CFG0_KARAOKE_CONFIG_CXT0, SW_UNDEFINED, 4, 28)
|
|
FldFunc(AUD_DSP_CFG0_KARAOKE_CONFIG_CXT0, KARAOKE_ALGO_TYPE, 2, 2)
|
|
FldFunc(AUD_DSP_CFG0_KARAOKE_CONFIG_CXT0, VOCAL_CHANNEL_VALUE, 0, 2)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_DOWNMIX_CONFIG_CXT0, 0x64, AUD_DSP_CFG0_DOWNMIX_CONFIG_CXT0, 0x242464)
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|
FldFunc(AUD_DSP_CFG0_DOWNMIX_CONFIG_CXT0, SW_UNDEFINED, 3, 29)
|
|
FldFunc(AUD_DSP_CFG0_DOWNMIX_CONFIG_CXT0, DOWNMIX_MODE, 0, 3)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_SRS_CONFIG_CXT0, 0x68, AUD_DSP_CFG0_SRS_CONFIG_CXT0, 0x242468)
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|
FldFunc(AUD_DSP_CFG0_SRS_CONFIG_CXT0, SW_UNDEFINED, 10, 22)
|
|
FldFunc(AUD_DSP_CFG0_SRS_CONFIG_CXT0, SRS_SPEAKER_RESPONSE, 6, 4)
|
|
FldFunc(AUD_DSP_CFG0_SRS_CONFIG_CXT0, SRS_MODE, 2, 4)
|
|
FldFunc(AUD_DSP_CFG0_SRS_CONFIG_CXT0, SRS_, 1, 1)
|
|
FldFunc(AUD_DSP_CFG0_SRS_CONFIG_CXT0, SRS_ENABLE, 0, 1)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_SRC_CONFIG_CXT0, 0x6c, AUD_DSP_CFG0_SRC_CONFIG_CXT0, 0x24246c)
|
|
FldFunc(AUD_DSP_CFG0_SRC_CONFIG_CXT0, SW_UNDEFINED, 6, 26)
|
|
FldFunc(AUD_DSP_CFG0_SRC_CONFIG_CXT0, OUTPUT_SAMPLING_FREQUENCY, 4, 2)
|
|
FldFunc(AUD_DSP_CFG0_SRC_CONFIG_CXT0, DECIMATION_TYPE, 0, 4)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_POST_PROCESSING_BRANCH0_CXT0, 0x70, AUD_DSP_CFG0_POST_PROCESSING_BRANCH0_CXT0, 0x242470)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH0_CXT0, POST_PROCESSING_TYPE_STAGE6, 28, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH0_CXT0, POST_PROCESSING_TYPE_STAGE5, 24, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH0_CXT0, POST_PROCESSING_TYPE_STAGE4, 20, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH0_CXT0, POST_PROCESSING_TYPE_STAGE3, 16, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH0_CXT0, POST_PROCESSING_TYPE_STAGE2, 12, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH0_CXT0, POST_PROCESSING_TYPE_STAGE1, 8, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH0_CXT0, POST_PROCESSING_TYPE_STAGE0, 4, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH0_CXT0, OUTPUT_PORT_TYPE, 0, 4)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_POST_PROCESSING_BRANCH1_CXT0, 0x74, AUD_DSP_CFG0_POST_PROCESSING_BRANCH1_CXT0, 0x242474)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH1_CXT0, POST_PROCESSING_TYPE_STAGE6, 28, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH1_CXT0, POST_PROCESSING_TYPE_STAGE5, 24, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH1_CXT0, POST_PROCESSING_TYPE_STAGE4, 20, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH1_CXT0, POST_PROCESSING_TYPE_STAGE3, 16, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH1_CXT0, POST_PROCESSING_TYPE_STAGE2, 12, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH1_CXT0, POST_PROCESSING_TYPE_STAGE1, 8, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH1_CXT0, POST_PROCESSING_TYPE_STAGE0, 4, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH1_CXT0, OUTPUT_PORT_TYPE, 0, 4)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_POST_PROCESSING_BRANCH2_CXT0, 0x78, AUD_DSP_CFG0_POST_PROCESSING_BRANCH2_CXT0, 0x242478)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH2_CXT0, POST_PROCESSING_TYPE_STAGE6, 28, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH2_CXT0, POST_PROCESSING_TYPE_STAGE5, 24, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH2_CXT0, POST_PROCESSING_TYPE_STAGE4, 20, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH2_CXT0, POST_PROCESSING_TYPE_STAGE3, 16, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH2_CXT0, POST_PROCESSING_TYPE_STAGE2, 12, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH2_CXT0, POST_PROCESSING_TYPE_STAGE1, 8, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH2_CXT0, POST_PROCESSING_TYPE_STAGE0, 4, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH2_CXT0, OUTPUT_PORT_TYPE, 0, 4)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_POST_PROCESSING_BRANCH3_CXT0, 0x7c, AUD_DSP_CFG0_POST_PROCESSING_BRANCH3_CXT0, 0x24247c)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH3_CXT0, POST_PROCESSING_TYPE_STAGE6, 28, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH3_CXT0, POST_PROCESSING_TYPE_STAGE5, 24, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH3_CXT0, POST_PROCESSING_TYPE_STAGE4, 20, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH3_CXT0, POST_PROCESSING_TYPE_STAGE3, 16, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH3_CXT0, POST_PROCESSING_TYPE_STAGE2, 12, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH3_CXT0, POST_PROCESSING_TYPE_STAGE1, 8, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH3_CXT0, POST_PROCESSING_TYPE_STAGE0, 4, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH3_CXT0, OUTPUT_PORT_TYPE, 0, 4)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_SW_UNDEFINED_HOST_CXT0, 0x80, AUD_DSP_CFG0_SW_UNDEFINED_HOST_CXT0, 0x242480)
|
|
FldFunc(AUD_DSP_CFG0_SW_UNDEFINED_HOST_CXT0, SW_UNDEFINED, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_PTS_CXT0, 0x90, AUD_DSP_CFG0_PTS_CXT0, 0x242490)
|
|
FldFunc(AUD_DSP_CFG0_PTS_CXT0, PTS_VALUE3, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_STC_CXT0, 0x94, AUD_DSP_CFG0_STC_CXT0, 0x242494)
|
|
FldFunc(AUD_DSP_CFG0_STC_CXT0, STC_VALUE3, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_PCR_OFFSET_CXT0, 0x98, AUD_DSP_CFG0_PCR_OFFSET_CXT0, 0x242498)
|
|
FldFunc(AUD_DSP_CFG0_PCR_OFFSET_CXT0, PCR_OFFSET, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_TSM_STATUS_CXT0, 0x9c, AUD_DSP_CFG0_TSM_STATUS_CXT0, 0x24249c)
|
|
FldFunc(AUD_DSP_CFG0_TSM_STATUS_CXT0, TSM_STATUS3, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_TSM_WAIT_PERIOD_CXT0, 0xa0, AUD_DSP_CFG0_TSM_WAIT_PERIOD_CXT0, 0x2424a0)
|
|
FldFunc(AUD_DSP_CFG0_TSM_WAIT_PERIOD_CXT0, TSM_WAIT_PERIOD3, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_STREAM_INFO_REGISTER0_CXT0, 0xa4, AUD_DSP_CFG0_STREAM_INFO_REGISTER0_CXT0, 0x2424a4)
|
|
FldFunc(AUD_DSP_CFG0_STREAM_INFO_REGISTER0_CXT0, AAC_LC, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_STREAM_INFO_REGISTER1_CXT0, 0xa8, AUD_DSP_CFG0_STREAM_INFO_REGISTER1_CXT0, 0x2424a8)
|
|
FldFunc(AUD_DSP_CFG0_STREAM_INFO_REGISTER1_CXT0, AAC_LC, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_STREAM_INFO_REGISTER2_CXT0, 0xac, AUD_DSP_CFG0_STREAM_INFO_REGISTER2_CXT0, 0x2424ac)
|
|
FldFunc(AUD_DSP_CFG0_STREAM_INFO_REGISTER2_CXT0, AAC_LC, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_STREAM_INFO_REGISTER3_CXT0, 0xb0, AUD_DSP_CFG0_STREAM_INFO_REGISTER3_CXT0, 0x2424b0)
|
|
FldFunc(AUD_DSP_CFG0_STREAM_INFO_REGISTER3_CXT0, AAC_LC, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_STREAM_INFO_REGISTER4_CXT0, 0xb4, AUD_DSP_CFG0_STREAM_INFO_REGISTER4_CXT0, 0x2424b4)
|
|
FldFunc(AUD_DSP_CFG0_STREAM_INFO_REGISTER4_CXT0, AAC_LC, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_HEARTBEAT_CXT0, 0xb8, AUD_DSP_CFG0_HEARTBEAT_CXT0, 0x2424b8)
|
|
FldFunc(AUD_DSP_CFG0_HEARTBEAT_CXT0, HEARTBEAT, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_SPDIF_PARSER_PTR_CXT0, 0xbc, AUD_DSP_CFG0_SPDIF_PARSER_PTR_CXT0, 0x2424bc)
|
|
FldFunc(AUD_DSP_CFG0_SPDIF_PARSER_PTR_CXT0, HOST_CONFIG_PARAMS_PTR, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_RAVE_TIMEBASE_SEL_CXT1, 0xc0, AUD_DSP_CFG0_RAVE_TIMEBASE_SEL_CXT1, 0x2424c0)
|
|
FldFunc(AUD_DSP_CFG0_RAVE_TIMEBASE_SEL_CXT1, SW_UNDEFINED, 16, 16)
|
|
FldFunc(AUD_DSP_CFG0_RAVE_TIMEBASE_SEL_CXT1, TIMEBASE_SEL, 12, 4)
|
|
FldFunc(AUD_DSP_CFG0_RAVE_TIMEBASE_SEL_CXT1, RAVE_CTXT_SEL, 8, 4)
|
|
FldFunc(AUD_DSP_CFG0_RAVE_TIMEBASE_SEL_CXT1, AUD_MODULE_ID, 4, 4)
|
|
FldFunc(AUD_DSP_CFG0_RAVE_TIMEBASE_SEL_CXT1, AUD_INPUT_TYPE, 0, 4)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_AV_OFFSET_CXT1, 0xc4, AUD_DSP_CFG0_AV_OFFSET_CXT1, 0x2424c4)
|
|
FldFunc(AUD_DSP_CFG0_AV_OFFSET_CXT1, AV_OFFSET, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_PVR_OFFSET_CXT1, 0xc8, AUD_DSP_CFG0_PVR_OFFSET_CXT1, 0x2424c8)
|
|
FldFunc(AUD_DSP_CFG0_PVR_OFFSET_CXT1, PVR_OFFSET, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_DECODE_OFFSET_CXT1, 0xcc, AUD_DSP_CFG0_DECODE_OFFSET_CXT1, 0x2424cc)
|
|
FldFunc(AUD_DSP_CFG0_DECODE_OFFSET_CXT1, DECODE_OFFSET3, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_TSM_UPPER_THRESHOLD_CXT1, 0xd0, AUD_DSP_CFG0_TSM_UPPER_THRESHOLD_CXT1, 0x2424d0)
|
|
FldFunc(AUD_DSP_CFG0_TSM_UPPER_THRESHOLD_CXT1, TSM_UPPER_THRESHOLD3, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_TSM_LOWER_THRESHOLD_CXT1, 0xd4, AUD_DSP_CFG0_TSM_LOWER_THRESHOLD_CXT1, 0x2424d4)
|
|
FldFunc(AUD_DSP_CFG0_TSM_LOWER_THRESHOLD_CXT1, TSM_LOWER_THRESHOLD3, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_TSM_DISCARD_THRESHOLD_CXT1, 0xd8, AUD_DSP_CFG0_TSM_DISCARD_THRESHOLD_CXT1, 0x2424d8)
|
|
FldFunc(AUD_DSP_CFG0_TSM_DISCARD_THRESHOLD_CXT1, TSM_DISCARD_THRESHOLD3, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT1, 0xdc, AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT1, 0x2424dc)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT1, CH2_BUF_ID, 28, 4)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT1, CH2_SRC_ID, 25, 3)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT1, CH2_EN, 24, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT1, CH1_BUF_ID, 20, 4)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT1, CH1_SRC_ID, 17, 3)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT1, CH1_EN, 16, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT1, CH0_BUF_ID, 12, 4)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT1, CH0_SRC_ID, 9, 3)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT1, CH0_EN, 8, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT1, CMP_BUF_ID, 4, 4)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT1, CMP_SRC_ID, 1, 3)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT1, CMP_EN, 0, 1)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT1, 0xe0, AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT1, 0x2424e0)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT1, SW_UNDEFINED, 24, 8)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT1, CH5_BUF_ID, 20, 4)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT1, CH5_SRC_ID, 17, 3)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT1, CH5_EN, 16, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT1, CH4_BUF_ID, 12, 4)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT1, CH4_SRC_ID, 9, 3)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT1, CH4_EN, 8, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT1, CH3_BUF_ID, 4, 4)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT1, CH3_SRC_ID, 1, 3)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT1, CH3_EN, 0, 1)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_FMM_DEST_CXT1, 0xe4, AUD_DSP_CFG0_FMM_DEST_CXT1, 0x2424e4)
|
|
FldFunc(AUD_DSP_CFG0_FMM_DEST_CXT1, SW_UNDEFINED, 8, 24)
|
|
FldFunc(AUD_DSP_CFG0_FMM_DEST_CXT1, PLL3, 7, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_DEST_CXT1, PLL2, 6, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_DEST_CXT1, PLL1, 5, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_DEST_CXT1, PLL0, 4, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_DEST_CXT1, SPDIF1, 3, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_DEST_CXT1, SPDIF0, 2, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_DEST_CXT1, DAC1, 1, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_DEST_CXT1, DAC0, 0, 1)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_ALGO_ID_CXT1, 0xe8, AUD_DSP_CFG0_ALGO_ID_CXT1, 0x2424e8)
|
|
FldFunc(AUD_DSP_CFG0_ALGO_ID_CXT1, SW_UNDEFINED, 8, 24)
|
|
FldFunc(AUD_DSP_CFG0_ALGO_ID_CXT1, DECODE_MODE, 5, 3)
|
|
FldFunc(AUD_DSP_CFG0_ALGO_ID_CXT1, ALGO_ID, 0, 5)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_CONTROL_REGISTER0_CXT1, 0xec, AUD_DSP_CFG0_CONTROL_REGISTER0_CXT1, 0x2424ec)
|
|
FldFunc(AUD_DSP_CFG0_CONTROL_REGISTER0_CXT1, AAC_LC, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_CONTROL_REGISTER1_CXT1, 0xf0, AUD_DSP_CFG0_CONTROL_REGISTER1_CXT1, 0x2424f0)
|
|
FldFunc(AUD_DSP_CFG0_CONTROL_REGISTER1_CXT1, AAC_LC, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_CONTROL_REGISTER2_CXT1, 0xf4, AUD_DSP_CFG0_CONTROL_REGISTER2_CXT1, 0x2424f4)
|
|
FldFunc(AUD_DSP_CFG0_CONTROL_REGISTER2_CXT1, AAC_LC, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_CONTROL_REGISTER3_CXT1, 0xf8, AUD_DSP_CFG0_CONTROL_REGISTER3_CXT1, 0x2424f8)
|
|
FldFunc(AUD_DSP_CFG0_CONTROL_REGISTER3_CXT1, AAC_LC, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_CONTROL_REGISTER4_CXT1, 0xfc, AUD_DSP_CFG0_CONTROL_REGISTER4_CXT1, 0x2424fc)
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FldFunc(AUD_DSP_CFG0_CONTROL_REGISTER4_CXT1, AAC_LC, 0, 32)
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RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_KARAOKE_CONFIG_CXT1, 0x100, AUD_DSP_CFG0_KARAOKE_CONFIG_CXT1, 0x242500)
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FldFunc(AUD_DSP_CFG0_KARAOKE_CONFIG_CXT1, SW_UNDEFINED, 4, 28)
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|
FldFunc(AUD_DSP_CFG0_KARAOKE_CONFIG_CXT1, KARAOKE_ALGO_TYPE, 2, 2)
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|
FldFunc(AUD_DSP_CFG0_KARAOKE_CONFIG_CXT1, VOCAL_CHANNEL_VALUE, 0, 2)
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RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_DOWNMIX_CONFIG_CXT1, 0x104, AUD_DSP_CFG0_DOWNMIX_CONFIG_CXT1, 0x242504)
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FldFunc(AUD_DSP_CFG0_DOWNMIX_CONFIG_CXT1, SW_UNDEFINED, 3, 29)
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FldFunc(AUD_DSP_CFG0_DOWNMIX_CONFIG_CXT1, DOWNMIX_MODE, 0, 3)
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|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_SRS_CONFIG_CXT1, 0x108, AUD_DSP_CFG0_SRS_CONFIG_CXT1, 0x242508)
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FldFunc(AUD_DSP_CFG0_SRS_CONFIG_CXT1, SW_UNDEFINED, 10, 22)
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FldFunc(AUD_DSP_CFG0_SRS_CONFIG_CXT1, SRS_SPEAKER_RESPONSE, 6, 4)
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|
FldFunc(AUD_DSP_CFG0_SRS_CONFIG_CXT1, SRS_MODE, 2, 4)
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|
FldFunc(AUD_DSP_CFG0_SRS_CONFIG_CXT1, SRS_, 1, 1)
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FldFunc(AUD_DSP_CFG0_SRS_CONFIG_CXT1, SRS_ENABLE, 0, 1)
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RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_SRC_CONFIG_CXT1, 0x10c, AUD_DSP_CFG0_SRC_CONFIG_CXT1, 0x24250c)
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FldFunc(AUD_DSP_CFG0_SRC_CONFIG_CXT1, SW_UNDEFINED, 6, 26)
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FldFunc(AUD_DSP_CFG0_SRC_CONFIG_CXT1, OUTPUT_SAMPLING_FREQUENCY, 4, 2)
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FldFunc(AUD_DSP_CFG0_SRC_CONFIG_CXT1, DECIMATION_TYPE, 0, 4)
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RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_POST_PROCESSING_BRANCH0_CXT1, 0x110, AUD_DSP_CFG0_POST_PROCESSING_BRANCH0_CXT1, 0x242510)
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FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH0_CXT1, POST_PROCESSING_TYPE_STAGE6, 28, 4)
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FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH0_CXT1, POST_PROCESSING_TYPE_STAGE5, 24, 4)
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FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH0_CXT1, POST_PROCESSING_TYPE_STAGE4, 20, 4)
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FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH0_CXT1, POST_PROCESSING_TYPE_STAGE3, 16, 4)
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FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH0_CXT1, POST_PROCESSING_TYPE_STAGE2, 12, 4)
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FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH0_CXT1, POST_PROCESSING_TYPE_STAGE1, 8, 4)
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|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH0_CXT1, POST_PROCESSING_TYPE_STAGE0, 4, 4)
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|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH0_CXT1, OUTPUT_PORT_TYPE, 0, 4)
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|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_POST_PROCESSING_BRANCH1_CXT1, 0x114, AUD_DSP_CFG0_POST_PROCESSING_BRANCH1_CXT1, 0x242514)
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|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH1_CXT1, POST_PROCESSING_TYPE_STAGE6, 28, 4)
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|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH1_CXT1, POST_PROCESSING_TYPE_STAGE5, 24, 4)
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|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH1_CXT1, POST_PROCESSING_TYPE_STAGE4, 20, 4)
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|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH1_CXT1, POST_PROCESSING_TYPE_STAGE3, 16, 4)
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FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH1_CXT1, POST_PROCESSING_TYPE_STAGE2, 12, 4)
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|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH1_CXT1, POST_PROCESSING_TYPE_STAGE1, 8, 4)
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|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH1_CXT1, POST_PROCESSING_TYPE_STAGE0, 4, 4)
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|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH1_CXT1, OUTPUT_PORT_TYPE, 0, 4)
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|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_POST_PROCESSING_BRANCH2_CXT1, 0x118, AUD_DSP_CFG0_POST_PROCESSING_BRANCH2_CXT1, 0x242518)
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|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH2_CXT1, POST_PROCESSING_TYPE_STAGE6, 28, 4)
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|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH2_CXT1, POST_PROCESSING_TYPE_STAGE5, 24, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH2_CXT1, POST_PROCESSING_TYPE_STAGE4, 20, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH2_CXT1, POST_PROCESSING_TYPE_STAGE3, 16, 4)
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|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH2_CXT1, POST_PROCESSING_TYPE_STAGE2, 12, 4)
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|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH2_CXT1, POST_PROCESSING_TYPE_STAGE1, 8, 4)
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|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH2_CXT1, POST_PROCESSING_TYPE_STAGE0, 4, 4)
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|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH2_CXT1, OUTPUT_PORT_TYPE, 0, 4)
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|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_POST_PROCESSING_BRANCH3_CXT1, 0x11c, AUD_DSP_CFG0_POST_PROCESSING_BRANCH3_CXT1, 0x24251c)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH3_CXT1, POST_PROCESSING_TYPE_STAGE6, 28, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH3_CXT1, POST_PROCESSING_TYPE_STAGE5, 24, 4)
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|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH3_CXT1, POST_PROCESSING_TYPE_STAGE4, 20, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH3_CXT1, POST_PROCESSING_TYPE_STAGE3, 16, 4)
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|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH3_CXT1, POST_PROCESSING_TYPE_STAGE2, 12, 4)
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|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH3_CXT1, POST_PROCESSING_TYPE_STAGE1, 8, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH3_CXT1, POST_PROCESSING_TYPE_STAGE0, 4, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH3_CXT1, OUTPUT_PORT_TYPE, 0, 4)
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|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_SW_UNDEFINED_HOST_CXT1, 0x120, AUD_DSP_CFG0_SW_UNDEFINED_HOST_CXT1, 0x242520)
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|
FldFunc(AUD_DSP_CFG0_SW_UNDEFINED_HOST_CXT1, SW_UNDEFINED, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_PTS_CXT1, 0x130, AUD_DSP_CFG0_PTS_CXT1, 0x242530)
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|
FldFunc(AUD_DSP_CFG0_PTS_CXT1, PTS_VALUE3, 0, 32)
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|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_STC_CXT1, 0x134, AUD_DSP_CFG0_STC_CXT1, 0x242534)
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|
FldFunc(AUD_DSP_CFG0_STC_CXT1, STC_VALUE3, 0, 32)
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|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_PCR_OFFSET_CXT1, 0x138, AUD_DSP_CFG0_PCR_OFFSET_CXT1, 0x242538)
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|
FldFunc(AUD_DSP_CFG0_PCR_OFFSET_CXT1, PCR_OFFSET, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_TSM_STATUS_CXT1, 0x13c, AUD_DSP_CFG0_TSM_STATUS_CXT1, 0x24253c)
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|
FldFunc(AUD_DSP_CFG0_TSM_STATUS_CXT1, TSM_STATUS3, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_TSM_WAIT_PERIOD_CXT1, 0x140, AUD_DSP_CFG0_TSM_WAIT_PERIOD_CXT1, 0x242540)
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|
FldFunc(AUD_DSP_CFG0_TSM_WAIT_PERIOD_CXT1, TSM_WAIT_PERIOD3, 0, 32)
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|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_STREAM_INFO_REGISTER0_CXT1, 0x144, AUD_DSP_CFG0_STREAM_INFO_REGISTER0_CXT1, 0x242544)
|
|
FldFunc(AUD_DSP_CFG0_STREAM_INFO_REGISTER0_CXT1, AAC_LC, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_STREAM_INFO_REGISTER1_CXT1, 0x148, AUD_DSP_CFG0_STREAM_INFO_REGISTER1_CXT1, 0x242548)
|
|
FldFunc(AUD_DSP_CFG0_STREAM_INFO_REGISTER1_CXT1, AAC_LC, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_STREAM_INFO_REGISTER2_CXT1, 0x14c, AUD_DSP_CFG0_STREAM_INFO_REGISTER2_CXT1, 0x24254c)
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|
FldFunc(AUD_DSP_CFG0_STREAM_INFO_REGISTER2_CXT1, AAC_LC, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_STREAM_INFO_REGISTER3_CXT1, 0x150, AUD_DSP_CFG0_STREAM_INFO_REGISTER3_CXT1, 0x242550)
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|
FldFunc(AUD_DSP_CFG0_STREAM_INFO_REGISTER3_CXT1, AAC_LC, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_STREAM_INFO_REGISTER4_CXT1, 0x154, AUD_DSP_CFG0_STREAM_INFO_REGISTER4_CXT1, 0x242554)
|
|
FldFunc(AUD_DSP_CFG0_STREAM_INFO_REGISTER4_CXT1, AAC_LC, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_HEARTBEAT_CXT1, 0x158, AUD_DSP_CFG0_HEARTBEAT_CXT1, 0x242558)
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|
FldFunc(AUD_DSP_CFG0_HEARTBEAT_CXT1, HEARTBEAT, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_SPDIF_PARSER_PTR_CXT1, 0x15c, AUD_DSP_CFG0_SPDIF_PARSER_PTR_CXT1, 0x24255c)
|
|
FldFunc(AUD_DSP_CFG0_SPDIF_PARSER_PTR_CXT1, HOST_CONFIG_PARAMS_PTR, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_RAVE_TIMEBASE_SEL_CXT2, 0x160, AUD_DSP_CFG0_RAVE_TIMEBASE_SEL_CXT2, 0x242560)
|
|
FldFunc(AUD_DSP_CFG0_RAVE_TIMEBASE_SEL_CXT2, SW_UNDEFINED, 16, 16)
|
|
FldFunc(AUD_DSP_CFG0_RAVE_TIMEBASE_SEL_CXT2, TIMEBASE_SEL, 12, 4)
|
|
FldFunc(AUD_DSP_CFG0_RAVE_TIMEBASE_SEL_CXT2, RAVE_CTXT_SEL, 8, 4)
|
|
FldFunc(AUD_DSP_CFG0_RAVE_TIMEBASE_SEL_CXT2, AUD_MODULE_ID, 4, 4)
|
|
FldFunc(AUD_DSP_CFG0_RAVE_TIMEBASE_SEL_CXT2, AUD_INPUT_TYPE, 0, 4)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_AV_OFFSET_CXT2, 0x164, AUD_DSP_CFG0_AV_OFFSET_CXT2, 0x242564)
|
|
FldFunc(AUD_DSP_CFG0_AV_OFFSET_CXT2, AV_OFFSET, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_PVR_OFFSET_CXT2, 0x168, AUD_DSP_CFG0_PVR_OFFSET_CXT2, 0x242568)
|
|
FldFunc(AUD_DSP_CFG0_PVR_OFFSET_CXT2, PVR_OFFSET, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_DECODE_OFFSET_CXT2, 0x16c, AUD_DSP_CFG0_DECODE_OFFSET_CXT2, 0x24256c)
|
|
FldFunc(AUD_DSP_CFG0_DECODE_OFFSET_CXT2, DECODE_OFFSET3, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_TSM_UPPER_THRESHOLD_CXT2, 0x170, AUD_DSP_CFG0_TSM_UPPER_THRESHOLD_CXT2, 0x242570)
|
|
FldFunc(AUD_DSP_CFG0_TSM_UPPER_THRESHOLD_CXT2, TSM_UPPER_THRESHOLD3, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_TSM_LOWER_THRESHOLD_CXT2, 0x174, AUD_DSP_CFG0_TSM_LOWER_THRESHOLD_CXT2, 0x242574)
|
|
FldFunc(AUD_DSP_CFG0_TSM_LOWER_THRESHOLD_CXT2, TSM_LOWER_THRESHOLD3, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_TSM_DISCARD_THRESHOLD_CXT2, 0x178, AUD_DSP_CFG0_TSM_DISCARD_THRESHOLD_CXT2, 0x242578)
|
|
FldFunc(AUD_DSP_CFG0_TSM_DISCARD_THRESHOLD_CXT2, TSM_DISCARD_THRESHOLD3, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT2, 0x17c, AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT2, 0x24257c)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT2, CH2_BUF_ID, 28, 4)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT2, CH2_SRC_ID, 25, 3)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT2, CH2_EN, 24, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT2, CH1_BUF_ID, 20, 4)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT2, CH1_SRC_ID, 17, 3)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT2, CH1_EN, 16, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT2, CH0_BUF_ID, 12, 4)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT2, CH0_SRC_ID, 9, 3)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT2, CH0_EN, 8, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT2, CMP_BUF_ID, 4, 4)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT2, CMP_SRC_ID, 1, 3)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG0_CXT2, CMP_EN, 0, 1)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT2, 0x180, AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT2, 0x242580)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT2, SW_UNDEFINED, 24, 8)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT2, CH5_BUF_ID, 20, 4)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT2, CH5_SRC_ID, 17, 3)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT2, CH5_EN, 16, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT2, CH4_BUF_ID, 12, 4)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT2, CH4_SRC_ID, 9, 3)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT2, CH4_EN, 8, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT2, CH3_BUF_ID, 4, 4)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT2, CH3_SRC_ID, 1, 3)
|
|
FldFunc(AUD_DSP_CFG0_FMM_BUFF_CFG1_CXT2, CH3_EN, 0, 1)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_FMM_DEST_CXT2, 0x184, AUD_DSP_CFG0_FMM_DEST_CXT2, 0x242584)
|
|
FldFunc(AUD_DSP_CFG0_FMM_DEST_CXT2, SW_UNDEFINED, 8, 24)
|
|
FldFunc(AUD_DSP_CFG0_FMM_DEST_CXT2, PLL3, 7, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_DEST_CXT2, PLL2, 6, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_DEST_CXT2, PLL1, 5, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_DEST_CXT2, PLL0, 4, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_DEST_CXT2, SPDIF1, 3, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_DEST_CXT2, SPDIF0, 2, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_DEST_CXT2, DAC1, 1, 1)
|
|
FldFunc(AUD_DSP_CFG0_FMM_DEST_CXT2, DAC0, 0, 1)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_ALGO_ID_CXT2, 0x188, AUD_DSP_CFG0_ALGO_ID_CXT2, 0x242588)
|
|
FldFunc(AUD_DSP_CFG0_ALGO_ID_CXT2, SW_UNDEFINED, 8, 24)
|
|
FldFunc(AUD_DSP_CFG0_ALGO_ID_CXT2, DECODE_MODE, 5, 3)
|
|
FldFunc(AUD_DSP_CFG0_ALGO_ID_CXT2, ALGO_ID, 0, 5)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_CONTROL_REGISTER0_CXT2, 0x18c, AUD_DSP_CFG0_CONTROL_REGISTER0_CXT2, 0x24258c)
|
|
FldFunc(AUD_DSP_CFG0_CONTROL_REGISTER0_CXT2, AAC_LC, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_CONTROL_REGISTER1_CXT2, 0x190, AUD_DSP_CFG0_CONTROL_REGISTER1_CXT2, 0x242590)
|
|
FldFunc(AUD_DSP_CFG0_CONTROL_REGISTER1_CXT2, AAC_LC, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_CONTROL_REGISTER2_CXT2, 0x194, AUD_DSP_CFG0_CONTROL_REGISTER2_CXT2, 0x242594)
|
|
FldFunc(AUD_DSP_CFG0_CONTROL_REGISTER2_CXT2, AAC_LC, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_CONTROL_REGISTER3_CXT2, 0x198, AUD_DSP_CFG0_CONTROL_REGISTER3_CXT2, 0x242598)
|
|
FldFunc(AUD_DSP_CFG0_CONTROL_REGISTER3_CXT2, AAC_LC, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_CONTROL_REGISTER4_CXT2, 0x19c, AUD_DSP_CFG0_CONTROL_REGISTER4_CXT2, 0x24259c)
|
|
FldFunc(AUD_DSP_CFG0_CONTROL_REGISTER4_CXT2, AAC_LC, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_KARAOKE_CONFIG_CXT2, 0x1a0, AUD_DSP_CFG0_KARAOKE_CONFIG_CXT2, 0x2425a0)
|
|
FldFunc(AUD_DSP_CFG0_KARAOKE_CONFIG_CXT2, SW_UNDEFINED, 4, 28)
|
|
FldFunc(AUD_DSP_CFG0_KARAOKE_CONFIG_CXT2, KARAOKE_ALGO_TYPE, 2, 2)
|
|
FldFunc(AUD_DSP_CFG0_KARAOKE_CONFIG_CXT2, VOCAL_CHANNEL_VALUE, 0, 2)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_DOWNMIX_CONFIG_CXT2, 0x1a4, AUD_DSP_CFG0_DOWNMIX_CONFIG_CXT2, 0x2425a4)
|
|
FldFunc(AUD_DSP_CFG0_DOWNMIX_CONFIG_CXT2, SW_UNDEFINED, 3, 29)
|
|
FldFunc(AUD_DSP_CFG0_DOWNMIX_CONFIG_CXT2, DOWNMIX_MODE, 0, 3)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_SRS_CONFIG_CXT2, 0x1a8, AUD_DSP_CFG0_SRS_CONFIG_CXT2, 0x2425a8)
|
|
FldFunc(AUD_DSP_CFG0_SRS_CONFIG_CXT2, SW_UNDEFINED, 10, 22)
|
|
FldFunc(AUD_DSP_CFG0_SRS_CONFIG_CXT2, SRS_SPEAKER_RESPONSE, 6, 4)
|
|
FldFunc(AUD_DSP_CFG0_SRS_CONFIG_CXT2, SRS_MODE, 2, 4)
|
|
FldFunc(AUD_DSP_CFG0_SRS_CONFIG_CXT2, SRS_, 1, 1)
|
|
FldFunc(AUD_DSP_CFG0_SRS_CONFIG_CXT2, SRS_ENABLE, 0, 1)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_SRC_CONFIG_CXT2, 0x1ac, AUD_DSP_CFG0_SRC_CONFIG_CXT2, 0x2425ac)
|
|
FldFunc(AUD_DSP_CFG0_SRC_CONFIG_CXT2, SW_UNDEFINED, 6, 26)
|
|
FldFunc(AUD_DSP_CFG0_SRC_CONFIG_CXT2, OUTPUT_SAMPLING_FREQUENCY, 4, 2)
|
|
FldFunc(AUD_DSP_CFG0_SRC_CONFIG_CXT2, DECIMATION_TYPE, 0, 4)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_POST_PROCESSING_BRANCH0_CXT2, 0x1b0, AUD_DSP_CFG0_POST_PROCESSING_BRANCH0_CXT2, 0x2425b0)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH0_CXT2, POST_PROCESSING_TYPE_STAGE6, 28, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH0_CXT2, POST_PROCESSING_TYPE_STAGE5, 24, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH0_CXT2, POST_PROCESSING_TYPE_STAGE4, 20, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH0_CXT2, POST_PROCESSING_TYPE_STAGE3, 16, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH0_CXT2, POST_PROCESSING_TYPE_STAGE2, 12, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH0_CXT2, POST_PROCESSING_TYPE_STAGE1, 8, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH0_CXT2, POST_PROCESSING_TYPE_STAGE0, 4, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH0_CXT2, OUTPUT_PORT_TYPE, 0, 4)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_POST_PROCESSING_BRANCH1_CXT2, 0x1b4, AUD_DSP_CFG0_POST_PROCESSING_BRANCH1_CXT2, 0x2425b4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH1_CXT2, POST_PROCESSING_TYPE_STAGE6, 28, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH1_CXT2, POST_PROCESSING_TYPE_STAGE5, 24, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH1_CXT2, POST_PROCESSING_TYPE_STAGE4, 20, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH1_CXT2, POST_PROCESSING_TYPE_STAGE3, 16, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH1_CXT2, POST_PROCESSING_TYPE_STAGE2, 12, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH1_CXT2, POST_PROCESSING_TYPE_STAGE1, 8, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH1_CXT2, POST_PROCESSING_TYPE_STAGE0, 4, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH1_CXT2, OUTPUT_PORT_TYPE, 0, 4)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_POST_PROCESSING_BRANCH2_CXT2, 0x1b8, AUD_DSP_CFG0_POST_PROCESSING_BRANCH2_CXT2, 0x2425b8)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH2_CXT2, POST_PROCESSING_TYPE_STAGE6, 28, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH2_CXT2, POST_PROCESSING_TYPE_STAGE5, 24, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH2_CXT2, POST_PROCESSING_TYPE_STAGE4, 20, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH2_CXT2, POST_PROCESSING_TYPE_STAGE3, 16, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH2_CXT2, POST_PROCESSING_TYPE_STAGE2, 12, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH2_CXT2, POST_PROCESSING_TYPE_STAGE1, 8, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH2_CXT2, POST_PROCESSING_TYPE_STAGE0, 4, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH2_CXT2, OUTPUT_PORT_TYPE, 0, 4)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_POST_PROCESSING_BRANCH3_CXT2, 0x1bc, AUD_DSP_CFG0_POST_PROCESSING_BRANCH3_CXT2, 0x2425bc)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH3_CXT2, POST_PROCESSING_TYPE_STAGE6, 28, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH3_CXT2, POST_PROCESSING_TYPE_STAGE5, 24, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH3_CXT2, POST_PROCESSING_TYPE_STAGE4, 20, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH3_CXT2, POST_PROCESSING_TYPE_STAGE3, 16, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH3_CXT2, POST_PROCESSING_TYPE_STAGE2, 12, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH3_CXT2, POST_PROCESSING_TYPE_STAGE1, 8, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH3_CXT2, POST_PROCESSING_TYPE_STAGE0, 4, 4)
|
|
FldFunc(AUD_DSP_CFG0_POST_PROCESSING_BRANCH3_CXT2, OUTPUT_PORT_TYPE, 0, 4)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_SW_UNDEFINED_HOST_CX20, 0x1c0, AUD_DSP_CFG0_SW_UNDEFINED_HOST_CX20, 0x2425c0)
|
|
FldFunc(AUD_DSP_CFG0_SW_UNDEFINED_HOST_CX20, SW_UNDEFINED, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_PTS_CXT2, 0x1d0, AUD_DSP_CFG0_PTS_CXT2, 0x2425d0)
|
|
FldFunc(AUD_DSP_CFG0_PTS_CXT2, PTS_VALUE3, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_STC_CXT2, 0x1d4, AUD_DSP_CFG0_STC_CXT2, 0x2425d4)
|
|
FldFunc(AUD_DSP_CFG0_STC_CXT2, STC_VALUE3, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_PCR_OFFSET_CXT2, 0x1d8, AUD_DSP_CFG0_PCR_OFFSET_CXT2, 0x2425d8)
|
|
FldFunc(AUD_DSP_CFG0_PCR_OFFSET_CXT2, PCR_OFFSET, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_TSM_STATUS_CXT2, 0x1dc, AUD_DSP_CFG0_TSM_STATUS_CXT2, 0x2425dc)
|
|
FldFunc(AUD_DSP_CFG0_TSM_STATUS_CXT2, TSM_STATUS3, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_TSM_WAIT_PERIOD_CXT2, 0x1e0, AUD_DSP_CFG0_TSM_WAIT_PERIOD_CXT2, 0x2425e0)
|
|
FldFunc(AUD_DSP_CFG0_TSM_WAIT_PERIOD_CXT2, TSM_WAIT_PERIOD3, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_STREAM_INFO_REGISTER0_CXT2, 0x1e4, AUD_DSP_CFG0_STREAM_INFO_REGISTER0_CXT2, 0x2425e4)
|
|
FldFunc(AUD_DSP_CFG0_STREAM_INFO_REGISTER0_CXT2, AAC_LC, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_STREAM_INFO_REGISTER1_CXT2, 0x1e8, AUD_DSP_CFG0_STREAM_INFO_REGISTER1_CXT2, 0x2425e8)
|
|
FldFunc(AUD_DSP_CFG0_STREAM_INFO_REGISTER1_CXT2, AAC_LC, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_STREAM_INFO_REGISTER2_CXT2, 0x1ec, AUD_DSP_CFG0_STREAM_INFO_REGISTER2_CXT2, 0x2425ec)
|
|
FldFunc(AUD_DSP_CFG0_STREAM_INFO_REGISTER2_CXT2, AAC_LC, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_STREAM_INFO_REGISTER3_CXT2, 0x1f0, AUD_DSP_CFG0_STREAM_INFO_REGISTER3_CXT2, 0x2425f0)
|
|
FldFunc(AUD_DSP_CFG0_STREAM_INFO_REGISTER3_CXT2, AAC_LC, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_STREAM_INFO_REGISTER4_CXT2, 0x1f4, AUD_DSP_CFG0_STREAM_INFO_REGISTER4_CXT2, 0x2425f4)
|
|
FldFunc(AUD_DSP_CFG0_STREAM_INFO_REGISTER4_CXT2, AAC_LC, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_HEARTBEAT_CXT2, 0x1f8, AUD_DSP_CFG0_HEARTBEAT_CXT2, 0x2425f8)
|
|
FldFunc(AUD_DSP_CFG0_HEARTBEAT_CXT2, HEARTBEAT, 0, 32)
|
|
RegFunc(AUD_DSP_CFG0, 0x00242400, AUD_DSP_CFG0_SPDIF_PARSER_PTR_CXT2, 0x1fc, AUD_DSP_CFG0_SPDIF_PARSER_PTR_CXT2, 0x2425fc)
|
|
FldFunc(AUD_DSP_CFG0_SPDIF_PARSER_PTR_CXT2, HOST_CONFIG_PARAMS_PTR, 0, 32)
|
|
|
|
RegAreaFunc(AUD_DSP_INTH0_BASE, 0x00242800, 0x0024282c)
|
|
RegFunc(AUD_DSP_INTH0, 0x00242800, AUD_DSP_INTH0_R5F_STATUS, 0x0, AUD_DSP_INTH0_R5F_STATUS, 0x242800)
|
|
FldFunc(AUD_DSP_INTH0_R5F_STATUS, DSP_HI10_INTR, 10, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_STATUS, DSP_HI09_INTR, 9, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_STATUS, DSP_HI08_INTR, 8, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_STATUS, DSP_HI07_INTRDS, 7, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_STATUS, DSP_HI06_INTRDM, 6, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_STATUS, DSP_HI05_INTRDS, 5, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_STATUS, DSP_HI04_INTRDSP_HI0, 4, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_STATUS, DSP_HI03_INTRIM, 3, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_STATUS, DSP_HI02_INTRDM, 2, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_STATUS, DSP_HI01_INTR, 1, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_STATUS, DSP_HI00_INTR, 0, 1)
|
|
RegFunc(AUD_DSP_INTH0, 0x00242800, AUD_DSP_INTH0_R5F_SET, 0x4, AUD_DSP_INTH0_R5F_SET, 0x242804)
|
|
FldFunc(AUD_DSP_INTH0_R5F_SET, DSP_HI10_INTR, 10, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_SET, DSP_HI09_INTR, 9, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_SET, DSP_HI08_INTR, 8, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_SET, DSP_HI07_INTRDS, 7, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_SET, DSP_HI06_INTRDM, 6, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_SET, DSP_HI05_INTRDS, 5, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_SET, DSP_HI04_INTRDSP_HI0, 4, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_SET, DSP_HI03_INTRIM, 3, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_SET, DSP_HI02_INTRDM, 2, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_SET, DSP_HI01_INTR, 1, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_SET, DSP_HI00_INTR, 0, 1)
|
|
RegFunc(AUD_DSP_INTH0, 0x00242800, AUD_DSP_INTH0_R5F_CLEAR, 0x8, AUD_DSP_INTH0_R5F_CLEAR, 0x242808)
|
|
FldFunc(AUD_DSP_INTH0_R5F_CLEAR, DSP_HI10_INTR, 10, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_CLEAR, DSP_HI09_INTR, 9, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_CLEAR, DSP_HI08_INTR, 8, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_CLEAR, DSP_HI07_INTRDS, 7, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_CLEAR, DSP_HI06_INTRDM, 6, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_CLEAR, DSP_HI05_INTRDS, 5, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_CLEAR, DSP_HI04_INTRDSP_HI0, 4, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_CLEAR, DSP_HI03_INTRIM, 3, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_CLEAR, DSP_HI02_INTRDM, 2, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_CLEAR, DSP_HI01_INTR, 1, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_CLEAR, DSP_HI00_INTR, 0, 1)
|
|
RegFunc(AUD_DSP_INTH0, 0x00242800, AUD_DSP_INTH0_R5F_MASK_STATUS, 0xc, AUD_DSP_INTH0_R5F_MASK_STATUS, 0x24280c)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_STATUS, DSP_HI10_MASK, 10, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_STATUS, DSP_HI09_MASK, 9, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_STATUS, DSP_HI08_MASK, 8, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_STATUS, DSP_HI07_MASK, 7, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_STATUS, DSP_HI06_MASK, 6, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_STATUS, DSP_HI05_MASK, 5, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_STATUS, DSP_HI04_MASK, 4, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_STATUS, DSP_HI03_MASK, 3, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_STATUS, DSP_HI02_MASK, 2, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_STATUS, DSP_HI01_MASK, 1, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_STATUS, DSP_HI00_MASK, 0, 1)
|
|
RegFunc(AUD_DSP_INTH0, 0x00242800, AUD_DSP_INTH0_R5F_MASK_SET, 0x10, AUD_DSP_INTH0_R5F_MASK_SET, 0x242810)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_SET, DSP_HI10_MASK, 10, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_SET, DSP_HI09_MASK, 9, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_SET, DSP_HI08_MASK, 8, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_SET, DSP_HI07_MASK, 7, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_SET, DSP_HI06_MASK, 6, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_SET, DSP_HI05_MASK, 5, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_SET, DSP_HI04_MASK, 4, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_SET, DSP_HI03_MASK, 3, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_SET, DSP_HI02_MASK, 2, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_SET, DSP_HI01_MASK, 1, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_SET, DSP_HI00_MASK, 0, 1)
|
|
RegFunc(AUD_DSP_INTH0, 0x00242800, AUD_DSP_INTH0_R5F_MASK_CLEAR, 0x14, AUD_DSP_INTH0_R5F_MASK_CLEAR, 0x242814)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_CLEAR, DSP_HI10_MASK, 10, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_CLEAR, DSP_HI09_MASK, 9, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_CLEAR, DSP_HI08_MASK, 8, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_CLEAR, DSP_HI07_MASK, 7, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_CLEAR, DSP_HI06_MASK, 6, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_CLEAR, DSP_HI05_MASK, 5, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_CLEAR, DSP_HI04_MASK, 4, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_CLEAR, DSP_HI03_MASK, 3, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_CLEAR, DSP_HI02_MASK, 2, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_CLEAR, DSP_HI01_MASK, 1, 1)
|
|
FldFunc(AUD_DSP_INTH0_R5F_MASK_CLEAR, DSP_HI00_MASK, 0, 1)
|
|
RegFunc(AUD_DSP_INTH0, 0x00242800, AUD_DSP_INTH0_PCI_STATUS, 0x18, AUD_DSP_INTH0_PCI_STATUS, 0x242818)
|
|
FldFunc(AUD_DSP_INTH0_PCI_STATUS, DSP_HI10_INTR, 10, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_STATUS, DSP_HI09_INTR, 9, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_STATUS, DSP_HI08_INTR, 8, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_STATUS, DSP_HI07_INTRDS, 7, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_STATUS, DSP_HI06_INTRDM, 6, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_STATUS, DSP_HI05_INTRDS, 5, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_STATUS, DSP_HI04_INTRDSP_HI0, 4, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_STATUS, DSP_HI03_INTRIM, 3, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_STATUS, DSP_HI02_INTRDM, 2, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_STATUS, DSP_HI01_INTR, 1, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_STATUS, DSP_HI00_INTR, 0, 1)
|
|
RegFunc(AUD_DSP_INTH0, 0x00242800, AUD_DSP_INTH0_PCI_SET, 0x1c, AUD_DSP_INTH0_PCI_SET, 0x24281c)
|
|
FldFunc(AUD_DSP_INTH0_PCI_SET, DSP_HI10_INTR, 10, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_SET, DSP_HI09_INTR, 9, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_SET, DSP_HI08_INTR, 8, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_SET, DSP_HI07_INTRDS, 7, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_SET, DSP_HI06_INTRDM, 6, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_SET, DSP_HI05_INTRDS, 5, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_SET, DSP_HI04_INTRDSP_HI0, 4, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_SET, DSP_HI03_INTRIM, 3, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_SET, DSP_HI02_INTRDM, 2, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_SET, DSP_HI01_INTR, 1, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_SET, DSP_HI00_INTR, 0, 1)
|
|
RegFunc(AUD_DSP_INTH0, 0x00242800, AUD_DSP_INTH0_PCI_CLEAR, 0x20, AUD_DSP_INTH0_PCI_CLEAR, 0x242820)
|
|
FldFunc(AUD_DSP_INTH0_PCI_CLEAR, DSP_HI10_INTR, 10, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_CLEAR, DSP_HI09_INTR, 9, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_CLEAR, DSP_HI08_INTR, 8, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_CLEAR, DSP_HI07_INTRDS, 7, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_CLEAR, DSP_HI06_INTRDM, 6, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_CLEAR, DSP_HI05_INTRDS, 5, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_CLEAR, DSP_HI04_INTRDSP_HI0, 4, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_CLEAR, DSP_HI03_INTRIM, 3, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_CLEAR, DSP_HI02_INTRDM, 2, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_CLEAR, DSP_HI01_INTR, 1, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_CLEAR, DSP_HI00_INTR, 0, 1)
|
|
RegFunc(AUD_DSP_INTH0, 0x00242800, AUD_DSP_INTH0_PCI_MASK_STATUS, 0x24, AUD_DSP_INTH0_PCI_MASK_STATUS, 0x242824)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_STATUS, DSP_HI10_MASK, 10, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_STATUS, DSP_HI09_MASK, 9, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_STATUS, DSP_HI08_MASK, 8, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_STATUS, DSP_HI07_MASK, 7, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_STATUS, DSP_HI06_MASK, 6, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_STATUS, DSP_HI05_MASK, 5, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_STATUS, DSP_HI04_MASK, 4, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_STATUS, DSP_HI03_MASK, 3, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_STATUS, DSP_HI02_MASK, 2, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_STATUS, DSP_HI01_MASK, 1, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_STATUS, DSP_HI00_MASK, 0, 1)
|
|
RegFunc(AUD_DSP_INTH0, 0x00242800, AUD_DSP_INTH0_PCI_MASK_SET, 0x28, AUD_DSP_INTH0_PCI_MASK_SET, 0x242828)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_SET, DSP_HI10_MASK, 10, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_SET, DSP_HI09_MASK, 9, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_SET, DSP_HI08_MASK, 8, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_SET, DSP_HI07_MASK, 7, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_SET, DSP_HI06_MASK, 6, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_SET, DSP_HI05_MASK, 5, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_SET, DSP_HI04_MASK, 4, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_SET, DSP_HI03_MASK, 3, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_SET, DSP_HI02_MASK, 2, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_SET, DSP_HI01_MASK, 1, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_SET, DSP_HI00_MASK, 0, 1)
|
|
RegFunc(AUD_DSP_INTH0, 0x00242800, AUD_DSP_INTH0_PCI_MASK_CLEAR, 0x2c, AUD_DSP_INTH0_PCI_MASK_CLEAR, 0x24282c)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_CLEAR, DSP_HI10_MASK, 10, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_CLEAR, DSP_HI09_MASK, 9, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_CLEAR, DSP_HI08_MASK, 8, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_CLEAR, DSP_HI07_MASK, 7, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_CLEAR, DSP_HI06_MASK, 6, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_CLEAR, DSP_HI05_MASK, 5, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_CLEAR, DSP_HI04_MASK, 4, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_CLEAR, DSP_HI03_MASK, 3, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_CLEAR, DSP_HI02_MASK, 2, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_CLEAR, DSP_HI01_MASK, 1, 1)
|
|
FldFunc(AUD_DSP_INTH0_PCI_MASK_CLEAR, DSP_HI00_MASK, 0, 1)
|
|
|
|
RegAreaFunc(AUD_DSP_ESR_BE0_BASE, 0x00242a00, 0x00242a14)
|
|
RegFunc(AUD_DSP_ESR_BE0, 0x00242a00, AUD_DSP_ESR_BE0_INT_STATUS, 0x0, AUD_DSP_ESR_BE0_INT_STATUS, 0x242a00)
|
|
FldFunc(AUD_DSP_ESR_BE0_INT_STATUS, DSP_BE09_INTRDS, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_INT_STATUS, DSP_BE08_INTRDS, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_INT_STATUS, DSP_BE07_INTRDS, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_INT_STATUS, DSP_BE06_INTRDS, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_INT_STATUS, DSP_BE05_INTRDS, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_INT_STATUS, DSP_BE04_INTRDS, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_INT_STATUS, DSP_BE03_INTRDS, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_INT_STATUS, DSP_BE02_INTRDS, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_INT_STATUS, DSP_BE01_INTRDS, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_INT_STATUS, DSP_BE00_INTRDS, 0, 1)
|
|
RegFunc(AUD_DSP_ESR_BE0, 0x00242a00, AUD_DSP_ESR_BE0_INT_SET, 0x4, AUD_DSP_ESR_BE0_INT_SET, 0x242a04)
|
|
FldFunc(AUD_DSP_ESR_BE0_INT_SET, DSP_BE09_INTRDS, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_INT_SET, DSP_BE08_INTRDS, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_INT_SET, DSP_BE07_INTRDS, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_INT_SET, DSP_BE06_INTRDS, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_INT_SET, DSP_BE05_INTRDS, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_INT_SET, DSP_BE04_INTRDS, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_INT_SET, DSP_BE03_INTRDS, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_INT_SET, DSP_BE02_INTRDS, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_INT_SET, DSP_BE01_INTRDS, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_INT_SET, DSP_BE00_INTRDS, 0, 1)
|
|
RegFunc(AUD_DSP_ESR_BE0, 0x00242a00, AUD_DSP_ESR_BE0_INT_CLEAR, 0x8, AUD_DSP_ESR_BE0_INT_CLEAR, 0x242a08)
|
|
FldFunc(AUD_DSP_ESR_BE0_INT_CLEAR, DSP_BE09_INTRDS, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_INT_CLEAR, DSP_BE08_INTRDS, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_INT_CLEAR, DSP_BE07_INTRDS, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_INT_CLEAR, DSP_BE06_INTRDS, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_INT_CLEAR, DSP_BE05_INTRDS, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_INT_CLEAR, DSP_BE04_INTRDS, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_INT_CLEAR, DSP_BE03_INTRDS, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_INT_CLEAR, DSP_BE02_INTRDS, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_INT_CLEAR, DSP_BE01_INTRDS, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_INT_CLEAR, DSP_BE00_INTRDS, 0, 1)
|
|
RegFunc(AUD_DSP_ESR_BE0, 0x00242a00, AUD_DSP_ESR_BE0_MASK_STATUS, 0xc, AUD_DSP_ESR_BE0_MASK_STATUS, 0x242a0c)
|
|
FldFunc(AUD_DSP_ESR_BE0_MASK_STATUS, DSP_BE09_MASK, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_MASK_STATUS, DSP_BE08_MASK, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_MASK_STATUS, DSP_BE07_MASK, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_MASK_STATUS, DSP_BE06_MASK, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_MASK_STATUS, DSP_BE05_MASK, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_MASK_STATUS, DSP_BE04_MASK, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_MASK_STATUS, DSP_BE03_MASK, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_MASK_STATUS, DSP_BE02_MASK, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_MASK_STATUS, DSP_BE01_MASK, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_MASK_STATUS, DSP_BE00_MASK, 0, 1)
|
|
RegFunc(AUD_DSP_ESR_BE0, 0x00242a00, AUD_DSP_ESR_BE0_MASK_SET, 0x10, AUD_DSP_ESR_BE0_MASK_SET, 0x242a10)
|
|
FldFunc(AUD_DSP_ESR_BE0_MASK_SET, DSP_BE09_MASK, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_MASK_SET, DSP_BE08_MASK, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_MASK_SET, DSP_BE07_MASK, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_MASK_SET, DSP_BE06_MASK, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_MASK_SET, DSP_BE05_MASK, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_MASK_SET, DSP_BE04_MASK, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_MASK_SET, DSP_BE03_MASK, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_MASK_SET, DSP_BE02_MASK, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_MASK_SET, DSP_BE01_MASK, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_MASK_SET, DSP_BE00_MASK, 0, 1)
|
|
RegFunc(AUD_DSP_ESR_BE0, 0x00242a00, AUD_DSP_ESR_BE0_MASK_CLEAR, 0x14, AUD_DSP_ESR_BE0_MASK_CLEAR, 0x242a14)
|
|
FldFunc(AUD_DSP_ESR_BE0_MASK_CLEAR, DSP_BE09_MASK, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_MASK_CLEAR, DSP_BE08_MASK, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_MASK_CLEAR, DSP_BE07_MASK, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_MASK_CLEAR, DSP_BE06_MASK, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_MASK_CLEAR, DSP_BE05_MASK, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_MASK_CLEAR, DSP_BE04_MASK, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_MASK_CLEAR, DSP_BE03_MASK, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_MASK_CLEAR, DSP_BE02_MASK, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_MASK_CLEAR, DSP_BE01_MASK, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_BE0_MASK_CLEAR, DSP_BE00_MASK, 0, 1)
|
|
|
|
RegAreaFunc(AUD_DSP_ESR_PI0_BASE, 0x00242b00, 0x00242b14)
|
|
RegFunc(AUD_DSP_ESR_PI0, 0x00242b00, AUD_DSP_ESR_PI0_INT_STATUS, 0x0, AUD_DSP_ESR_PI0_INT_STATUS, 0x242b00)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_STATUS, DSP_PI11_INTR, 11, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_STATUS, DSP_PI10_INTR, 10, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_STATUS, DSP_PI09_INTR, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_STATUS, DSP_PI08_INTR, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_STATUS, DSP_PI07_INTRDS, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_STATUS, DSP_PI06_INTRDM, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_STATUS, DSP_PI05_INTR, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_STATUS, DSP_PI04_INTRDSP_PI0, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_STATUS, DSP_PI03_INTRIM, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_STATUS, DSP_PI02_INTRDM, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_STATUS, DSP_PI01_INTR, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_STATUS, DSP_PI00_INTR, 0, 1)
|
|
RegFunc(AUD_DSP_ESR_PI0, 0x00242b00, AUD_DSP_ESR_PI0_INT_SET, 0x4, AUD_DSP_ESR_PI0_INT_SET, 0x242b04)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_SET, DSP_PI11_INTR, 11, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_SET, DSP_PI10_INTR, 10, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_SET, DSP_PI09_INTR, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_SET, DSP_PI08_INTR, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_SET, DSP_PI07_INTRDS, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_SET, DSP_PI06_INTRDM, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_SET, DSP_PI05_INTR, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_SET, DSP_PI04_INTRDSP_PI0, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_SET, DSP_PI03_INTRIM, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_SET, DSP_PI02_INTRDM, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_SET, DSP_PI01_INTR, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_SET, DSP_PI00_INTR, 0, 1)
|
|
RegFunc(AUD_DSP_ESR_PI0, 0x00242b00, AUD_DSP_ESR_PI0_INT_CLEAR, 0x8, AUD_DSP_ESR_PI0_INT_CLEAR, 0x242b08)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_CLEAR, DSP_PI11_INTR, 11, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_CLEAR, DSP_PI10_INTR, 10, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_CLEAR, DSP_PI09_INTR, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_CLEAR, DSP_PI08_INTR, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_CLEAR, DSP_PI07_INTRDS, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_CLEAR, DSP_PI06_INTRDM, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_CLEAR, DSP_PI05_INTR, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_CLEAR, DSP_PI04_INTRDSP_PI0, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_CLEAR, DSP_PI03_INTRIM, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_CLEAR, DSP_PI02_INTRDM, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_CLEAR, DSP_PI01_INTR, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_INT_CLEAR, DSP_PI00_INTR, 0, 1)
|
|
RegFunc(AUD_DSP_ESR_PI0, 0x00242b00, AUD_DSP_ESR_PI0_MASK_STATUS, 0xc, AUD_DSP_ESR_PI0_MASK_STATUS, 0x242b0c)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_STATUS, DSP_PI11_MASK, 11, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_STATUS, DSP_PI10_MASK, 10, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_STATUS, DSP_PI09_MASK, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_STATUS, DSP_PI08_MASK, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_STATUS, DSP_PI07_MASK, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_STATUS, DSP_PI06_MASK, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_STATUS, DSP_PI05_MASK, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_STATUS, DSP_PI04_MASK, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_STATUS, DSP_PI03_MASK, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_STATUS, DSP_PI02_MASK, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_STATUS, DSP_PI01_MASK, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_STATUS, DSP_PI00_MASK, 0, 1)
|
|
RegFunc(AUD_DSP_ESR_PI0, 0x00242b00, AUD_DSP_ESR_PI0_MASK_SET, 0x10, AUD_DSP_ESR_PI0_MASK_SET, 0x242b10)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_SET, DSP_PI11_MASK, 11, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_SET, DSP_PI10_MASK, 10, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_SET, DSP_PI09_MASK, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_SET, DSP_PI08_MASK, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_SET, DSP_PI07_MASK, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_SET, DSP_PI06_MASK, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_SET, DSP_PI05_MASK, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_SET, DSP_PI04_MASK, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_SET, DSP_PI03_MASK, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_SET, DSP_PI02_MASK, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_SET, DSP_PI01_MASK, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_SET, DSP_PI00_MASK, 0, 1)
|
|
RegFunc(AUD_DSP_ESR_PI0, 0x00242b00, AUD_DSP_ESR_PI0_MASK_CLEAR, 0x14, AUD_DSP_ESR_PI0_MASK_CLEAR, 0x242b14)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_CLEAR, DSP_PI11_MASK, 11, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_CLEAR, DSP_PI10_MASK, 10, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_CLEAR, DSP_PI09_MASK, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_CLEAR, DSP_PI08_MASK, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_CLEAR, DSP_PI07_MASK, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_CLEAR, DSP_PI06_MASK, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_CLEAR, DSP_PI05_MASK, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_CLEAR, DSP_PI04_MASK, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_CLEAR, DSP_PI03_MASK, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_CLEAR, DSP_PI02_MASK, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_CLEAR, DSP_PI01_MASK, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_PI0_MASK_CLEAR, DSP_PI00_MASK, 0, 1)
|
|
|
|
RegAreaFunc(AUD_DSP_ESR_SI00_BASE, 0x00243000, 0x00243014)
|
|
RegFunc(AUD_DSP_ESR_SI00, 0x00243000, AUD_DSP_ESR_SI00_INT_STATUS, 0x0, AUD_DSP_ESR_SI00_INT_STATUS, 0x243000)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_STATUS, DSP_SI31_INTR, 31, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_STATUS, DSP_SI30_INTR, 30, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_STATUS, DSP_SI29_INTR, 29, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_STATUS, DSP_SI28_INTR, 28, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_STATUS, DSP_SI27_INTR, 27, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_STATUS, DSP_SI26_INTR, 26, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_STATUS, DSP_SI25_INTR, 25, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_STATUS, DSP_SI24_INTR, 24, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_STATUS, DSP_SI23_INTR, 23, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_STATUS, DSP_SI22_INTR, 22, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_STATUS, DSP_SI21_INTR, 21, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_STATUS, DSP_SI20_INTR, 20, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_STATUS, DSP_SI19_INTR, 19, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_STATUS, DSP_SI18_INTR, 18, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_STATUS, DSP_SI17_INTR, 17, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_STATUS, DSP_SI16_INTR, 16, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_STATUS, DSP_SI15_INTR, 15, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_STATUS, DSP_SI14_INTR, 14, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_STATUS, DSP_SI13_INTR, 13, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_STATUS, DSP_SI12_INTR, 12, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_STATUS, DSP_SI11_INTR, 11, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_STATUS, DSP_SI10_INTR, 10, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_STATUS, DSP_SI09_INTR, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_STATUS, DSP_SI08_INTR, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_STATUS, DSP_SI07_INTR, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_STATUS, DSP_SI06_INTR, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_STATUS, DSP_SI05_INTR, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_STATUS, DSP_SI04_INTR, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_STATUS, DSP_SI03_INTR, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_STATUS, DSP_SI02_INTR, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_STATUS, DSP_SI01_INTR, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_STATUS, DSP_SI00_INTR, 0, 1)
|
|
RegFunc(AUD_DSP_ESR_SI00, 0x00243000, AUD_DSP_ESR_SI00_INT_SET, 0x4, AUD_DSP_ESR_SI00_INT_SET, 0x243004)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_SET, DSP_SI31_INTR, 31, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_SET, DSP_SI30_INTR, 30, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_SET, DSP_SI29_INTR, 29, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_SET, DSP_SI28_INTR, 28, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_SET, DSP_SI27_INTR, 27, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_SET, DSP_SI26_INTR, 26, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_SET, DSP_SI25_INTR, 25, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_SET, DSP_SI24_INTR, 24, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_SET, DSP_SI23_INTR, 23, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_SET, DSP_SI22_INTR, 22, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_SET, DSP_SI21_INTR, 21, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_SET, DSP_SI20_INTR, 20, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_SET, DSP_SI19_INTR, 19, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_SET, DSP_SI18_INTR, 18, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_SET, DSP_SI17_INTR, 17, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_SET, DSP_SI16_INTR, 16, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_SET, DSP_SI15_INTR, 15, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_SET, DSP_SI14_INTR, 14, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_SET, DSP_SI13_INTR, 13, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_SET, DSP_SI12_INTR, 12, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_SET, DSP_SI11_INTR, 11, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_SET, DSP_SI10_INTR, 10, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_SET, DSP_SI09_INTR, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_SET, DSP_SI08_INTR, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_SET, DSP_SI07_INTR, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_SET, DSP_SI06_INTR, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_SET, DSP_SI05_INTR, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_SET, DSP_SI04_INTR, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_SET, DSP_SI03_INTR, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_SET, DSP_SI02_INTR, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_SET, DSP_SI01_INTR, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_SET, DSP_SI00_INTR, 0, 1)
|
|
RegFunc(AUD_DSP_ESR_SI00, 0x00243000, AUD_DSP_ESR_SI00_INT_CLEAR, 0x8, AUD_DSP_ESR_SI00_INT_CLEAR, 0x243008)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_CLEAR, DSP_SI31_INTR, 31, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_CLEAR, DSP_SI30_INTR, 30, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_CLEAR, DSP_SI29_INTR, 29, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_CLEAR, DSP_SI28_INTR, 28, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_CLEAR, DSP_SI27_INTR, 27, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_CLEAR, DSP_SI26_INTR, 26, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_CLEAR, DSP_SI25_INTR, 25, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_CLEAR, DSP_SI24_INTR, 24, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_CLEAR, DSP_SI23_INTR, 23, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_CLEAR, DSP_SI22_INTR, 22, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_CLEAR, DSP_SI21_INTR, 21, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_CLEAR, DSP_SI20_INTR, 20, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_CLEAR, DSP_SI19_INTR, 19, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_CLEAR, DSP_SI18_INTR, 18, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_CLEAR, DSP_SI17_INTR, 17, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_CLEAR, DSP_SI16_INTR, 16, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_CLEAR, DSP_SI15_INTR, 15, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_CLEAR, DSP_SI14_INTR, 14, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_CLEAR, DSP_SI13_INTR, 13, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_CLEAR, DSP_SI12_INTR, 12, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_CLEAR, DSP_SI11_INTR, 11, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_CLEAR, DSP_SI10_INTR, 10, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_CLEAR, DSP_SI09_INTR, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_CLEAR, DSP_SI08_INTR, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_CLEAR, DSP_SI07_INTR, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_CLEAR, DSP_SI06_INTR, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_CLEAR, DSP_SI05_INTR, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_CLEAR, DSP_SI04_INTR, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_CLEAR, DSP_SI03_INTR, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_CLEAR, DSP_SI02_INTR, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_CLEAR, DSP_SI01_INTR, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_INT_CLEAR, DSP_SI00_INTR, 0, 1)
|
|
RegFunc(AUD_DSP_ESR_SI00, 0x00243000, AUD_DSP_ESR_SI00_MASK_STATUS, 0xc, AUD_DSP_ESR_SI00_MASK_STATUS, 0x24300c)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_STATUS, DSP_SI31_MASK, 31, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_STATUS, DSP_SI30_MASK, 30, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_STATUS, DSP_SI29_MASK, 29, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_STATUS, DSP_SI28_MASK, 28, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_STATUS, DSP_SI27_MASK, 27, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_STATUS, DSP_SI26_MASK, 26, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_STATUS, DSP_SI25_MASK, 25, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_STATUS, DSP_SI24_MASK, 24, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_STATUS, DSP_SI23_MASK, 23, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_STATUS, DSP_SI22_MASK, 22, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_STATUS, DSP_SI21_MASK, 21, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_STATUS, DSP_SI20_MASK, 20, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_STATUS, DSP_SI19_MASK, 19, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_STATUS, DSP_SI18_MASK, 18, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_STATUS, DSP_SI17_MASK, 17, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_STATUS, DSP_SI16_MASK, 16, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_STATUS, DSP_SI15_MASK, 15, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_STATUS, DSP_SI14_MASK, 14, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_STATUS, DSP_SI13_MASK, 13, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_STATUS, DSP_SI12_MASK, 12, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_STATUS, DSP_SI11_MASK, 11, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_STATUS, DSP_SI10_MASK, 10, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_STATUS, DSP_SI09_MASK, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_STATUS, DSP_SI08_MASK, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_STATUS, DSP_SI07_MASK, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_STATUS, DSP_SI06_MASK, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_STATUS, DSP_SI05_MASK, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_STATUS, DSP_SI04_MASK, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_STATUS, DSP_SI03_MASK, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_STATUS, DSP_SI02_MASK, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_STATUS, DSP_SI01_MASK, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_STATUS, DSP_SI00_MASK, 0, 1)
|
|
RegFunc(AUD_DSP_ESR_SI00, 0x00243000, AUD_DSP_ESR_SI00_MASK_SET, 0x10, AUD_DSP_ESR_SI00_MASK_SET, 0x243010)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_SET, DSP_SI31_MASK, 31, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_SET, DSP_SI30_MASK, 30, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_SET, DSP_SI29_MASK, 29, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_SET, DSP_SI28_MASK, 28, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_SET, DSP_SI27_MASK, 27, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_SET, DSP_SI26_MASK, 26, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_SET, DSP_SI25_MASK, 25, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_SET, DSP_SI24_MASK, 24, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_SET, DSP_SI23_MASK, 23, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_SET, DSP_SI22_MASK, 22, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_SET, DSP_SI21_MASK, 21, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_SET, DSP_SI20_MASK, 20, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_SET, DSP_SI19_MASK, 19, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_SET, DSP_SI18_MASK, 18, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_SET, DSP_SI17_MASK, 17, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_SET, DSP_SI16_MASK, 16, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_SET, DSP_SI15_MASK, 15, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_SET, DSP_SI14_MASK, 14, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_SET, DSP_SI13_MASK, 13, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_SET, DSP_SI12_MASK, 12, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_SET, DSP_SI11_MASK, 11, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_SET, DSP_SI10_MASK, 10, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_SET, DSP_SI09_MASK, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_SET, DSP_SI08_MASK, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_SET, DSP_SI07_MASK, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_SET, DSP_SI06_MASK, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_SET, DSP_SI05_MASK, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_SET, DSP_SI04_MASK, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_SET, DSP_SI03_MASK, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_SET, DSP_SI02_MASK, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_SET, DSP_SI01_MASK, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_SET, DSP_SI00_MASK, 0, 1)
|
|
RegFunc(AUD_DSP_ESR_SI00, 0x00243000, AUD_DSP_ESR_SI00_MASK_CLEAR, 0x14, AUD_DSP_ESR_SI00_MASK_CLEAR, 0x243014)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_CLEAR, DSP_SI31_MASK, 31, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_CLEAR, DSP_SI30_MASK, 30, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_CLEAR, DSP_SI29_MASK, 29, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_CLEAR, DSP_SI28_MASK, 28, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_CLEAR, DSP_SI27_MASK, 27, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_CLEAR, DSP_SI26_MASK, 26, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_CLEAR, DSP_SI25_MASK, 25, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_CLEAR, DSP_SI24_MASK, 24, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_CLEAR, DSP_SI23_MASK, 23, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_CLEAR, DSP_SI22_MASK, 22, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_CLEAR, DSP_SI21_MASK, 21, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_CLEAR, DSP_SI20_MASK, 20, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_CLEAR, DSP_SI19_MASK, 19, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_CLEAR, DSP_SI18_MASK, 18, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_CLEAR, DSP_SI17_MASK, 17, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_CLEAR, DSP_SI16_MASK, 16, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_CLEAR, DSP_SI15_MASK, 15, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_CLEAR, DSP_SI14_MASK, 14, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_CLEAR, DSP_SI13_MASK, 13, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_CLEAR, DSP_SI12_MASK, 12, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_CLEAR, DSP_SI11_MASK, 11, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_CLEAR, DSP_SI10_MASK, 10, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_CLEAR, DSP_SI09_MASK, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_CLEAR, DSP_SI08_MASK, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_CLEAR, DSP_SI07_MASK, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_CLEAR, DSP_SI06_MASK, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_CLEAR, DSP_SI05_MASK, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_CLEAR, DSP_SI04_MASK, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_CLEAR, DSP_SI03_MASK, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_CLEAR, DSP_SI02_MASK, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_CLEAR, DSP_SI01_MASK, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_SI00_MASK_CLEAR, DSP_SI00_MASK, 0, 1)
|
|
|
|
RegAreaFunc(AUD_DSP_ESR_SI10_BASE, 0x00243100, 0x00243114)
|
|
RegFunc(AUD_DSP_ESR_SI10, 0x00243100, AUD_DSP_ESR_SI10_INT_STATUS, 0x0, AUD_DSP_ESR_SI10_INT_STATUS, 0x243100)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_STATUS, DSP_SI31_INTR, 31, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_STATUS, DSP_SI30_INTR, 30, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_STATUS, DSP_SI29_INTR, 29, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_STATUS, DSP_SI28_INTR, 28, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_STATUS, DSP_SI27_INTR, 27, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_STATUS, DSP_SI26_INTR, 26, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_STATUS, DSP_SI25_INTR, 25, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_STATUS, DSP_SI24_INTR, 24, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_STATUS, DSP_SI23_INTR, 23, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_STATUS, DSP_SI22_INTR, 22, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_STATUS, DSP_SI21_INTR, 21, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_STATUS, DSP_SI20_INTR, 20, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_STATUS, DSP_SI19_INTR, 19, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_STATUS, DSP_SI18_INTR, 18, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_STATUS, DSP_SI17_INTR, 17, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_STATUS, DSP_SI16_INTR, 16, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_STATUS, DSP_SI15_INTR, 15, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_STATUS, DSP_SI14_INTR, 14, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_STATUS, DSP_SI13_INTR, 13, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_STATUS, DSP_SI12_INTR, 12, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_STATUS, DSP_SI11_INTR, 11, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_STATUS, DSP_SI10_INTR, 10, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_STATUS, DSP_SI09_INTR, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_STATUS, DSP_SI08_INTR, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_STATUS, DSP_SI07_INTR, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_STATUS, DSP_SI06_INTR, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_STATUS, DSP_SI05_INTR, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_STATUS, DSP_SI04_INTR, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_STATUS, DSP_SI03_INTR, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_STATUS, DSP_SI02_INTR, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_STATUS, DSP_SI01_INTR, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_STATUS, DSP_SI00_INTR, 0, 1)
|
|
RegFunc(AUD_DSP_ESR_SI10, 0x00243100, AUD_DSP_ESR_SI10_INT_SET, 0x4, AUD_DSP_ESR_SI10_INT_SET, 0x243104)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_SET, DSP_SI31_INTR, 31, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_SET, DSP_SI30_INTR, 30, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_SET, DSP_SI29_INTR, 29, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_SET, DSP_SI28_INTR, 28, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_SET, DSP_SI27_INTR, 27, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_SET, DSP_SI26_INTR, 26, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_SET, DSP_SI25_INTR, 25, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_SET, DSP_SI24_INTR, 24, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_SET, DSP_SI23_INTR, 23, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_SET, DSP_SI22_INTR, 22, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_SET, DSP_SI21_INTR, 21, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_SET, DSP_SI20_INTR, 20, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_SET, DSP_SI19_INTR, 19, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_SET, DSP_SI18_INTR, 18, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_SET, DSP_SI17_INTR, 17, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_SET, DSP_SI16_INTR, 16, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_SET, DSP_SI15_INTR, 15, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_SET, DSP_SI14_INTR, 14, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_SET, DSP_SI13_INTR, 13, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_SET, DSP_SI12_INTR, 12, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_SET, DSP_SI11_INTR, 11, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_SET, DSP_SI10_INTR, 10, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_SET, DSP_SI09_INTR, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_SET, DSP_SI08_INTR, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_SET, DSP_SI07_INTR, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_SET, DSP_SI06_INTR, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_SET, DSP_SI05_INTR, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_SET, DSP_SI04_INTR, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_SET, DSP_SI03_INTR, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_SET, DSP_SI02_INTR, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_SET, DSP_SI01_INTR, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_SET, DSP_SI00_INTR, 0, 1)
|
|
RegFunc(AUD_DSP_ESR_SI10, 0x00243100, AUD_DSP_ESR_SI10_INT_CLEAR, 0x8, AUD_DSP_ESR_SI10_INT_CLEAR, 0x243108)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_CLEAR, DSP_SI31_INTR, 31, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_CLEAR, DSP_SI30_INTR, 30, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_CLEAR, DSP_SI29_INTR, 29, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_CLEAR, DSP_SI28_INTR, 28, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_CLEAR, DSP_SI27_INTR, 27, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_CLEAR, DSP_SI26_INTR, 26, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_CLEAR, DSP_SI25_INTR, 25, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_CLEAR, DSP_SI24_INTR, 24, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_CLEAR, DSP_SI23_INTR, 23, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_CLEAR, DSP_SI22_INTR, 22, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_CLEAR, DSP_SI21_INTR, 21, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_CLEAR, DSP_SI20_INTR, 20, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_CLEAR, DSP_SI19_INTR, 19, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_CLEAR, DSP_SI18_INTR, 18, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_CLEAR, DSP_SI17_INTR, 17, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_CLEAR, DSP_SI16_INTR, 16, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_CLEAR, DSP_SI15_INTR, 15, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_CLEAR, DSP_SI14_INTR, 14, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_CLEAR, DSP_SI13_INTR, 13, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_CLEAR, DSP_SI12_INTR, 12, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_CLEAR, DSP_SI11_INTR, 11, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_CLEAR, DSP_SI10_INTR, 10, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_CLEAR, DSP_SI09_INTR, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_CLEAR, DSP_SI08_INTR, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_CLEAR, DSP_SI07_INTR, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_CLEAR, DSP_SI06_INTR, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_CLEAR, DSP_SI05_INTR, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_CLEAR, DSP_SI04_INTR, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_CLEAR, DSP_SI03_INTR, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_CLEAR, DSP_SI02_INTR, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_CLEAR, DSP_SI01_INTR, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_INT_CLEAR, DSP_SI00_INTR, 0, 1)
|
|
RegFunc(AUD_DSP_ESR_SI10, 0x00243100, AUD_DSP_ESR_SI10_MASK_STATUS, 0xc, AUD_DSP_ESR_SI10_MASK_STATUS, 0x24310c)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_STATUS, DSP_SI31_MASK, 31, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_STATUS, DSP_SI30_MASK, 30, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_STATUS, DSP_SI29_MASK, 29, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_STATUS, DSP_SI28_MASK, 28, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_STATUS, DSP_SI27_MASK, 27, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_STATUS, DSP_SI26_MASK, 26, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_STATUS, DSP_SI25_MASK, 25, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_STATUS, DSP_SI24_MASK, 24, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_STATUS, DSP_SI23_MASK, 23, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_STATUS, DSP_SI22_MASK, 22, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_STATUS, DSP_SI21_MASK, 21, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_STATUS, DSP_SI20_MASK, 20, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_STATUS, DSP_SI19_MASK, 19, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_STATUS, DSP_SI18_MASK, 18, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_STATUS, DSP_SI17_MASK, 17, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_STATUS, DSP_SI16_MASK, 16, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_STATUS, DSP_SI15_MASK, 15, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_STATUS, DSP_SI14_MASK, 14, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_STATUS, DSP_SI13_MASK, 13, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_STATUS, DSP_SI12_MASK, 12, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_STATUS, DSP_SI11_MASK, 11, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_STATUS, DSP_SI10_MASK, 10, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_STATUS, DSP_SI09_MASK, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_STATUS, DSP_SI08_MASK, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_STATUS, DSP_SI07_MASK, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_STATUS, DSP_SI06_MASK, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_STATUS, DSP_SI05_MASK, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_STATUS, DSP_SI04_MASK, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_STATUS, DSP_SI03_MASK, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_STATUS, DSP_SI02_MASK, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_STATUS, DSP_SI01_MASK, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_STATUS, DSP_SI00_MASK, 0, 1)
|
|
RegFunc(AUD_DSP_ESR_SI10, 0x00243100, AUD_DSP_ESR_SI10_MASK_SET, 0x10, AUD_DSP_ESR_SI10_MASK_SET, 0x243110)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_SET, DSP_SI31_MASK, 31, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_SET, DSP_SI30_MASK, 30, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_SET, DSP_SI29_MASK, 29, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_SET, DSP_SI28_MASK, 28, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_SET, DSP_SI27_MASK, 27, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_SET, DSP_SI26_MASK, 26, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_SET, DSP_SI25_MASK, 25, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_SET, DSP_SI24_MASK, 24, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_SET, DSP_SI23_MASK, 23, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_SET, DSP_SI22_MASK, 22, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_SET, DSP_SI21_MASK, 21, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_SET, DSP_SI20_MASK, 20, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_SET, DSP_SI19_MASK, 19, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_SET, DSP_SI18_MASK, 18, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_SET, DSP_SI17_MASK, 17, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_SET, DSP_SI16_MASK, 16, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_SET, DSP_SI15_MASK, 15, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_SET, DSP_SI14_MASK, 14, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_SET, DSP_SI13_MASK, 13, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_SET, DSP_SI12_MASK, 12, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_SET, DSP_SI11_MASK, 11, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_SET, DSP_SI10_MASK, 10, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_SET, DSP_SI09_MASK, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_SET, DSP_SI08_MASK, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_SET, DSP_SI07_MASK, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_SET, DSP_SI06_MASK, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_SET, DSP_SI05_MASK, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_SET, DSP_SI04_MASK, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_SET, DSP_SI03_MASK, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_SET, DSP_SI02_MASK, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_SET, DSP_SI01_MASK, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_SET, DSP_SI00_MASK, 0, 1)
|
|
RegFunc(AUD_DSP_ESR_SI10, 0x00243100, AUD_DSP_ESR_SI10_MASK_CLEAR, 0x14, AUD_DSP_ESR_SI10_MASK_CLEAR, 0x243114)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_CLEAR, DSP_SI31_MASK, 31, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_CLEAR, DSP_SI30_MASK, 30, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_CLEAR, DSP_SI29_MASK, 29, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_CLEAR, DSP_SI28_MASK, 28, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_CLEAR, DSP_SI27_MASK, 27, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_CLEAR, DSP_SI26_MASK, 26, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_CLEAR, DSP_SI25_MASK, 25, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_CLEAR, DSP_SI24_MASK, 24, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_CLEAR, DSP_SI23_MASK, 23, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_CLEAR, DSP_SI22_MASK, 22, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_CLEAR, DSP_SI21_MASK, 21, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_CLEAR, DSP_SI20_MASK, 20, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_CLEAR, DSP_SI19_MASK, 19, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_CLEAR, DSP_SI18_MASK, 18, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_CLEAR, DSP_SI17_MASK, 17, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_CLEAR, DSP_SI16_MASK, 16, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_CLEAR, DSP_SI15_MASK, 15, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_CLEAR, DSP_SI14_MASK, 14, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_CLEAR, DSP_SI13_MASK, 13, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_CLEAR, DSP_SI12_MASK, 12, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_CLEAR, DSP_SI11_MASK, 11, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_CLEAR, DSP_SI10_MASK, 10, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_CLEAR, DSP_SI09_MASK, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_CLEAR, DSP_SI08_MASK, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_CLEAR, DSP_SI07_MASK, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_CLEAR, DSP_SI06_MASK, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_CLEAR, DSP_SI05_MASK, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_CLEAR, DSP_SI04_MASK, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_CLEAR, DSP_SI03_MASK, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_CLEAR, DSP_SI02_MASK, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_CLEAR, DSP_SI01_MASK, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_SI10_MASK_CLEAR, DSP_SI00_MASK, 0, 1)
|
|
|
|
RegAreaFunc(AUD_DSP_ESR_SI20_BASE, 0x00243200, 0x00243214)
|
|
RegFunc(AUD_DSP_ESR_SI20, 0x00243200, AUD_DSP_ESR_SI20_INT_STATUS, 0x0, AUD_DSP_ESR_SI20_INT_STATUS, 0x243200)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_STATUS, DSP_SI31_INTR, 31, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_STATUS, DSP_SI30_INTR, 30, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_STATUS, DSP_SI29_INTR, 29, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_STATUS, DSP_SI28_INTR, 28, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_STATUS, DSP_SI27_INTR, 27, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_STATUS, DSP_SI26_INTR, 26, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_STATUS, DSP_SI25_INTR, 25, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_STATUS, DSP_SI24_INTR, 24, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_STATUS, DSP_SI23_INTR, 23, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_STATUS, DSP_SI22_INTR, 22, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_STATUS, DSP_SI21_INTR, 21, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_STATUS, DSP_SI20_INTR, 20, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_STATUS, DSP_SI19_INTR, 19, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_STATUS, DSP_SI18_INTR, 18, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_STATUS, DSP_SI17_INTR, 17, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_STATUS, DSP_SI16_INTR, 16, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_STATUS, DSP_SI15_INTR, 15, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_STATUS, DSP_SI14_INTR, 14, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_STATUS, DSP_SI13_INTR, 13, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_STATUS, DSP_SI12_INTR, 12, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_STATUS, DSP_SI11_INTR, 11, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_STATUS, DSP_SI10_INTR, 10, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_STATUS, DSP_SI09_INTR, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_STATUS, DSP_SI08_INTR, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_STATUS, DSP_SI07_INTR, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_STATUS, DSP_SI06_INTR, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_STATUS, DSP_SI05_INTR, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_STATUS, DSP_SI04_INTR, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_STATUS, DSP_SI03_INTR, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_STATUS, DSP_SI02_INTR, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_STATUS, DSP_SI01_INTR, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_STATUS, DSP_SI00_INTR, 0, 1)
|
|
RegFunc(AUD_DSP_ESR_SI20, 0x00243200, AUD_DSP_ESR_SI20_INT_SET, 0x4, AUD_DSP_ESR_SI20_INT_SET, 0x243204)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_SET, DSP_SI31_INTR, 31, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_SET, DSP_SI30_INTR, 30, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_SET, DSP_SI29_INTR, 29, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_SET, DSP_SI28_INTR, 28, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_SET, DSP_SI27_INTR, 27, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_SET, DSP_SI26_INTR, 26, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_SET, DSP_SI25_INTR, 25, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_SET, DSP_SI24_INTR, 24, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_SET, DSP_SI23_INTR, 23, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_SET, DSP_SI22_INTR, 22, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_SET, DSP_SI21_INTR, 21, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_SET, DSP_SI20_INTR, 20, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_SET, DSP_SI19_INTR, 19, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_SET, DSP_SI18_INTR, 18, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_SET, DSP_SI17_INTR, 17, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_SET, DSP_SI16_INTR, 16, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_SET, DSP_SI15_INTR, 15, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_SET, DSP_SI14_INTR, 14, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_SET, DSP_SI13_INTR, 13, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_SET, DSP_SI12_INTR, 12, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_SET, DSP_SI11_INTR, 11, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_SET, DSP_SI10_INTR, 10, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_SET, DSP_SI09_INTR, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_SET, DSP_SI08_INTR, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_SET, DSP_SI07_INTR, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_SET, DSP_SI06_INTR, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_SET, DSP_SI05_INTR, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_SET, DSP_SI04_INTR, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_SET, DSP_SI03_INTR, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_SET, DSP_SI02_INTR, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_SET, DSP_SI01_INTR, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_SET, DSP_SI00_INTR, 0, 1)
|
|
RegFunc(AUD_DSP_ESR_SI20, 0x00243200, AUD_DSP_ESR_SI20_INT_CLEAR, 0x8, AUD_DSP_ESR_SI20_INT_CLEAR, 0x243208)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_CLEAR, DSP_SI31_INTR, 31, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_CLEAR, DSP_SI30_INTR, 30, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_CLEAR, DSP_SI29_INTR, 29, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_CLEAR, DSP_SI28_INTR, 28, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_CLEAR, DSP_SI27_INTR, 27, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_CLEAR, DSP_SI26_INTR, 26, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_CLEAR, DSP_SI25_INTR, 25, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_CLEAR, DSP_SI24_INTR, 24, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_CLEAR, DSP_SI23_INTR, 23, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_CLEAR, DSP_SI22_INTR, 22, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_CLEAR, DSP_SI21_INTR, 21, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_CLEAR, DSP_SI20_INTR, 20, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_CLEAR, DSP_SI19_INTR, 19, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_CLEAR, DSP_SI18_INTR, 18, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_CLEAR, DSP_SI17_INTR, 17, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_CLEAR, DSP_SI16_INTR, 16, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_CLEAR, DSP_SI15_INTR, 15, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_CLEAR, DSP_SI14_INTR, 14, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_CLEAR, DSP_SI13_INTR, 13, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_CLEAR, DSP_SI12_INTR, 12, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_CLEAR, DSP_SI11_INTR, 11, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_CLEAR, DSP_SI10_INTR, 10, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_CLEAR, DSP_SI09_INTR, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_CLEAR, DSP_SI08_INTR, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_CLEAR, DSP_SI07_INTR, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_CLEAR, DSP_SI06_INTR, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_CLEAR, DSP_SI05_INTR, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_CLEAR, DSP_SI04_INTR, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_CLEAR, DSP_SI03_INTR, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_CLEAR, DSP_SI02_INTR, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_CLEAR, DSP_SI01_INTR, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_INT_CLEAR, DSP_SI00_INTR, 0, 1)
|
|
RegFunc(AUD_DSP_ESR_SI20, 0x00243200, AUD_DSP_ESR_SI20_MASK_STATUS, 0xc, AUD_DSP_ESR_SI20_MASK_STATUS, 0x24320c)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_STATUS, DSP_SI31_MASK, 31, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_STATUS, DSP_SI30_MASK, 30, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_STATUS, DSP_SI29_MASK, 29, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_STATUS, DSP_SI28_MASK, 28, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_STATUS, DSP_SI27_MASK, 27, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_STATUS, DSP_SI26_MASK, 26, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_STATUS, DSP_SI25_MASK, 25, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_STATUS, DSP_SI24_MASK, 24, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_STATUS, DSP_SI23_MASK, 23, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_STATUS, DSP_SI22_MASK, 22, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_STATUS, DSP_SI21_MASK, 21, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_STATUS, DSP_SI20_MASK, 20, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_STATUS, DSP_SI19_MASK, 19, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_STATUS, DSP_SI18_MASK, 18, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_STATUS, DSP_SI17_MASK, 17, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_STATUS, DSP_SI16_MASK, 16, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_STATUS, DSP_SI15_MASK, 15, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_STATUS, DSP_SI14_MASK, 14, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_STATUS, DSP_SI13_MASK, 13, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_STATUS, DSP_SI12_MASK, 12, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_STATUS, DSP_SI11_MASK, 11, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_STATUS, DSP_SI10_MASK, 10, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_STATUS, DSP_SI09_MASK, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_STATUS, DSP_SI08_MASK, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_STATUS, DSP_SI07_MASK, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_STATUS, DSP_SI06_MASK, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_STATUS, DSP_SI05_MASK, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_STATUS, DSP_SI04_MASK, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_STATUS, DSP_SI03_MASK, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_STATUS, DSP_SI02_MASK, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_STATUS, DSP_SI01_MASK, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_STATUS, DSP_SI00_MASK, 0, 1)
|
|
RegFunc(AUD_DSP_ESR_SI20, 0x00243200, AUD_DSP_ESR_SI20_MASK_SET, 0x10, AUD_DSP_ESR_SI20_MASK_SET, 0x243210)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_SET, DSP_SI31_MASK, 31, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_SET, DSP_SI30_MASK, 30, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_SET, DSP_SI29_MASK, 29, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_SET, DSP_SI28_MASK, 28, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_SET, DSP_SI27_MASK, 27, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_SET, DSP_SI26_MASK, 26, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_SET, DSP_SI25_MASK, 25, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_SET, DSP_SI24_MASK, 24, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_SET, DSP_SI23_MASK, 23, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_SET, DSP_SI22_MASK, 22, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_SET, DSP_SI21_MASK, 21, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_SET, DSP_SI20_MASK, 20, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_SET, DSP_SI19_MASK, 19, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_SET, DSP_SI18_MASK, 18, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_SET, DSP_SI17_MASK, 17, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_SET, DSP_SI16_MASK, 16, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_SET, DSP_SI15_MASK, 15, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_SET, DSP_SI14_MASK, 14, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_SET, DSP_SI13_MASK, 13, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_SET, DSP_SI12_MASK, 12, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_SET, DSP_SI11_MASK, 11, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_SET, DSP_SI10_MASK, 10, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_SET, DSP_SI09_MASK, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_SET, DSP_SI08_MASK, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_SET, DSP_SI07_MASK, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_SET, DSP_SI06_MASK, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_SET, DSP_SI05_MASK, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_SET, DSP_SI04_MASK, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_SET, DSP_SI03_MASK, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_SET, DSP_SI02_MASK, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_SET, DSP_SI01_MASK, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_SET, DSP_SI00_MASK, 0, 1)
|
|
RegFunc(AUD_DSP_ESR_SI20, 0x00243200, AUD_DSP_ESR_SI20_MASK_CLEAR, 0x14, AUD_DSP_ESR_SI20_MASK_CLEAR, 0x243214)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_CLEAR, DSP_SI31_MASK, 31, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_CLEAR, DSP_SI30_MASK, 30, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_CLEAR, DSP_SI29_MASK, 29, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_CLEAR, DSP_SI28_MASK, 28, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_CLEAR, DSP_SI27_MASK, 27, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_CLEAR, DSP_SI26_MASK, 26, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_CLEAR, DSP_SI25_MASK, 25, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_CLEAR, DSP_SI24_MASK, 24, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_CLEAR, DSP_SI23_MASK, 23, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_CLEAR, DSP_SI22_MASK, 22, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_CLEAR, DSP_SI21_MASK, 21, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_CLEAR, DSP_SI20_MASK, 20, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_CLEAR, DSP_SI19_MASK, 19, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_CLEAR, DSP_SI18_MASK, 18, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_CLEAR, DSP_SI17_MASK, 17, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_CLEAR, DSP_SI16_MASK, 16, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_CLEAR, DSP_SI15_MASK, 15, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_CLEAR, DSP_SI14_MASK, 14, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_CLEAR, DSP_SI13_MASK, 13, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_CLEAR, DSP_SI12_MASK, 12, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_CLEAR, DSP_SI11_MASK, 11, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_CLEAR, DSP_SI10_MASK, 10, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_CLEAR, DSP_SI09_MASK, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_CLEAR, DSP_SI08_MASK, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_CLEAR, DSP_SI07_MASK, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_CLEAR, DSP_SI06_MASK, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_CLEAR, DSP_SI05_MASK, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_CLEAR, DSP_SI04_MASK, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_CLEAR, DSP_SI03_MASK, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_CLEAR, DSP_SI02_MASK, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_CLEAR, DSP_SI01_MASK, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_SI20_MASK_CLEAR, DSP_SI00_MASK, 0, 1)
|
|
|
|
RegAreaFunc(AUD_DSP_ESR_SO00_BASE, 0x00243400, 0x00243414)
|
|
RegFunc(AUD_DSP_ESR_SO00, 0x00243400, AUD_DSP_ESR_SO00_INT_STATUS, 0x0, AUD_DSP_ESR_SO00_INT_STATUS, 0x243400)
|
|
FldFunc(AUD_DSP_ESR_SO00_INT_STATUS, DSP_SO31_INTRDS, 31, 1)
|
|
FldFunc(AUD_DSP_ESR_SO00_INT_STATUS, DSP_SO30_INTRDS, 30, 1)
|
|
FldFunc(AUD_DSP_ESR_SO00_INT_STATUS, DSP_SO29_INTRDS, 29, 1)
|
|
FldFunc(AUD_DSP_ESR_SO00_INT_STATUS, DSP_SO28_INTRDS, 28, 1)
|
|
FldFunc(AUD_DSP_ESR_SO00_INT_STATUS, DSP_SO27_INTRDS, 27, 1)
|
|
FldFunc(AUD_DSP_ESR_SO00_INT_STATUS, DSP_SO26_INTRDS, 26, 1)
|
|
FldFunc(AUD_DSP_ESR_SO00_INT_STATUS, DSP_SO25_INTRDS, 25, 1)
|
|
FldFunc(AUD_DSP_ESR_SO00_INT_STATUS, DSP_SO24_INTRDS, 24, 1)
|
|
FldFunc(AUD_DSP_ESR_SO00_INT_STATUS, DSP_SO23_INTRDS, 23, 1)
|
|
FldFunc(AUD_DSP_ESR_SO00_INT_STATUS, DSP_SO22_INTRDS, 22, 1)
|
|
FldFunc(AUD_DSP_ESR_SO00_INT_STATUS, DSP_SO21_INTRDS, 21, 1)
|
|
FldFunc(AUD_DSP_ESR_SO00_INT_STATUS, DSP_SO20_INTRDS, 20, 1)
|
|
FldFunc(AUD_DSP_ESR_SO00_INT_STATUS, DSP_SO19_INTRDS, 19, 1)
|
|
FldFunc(AUD_DSP_ESR_SO00_INT_STATUS, DSP_SO18_INTRDS, 18, 1)
|
|
FldFunc(AUD_DSP_ESR_SO00_INT_STATUS, DSP_SO17_INTRDS, 17, 1)
|
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FldFunc(AUD_DSP_ESR_SO00_INT_STATUS, DSP_SO16_INTRDS, 16, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_STATUS, DSP_SO15_INTRDS, 15, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_STATUS, DSP_SO14_INTRDS, 14, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_STATUS, DSP_SO13_INTRDS, 13, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_STATUS, DSP_SO12_INTRDS, 12, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_STATUS, DSP_SO11_INTRDS, 11, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_STATUS, DSP_SO10_INTRDS, 10, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_STATUS, DSP_SO09_INTRDS, 9, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_STATUS, DSP_SO08_INTRDS, 8, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_STATUS, DSP_SO07_INTRDS, 7, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_STATUS, DSP_SO06_INTRDS, 6, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_STATUS, DSP_SO05_INTRDS, 5, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_STATUS, DSP_SO04_INTRDS, 4, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_STATUS, DSP_SO03_INTRDS, 3, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_STATUS, DSP_SO02_INTRDS, 2, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_STATUS, DSP_SO01_INTRDS, 1, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_STATUS, DSP_SO00_INTRDS, 0, 1)
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RegFunc(AUD_DSP_ESR_SO00, 0x00243400, AUD_DSP_ESR_SO00_INT_SET, 0x4, AUD_DSP_ESR_SO00_INT_SET, 0x243404)
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FldFunc(AUD_DSP_ESR_SO00_INT_SET, DSP_SO31_INTRDS, 31, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_SET, DSP_SO30_INTRDS, 30, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_SET, DSP_SO29_INTRDS, 29, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_SET, DSP_SO28_INTRDS, 28, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_SET, DSP_SO27_INTRDS, 27, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_SET, DSP_SO26_INTRDS, 26, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_SET, DSP_SO25_INTRDS, 25, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_SET, DSP_SO24_INTRDS, 24, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_SET, DSP_SO23_INTRDS, 23, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_SET, DSP_SO22_INTRDS, 22, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_SET, DSP_SO21_INTRDS, 21, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_SET, DSP_SO20_INTRDS, 20, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_SET, DSP_SO19_INTRDS, 19, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_SET, DSP_SO18_INTRDS, 18, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_SET, DSP_SO17_INTRDS, 17, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_SET, DSP_SO16_INTRDS, 16, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_SET, DSP_SO15_INTRDS, 15, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_SET, DSP_SO14_INTRDS, 14, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_SET, DSP_SO13_INTRDS, 13, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_SET, DSP_SO12_INTRDS, 12, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_SET, DSP_SO11_INTRDS, 11, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_SET, DSP_SO10_INTRDS, 10, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_SET, DSP_SO09_INTRDS, 9, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_SET, DSP_SO08_INTRDS, 8, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_SET, DSP_SO07_INTRDS, 7, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_SET, DSP_SO06_INTRDS, 6, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_SET, DSP_SO05_INTRDS, 5, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_SET, DSP_SO04_INTRDS, 4, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_SET, DSP_SO03_INTRDS, 3, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_SET, DSP_SO02_INTRDS, 2, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_SET, DSP_SO01_INTRDS, 1, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_SET, DSP_SO00_INTRDS, 0, 1)
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RegFunc(AUD_DSP_ESR_SO00, 0x00243400, AUD_DSP_ESR_SO00_INT_CLEAR, 0x8, AUD_DSP_ESR_SO00_INT_CLEAR, 0x243408)
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FldFunc(AUD_DSP_ESR_SO00_INT_CLEAR, DSP_SO31_INTRDS, 31, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_CLEAR, DSP_SO30_INTRDS, 30, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_CLEAR, DSP_SO29_INTRDS, 29, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_CLEAR, DSP_SO28_INTRDS, 28, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_CLEAR, DSP_SO27_INTRDS, 27, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_CLEAR, DSP_SO26_INTRDS, 26, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_CLEAR, DSP_SO25_INTRDS, 25, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_CLEAR, DSP_SO24_INTRDS, 24, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_CLEAR, DSP_SO23_INTRDS, 23, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_CLEAR, DSP_SO22_INTRDS, 22, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_CLEAR, DSP_SO21_INTRDS, 21, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_CLEAR, DSP_SO20_INTRDS, 20, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_CLEAR, DSP_SO19_INTRDS, 19, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_CLEAR, DSP_SO18_INTRDS, 18, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_CLEAR, DSP_SO17_INTRDS, 17, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_CLEAR, DSP_SO16_INTRDS, 16, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_CLEAR, DSP_SO15_INTRDS, 15, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_CLEAR, DSP_SO14_INTRDS, 14, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_CLEAR, DSP_SO13_INTRDS, 13, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_CLEAR, DSP_SO12_INTRDS, 12, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_CLEAR, DSP_SO11_INTRDS, 11, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_CLEAR, DSP_SO10_INTRDS, 10, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_CLEAR, DSP_SO09_INTRDS, 9, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_CLEAR, DSP_SO08_INTRDS, 8, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_CLEAR, DSP_SO07_INTRDS, 7, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_CLEAR, DSP_SO06_INTRDS, 6, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_CLEAR, DSP_SO05_INTRDS, 5, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_CLEAR, DSP_SO04_INTRDS, 4, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_CLEAR, DSP_SO03_INTRDS, 3, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_CLEAR, DSP_SO02_INTRDS, 2, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_CLEAR, DSP_SO01_INTRDS, 1, 1)
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FldFunc(AUD_DSP_ESR_SO00_INT_CLEAR, DSP_SO00_INTRDS, 0, 1)
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RegFunc(AUD_DSP_ESR_SO00, 0x00243400, AUD_DSP_ESR_SO00_MASK_STATUS, 0xc, AUD_DSP_ESR_SO00_MASK_STATUS, 0x24340c)
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FldFunc(AUD_DSP_ESR_SO00_MASK_STATUS, DSP_SO31_MASK, 31, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_STATUS, DSP_SO30_MASK, 30, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_STATUS, DSP_SO29_MASK, 29, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_STATUS, DSP_SO28_MASK, 28, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_STATUS, DSP_SO27_MASK, 27, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_STATUS, DSP_SO26_MASK, 26, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_STATUS, DSP_SO25_MASK, 25, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_STATUS, DSP_SO24_MASK, 24, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_STATUS, DSP_SO23_MASK, 23, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_STATUS, DSP_SO22_MASK, 22, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_STATUS, DSP_SO21_MASK, 21, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_STATUS, DSP_SO20_MASK, 20, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_STATUS, DSP_SO19_MASK, 19, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_STATUS, DSP_SO18_MASK, 18, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_STATUS, DSP_SO17_MASK, 17, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_STATUS, DSP_SO16_MASK, 16, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_STATUS, DSP_SO15_MASK, 15, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_STATUS, DSP_SO14_MASK, 14, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_STATUS, DSP_SO13_MASK, 13, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_STATUS, DSP_SO12_MASK, 12, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_STATUS, DSP_SO11_MASK, 11, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_STATUS, DSP_SO10_MASK, 10, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_STATUS, DSP_SO09_MASK, 9, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_STATUS, DSP_SO08_MASK, 8, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_STATUS, DSP_SO07_MASK, 7, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_STATUS, DSP_SO06_MASK, 6, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_STATUS, DSP_SO05_MASK, 5, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_STATUS, DSP_SO04_MASK, 4, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_STATUS, DSP_SO03_MASK, 3, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_STATUS, DSP_SO02_MASK, 2, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_STATUS, DSP_SO01_MASK, 1, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_STATUS, DSP_SO00_MASK, 0, 1)
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RegFunc(AUD_DSP_ESR_SO00, 0x00243400, AUD_DSP_ESR_SO00_MASK_SET, 0x10, AUD_DSP_ESR_SO00_MASK_SET, 0x243410)
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FldFunc(AUD_DSP_ESR_SO00_MASK_SET, DSP_SO31_MASK, 31, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_SET, DSP_SO30_MASK, 30, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_SET, DSP_SO29_MASK, 29, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_SET, DSP_SO28_MASK, 28, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_SET, DSP_SO27_MASK, 27, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_SET, DSP_SO26_MASK, 26, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_SET, DSP_SO25_MASK, 25, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_SET, DSP_SO24_MASK, 24, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_SET, DSP_SO23_MASK, 23, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_SET, DSP_SO22_MASK, 22, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_SET, DSP_SO21_MASK, 21, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_SET, DSP_SO20_MASK, 20, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_SET, DSP_SO19_MASK, 19, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_SET, DSP_SO18_MASK, 18, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_SET, DSP_SO17_MASK, 17, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_SET, DSP_SO16_MASK, 16, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_SET, DSP_SO15_MASK, 15, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_SET, DSP_SO14_MASK, 14, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_SET, DSP_SO13_MASK, 13, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_SET, DSP_SO12_MASK, 12, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_SET, DSP_SO11_MASK, 11, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_SET, DSP_SO10_MASK, 10, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_SET, DSP_SO09_MASK, 9, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_SET, DSP_SO08_MASK, 8, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_SET, DSP_SO07_MASK, 7, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_SET, DSP_SO06_MASK, 6, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_SET, DSP_SO05_MASK, 5, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_SET, DSP_SO04_MASK, 4, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_SET, DSP_SO03_MASK, 3, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_SET, DSP_SO02_MASK, 2, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_SET, DSP_SO01_MASK, 1, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_SET, DSP_SO00_MASK, 0, 1)
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|
RegFunc(AUD_DSP_ESR_SO00, 0x00243400, AUD_DSP_ESR_SO00_MASK_CLEAR, 0x14, AUD_DSP_ESR_SO00_MASK_CLEAR, 0x243414)
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FldFunc(AUD_DSP_ESR_SO00_MASK_CLEAR, DSP_SO31_MASK, 31, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_CLEAR, DSP_SO30_MASK, 30, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_CLEAR, DSP_SO29_MASK, 29, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_CLEAR, DSP_SO28_MASK, 28, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_CLEAR, DSP_SO27_MASK, 27, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_CLEAR, DSP_SO26_MASK, 26, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_CLEAR, DSP_SO25_MASK, 25, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_CLEAR, DSP_SO24_MASK, 24, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_CLEAR, DSP_SO23_MASK, 23, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_CLEAR, DSP_SO22_MASK, 22, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_CLEAR, DSP_SO21_MASK, 21, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_CLEAR, DSP_SO20_MASK, 20, 1)
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|
FldFunc(AUD_DSP_ESR_SO00_MASK_CLEAR, DSP_SO19_MASK, 19, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_CLEAR, DSP_SO18_MASK, 18, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_CLEAR, DSP_SO17_MASK, 17, 1)
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|
FldFunc(AUD_DSP_ESR_SO00_MASK_CLEAR, DSP_SO16_MASK, 16, 1)
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FldFunc(AUD_DSP_ESR_SO00_MASK_CLEAR, DSP_SO15_MASK, 15, 1)
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|
FldFunc(AUD_DSP_ESR_SO00_MASK_CLEAR, DSP_SO14_MASK, 14, 1)
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|
FldFunc(AUD_DSP_ESR_SO00_MASK_CLEAR, DSP_SO13_MASK, 13, 1)
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|
FldFunc(AUD_DSP_ESR_SO00_MASK_CLEAR, DSP_SO12_MASK, 12, 1)
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|
FldFunc(AUD_DSP_ESR_SO00_MASK_CLEAR, DSP_SO11_MASK, 11, 1)
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|
FldFunc(AUD_DSP_ESR_SO00_MASK_CLEAR, DSP_SO10_MASK, 10, 1)
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|
FldFunc(AUD_DSP_ESR_SO00_MASK_CLEAR, DSP_SO09_MASK, 9, 1)
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|
FldFunc(AUD_DSP_ESR_SO00_MASK_CLEAR, DSP_SO08_MASK, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_SO00_MASK_CLEAR, DSP_SO07_MASK, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_SO00_MASK_CLEAR, DSP_SO06_MASK, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_SO00_MASK_CLEAR, DSP_SO05_MASK, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_SO00_MASK_CLEAR, DSP_SO04_MASK, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_SO00_MASK_CLEAR, DSP_SO03_MASK, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_SO00_MASK_CLEAR, DSP_SO02_MASK, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_SO00_MASK_CLEAR, DSP_SO01_MASK, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_SO00_MASK_CLEAR, DSP_SO00_MASK, 0, 1)
|
|
|
|
RegAreaFunc(AUD_DSP_ESR_SO10_BASE, 0x00243500, 0x00243514)
|
|
RegFunc(AUD_DSP_ESR_SO10, 0x00243500, AUD_DSP_ESR_SO10_INT_STATUS, 0x0, AUD_DSP_ESR_SO10_INT_STATUS, 0x243500)
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|
FldFunc(AUD_DSP_ESR_SO10_INT_STATUS, DSP_SO31_INTRDS, 31, 1)
|
|
FldFunc(AUD_DSP_ESR_SO10_INT_STATUS, DSP_SO30_INTRDS, 30, 1)
|
|
FldFunc(AUD_DSP_ESR_SO10_INT_STATUS, DSP_SO29_INTRDS, 29, 1)
|
|
FldFunc(AUD_DSP_ESR_SO10_INT_STATUS, DSP_SO28_INTRDS, 28, 1)
|
|
FldFunc(AUD_DSP_ESR_SO10_INT_STATUS, DSP_SO27_INTRDS, 27, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_INT_STATUS, DSP_SO26_INTRDS, 26, 1)
|
|
FldFunc(AUD_DSP_ESR_SO10_INT_STATUS, DSP_SO25_INTRDS, 25, 1)
|
|
FldFunc(AUD_DSP_ESR_SO10_INT_STATUS, DSP_SO24_INTRDS, 24, 1)
|
|
FldFunc(AUD_DSP_ESR_SO10_INT_STATUS, DSP_SO23_INTRDS, 23, 1)
|
|
FldFunc(AUD_DSP_ESR_SO10_INT_STATUS, DSP_SO22_INTRDS, 22, 1)
|
|
FldFunc(AUD_DSP_ESR_SO10_INT_STATUS, DSP_SO21_INTRDS, 21, 1)
|
|
FldFunc(AUD_DSP_ESR_SO10_INT_STATUS, DSP_SO20_INTRDS, 20, 1)
|
|
FldFunc(AUD_DSP_ESR_SO10_INT_STATUS, DSP_SO19_INTRDS, 19, 1)
|
|
FldFunc(AUD_DSP_ESR_SO10_INT_STATUS, DSP_SO18_INTRDS, 18, 1)
|
|
FldFunc(AUD_DSP_ESR_SO10_INT_STATUS, DSP_SO17_INTRDS, 17, 1)
|
|
FldFunc(AUD_DSP_ESR_SO10_INT_STATUS, DSP_SO16_INTRDS, 16, 1)
|
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FldFunc(AUD_DSP_ESR_SO10_INT_STATUS, DSP_SO15_INTRDS, 15, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_STATUS, DSP_SO14_INTRDS, 14, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_STATUS, DSP_SO13_INTRDS, 13, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_STATUS, DSP_SO12_INTRDS, 12, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_INT_STATUS, DSP_SO11_INTRDS, 11, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_STATUS, DSP_SO10_INTRDS, 10, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_STATUS, DSP_SO09_INTRDS, 9, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_STATUS, DSP_SO08_INTRDS, 8, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_STATUS, DSP_SO07_INTRDS, 7, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_STATUS, DSP_SO06_INTRDS, 6, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_STATUS, DSP_SO05_INTRDS, 5, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_STATUS, DSP_SO04_INTRDS, 4, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_STATUS, DSP_SO03_INTRDS, 3, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_STATUS, DSP_SO02_INTRDS, 2, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_STATUS, DSP_SO01_INTRDS, 1, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_STATUS, DSP_SO00_INTRDS, 0, 1)
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RegFunc(AUD_DSP_ESR_SO10, 0x00243500, AUD_DSP_ESR_SO10_INT_SET, 0x4, AUD_DSP_ESR_SO10_INT_SET, 0x243504)
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FldFunc(AUD_DSP_ESR_SO10_INT_SET, DSP_SO31_INTRDS, 31, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_SET, DSP_SO30_INTRDS, 30, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_SET, DSP_SO29_INTRDS, 29, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_SET, DSP_SO28_INTRDS, 28, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_SET, DSP_SO27_INTRDS, 27, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_SET, DSP_SO26_INTRDS, 26, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_SET, DSP_SO25_INTRDS, 25, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_SET, DSP_SO24_INTRDS, 24, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_SET, DSP_SO23_INTRDS, 23, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_SET, DSP_SO22_INTRDS, 22, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_SET, DSP_SO21_INTRDS, 21, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_SET, DSP_SO20_INTRDS, 20, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_SET, DSP_SO19_INTRDS, 19, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_SET, DSP_SO18_INTRDS, 18, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_SET, DSP_SO17_INTRDS, 17, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_SET, DSP_SO16_INTRDS, 16, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_SET, DSP_SO15_INTRDS, 15, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_SET, DSP_SO14_INTRDS, 14, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_SET, DSP_SO13_INTRDS, 13, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_SET, DSP_SO12_INTRDS, 12, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_SET, DSP_SO11_INTRDS, 11, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_SET, DSP_SO10_INTRDS, 10, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_SET, DSP_SO09_INTRDS, 9, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_SET, DSP_SO08_INTRDS, 8, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_SET, DSP_SO07_INTRDS, 7, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_SET, DSP_SO06_INTRDS, 6, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_SET, DSP_SO05_INTRDS, 5, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_INT_SET, DSP_SO04_INTRDS, 4, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_SET, DSP_SO03_INTRDS, 3, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_SET, DSP_SO02_INTRDS, 2, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_SET, DSP_SO01_INTRDS, 1, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_SET, DSP_SO00_INTRDS, 0, 1)
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|
RegFunc(AUD_DSP_ESR_SO10, 0x00243500, AUD_DSP_ESR_SO10_INT_CLEAR, 0x8, AUD_DSP_ESR_SO10_INT_CLEAR, 0x243508)
|
|
FldFunc(AUD_DSP_ESR_SO10_INT_CLEAR, DSP_SO31_INTRDS, 31, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_CLEAR, DSP_SO30_INTRDS, 30, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_CLEAR, DSP_SO29_INTRDS, 29, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_INT_CLEAR, DSP_SO28_INTRDS, 28, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_INT_CLEAR, DSP_SO27_INTRDS, 27, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_CLEAR, DSP_SO26_INTRDS, 26, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_CLEAR, DSP_SO25_INTRDS, 25, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_INT_CLEAR, DSP_SO24_INTRDS, 24, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_CLEAR, DSP_SO23_INTRDS, 23, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_CLEAR, DSP_SO22_INTRDS, 22, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_CLEAR, DSP_SO21_INTRDS, 21, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_CLEAR, DSP_SO20_INTRDS, 20, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_CLEAR, DSP_SO19_INTRDS, 19, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_CLEAR, DSP_SO18_INTRDS, 18, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_CLEAR, DSP_SO17_INTRDS, 17, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_CLEAR, DSP_SO16_INTRDS, 16, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_CLEAR, DSP_SO15_INTRDS, 15, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_CLEAR, DSP_SO14_INTRDS, 14, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_CLEAR, DSP_SO13_INTRDS, 13, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_CLEAR, DSP_SO12_INTRDS, 12, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_CLEAR, DSP_SO11_INTRDS, 11, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_CLEAR, DSP_SO10_INTRDS, 10, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_CLEAR, DSP_SO09_INTRDS, 9, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_CLEAR, DSP_SO08_INTRDS, 8, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_CLEAR, DSP_SO07_INTRDS, 7, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_CLEAR, DSP_SO06_INTRDS, 6, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_CLEAR, DSP_SO05_INTRDS, 5, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_CLEAR, DSP_SO04_INTRDS, 4, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_CLEAR, DSP_SO03_INTRDS, 3, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_CLEAR, DSP_SO02_INTRDS, 2, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_INT_CLEAR, DSP_SO01_INTRDS, 1, 1)
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FldFunc(AUD_DSP_ESR_SO10_INT_CLEAR, DSP_SO00_INTRDS, 0, 1)
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RegFunc(AUD_DSP_ESR_SO10, 0x00243500, AUD_DSP_ESR_SO10_MASK_STATUS, 0xc, AUD_DSP_ESR_SO10_MASK_STATUS, 0x24350c)
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FldFunc(AUD_DSP_ESR_SO10_MASK_STATUS, DSP_SO31_MASK, 31, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_STATUS, DSP_SO30_MASK, 30, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_STATUS, DSP_SO29_MASK, 29, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_STATUS, DSP_SO28_MASK, 28, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_STATUS, DSP_SO27_MASK, 27, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_STATUS, DSP_SO26_MASK, 26, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_STATUS, DSP_SO25_MASK, 25, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_STATUS, DSP_SO24_MASK, 24, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_STATUS, DSP_SO23_MASK, 23, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_STATUS, DSP_SO22_MASK, 22, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_STATUS, DSP_SO21_MASK, 21, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_STATUS, DSP_SO20_MASK, 20, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_STATUS, DSP_SO19_MASK, 19, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_STATUS, DSP_SO18_MASK, 18, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_STATUS, DSP_SO17_MASK, 17, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_STATUS, DSP_SO16_MASK, 16, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_STATUS, DSP_SO15_MASK, 15, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_STATUS, DSP_SO14_MASK, 14, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_STATUS, DSP_SO13_MASK, 13, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_STATUS, DSP_SO12_MASK, 12, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_STATUS, DSP_SO11_MASK, 11, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_STATUS, DSP_SO10_MASK, 10, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_STATUS, DSP_SO09_MASK, 9, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_STATUS, DSP_SO08_MASK, 8, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_STATUS, DSP_SO07_MASK, 7, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_STATUS, DSP_SO06_MASK, 6, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_STATUS, DSP_SO05_MASK, 5, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_STATUS, DSP_SO04_MASK, 4, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_STATUS, DSP_SO03_MASK, 3, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_STATUS, DSP_SO02_MASK, 2, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_STATUS, DSP_SO01_MASK, 1, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_STATUS, DSP_SO00_MASK, 0, 1)
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RegFunc(AUD_DSP_ESR_SO10, 0x00243500, AUD_DSP_ESR_SO10_MASK_SET, 0x10, AUD_DSP_ESR_SO10_MASK_SET, 0x243510)
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FldFunc(AUD_DSP_ESR_SO10_MASK_SET, DSP_SO31_MASK, 31, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_SET, DSP_SO30_MASK, 30, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_SET, DSP_SO29_MASK, 29, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_SET, DSP_SO28_MASK, 28, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_SET, DSP_SO27_MASK, 27, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_SET, DSP_SO26_MASK, 26, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_SET, DSP_SO25_MASK, 25, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_SET, DSP_SO24_MASK, 24, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_MASK_SET, DSP_SO23_MASK, 23, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_MASK_SET, DSP_SO22_MASK, 22, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_MASK_SET, DSP_SO21_MASK, 21, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_MASK_SET, DSP_SO20_MASK, 20, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_SET, DSP_SO19_MASK, 19, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_SET, DSP_SO18_MASK, 18, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_SET, DSP_SO17_MASK, 17, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_SET, DSP_SO16_MASK, 16, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_SET, DSP_SO15_MASK, 15, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_SET, DSP_SO14_MASK, 14, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_MASK_SET, DSP_SO13_MASK, 13, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_MASK_SET, DSP_SO12_MASK, 12, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_MASK_SET, DSP_SO11_MASK, 11, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_SET, DSP_SO10_MASK, 10, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_MASK_SET, DSP_SO09_MASK, 9, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_MASK_SET, DSP_SO08_MASK, 8, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_MASK_SET, DSP_SO07_MASK, 7, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_MASK_SET, DSP_SO06_MASK, 6, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_MASK_SET, DSP_SO05_MASK, 5, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_MASK_SET, DSP_SO04_MASK, 4, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_MASK_SET, DSP_SO03_MASK, 3, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_MASK_SET, DSP_SO02_MASK, 2, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_MASK_SET, DSP_SO01_MASK, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_SO10_MASK_SET, DSP_SO00_MASK, 0, 1)
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|
RegFunc(AUD_DSP_ESR_SO10, 0x00243500, AUD_DSP_ESR_SO10_MASK_CLEAR, 0x14, AUD_DSP_ESR_SO10_MASK_CLEAR, 0x243514)
|
|
FldFunc(AUD_DSP_ESR_SO10_MASK_CLEAR, DSP_SO31_MASK, 31, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_MASK_CLEAR, DSP_SO30_MASK, 30, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_MASK_CLEAR, DSP_SO29_MASK, 29, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_MASK_CLEAR, DSP_SO28_MASK, 28, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_CLEAR, DSP_SO27_MASK, 27, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_CLEAR, DSP_SO26_MASK, 26, 1)
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FldFunc(AUD_DSP_ESR_SO10_MASK_CLEAR, DSP_SO25_MASK, 25, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_MASK_CLEAR, DSP_SO24_MASK, 24, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_MASK_CLEAR, DSP_SO23_MASK, 23, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_MASK_CLEAR, DSP_SO22_MASK, 22, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_MASK_CLEAR, DSP_SO21_MASK, 21, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_MASK_CLEAR, DSP_SO20_MASK, 20, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_MASK_CLEAR, DSP_SO19_MASK, 19, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_MASK_CLEAR, DSP_SO18_MASK, 18, 1)
|
|
FldFunc(AUD_DSP_ESR_SO10_MASK_CLEAR, DSP_SO17_MASK, 17, 1)
|
|
FldFunc(AUD_DSP_ESR_SO10_MASK_CLEAR, DSP_SO16_MASK, 16, 1)
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|
FldFunc(AUD_DSP_ESR_SO10_MASK_CLEAR, DSP_SO15_MASK, 15, 1)
|
|
FldFunc(AUD_DSP_ESR_SO10_MASK_CLEAR, DSP_SO14_MASK, 14, 1)
|
|
FldFunc(AUD_DSP_ESR_SO10_MASK_CLEAR, DSP_SO13_MASK, 13, 1)
|
|
FldFunc(AUD_DSP_ESR_SO10_MASK_CLEAR, DSP_SO12_MASK, 12, 1)
|
|
FldFunc(AUD_DSP_ESR_SO10_MASK_CLEAR, DSP_SO11_MASK, 11, 1)
|
|
FldFunc(AUD_DSP_ESR_SO10_MASK_CLEAR, DSP_SO10_MASK, 10, 1)
|
|
FldFunc(AUD_DSP_ESR_SO10_MASK_CLEAR, DSP_SO09_MASK, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_SO10_MASK_CLEAR, DSP_SO08_MASK, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_SO10_MASK_CLEAR, DSP_SO07_MASK, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_SO10_MASK_CLEAR, DSP_SO06_MASK, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_SO10_MASK_CLEAR, DSP_SO05_MASK, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_SO10_MASK_CLEAR, DSP_SO04_MASK, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_SO10_MASK_CLEAR, DSP_SO03_MASK, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_SO10_MASK_CLEAR, DSP_SO02_MASK, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_SO10_MASK_CLEAR, DSP_SO01_MASK, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_SO10_MASK_CLEAR, DSP_SO00_MASK, 0, 1)
|
|
|
|
RegAreaFunc(AUD_DSP_ESR_SO20_BASE, 0x00243600, 0x00243614)
|
|
RegFunc(AUD_DSP_ESR_SO20, 0x00243600, AUD_DSP_ESR_SO20_INT_STATUS, 0x0, AUD_DSP_ESR_SO20_INT_STATUS, 0x243600)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_STATUS, DSP_SO31_INTRDS, 31, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_STATUS, DSP_SO30_INTRDS, 30, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_STATUS, DSP_SO29_INTRDS, 29, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_STATUS, DSP_SO28_INTRDS, 28, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_STATUS, DSP_SO27_INTRDS, 27, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_STATUS, DSP_SO26_INTRDS, 26, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_STATUS, DSP_SO25_INTRDS, 25, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_STATUS, DSP_SO24_INTRDS, 24, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_STATUS, DSP_SO23_INTRDS, 23, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_STATUS, DSP_SO22_INTRDS, 22, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_STATUS, DSP_SO21_INTRDS, 21, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_STATUS, DSP_SO20_INTRDS, 20, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_STATUS, DSP_SO19_INTRDS, 19, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_STATUS, DSP_SO18_INTRDS, 18, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_STATUS, DSP_SO17_INTRDS, 17, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_STATUS, DSP_SO16_INTRDS, 16, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_STATUS, DSP_SO15_INTRDS, 15, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_STATUS, DSP_SO14_INTRDS, 14, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_STATUS, DSP_SO13_INTRDS, 13, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_STATUS, DSP_SO12_INTRDS, 12, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_STATUS, DSP_SO11_INTRDS, 11, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_STATUS, DSP_SO10_INTRDS, 10, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_STATUS, DSP_SO09_INTRDS, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_STATUS, DSP_SO08_INTRDS, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_STATUS, DSP_SO07_INTRDS, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_STATUS, DSP_SO06_INTRDS, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_STATUS, DSP_SO05_INTRDS, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_STATUS, DSP_SO04_INTRDS, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_STATUS, DSP_SO03_INTRDS, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_STATUS, DSP_SO02_INTRDS, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_STATUS, DSP_SO01_INTRDS, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_STATUS, DSP_SO00_INTRDS, 0, 1)
|
|
RegFunc(AUD_DSP_ESR_SO20, 0x00243600, AUD_DSP_ESR_SO20_INT_SET, 0x4, AUD_DSP_ESR_SO20_INT_SET, 0x243604)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_SET, DSP_SO31_INTRDS, 31, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_SET, DSP_SO30_INTRDS, 30, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_SET, DSP_SO29_INTRDS, 29, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_SET, DSP_SO28_INTRDS, 28, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_SET, DSP_SO27_INTRDS, 27, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_SET, DSP_SO26_INTRDS, 26, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_SET, DSP_SO25_INTRDS, 25, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_SET, DSP_SO24_INTRDS, 24, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_SET, DSP_SO23_INTRDS, 23, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_SET, DSP_SO22_INTRDS, 22, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_SET, DSP_SO21_INTRDS, 21, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_SET, DSP_SO20_INTRDS, 20, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_SET, DSP_SO19_INTRDS, 19, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_SET, DSP_SO18_INTRDS, 18, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_SET, DSP_SO17_INTRDS, 17, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_SET, DSP_SO16_INTRDS, 16, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_SET, DSP_SO15_INTRDS, 15, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_SET, DSP_SO14_INTRDS, 14, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_SET, DSP_SO13_INTRDS, 13, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_SET, DSP_SO12_INTRDS, 12, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_SET, DSP_SO11_INTRDS, 11, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_SET, DSP_SO10_INTRDS, 10, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_SET, DSP_SO09_INTRDS, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_SET, DSP_SO08_INTRDS, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_SET, DSP_SO07_INTRDS, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_SET, DSP_SO06_INTRDS, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_SET, DSP_SO05_INTRDS, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_SET, DSP_SO04_INTRDS, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_SET, DSP_SO03_INTRDS, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_SET, DSP_SO02_INTRDS, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_SET, DSP_SO01_INTRDS, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_SET, DSP_SO00_INTRDS, 0, 1)
|
|
RegFunc(AUD_DSP_ESR_SO20, 0x00243600, AUD_DSP_ESR_SO20_INT_CLEAR, 0x8, AUD_DSP_ESR_SO20_INT_CLEAR, 0x243608)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_CLEAR, DSP_SO31_INTRDS, 31, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_CLEAR, DSP_SO30_INTRDS, 30, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_CLEAR, DSP_SO29_INTRDS, 29, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_CLEAR, DSP_SO28_INTRDS, 28, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_CLEAR, DSP_SO27_INTRDS, 27, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_CLEAR, DSP_SO26_INTRDS, 26, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_CLEAR, DSP_SO25_INTRDS, 25, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_CLEAR, DSP_SO24_INTRDS, 24, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_CLEAR, DSP_SO23_INTRDS, 23, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_CLEAR, DSP_SO22_INTRDS, 22, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_CLEAR, DSP_SO21_INTRDS, 21, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_CLEAR, DSP_SO20_INTRDS, 20, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_CLEAR, DSP_SO19_INTRDS, 19, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_CLEAR, DSP_SO18_INTRDS, 18, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_CLEAR, DSP_SO17_INTRDS, 17, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_CLEAR, DSP_SO16_INTRDS, 16, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_CLEAR, DSP_SO15_INTRDS, 15, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_CLEAR, DSP_SO14_INTRDS, 14, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_CLEAR, DSP_SO13_INTRDS, 13, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_CLEAR, DSP_SO12_INTRDS, 12, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_CLEAR, DSP_SO11_INTRDS, 11, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_CLEAR, DSP_SO10_INTRDS, 10, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_CLEAR, DSP_SO09_INTRDS, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_CLEAR, DSP_SO08_INTRDS, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_CLEAR, DSP_SO07_INTRDS, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_CLEAR, DSP_SO06_INTRDS, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_CLEAR, DSP_SO05_INTRDS, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_CLEAR, DSP_SO04_INTRDS, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_CLEAR, DSP_SO03_INTRDS, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_CLEAR, DSP_SO02_INTRDS, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_CLEAR, DSP_SO01_INTRDS, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_INT_CLEAR, DSP_SO00_INTRDS, 0, 1)
|
|
RegFunc(AUD_DSP_ESR_SO20, 0x00243600, AUD_DSP_ESR_SO20_MASK_STATUS, 0xc, AUD_DSP_ESR_SO20_MASK_STATUS, 0x24360c)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_STATUS, DSP_SO31_MASK, 31, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_STATUS, DSP_SO30_MASK, 30, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_STATUS, DSP_SO29_MASK, 29, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_STATUS, DSP_SO28_MASK, 28, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_STATUS, DSP_SO27_MASK, 27, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_STATUS, DSP_SO26_MASK, 26, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_STATUS, DSP_SO25_MASK, 25, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_STATUS, DSP_SO24_MASK, 24, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_STATUS, DSP_SO23_MASK, 23, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_STATUS, DSP_SO22_MASK, 22, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_STATUS, DSP_SO21_MASK, 21, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_STATUS, DSP_SO20_MASK, 20, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_STATUS, DSP_SO19_MASK, 19, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_STATUS, DSP_SO18_MASK, 18, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_STATUS, DSP_SO17_MASK, 17, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_STATUS, DSP_SO16_MASK, 16, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_STATUS, DSP_SO15_MASK, 15, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_STATUS, DSP_SO14_MASK, 14, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_STATUS, DSP_SO13_MASK, 13, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_STATUS, DSP_SO12_MASK, 12, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_STATUS, DSP_SO11_MASK, 11, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_STATUS, DSP_SO10_MASK, 10, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_STATUS, DSP_SO09_MASK, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_STATUS, DSP_SO08_MASK, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_STATUS, DSP_SO07_MASK, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_STATUS, DSP_SO06_MASK, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_STATUS, DSP_SO05_MASK, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_STATUS, DSP_SO04_MASK, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_STATUS, DSP_SO03_MASK, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_STATUS, DSP_SO02_MASK, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_STATUS, DSP_SO01_MASK, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_STATUS, DSP_SO00_MASK, 0, 1)
|
|
RegFunc(AUD_DSP_ESR_SO20, 0x00243600, AUD_DSP_ESR_SO20_MASK_SET, 0x10, AUD_DSP_ESR_SO20_MASK_SET, 0x243610)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_SET, DSP_SO31_MASK, 31, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_SET, DSP_SO30_MASK, 30, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_SET, DSP_SO29_MASK, 29, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_SET, DSP_SO28_MASK, 28, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_SET, DSP_SO27_MASK, 27, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_SET, DSP_SO26_MASK, 26, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_SET, DSP_SO25_MASK, 25, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_SET, DSP_SO24_MASK, 24, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_SET, DSP_SO23_MASK, 23, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_SET, DSP_SO22_MASK, 22, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_SET, DSP_SO21_MASK, 21, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_SET, DSP_SO20_MASK, 20, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_SET, DSP_SO19_MASK, 19, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_SET, DSP_SO18_MASK, 18, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_SET, DSP_SO17_MASK, 17, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_SET, DSP_SO16_MASK, 16, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_SET, DSP_SO15_MASK, 15, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_SET, DSP_SO14_MASK, 14, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_SET, DSP_SO13_MASK, 13, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_SET, DSP_SO12_MASK, 12, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_SET, DSP_SO11_MASK, 11, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_SET, DSP_SO10_MASK, 10, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_SET, DSP_SO09_MASK, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_SET, DSP_SO08_MASK, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_SET, DSP_SO07_MASK, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_SET, DSP_SO06_MASK, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_SET, DSP_SO05_MASK, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_SET, DSP_SO04_MASK, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_SET, DSP_SO03_MASK, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_SET, DSP_SO02_MASK, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_SET, DSP_SO01_MASK, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_SET, DSP_SO00_MASK, 0, 1)
|
|
RegFunc(AUD_DSP_ESR_SO20, 0x00243600, AUD_DSP_ESR_SO20_MASK_CLEAR, 0x14, AUD_DSP_ESR_SO20_MASK_CLEAR, 0x243614)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_CLEAR, DSP_SO31_MASK, 31, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_CLEAR, DSP_SO30_MASK, 30, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_CLEAR, DSP_SO29_MASK, 29, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_CLEAR, DSP_SO28_MASK, 28, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_CLEAR, DSP_SO27_MASK, 27, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_CLEAR, DSP_SO26_MASK, 26, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_CLEAR, DSP_SO25_MASK, 25, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_CLEAR, DSP_SO24_MASK, 24, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_CLEAR, DSP_SO23_MASK, 23, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_CLEAR, DSP_SO22_MASK, 22, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_CLEAR, DSP_SO21_MASK, 21, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_CLEAR, DSP_SO20_MASK, 20, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_CLEAR, DSP_SO19_MASK, 19, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_CLEAR, DSP_SO18_MASK, 18, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_CLEAR, DSP_SO17_MASK, 17, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_CLEAR, DSP_SO16_MASK, 16, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_CLEAR, DSP_SO15_MASK, 15, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_CLEAR, DSP_SO14_MASK, 14, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_CLEAR, DSP_SO13_MASK, 13, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_CLEAR, DSP_SO12_MASK, 12, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_CLEAR, DSP_SO11_MASK, 11, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_CLEAR, DSP_SO10_MASK, 10, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_CLEAR, DSP_SO09_MASK, 9, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_CLEAR, DSP_SO08_MASK, 8, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_CLEAR, DSP_SO07_MASK, 7, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_CLEAR, DSP_SO06_MASK, 6, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_CLEAR, DSP_SO05_MASK, 5, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_CLEAR, DSP_SO04_MASK, 4, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_CLEAR, DSP_SO03_MASK, 3, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_CLEAR, DSP_SO02_MASK, 2, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_CLEAR, DSP_SO01_MASK, 1, 1)
|
|
FldFunc(AUD_DSP_ESR_SO20_MASK_CLEAR, DSP_SO00_MASK, 0, 1)
|
|
|
|
RegAreaFunc(AIO_MISC_BASE, 0x00260000, 0x0026000c)
|
|
RegFunc(AIO_MISC, 0x00260000, AIO_MISC_REVISION, 0x0, AIO_MISC_REVISION, 0x260000)
|
|
FldFunc(AIO_MISC_REVISION, MAJOR, 8, 8)
|
|
FldFunc(AIO_MISC_REVISION, MINOR, 0, 8)
|
|
RegFunc(AIO_MISC, 0x00260000, AIO_MISC_RESET, 0x4, AIO_MISC_RESET, 0x260004)
|
|
FldFunc(AIO_MISC_RESET, RESET_FMM_B, 2, 1)
|
|
RegFunc(AIO_MISC, 0x00260000, AIO_MISC_TPMUX, 0x8, AIO_MISC_TPMUX, 0x260008)
|
|
|
|
RegAreaFunc(AIO_INTH_BASE, 0x00260800, 0x0026082c)
|
|
RegFunc(AIO_INTH, 0x00260800, AIO_INTH_R5F_STATUS, 0x0, AIO_INTH_R5F_STATUS, 0x260800)
|
|
FldFunc(AIO_INTH_R5F_STATUS, FMM_BFFM, 4, 1)
|
|
FldFunc(AIO_INTH_R5F_STATUS, FMM_DP0FM, 3, 1)
|
|
FldFunc(AIO_INTH_R5F_STATUS, FMM_DP1FM, 2, 1)
|
|
FldFunc(AIO_INTH_R5F_STATUS, FMM_MSFM, 1, 1)
|
|
FldFunc(AIO_INTH_R5F_STATUS, FMM_OPFM, 0, 1)
|
|
RegFunc(AIO_INTH, 0x00260800, AIO_INTH_R5F_SET, 0x4, AIO_INTH_R5F_SET, 0x260804)
|
|
FldFunc(AIO_INTH_R5F_SET, FMM_BFFM, 4, 1)
|
|
FldFunc(AIO_INTH_R5F_SET, FMM_DP0FM, 3, 1)
|
|
FldFunc(AIO_INTH_R5F_SET, FMM_DP1FM, 2, 1)
|
|
FldFunc(AIO_INTH_R5F_SET, FMM_MSFM, 1, 1)
|
|
FldFunc(AIO_INTH_R5F_SET, FMM_OPFM, 0, 1)
|
|
RegFunc(AIO_INTH, 0x00260800, AIO_INTH_R5F_CLEAR, 0x8, AIO_INTH_R5F_CLEAR, 0x260808)
|
|
FldFunc(AIO_INTH_R5F_CLEAR, FMM_BFFM, 4, 1)
|
|
FldFunc(AIO_INTH_R5F_CLEAR, FMM_DP0FM, 3, 1)
|
|
FldFunc(AIO_INTH_R5F_CLEAR, FMM_DP1FM, 2, 1)
|
|
FldFunc(AIO_INTH_R5F_CLEAR, FMM_MSFM, 1, 1)
|
|
FldFunc(AIO_INTH_R5F_CLEAR, FMM_OPFM, 0, 1)
|
|
RegFunc(AIO_INTH, 0x00260800, AIO_INTH_R5F_MASK_STATUS, 0xc, AIO_INTH_R5F_MASK_STATUS, 0x26080c)
|
|
FldFunc(AIO_INTH_R5F_MASK_STATUS, FMM_BFFM, 4, 1)
|
|
FldFunc(AIO_INTH_R5F_MASK_STATUS, FMM_DP0FM, 3, 1)
|
|
FldFunc(AIO_INTH_R5F_MASK_STATUS, FMM_DP1FM, 2, 1)
|
|
FldFunc(AIO_INTH_R5F_MASK_STATUS, FMM_MSFM, 1, 1)
|
|
FldFunc(AIO_INTH_R5F_MASK_STATUS, FMM_OPFM, 0, 1)
|
|
RegFunc(AIO_INTH, 0x00260800, AIO_INTH_R5F_MASK_SET, 0x10, AIO_INTH_R5F_MASK_SET, 0x260810)
|
|
FldFunc(AIO_INTH_R5F_MASK_SET, FMM_BFFM, 4, 1)
|
|
FldFunc(AIO_INTH_R5F_MASK_SET, FMM_DP0FM, 3, 1)
|
|
FldFunc(AIO_INTH_R5F_MASK_SET, FMM_DP1FM, 2, 1)
|
|
FldFunc(AIO_INTH_R5F_MASK_SET, FMM_MSFM, 1, 1)
|
|
FldFunc(AIO_INTH_R5F_MASK_SET, FMM_OPFM, 0, 1)
|
|
RegFunc(AIO_INTH, 0x00260800, AIO_INTH_R5F_MASK_CLEAR, 0x14, AIO_INTH_R5F_MASK_CLEAR, 0x260814)
|
|
FldFunc(AIO_INTH_R5F_MASK_CLEAR, FMM_BFFM, 4, 1)
|
|
FldFunc(AIO_INTH_R5F_MASK_CLEAR, FMM_DP0FM, 3, 1)
|
|
FldFunc(AIO_INTH_R5F_MASK_CLEAR, FMM_DP1FM, 2, 1)
|
|
FldFunc(AIO_INTH_R5F_MASK_CLEAR, FMM_MSFM, 1, 1)
|
|
FldFunc(AIO_INTH_R5F_MASK_CLEAR, FMM_OPFM, 0, 1)
|
|
RegFunc(AIO_INTH, 0x00260800, AIO_INTH_PCI_STATUS, 0x18, AIO_INTH_PCI_STATUS, 0x260818)
|
|
FldFunc(AIO_INTH_PCI_STATUS, FMM_BFFM, 4, 1)
|
|
FldFunc(AIO_INTH_PCI_STATUS, FMM_DP0FM, 3, 1)
|
|
FldFunc(AIO_INTH_PCI_STATUS, FMM_DP1FM, 2, 1)
|
|
FldFunc(AIO_INTH_PCI_STATUS, FMM_MSFM, 1, 1)
|
|
FldFunc(AIO_INTH_PCI_STATUS, FMM_OPFM, 0, 1)
|
|
RegFunc(AIO_INTH, 0x00260800, AIO_INTH_PCI_SET, 0x1c, AIO_INTH_PCI_SET, 0x26081c)
|
|
FldFunc(AIO_INTH_PCI_SET, FMM_BFFM, 4, 1)
|
|
FldFunc(AIO_INTH_PCI_SET, FMM_DP0FM, 3, 1)
|
|
FldFunc(AIO_INTH_PCI_SET, FMM_DP1FM, 2, 1)
|
|
FldFunc(AIO_INTH_PCI_SET, FMM_MSFM, 1, 1)
|
|
FldFunc(AIO_INTH_PCI_SET, FMM_OPFM, 0, 1)
|
|
RegFunc(AIO_INTH, 0x00260800, AIO_INTH_PCI_CLEAR, 0x20, AIO_INTH_PCI_CLEAR, 0x260820)
|
|
FldFunc(AIO_INTH_PCI_CLEAR, FMM_BFFM, 4, 1)
|
|
FldFunc(AIO_INTH_PCI_CLEAR, FMM_DP0FM, 3, 1)
|
|
FldFunc(AIO_INTH_PCI_CLEAR, FMM_DP1FM, 2, 1)
|
|
FldFunc(AIO_INTH_PCI_CLEAR, FMM_MSFM, 1, 1)
|
|
FldFunc(AIO_INTH_PCI_CLEAR, FMM_OPFM, 0, 1)
|
|
RegFunc(AIO_INTH, 0x00260800, AIO_INTH_PCI_MASK_STATUS, 0x24, AIO_INTH_PCI_MASK_STATUS, 0x260824)
|
|
FldFunc(AIO_INTH_PCI_MASK_STATUS, FMM_BFFM, 4, 1)
|
|
FldFunc(AIO_INTH_PCI_MASK_STATUS, FMM_DP0FM, 3, 1)
|
|
FldFunc(AIO_INTH_PCI_MASK_STATUS, FMM_DP1FM, 2, 1)
|
|
FldFunc(AIO_INTH_PCI_MASK_STATUS, FMM_MSFM, 1, 1)
|
|
FldFunc(AIO_INTH_PCI_MASK_STATUS, FMM_OPFM, 0, 1)
|
|
RegFunc(AIO_INTH, 0x00260800, AIO_INTH_PCI_MASK_SET, 0x28, AIO_INTH_PCI_MASK_SET, 0x260828)
|
|
FldFunc(AIO_INTH_PCI_MASK_SET, FMM_BFFM, 4, 1)
|
|
FldFunc(AIO_INTH_PCI_MASK_SET, FMM_DP0FM, 3, 1)
|
|
FldFunc(AIO_INTH_PCI_MASK_SET, FMM_DP1FM, 2, 1)
|
|
FldFunc(AIO_INTH_PCI_MASK_SET, FMM_MSFM, 1, 1)
|
|
FldFunc(AIO_INTH_PCI_MASK_SET, FMM_OPFM, 0, 1)
|
|
RegFunc(AIO_INTH, 0x00260800, AIO_INTH_PCI_MASK_CLEAR, 0x2c, AIO_INTH_PCI_MASK_CLEAR, 0x26082c)
|
|
FldFunc(AIO_INTH_PCI_MASK_CLEAR, FMM_BFFM, 4, 1)
|
|
FldFunc(AIO_INTH_PCI_MASK_CLEAR, FMM_DP0FM, 3, 1)
|
|
FldFunc(AIO_INTH_PCI_MASK_CLEAR, FMM_DP1FM, 2, 1)
|
|
FldFunc(AIO_INTH_PCI_MASK_CLEAR, FMM_MSFM, 1, 1)
|
|
FldFunc(AIO_INTH_PCI_MASK_CLEAR, FMM_OPFM, 0, 1)
|
|
|
|
RegAreaFunc(AIO_INTD0_BASE, 0x00260a00, 0x00260a14)
|
|
RegFunc(AIO_INTD0, 0x00260a00, AIO_INTD0_INT_STATUS, 0x0, AIO_INTD0_INT_STATUS, 0x260a00)
|
|
FldFunc(AIO_INTD0_INT_STATUS, FMM_BFFM, 4, 1)
|
|
FldFunc(AIO_INTD0_INT_STATUS, FMM_DP0FM, 3, 1)
|
|
FldFunc(AIO_INTD0_INT_STATUS, FMM_DP1FM, 2, 1)
|
|
FldFunc(AIO_INTD0_INT_STATUS, FMM_MSFM, 1, 1)
|
|
FldFunc(AIO_INTD0_INT_STATUS, FMM_OPFM, 0, 1)
|
|
RegFunc(AIO_INTD0, 0x00260a00, AIO_INTD0_INT_SET, 0x4, AIO_INTD0_INT_SET, 0x260a04)
|
|
FldFunc(AIO_INTD0_INT_SET, FMM_BFFM, 4, 1)
|
|
FldFunc(AIO_INTD0_INT_SET, FMM_DP0FM, 3, 1)
|
|
FldFunc(AIO_INTD0_INT_SET, FMM_DP1FM, 2, 1)
|
|
FldFunc(AIO_INTD0_INT_SET, FMM_MSFM, 1, 1)
|
|
FldFunc(AIO_INTD0_INT_SET, FMM_OPFM, 0, 1)
|
|
RegFunc(AIO_INTD0, 0x00260a00, AIO_INTD0_INT_CLEAR, 0x8, AIO_INTD0_INT_CLEAR, 0x260a08)
|
|
FldFunc(AIO_INTD0_INT_CLEAR, FMM_BFFM, 4, 1)
|
|
FldFunc(AIO_INTD0_INT_CLEAR, FMM_DP0FM, 3, 1)
|
|
FldFunc(AIO_INTD0_INT_CLEAR, FMM_DP1FM, 2, 1)
|
|
FldFunc(AIO_INTD0_INT_CLEAR, FMM_MSFM, 1, 1)
|
|
FldFunc(AIO_INTD0_INT_CLEAR, FMM_OPFM, 0, 1)
|
|
RegFunc(AIO_INTD0, 0x00260a00, AIO_INTD0_MASK_STATUS, 0xc, AIO_INTD0_MASK_STATUS, 0x260a0c)
|
|
FldFunc(AIO_INTD0_MASK_STATUS, FMM_BFFM, 4, 1)
|
|
FldFunc(AIO_INTD0_MASK_STATUS, FMM_DP0FM, 3, 1)
|
|
FldFunc(AIO_INTD0_MASK_STATUS, FMM_DP1FM, 2, 1)
|
|
FldFunc(AIO_INTD0_MASK_STATUS, FMM_MSFM, 1, 1)
|
|
FldFunc(AIO_INTD0_MASK_STATUS, FMM_OPFM, 0, 1)
|
|
RegFunc(AIO_INTD0, 0x00260a00, AIO_INTD0_MASK_SET, 0x10, AIO_INTD0_MASK_SET, 0x260a10)
|
|
FldFunc(AIO_INTD0_MASK_SET, FMM_BFFM, 4, 1)
|
|
FldFunc(AIO_INTD0_MASK_SET, FMM_DP0FM, 3, 1)
|
|
FldFunc(AIO_INTD0_MASK_SET, FMM_DP1FM, 2, 1)
|
|
FldFunc(AIO_INTD0_MASK_SET, FMM_MSFM, 1, 1)
|
|
FldFunc(AIO_INTD0_MASK_SET, FMM_OPFM, 0, 1)
|
|
RegFunc(AIO_INTD0, 0x00260a00, AIO_INTD0_MASK_CLEAR, 0x14, AIO_INTD0_MASK_CLEAR, 0x260a14)
|
|
FldFunc(AIO_INTD0_MASK_CLEAR, FMM_BFFM, 4, 1)
|
|
FldFunc(AIO_INTD0_MASK_CLEAR, FMM_DP0FM, 3, 1)
|
|
FldFunc(AIO_INTD0_MASK_CLEAR, FMM_DP1FM, 2, 1)
|
|
FldFunc(AIO_INTD0_MASK_CLEAR, FMM_MSFM, 1, 1)
|
|
FldFunc(AIO_INTD0_MASK_CLEAR, FMM_OPFM, 0, 1)
|
|
|
|
RegAreaFunc(AUD_FMM_MISC_BASE, 0x00270000, 0x002700f8)
|
|
RegFunc(AUD_FMM_MISC, 0x00270000, AUD_FMM_MISC_REVISION, 0x0, AUD_FMM_MISC_REVISION, 0x270000)
|
|
FldFunc(AUD_FMM_MISC_REVISION, MAJOR, 8, 8)
|
|
FldFunc(AUD_FMM_MISC_REVISION, MINOR, 0, 8)
|
|
RegFunc(AUD_FMM_MISC, 0x00270000, AUD_FMM_MISC_RESET, 0x4, AUD_FMM_MISC_RESET, 0x270004)
|
|
FldFunc(AUD_FMM_MISC_RESET, FMM_MS_OPER_ENABLE, 26, 1)
|
|
FldFunc(AUD_FMM_MISC_RESET, FMM_DP_OPER_ENABLE, 25, 1)
|
|
FldFunc(AUD_FMM_MISC_RESET, FMM_BF_OPER_ENABLE, 24, 1)
|
|
FldFunc(AUD_FMM_MISC_RESET, RESET_TOP_LOGIC_B, 16, 1)
|
|
FldFunc(AUD_FMM_MISC_RESET, RESET_OP_LOGIC_B, 13, 1)
|
|
FldFunc(AUD_FMM_MISC_RESET, RESET_OP_REGS_B, 12, 1)
|
|
FldFunc(AUD_FMM_MISC_RESET, RESET_MS_PROC_B, 10, 1)
|
|
FldFunc(AUD_FMM_MISC_RESET, RESET_MS_LOGIC_B, 9, 1)
|
|
FldFunc(AUD_FMM_MISC_RESET, RESET_MS_REGS_B, 8, 1)
|
|
FldFunc(AUD_FMM_MISC_RESET, RESET_DP_LOGIC_B, 5, 1)
|
|
FldFunc(AUD_FMM_MISC_RESET, RESET_DP_REGS_B, 4, 1)
|
|
FldFunc(AUD_FMM_MISC_RESET, RESET_BF_LOGIC_B, 1, 1)
|
|
FldFunc(AUD_FMM_MISC_RESET, RESET_BF_REGS_B, 0, 1)
|
|
RegFunc(AUD_FMM_MISC, 0x00270000, AUD_FMM_MISC_TEST_CTRL, 0x8, AUD_FMM_MISC_TEST_CTRL, 0x270008)
|
|
FldFunc(AUD_FMM_MISC_TEST_CTRL, DP_ARB_SMD, 10, 2)
|
|
FldFunc(AUD_FMM_MISC_TEST_CTRL, RESET_DP_ARB_SM, 8, 1)
|
|
FldFunc(AUD_FMM_MISC_TEST_CTRL, DIAG_SEL, 0, 3)
|
|
RegFunc(AUD_FMM_MISC, 0x00270000, AUD_FMM_MISC_STC_UPPER, 0x80, AUD_FMM_MISC_STC_UPPER, 0x270080)
|
|
FldFunc(AUD_FMM_MISC_STC_UPPER, STC_COUNT_UPPER, 0, 32)
|
|
RegFunc(AUD_FMM_MISC, 0x00270000, AUD_FMM_MISC_SEROUT_SEL, 0xf0, AUD_FMM_MISC_SEROUT_SEL, 0x2700f0)
|
|
FldFunc(AUD_FMM_MISC_SEROUT_SEL, SHARED, 31, 1)
|
|
FldFunc(AUD_FMM_MISC_SEROUT_SEL, SEROUT3_SEL, 12, 2)
|
|
FldFunc(AUD_FMM_MISC_SEROUT_SEL, SEROUT2_SEL, 8, 2)
|
|
FldFunc(AUD_FMM_MISC_SEROUT_SEL, SEROUT1_SEL, 4, 2)
|
|
FldFunc(AUD_FMM_MISC_SEROUT_SEL, SEROUT0_SEL, 0, 2)
|
|
RegFunc(AUD_FMM_MISC, 0x00270000, AUD_FMM_MISC_SEROUT_OE, 0xf4, AUD_FMM_MISC_SEROUT_OE, 0x2700f4)
|
|
FldFunc(AUD_FMM_MISC_SEROUT_OE, LRCK3_OE, 14, 1)
|
|
FldFunc(AUD_FMM_MISC_SEROUT_OE, SCLK3_OE, 13, 1)
|
|
FldFunc(AUD_FMM_MISC_SEROUT_OE, SDAT3_OE, 12, 1)
|
|
FldFunc(AUD_FMM_MISC_SEROUT_OE, LRCK2_OE, 10, 1)
|
|
FldFunc(AUD_FMM_MISC_SEROUT_OE, SCLK2_OE, 9, 1)
|
|
FldFunc(AUD_FMM_MISC_SEROUT_OE, SDAT2_OE, 8, 1)
|
|
FldFunc(AUD_FMM_MISC_SEROUT_OE, LRCK1_OE, 6, 1)
|
|
FldFunc(AUD_FMM_MISC_SEROUT_OE, SCLK1_OE, 5, 1)
|
|
FldFunc(AUD_FMM_MISC_SEROUT_OE, SDAT1_OE, 4, 1)
|
|
FldFunc(AUD_FMM_MISC_SEROUT_OE, LRCK0_OE, 2, 1)
|
|
FldFunc(AUD_FMM_MISC_SEROUT_OE, SCLK0_OE, 1, 1)
|
|
FldFunc(AUD_FMM_MISC_SEROUT_OE, SDAT0_OE, 0, 1)
|
|
RegFunc(AUD_FMM_MISC, 0x00270000, AUD_FMM_MISC_SERIN_SEL, 0xf8, AUD_FMM_MISC_SERIN_SEL, 0x2700f8)
|
|
FldFunc(AUD_FMM_MISC_SERIN_SEL, SOURCE1, 4, 3)
|
|
FldFunc(AUD_FMM_MISC_SERIN_SEL, SOURCE0, 0, 3)
|
|
|
|
RegAreaFunc(AUD_FMM_BF_CTRL_BASE, 0x00271000, 0x0027157c)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_PROCSEQID_0_3, 0x0, AUD_FMM_BF_CTRL_PROCSEQID_0_3, 0x271000)
|
|
FldFunc(AUD_FMM_BF_CTRL_PROCSEQID_0_3, PROCESS_SEQ_ID3_VALID, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_PROCSEQID_0_3, BLOCKED_ACCESS_3_DISABLE, 30, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_PROCSEQID_0_3, PROCESS_ID3_HIGH, 29, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_PROCSEQID_0_3, PROCESS_SEQ_ID_3, 24, 5)
|
|
FldFunc(AUD_FMM_BF_CTRL_PROCSEQID_0_3, PROCESS_SEQ_ID2_VALID, 23, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_PROCSEQID_0_3, BLOCKED_ACCESS_2_DISABLE, 22, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_PROCSEQID_0_3, PROCESS_ID2_HIGH, 21, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_PROCSEQID_0_3, PROCESS_SEQ_ID_2, 16, 5)
|
|
FldFunc(AUD_FMM_BF_CTRL_PROCSEQID_0_3, PROCESS_SEQ_ID1_VALID, 15, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_PROCSEQID_0_3, BLOCKED_ACCESS_1_DISABLE, 14, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_PROCSEQID_0_3, PROCESS_ID1_HIGH, 13, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_PROCSEQID_0_3, PROCESS_SEQ_ID_1, 8, 5)
|
|
FldFunc(AUD_FMM_BF_CTRL_PROCSEQID_0_3, PROCESS_SEQ_ID0_VALID, 7, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_PROCSEQID_0_3, BLOCKED_ACCESS_0_DISABLE, 6, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_PROCSEQID_0_3, PROCESS_ID0_HIGH, 5, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_PROCSEQID_0_3, PROCESS_SEQ_ID_0, 0, 5)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_PROCSEQID_4_7, 0x4, AUD_FMM_BF_CTRL_PROCSEQID_4_7, 0x271004)
|
|
FldFunc(AUD_FMM_BF_CTRL_PROCSEQID_4_7, PROCESS_SEQ_ID7_VALID, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_PROCSEQID_4_7, BLOCKED_ACCESS_7_DISABLE, 30, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_PROCSEQID_4_7, PROCESS_ID7_HIGH, 29, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_PROCSEQID_4_7, PROCESS_SEQ_ID_7, 24, 5)
|
|
FldFunc(AUD_FMM_BF_CTRL_PROCSEQID_4_7, PROCESS_SEQ_ID6_VALID, 23, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_PROCSEQID_4_7, BLOCKED_ACCESS_6_DISABLE, 22, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_PROCSEQID_4_7, PROCESS_ID6_HIGH, 21, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_PROCSEQID_4_7, PROCESS_SEQ_ID_6, 16, 5)
|
|
FldFunc(AUD_FMM_BF_CTRL_PROCSEQID_4_7, PROCESS_SEQ_ID5_VALID, 15, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_PROCSEQID_4_7, BLOCKED_ACCESS_5_DISABLE, 14, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_PROCSEQID_4_7, PROCESS_ID5_HIGH, 13, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_PROCSEQID_4_7, PROCESS_SEQ_ID_5, 8, 5)
|
|
FldFunc(AUD_FMM_BF_CTRL_PROCSEQID_4_7, PROCESS_SEQ_ID4_VALID, 7, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_PROCSEQID_4_7, BLOCKED_ACCESS_4_DISABLE, 6, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_PROCSEQID_4_7, PROCESS_ID4_HIGH, 5, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_PROCSEQID_4_7, PROCESS_SEQ_ID_4, 0, 5)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_BLOCKCNT_RESET_PERIOD, 0x8, AUD_FMM_BF_CTRL_BLOCKCNT_RESET_PERIOD, 0x271008)
|
|
FldFunc(AUD_FMM_BF_CTRL_BLOCKCNT_RESET_PERIOD, BLOCKCNT_RESET_PERIOD, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_DMA_BLOCK_CNT_0_7, 0xc, AUD_FMM_BF_CTRL_DMA_BLOCK_CNT_0_7, 0x27100c)
|
|
FldFunc(AUD_FMM_BF_CTRL_DMA_BLOCK_CNT_0_7, DMA_BLOCK_CNT_7, 28, 4)
|
|
FldFunc(AUD_FMM_BF_CTRL_DMA_BLOCK_CNT_0_7, DMA_BLOCK_CNT_6, 24, 4)
|
|
FldFunc(AUD_FMM_BF_CTRL_DMA_BLOCK_CNT_0_7, DMA_BLOCK_CNT_5, 20, 4)
|
|
FldFunc(AUD_FMM_BF_CTRL_DMA_BLOCK_CNT_0_7, DMA_BLOCK_CNT_4, 16, 4)
|
|
FldFunc(AUD_FMM_BF_CTRL_DMA_BLOCK_CNT_0_7, DMA_BLOCK_CNT_3, 12, 4)
|
|
FldFunc(AUD_FMM_BF_CTRL_DMA_BLOCK_CNT_0_7, DMA_BLOCK_CNT_2, 8, 4)
|
|
FldFunc(AUD_FMM_BF_CTRL_DMA_BLOCK_CNT_0_7, DMA_BLOCK_CNT_1, 4, 4)
|
|
FldFunc(AUD_FMM_BF_CTRL_DMA_BLOCK_CNT_0_7, DMA_BLOCK_CNT_0, 0, 4)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_SOURCECH_0_CFG, 0x10, AUD_FMM_BF_CTRL_SOURCECH_0_CFG, 0x271010)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_0_CFG, REVERSE_ENDIAN, 25, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_0_CFG, BIT_RESOLUTION, 20, 5)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_0_CFG, SHARED_SBUF_ID, 16, 4)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_0_CFG, SHARE_SBUF, 15, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_0_CFG, FLOWON_SFIFO_HALFFULL, 14, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_0_CFG, DMA_READ_DISABLE, 13, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_0_CFG, SAMPLE_REPEAT_ENABLE, 12, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_0_CFG, NOT_PAUSE_WHEN_EMPTY, 11, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_0_CFG, STC_OFFSET_SELECT, 8, 3)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_0_CFG, STCSYNC_ENABLE, 7, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_0_CFG, SOURCEFIFO_SIZE_DOUBLE, 6, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_0_CFG, LR_DATA_CTRL, 4, 2)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_0_CFG, SAMPLE_CH_MODE, 3, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_0_CFG, BUFFER_PAIR_ENABLE, 2, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_0_CFG, SOURCEFIFO_ENABLE, 0, 2)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_SOURCECH_0_CTRL, 0x14, AUD_FMM_BF_CTRL_SOURCECH_0_CTRL, 0x271014)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_0_CTRL, START_SELECTION, 1, 2)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_0_CTRL, PLAY_RUN, 0, 1)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_SOURCECH_1_CFG, 0x18, AUD_FMM_BF_CTRL_SOURCECH_1_CFG, 0x271018)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_1_CFG, REVERSE_ENDIAN, 25, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_1_CFG, BIT_RESOLUTION, 20, 5)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_1_CFG, SHARED_SBUF_ID, 16, 4)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_1_CFG, SHARE_SBUF, 15, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_1_CFG, FLOWON_SFIFO_HALFFULL, 14, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_1_CFG, DMA_READ_DISABLE, 13, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_1_CFG, SAMPLE_REPEAT_ENABLE, 12, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_1_CFG, NOT_PAUSE_WHEN_EMPTY, 11, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_1_CFG, STC_OFFSET_SELECT, 8, 3)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_1_CFG, STCSYNC_ENABLE, 7, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_1_CFG, SOURCEFIFO_SIZE_DOUBLE, 6, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_1_CFG, LR_DATA_CTRL, 4, 2)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_1_CFG, SAMPLE_CH_MODE, 3, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_1_CFG, BUFFER_PAIR_ENABLE, 2, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_1_CFG, SOURCEFIFO_ENABLE, 0, 2)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_SOURCECH_1_CTRL, 0x1c, AUD_FMM_BF_CTRL_SOURCECH_1_CTRL, 0x27101c)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_1_CTRL, START_SELECTION, 1, 2)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_1_CTRL, PLAY_RUN, 0, 1)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_SOURCECH_2_CFG, 0x20, AUD_FMM_BF_CTRL_SOURCECH_2_CFG, 0x271020)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_2_CFG, REVERSE_ENDIAN, 25, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_2_CFG, BIT_RESOLUTION, 20, 5)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_2_CFG, SHARED_SBUF_ID, 16, 4)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_2_CFG, SHARE_SBUF, 15, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_2_CFG, FLOWON_SFIFO_HALFFULL, 14, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_2_CFG, DMA_READ_DISABLE, 13, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_2_CFG, SAMPLE_REPEAT_ENABLE, 12, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_2_CFG, NOT_PAUSE_WHEN_EMPTY, 11, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_2_CFG, STC_OFFSET_SELECT, 8, 3)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_2_CFG, STCSYNC_ENABLE, 7, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_2_CFG, SOURCEFIFO_SIZE_DOUBLE, 6, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_2_CFG, LR_DATA_CTRL, 4, 2)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_2_CFG, SAMPLE_CH_MODE, 3, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_2_CFG, BUFFER_PAIR_ENABLE, 2, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_2_CFG, SOURCEFIFO_ENABLE, 0, 2)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_SOURCECH_2_CTRL, 0x24, AUD_FMM_BF_CTRL_SOURCECH_2_CTRL, 0x271024)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_2_CTRL, START_SELECTION, 1, 2)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_2_CTRL, PLAY_RUN, 0, 1)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_SOURCECH_3_CFG, 0x28, AUD_FMM_BF_CTRL_SOURCECH_3_CFG, 0x271028)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_3_CFG, REVERSE_ENDIAN, 25, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_3_CFG, BIT_RESOLUTION, 20, 5)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_3_CFG, SHARED_SBUF_ID, 16, 4)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_3_CFG, SHARE_SBUF, 15, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_3_CFG, FLOWON_SFIFO_HALFFULL, 14, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_3_CFG, DMA_READ_DISABLE, 13, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_3_CFG, SAMPLE_REPEAT_ENABLE, 12, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_3_CFG, NOT_PAUSE_WHEN_EMPTY, 11, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_3_CFG, STC_OFFSET_SELECT, 8, 3)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_3_CFG, STCSYNC_ENABLE, 7, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_3_CFG, SOURCEFIFO_SIZE_DOUBLE, 6, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_3_CFG, LR_DATA_CTRL, 4, 2)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_3_CFG, SAMPLE_CH_MODE, 3, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_3_CFG, BUFFER_PAIR_ENABLE, 2, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_3_CFG, SOURCEFIFO_ENABLE, 0, 2)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_SOURCECH_3_CTRL, 0x2c, AUD_FMM_BF_CTRL_SOURCECH_3_CTRL, 0x27102c)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_3_CTRL, START_SELECTION, 1, 2)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_3_CTRL, PLAY_RUN, 0, 1)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_SOURCECH_4_CFG, 0x30, AUD_FMM_BF_CTRL_SOURCECH_4_CFG, 0x271030)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_4_CFG, REVERSE_ENDIAN, 25, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_4_CFG, BIT_RESOLUTION, 20, 5)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_4_CFG, SHARED_SBUF_ID, 16, 4)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_4_CFG, SHARE_SBUF, 15, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_4_CFG, FLOWON_SFIFO_HALFFULL, 14, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_4_CFG, DMA_READ_DISABLE, 13, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_4_CFG, SAMPLE_REPEAT_ENABLE, 12, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_4_CFG, NOT_PAUSE_WHEN_EMPTY, 11, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_4_CFG, STC_OFFSET_SELECT, 8, 3)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_4_CFG, STCSYNC_ENABLE, 7, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_4_CFG, SOURCEFIFO_SIZE_DOUBLE, 6, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_4_CFG, LR_DATA_CTRL, 4, 2)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_4_CFG, SAMPLE_CH_MODE, 3, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_4_CFG, BUFFER_PAIR_ENABLE, 2, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_4_CFG, SOURCEFIFO_ENABLE, 0, 2)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_SOURCECH_4_CTRL, 0x34, AUD_FMM_BF_CTRL_SOURCECH_4_CTRL, 0x271034)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_4_CTRL, START_SELECTION, 1, 2)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_4_CTRL, PLAY_RUN, 0, 1)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_SOURCECH_5_CFG, 0x38, AUD_FMM_BF_CTRL_SOURCECH_5_CFG, 0x271038)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_5_CFG, REVERSE_ENDIAN, 25, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_5_CFG, BIT_RESOLUTION, 20, 5)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_5_CFG, SHARED_SBUF_ID, 16, 4)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_5_CFG, SHARE_SBUF, 15, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_5_CFG, FLOWON_SFIFO_HALFFULL, 14, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_5_CFG, DMA_READ_DISABLE, 13, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_5_CFG, SAMPLE_REPEAT_ENABLE, 12, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_5_CFG, NOT_PAUSE_WHEN_EMPTY, 11, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_5_CFG, STC_OFFSET_SELECT, 8, 3)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_5_CFG, STCSYNC_ENABLE, 7, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_5_CFG, SOURCEFIFO_SIZE_DOUBLE, 6, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_5_CFG, LR_DATA_CTRL, 4, 2)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_5_CFG, SAMPLE_CH_MODE, 3, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_5_CFG, BUFFER_PAIR_ENABLE, 2, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_5_CFG, SOURCEFIFO_ENABLE, 0, 2)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_SOURCECH_5_CTRL, 0x3c, AUD_FMM_BF_CTRL_SOURCECH_5_CTRL, 0x27103c)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_5_CTRL, START_SELECTION, 1, 2)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCECH_5_CTRL, PLAY_RUN, 0, 1)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_DESTCH_0_CFG, 0x40, AUD_FMM_BF_CTRL_DESTCH_0_CFG, 0x271040)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_0_CFG, I2S_BITS_PER_SAMPLE, 20, 5)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_0_CFG, I2S_DATA_JUSTIFICATION, 19, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_0_CFG, I2S_DATA_ALIGNMENT, 18, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_0_CFG, I2S_SCLK_POLARITY, 17, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_0_CFG, I2S_LRCK_POLARITY, 16, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_0_CFG, REVERSE_ENDIAN, 15, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_0_CFG, I2S_MAI_SELI2, 14, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_0_CFG, INPUT_PORT_SEL, 12, 2)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_0_CFG, NOT_PAUSE_WHEN_FULL, 11, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_0_CFG, SOURCE_FIFO_ID, 7, 4)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_0_CFG, INPUT_FRM_SOURCEFIFO, 6, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_0_CFG, CAPTURE_TO_SOURCEFIFO, 5, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_0_CFG, PLAY_FROM_CAPTURE, 4, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_0_CFG, DESTFIFO_SIZE_DOUBLE, 3, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_0_CFG, BUFFER_PAIR_ENABLE, 2, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_0_CFG, CAPTURE_ENABLE, 0, 2)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_DESTCH_0_CTRL, 0x44, AUD_FMM_BF_CTRL_DESTCH_0_CTRL, 0x271044)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_0_CTRL, CAPTURE_RUN, 0, 1)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_DESTCH_1_CFG, 0x48, AUD_FMM_BF_CTRL_DESTCH_1_CFG, 0x271048)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_1_CFG, I2S_BITS_PER_SAMPLE, 20, 5)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_1_CFG, I2S_DATA_JUSTIFICATION, 19, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_1_CFG, I2S_DATA_ALIGNMENT, 18, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_1_CFG, I2S_SCLK_POLARITY, 17, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_1_CFG, I2S_LRCK_POLARITY, 16, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_1_CFG, REVERSE_ENDIAN, 15, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_1_CFG, I2S_MAI_SELI2, 14, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_1_CFG, INPUT_PORT_SEL, 12, 2)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_1_CFG, NOT_PAUSE_WHEN_FULL, 11, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_1_CFG, SOURCE_FIFO_ID, 7, 4)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_1_CFG, INPUT_FRM_SOURCEFIFO, 6, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_1_CFG, CAPTURE_TO_SOURCEFIFO, 5, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_1_CFG, PLAY_FROM_CAPTURE, 4, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_1_CFG, DESTFIFO_SIZE_DOUBLE, 3, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_1_CFG, BUFFER_PAIR_ENABLE, 2, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_1_CFG, CAPTURE_ENABLE, 0, 2)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_DESTCH_1_CTRL, 0x4c, AUD_FMM_BF_CTRL_DESTCH_1_CTRL, 0x27104c)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTCH_1_CTRL, CAPTURE_RUN, 0, 1)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_STCSYNC_CTRL, 0x50, AUD_FMM_BF_CTRL_STCSYNC_CTRL, 0x271050)
|
|
FldFunc(AUD_FMM_BF_CTRL_STCSYNC_CTRL, STCSYNC_3_ENABLE, 11, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_STCSYNC_CTRL, STCSYNC_2_ENABLE, 10, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_STCSYNC_CTRL, STCSYNC_1_ENABLE, 9, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_STCSYNC_CTRL, STCSYNC_0_ENABLE, 8, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_STCSYNC_CTRL, STCSYNC_3_SEL0, 6, 2)
|
|
FldFunc(AUD_FMM_BF_CTRL_STCSYNC_CTRL, STCSYNC_2_SEL0, 4, 2)
|
|
FldFunc(AUD_FMM_BF_CTRL_STCSYNC_CTRL, STCSYNC_1_SEL0, 2, 2)
|
|
FldFunc(AUD_FMM_BF_CTRL_STCSYNC_CTRL, STCSYNC_0_SEL0, 0, 2)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_STCSYNC_OFFSET_0, 0x54, AUD_FMM_BF_CTRL_STCSYNC_OFFSET_0, 0x271054)
|
|
FldFunc(AUD_FMM_BF_CTRL_STCSYNC_OFFSET_0, STCSYNC_OFFSET, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_STCSYNC_OFFSET_1, 0x58, AUD_FMM_BF_CTRL_STCSYNC_OFFSET_1, 0x271058)
|
|
FldFunc(AUD_FMM_BF_CTRL_STCSYNC_OFFSET_1, STCSYNC_OFFSET, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_STCSYNC_OFFSET_2, 0x5c, AUD_FMM_BF_CTRL_STCSYNC_OFFSET_2, 0x27105c)
|
|
FldFunc(AUD_FMM_BF_CTRL_STCSYNC_OFFSET_2, STCSYNC_OFFSET, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_STCSYNC_OFFSET_3, 0x60, AUD_FMM_BF_CTRL_STCSYNC_OFFSET_3, 0x271060)
|
|
FldFunc(AUD_FMM_BF_CTRL_STCSYNC_OFFSET_3, STCSYNC_OFFSET, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_ADAPTRATE_0_CFG, 0x64, AUD_FMM_BF_CTRL_ADAPTRATE_0_CFG, 0x271064)
|
|
FldFunc(AUD_FMM_BF_CTRL_ADAPTRATE_0_CFG, ADAPTIVE_RATE_ENABLE, 23, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_ADAPTRATE_0_CFG, ADAPTIVE_CAP_SEL, 20, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_ADAPTRATE_0_CFG, ADAPTIVE_SFIFO_SEL, 16, 4)
|
|
FldFunc(AUD_FMM_BF_CTRL_ADAPTRATE_0_CFG, ADAPTIVE_RATE_THRESHOLD, 0, 16)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_ADAPTRATE_1_CFG, 0x68, AUD_FMM_BF_CTRL_ADAPTRATE_1_CFG, 0x271068)
|
|
FldFunc(AUD_FMM_BF_CTRL_ADAPTRATE_1_CFG, ADAPTIVE_RATE_ENABLE, 23, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_ADAPTRATE_1_CFG, ADAPTIVE_CAP_SEL, 20, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_ADAPTRATE_1_CFG, ADAPTIVE_SFIFO_SEL, 16, 4)
|
|
FldFunc(AUD_FMM_BF_CTRL_ADAPTRATE_1_CFG, ADAPTIVE_RATE_THRESHOLD, 0, 16)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_ADAPTRATE_2_CFG, 0x6c, AUD_FMM_BF_CTRL_ADAPTRATE_2_CFG, 0x27106c)
|
|
FldFunc(AUD_FMM_BF_CTRL_ADAPTRATE_2_CFG, ADAPTIVE_RATE_ENABLE, 23, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_ADAPTRATE_2_CFG, ADAPTIVE_CAP_SEL, 20, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_ADAPTRATE_2_CFG, ADAPTIVE_SFIFO_SEL, 16, 4)
|
|
FldFunc(AUD_FMM_BF_CTRL_ADAPTRATE_2_CFG, ADAPTIVE_RATE_THRESHOLD, 0, 16)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_ADAPTRATE_3_CFG, 0x70, AUD_FMM_BF_CTRL_ADAPTRATE_3_CFG, 0x271070)
|
|
FldFunc(AUD_FMM_BF_CTRL_ADAPTRATE_3_CFG, ADAPTIVE_RATE_ENABLE, 23, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_ADAPTRATE_3_CFG, ADAPTIVE_CAP_SEL, 20, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_ADAPTRATE_3_CFG, ADAPTIVE_SFIFO_SEL, 16, 4)
|
|
FldFunc(AUD_FMM_BF_CTRL_ADAPTRATE_3_CFG, ADAPTIVE_RATE_THRESHOLD, 0, 16)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_SOURCEFIFO_0_RWADDR, 0x74, AUD_FMM_BF_CTRL_SOURCEFIFO_0_RWADDR, 0x271074)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCEFIFO_0_RWADDR, FIFO_WRADDR_WRAPFIF, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCEFIFO_0_RWADDR, FIFO_WRADDRFIF, 16, 15)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCEFIFO_0_RWADDR, FIFO_RDADDR_WRAPFIF, 15, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCEFIFO_0_RWADDR, FIFO_RDADDRFIF, 0, 15)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_SOURCEFIFO_1_RWADDR, 0x78, AUD_FMM_BF_CTRL_SOURCEFIFO_1_RWADDR, 0x271078)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCEFIFO_1_RWADDR, FIFO_WRADDR_WRAPFIF, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCEFIFO_1_RWADDR, FIFO_WRADDRFIF, 16, 15)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCEFIFO_1_RWADDR, FIFO_RDADDR_WRAPFIF, 15, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCEFIFO_1_RWADDR, FIFO_RDADDRFIF, 0, 15)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_SOURCEFIFO_2_RWADDR, 0x7c, AUD_FMM_BF_CTRL_SOURCEFIFO_2_RWADDR, 0x27107c)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCEFIFO_2_RWADDR, FIFO_WRADDR_WRAPFIF, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCEFIFO_2_RWADDR, FIFO_WRADDRFIF, 16, 15)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCEFIFO_2_RWADDR, FIFO_RDADDR_WRAPFIF, 15, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCEFIFO_2_RWADDR, FIFO_RDADDRFIF, 0, 15)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_SOURCEFIFO_3_RWADDR, 0x80, AUD_FMM_BF_CTRL_SOURCEFIFO_3_RWADDR, 0x271080)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCEFIFO_3_RWADDR, FIFO_WRADDR_WRAPFIF, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCEFIFO_3_RWADDR, FIFO_WRADDRFIF, 16, 15)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCEFIFO_3_RWADDR, FIFO_RDADDR_WRAPFIF, 15, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCEFIFO_3_RWADDR, FIFO_RDADDRFIF, 0, 15)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_SOURCEFIFO_4_RWADDR, 0x84, AUD_FMM_BF_CTRL_SOURCEFIFO_4_RWADDR, 0x271084)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCEFIFO_4_RWADDR, FIFO_WRADDR_WRAPFIF, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCEFIFO_4_RWADDR, FIFO_WRADDRFIF, 16, 15)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCEFIFO_4_RWADDR, FIFO_RDADDR_WRAPFIF, 15, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCEFIFO_4_RWADDR, FIFO_RDADDRFIF, 0, 15)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_SOURCEFIFO_5_RWADDR, 0x88, AUD_FMM_BF_CTRL_SOURCEFIFO_5_RWADDR, 0x271088)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCEFIFO_5_RWADDR, FIFO_WRADDR_WRAPFIF, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCEFIFO_5_RWADDR, FIFO_WRADDRFIF, 16, 15)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCEFIFO_5_RWADDR, FIFO_RDADDR_WRAPFIF, 15, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_SOURCEFIFO_5_RWADDR, FIFO_RDADDRFIF, 0, 15)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_DESTFIFO_0_RWADDR, 0x8c, AUD_FMM_BF_CTRL_DESTFIFO_0_RWADDR, 0x27108c)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTFIFO_0_RWADDR, FIFO_WRADDR_WRAPFIF, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTFIFO_0_RWADDR, FIFO_WRADDRFIF, 16, 15)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTFIFO_0_RWADDR, FIFO_RDADDR_WRAPFIF, 15, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTFIFO_0_RWADDR, FIFO_RDADDRFIF, 0, 15)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_DESTFIFO_1_RWADDR, 0x90, AUD_FMM_BF_CTRL_DESTFIFO_1_RWADDR, 0x271090)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTFIFO_1_RWADDR, FIFO_WRADDR_WRAPFIF, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTFIFO_1_RWADDR, FIFO_WRADDRFIF, 16, 15)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTFIFO_1_RWADDR, FIFO_RDADDR_WRAPFIF, 15, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_DESTFIFO_1_RWADDR, FIFO_RDADDRFIF, 0, 15)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RATECNT_SCH_0TO1, 0x94, AUD_FMM_BF_CTRL_RATECNT_SCH_0TO1, 0x271094)
|
|
FldFunc(AUD_FMM_BF_CTRL_RATECNT_SCH_0TO1, RATECNT_SOURCH_1, 16, 16)
|
|
FldFunc(AUD_FMM_BF_CTRL_RATECNT_SCH_0TO1, RATECNT_SOURCH_0, 0, 16)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RATECNT_SCH_2TO3, 0x98, AUD_FMM_BF_CTRL_RATECNT_SCH_2TO3, 0x271098)
|
|
FldFunc(AUD_FMM_BF_CTRL_RATECNT_SCH_2TO3, RATECNT_SOURCH_3, 16, 16)
|
|
FldFunc(AUD_FMM_BF_CTRL_RATECNT_SCH_2TO3, RATECNT_SOURCH_2, 0, 16)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_FIFO_FLOWON_STAT, 0x9c, AUD_FMM_BF_CTRL_FIFO_FLOWON_STAT, 0x27109c)
|
|
FldFunc(AUD_FMM_BF_CTRL_FIFO_FLOWON_STAT, DEST_FIFO_FLOWON, 6, 2)
|
|
FldFunc(AUD_FMM_BF_CTRL_FIFO_FLOWON_STAT, SOURCE_FIFO_FLOWON, 0, 6)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_MAI_0_STAT, 0xa0, AUD_FMM_BF_CTRL_MAI_0_STAT, 0x2710a0)
|
|
FldFunc(AUD_FMM_BF_CTRL_MAI_0_STAT, AUD_SAMPLE_WIDTH, 24, 5)
|
|
FldFunc(AUD_FMM_BF_CTRL_MAI_0_STAT, AUD_VERSION, 20, 4)
|
|
FldFunc(AUD_FMM_BF_CTRL_MAI_0_STAT, AUD_STREAM_ID, 16, 4)
|
|
FldFunc(AUD_FMM_BF_CTRL_MAI_0_STAT, AUD_SAMPLING_RATE, 8, 8)
|
|
FldFunc(AUD_FMM_BF_CTRL_MAI_0_STAT, AUD_FORMAT, 0, 8)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_MAI_1_STAT, 0xa4, AUD_FMM_BF_CTRL_MAI_1_STAT, 0x2710a4)
|
|
FldFunc(AUD_FMM_BF_CTRL_MAI_1_STAT, AUD_SAMPLE_WIDTH, 24, 5)
|
|
FldFunc(AUD_FMM_BF_CTRL_MAI_1_STAT, AUD_VERSION, 20, 4)
|
|
FldFunc(AUD_FMM_BF_CTRL_MAI_1_STAT, AUD_STREAM_ID, 16, 4)
|
|
FldFunc(AUD_FMM_BF_CTRL_MAI_1_STAT, AUD_SAMPLING_RATE, 8, 8)
|
|
FldFunc(AUD_FMM_BF_CTRL_MAI_1_STAT, AUD_FORMAT, 0, 8)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_0_RDADDR, 0x400, AUD_FMM_BF_CTRL_RINGBUF_0_RDADDR, 0x271400)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_0_RDADDR, SOURCE_RING_RDADDR_WRAP, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_0_RDADDR, SRING_RDADD, 0, 31)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_0_WRADDR, 0x404, AUD_FMM_BF_CTRL_RINGBUF_0_WRADDR, 0x271404)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_0_WRADDR, SOURCE_RING_WRADDR_WRAP, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_0_WRADDR, SOURCE_RING_WRADDR, 0, 31)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_0_BASEADDR, 0x408, AUD_FMM_BF_CTRL_RINGBUF_0_BASEADDR, 0x271408)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_0_BASEADDR, SOURCE_RINGBUF_BASEADD, 5, 27)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_0_ENDADDR, 0x40c, AUD_FMM_BF_CTRL_RINGBUF_0_ENDADDR, 0x27140c)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_0_ENDADDR, SOURCE_RINGBUF_ENDADDR, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_0_FREEBYTE_MARK, 0x410, AUD_FMM_BF_CTRL_RINGBUF_0_FREEBYTE_MARK, 0x271410)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_0_FREEBYTE_MARK, SOURCE_RINGBUF_FREEBYTE_MARK, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_0_START_WRPOINT, 0x414, AUD_FMM_BF_CTRL_RINGBUF_0_START_WRPOINT, 0x271414)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_0_START_WRPOINT, SOURCE_RINGBUF_START_WRPOIN, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_1_RDADDR, 0x418, AUD_FMM_BF_CTRL_RINGBUF_1_RDADDR, 0x271418)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_1_RDADDR, SOURCE_RING_RDADDR_WRAP, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_1_RDADDR, SRING_RDADD, 0, 31)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_1_WRADDR, 0x41c, AUD_FMM_BF_CTRL_RINGBUF_1_WRADDR, 0x27141c)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_1_WRADDR, SOURCE_RING_WRADDR_WRAP, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_1_WRADDR, SOURCE_RING_WRADDR, 0, 31)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_1_BASEADDR, 0x420, AUD_FMM_BF_CTRL_RINGBUF_1_BASEADDR, 0x271420)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_1_BASEADDR, SOURCE_RINGBUF_BASEADD, 5, 27)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_1_ENDADDR, 0x424, AUD_FMM_BF_CTRL_RINGBUF_1_ENDADDR, 0x271424)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_1_ENDADDR, SOURCE_RINGBUF_ENDADDR, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_1_FREEBYTE_MARK, 0x428, AUD_FMM_BF_CTRL_RINGBUF_1_FREEBYTE_MARK, 0x271428)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_1_FREEBYTE_MARK, SOURCE_RINGBUF_FREEBYTE_MARK, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_1_START_WRPOINT, 0x42c, AUD_FMM_BF_CTRL_RINGBUF_1_START_WRPOINT, 0x27142c)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_1_START_WRPOINT, SOURCE_RINGBUF_START_WRPOIN, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_2_RDADDR, 0x430, AUD_FMM_BF_CTRL_RINGBUF_2_RDADDR, 0x271430)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_2_RDADDR, SOURCE_RING_RDADDR_WRAP, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_2_RDADDR, SRING_RDADD, 0, 31)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_2_WRADDR, 0x434, AUD_FMM_BF_CTRL_RINGBUF_2_WRADDR, 0x271434)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_2_WRADDR, SOURCE_RING_WRADDR_WRAP, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_2_WRADDR, SOURCE_RING_WRADDR, 0, 31)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_2_BASEADDR, 0x438, AUD_FMM_BF_CTRL_RINGBUF_2_BASEADDR, 0x271438)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_2_BASEADDR, SOURCE_RINGBUF_BASEADD, 5, 27)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_2_ENDADDR, 0x43c, AUD_FMM_BF_CTRL_RINGBUF_2_ENDADDR, 0x27143c)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_2_ENDADDR, SOURCE_RINGBUF_ENDADDR, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_2_FREEBYTE_MARK, 0x440, AUD_FMM_BF_CTRL_RINGBUF_2_FREEBYTE_MARK, 0x271440)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_2_FREEBYTE_MARK, SOURCE_RINGBUF_FREEBYTE_MARK, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_2_START_WRPOINT, 0x444, AUD_FMM_BF_CTRL_RINGBUF_2_START_WRPOINT, 0x271444)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_2_START_WRPOINT, SOURCE_RINGBUF_START_WRPOIN, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_3_RDADDR, 0x448, AUD_FMM_BF_CTRL_RINGBUF_3_RDADDR, 0x271448)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_3_RDADDR, SOURCE_RING_RDADDR_WRAP, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_3_RDADDR, SRING_RDADD, 0, 31)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_3_WRADDR, 0x44c, AUD_FMM_BF_CTRL_RINGBUF_3_WRADDR, 0x27144c)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_3_WRADDR, SOURCE_RING_WRADDR_WRAP, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_3_WRADDR, SOURCE_RING_WRADDR, 0, 31)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_3_BASEADDR, 0x450, AUD_FMM_BF_CTRL_RINGBUF_3_BASEADDR, 0x271450)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_3_BASEADDR, SOURCE_RINGBUF_BASEADD, 5, 27)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_3_ENDADDR, 0x454, AUD_FMM_BF_CTRL_RINGBUF_3_ENDADDR, 0x271454)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_3_ENDADDR, SOURCE_RINGBUF_ENDADDR, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_3_FREEBYTE_MARK, 0x458, AUD_FMM_BF_CTRL_RINGBUF_3_FREEBYTE_MARK, 0x271458)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_3_FREEBYTE_MARK, SOURCE_RINGBUF_FREEBYTE_MARK, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_3_START_WRPOINT, 0x45c, AUD_FMM_BF_CTRL_RINGBUF_3_START_WRPOINT, 0x27145c)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_3_START_WRPOINT, SOURCE_RINGBUF_START_WRPOIN, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_4_RDADDR, 0x460, AUD_FMM_BF_CTRL_RINGBUF_4_RDADDR, 0x271460)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_4_RDADDR, SOURCE_RING_RDADDR_WRAP, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_4_RDADDR, SRING_RDADD, 0, 31)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_4_WRADDR, 0x464, AUD_FMM_BF_CTRL_RINGBUF_4_WRADDR, 0x271464)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_4_WRADDR, SOURCE_RING_WRADDR_WRAP, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_4_WRADDR, SOURCE_RING_WRADDR, 0, 31)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_4_BASEADDR, 0x468, AUD_FMM_BF_CTRL_RINGBUF_4_BASEADDR, 0x271468)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_4_BASEADDR, SOURCE_RINGBUF_BASEADD, 5, 27)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_4_ENDADDR, 0x46c, AUD_FMM_BF_CTRL_RINGBUF_4_ENDADDR, 0x27146c)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_4_ENDADDR, SOURCE_RINGBUF_ENDADDR, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_4_FREEBYTE_MARK, 0x470, AUD_FMM_BF_CTRL_RINGBUF_4_FREEBYTE_MARK, 0x271470)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_4_FREEBYTE_MARK, SOURCE_RINGBUF_FREEBYTE_MARK, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_4_START_WRPOINT, 0x474, AUD_FMM_BF_CTRL_RINGBUF_4_START_WRPOINT, 0x271474)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_4_START_WRPOINT, SOURCE_RINGBUF_START_WRPOIN, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_5_RDADDR, 0x478, AUD_FMM_BF_CTRL_RINGBUF_5_RDADDR, 0x271478)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_5_RDADDR, SOURCE_RING_RDADDR_WRAP, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_5_RDADDR, SRING_RDADD, 0, 31)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_5_WRADDR, 0x47c, AUD_FMM_BF_CTRL_RINGBUF_5_WRADDR, 0x27147c)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_5_WRADDR, SOURCE_RING_WRADDR_WRAP, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_5_WRADDR, SOURCE_RING_WRADDR, 0, 31)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_5_BASEADDR, 0x480, AUD_FMM_BF_CTRL_RINGBUF_5_BASEADDR, 0x271480)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_5_BASEADDR, SOURCE_RINGBUF_BASEADD, 5, 27)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_5_ENDADDR, 0x484, AUD_FMM_BF_CTRL_RINGBUF_5_ENDADDR, 0x271484)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_5_ENDADDR, SOURCE_RINGBUF_ENDADDR, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_5_FREEBYTE_MARK, 0x488, AUD_FMM_BF_CTRL_RINGBUF_5_FREEBYTE_MARK, 0x271488)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_5_FREEBYTE_MARK, SOURCE_RINGBUF_FREEBYTE_MARK, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_5_START_WRPOINT, 0x48c, AUD_FMM_BF_CTRL_RINGBUF_5_START_WRPOINT, 0x27148c)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_5_START_WRPOINT, SOURCE_RINGBUF_START_WRPOIN, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_6_RDADDR, 0x490, AUD_FMM_BF_CTRL_RINGBUF_6_RDADDR, 0x271490)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_6_RDADDR, DEST_RING_RDADDR_WRAP, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_6_RDADDR, DEST_RING_RDADDR, 0, 31)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_6_WRADDR, 0x494, AUD_FMM_BF_CTRL_RINGBUF_6_WRADDR, 0x271494)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_6_WRADDR, DEST_RING_WRADDR_WRAP, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_6_WRADDR, DEST_RING_WRADDR, 0, 31)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_6_BASEADDR, 0x498, AUD_FMM_BF_CTRL_RINGBUF_6_BASEADDR, 0x271498)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_6_BASEADDR, DEST_RINGBUF_BASEADDR, 5, 27)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_6_ENDADDR, 0x49c, AUD_FMM_BF_CTRL_RINGBUF_6_ENDADDR, 0x27149c)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_6_ENDADDR, DEST_RINGBUF_ENDADDR, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_6_FULLBYTE_MARK, 0x4a0, AUD_FMM_BF_CTRL_RINGBUF_6_FULLBYTE_MARK, 0x2714a0)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_6_FULLBYTE_MARK, DEST_RINGBUF_FULLBYTE_MARK, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_0, 0x4a4, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_0, 0x2714a4)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_7_RDADDR, 0x4a8, AUD_FMM_BF_CTRL_RINGBUF_7_RDADDR, 0x2714a8)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_7_RDADDR, DEST_RING_RDADDR_WRAP, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_7_RDADDR, DEST_RING_RDADDR, 0, 31)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_7_WRADDR, 0x4ac, AUD_FMM_BF_CTRL_RINGBUF_7_WRADDR, 0x2714ac)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_7_WRADDR, DEST_RING_WRADDR_WRAP, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_7_WRADDR, DEST_RING_WRADDR, 0, 31)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_7_BASEADDR, 0x4b0, AUD_FMM_BF_CTRL_RINGBUF_7_BASEADDR, 0x2714b0)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_7_BASEADDR, DEST_RINGBUF_BASEADDR, 5, 27)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_7_ENDADDR, 0x4b4, AUD_FMM_BF_CTRL_RINGBUF_7_ENDADDR, 0x2714b4)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_7_ENDADDR, DEST_RINGBUF_ENDADDR, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_7_FULLBYTE_MARK, 0x4b8, AUD_FMM_BF_CTRL_RINGBUF_7_FULLBYTE_MARK, 0x2714b8)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_7_FULLBYTE_MARK, DEST_RINGBUF_FULLBYTE_MARK, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_1, 0x4bc, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_1, 0x2714bc)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_8_RDADDR, 0x4c0, AUD_FMM_BF_CTRL_RINGBUF_8_RDADDR, 0x2714c0)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_8_RDADDR, SOURCE_RING_RDADDR_WRAP, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_8_RDADDR, SRING_RDADD, 0, 31)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_8_WRADDR, 0x4c4, AUD_FMM_BF_CTRL_RINGBUF_8_WRADDR, 0x2714c4)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_8_WRADDR, SOURCE_RING_WRADDR_WRAP, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_8_WRADDR, SOURCE_RING_WRADDR, 0, 31)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_8_BASEADDR, 0x4c8, AUD_FMM_BF_CTRL_RINGBUF_8_BASEADDR, 0x2714c8)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_8_BASEADDR, SOURCE_RINGBUF_BASEADD, 5, 27)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_8_ENDADDR, 0x4cc, AUD_FMM_BF_CTRL_RINGBUF_8_ENDADDR, 0x2714cc)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_8_ENDADDR, SOURCE_RINGBUF_ENDADDR, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_8_FREEBYTE_MARK, 0x4d0, AUD_FMM_BF_CTRL_RINGBUF_8_FREEBYTE_MARK, 0x2714d0)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_8_FREEBYTE_MARK, SOURCE_RINGBUF_FREEBYTE_MARK, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_8_START_WRPOINT, 0x4d4, AUD_FMM_BF_CTRL_RINGBUF_8_START_WRPOINT, 0x2714d4)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_8_START_WRPOINT, SOURCE_RINGBUF_START_WRPOIN, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_9_RDADDR, 0x4d8, AUD_FMM_BF_CTRL_RINGBUF_9_RDADDR, 0x2714d8)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_9_RDADDR, SOURCE_RING_RDADDR_WRAP, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_9_RDADDR, SRING_RDADD, 0, 31)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_9_WRADDR, 0x4dc, AUD_FMM_BF_CTRL_RINGBUF_9_WRADDR, 0x2714dc)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_9_WRADDR, SOURCE_RING_WRADDR_WRAP, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_9_WRADDR, SOURCE_RING_WRADDR, 0, 31)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_9_BASEADDR, 0x4e0, AUD_FMM_BF_CTRL_RINGBUF_9_BASEADDR, 0x2714e0)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_9_BASEADDR, SOURCE_RINGBUF_BASEADD, 5, 27)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_9_ENDADDR, 0x4e4, AUD_FMM_BF_CTRL_RINGBUF_9_ENDADDR, 0x2714e4)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_9_ENDADDR, SOURCE_RINGBUF_ENDADDR, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_9_FREEBYTE_MARK, 0x4e8, AUD_FMM_BF_CTRL_RINGBUF_9_FREEBYTE_MARK, 0x2714e8)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_9_FREEBYTE_MARK, SOURCE_RINGBUF_FREEBYTE_MARK, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_9_START_WRPOINT, 0x4ec, AUD_FMM_BF_CTRL_RINGBUF_9_START_WRPOINT, 0x2714ec)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_9_START_WRPOINT, SOURCE_RINGBUF_START_WRPOIN, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_10_RDADDR, 0x4f0, AUD_FMM_BF_CTRL_RINGBUF_10_RDADDR, 0x2714f0)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_10_RDADDR, SOURCE_RING_RDADDR_WRAP, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_10_RDADDR, SRING_RDADD, 0, 31)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_10_WRADDR, 0x4f4, AUD_FMM_BF_CTRL_RINGBUF_10_WRADDR, 0x2714f4)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_10_WRADDR, SOURCE_RING_WRADDR_WRAP, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_10_WRADDR, SOURCE_RING_WRADDR, 0, 31)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_10_BASEADDR, 0x4f8, AUD_FMM_BF_CTRL_RINGBUF_10_BASEADDR, 0x2714f8)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_10_BASEADDR, SOURCE_RINGBUF_BASEADD, 5, 27)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_10_ENDADDR, 0x4fc, AUD_FMM_BF_CTRL_RINGBUF_10_ENDADDR, 0x2714fc)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_10_ENDADDR, SOURCE_RINGBUF_ENDADDR, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_10_FREEBYTE_MARK, 0x500, AUD_FMM_BF_CTRL_RINGBUF_10_FREEBYTE_MARK, 0x271500)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_10_FREEBYTE_MARK, SOURCE_RINGBUF_FREEBYTE_MARK, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_10_START_WRPOINT, 0x504, AUD_FMM_BF_CTRL_RINGBUF_10_START_WRPOINT, 0x271504)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_10_START_WRPOINT, SOURCE_RINGBUF_START_WRPOIN, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_11_RDADDR, 0x508, AUD_FMM_BF_CTRL_RINGBUF_11_RDADDR, 0x271508)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_11_RDADDR, SOURCE_RING_RDADDR_WRAP, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_11_RDADDR, SRING_RDADD, 0, 31)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_11_WRADDR, 0x50c, AUD_FMM_BF_CTRL_RINGBUF_11_WRADDR, 0x27150c)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_11_WRADDR, SOURCE_RING_WRADDR_WRAP, 31, 1)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_11_WRADDR, SOURCE_RING_WRADDR, 0, 31)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_11_BASEADDR, 0x510, AUD_FMM_BF_CTRL_RINGBUF_11_BASEADDR, 0x271510)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_11_BASEADDR, SOURCE_RINGBUF_BASEADD, 5, 27)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_11_ENDADDR, 0x514, AUD_FMM_BF_CTRL_RINGBUF_11_ENDADDR, 0x271514)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_11_ENDADDR, SOURCE_RINGBUF_ENDADDR, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_11_FREEBYTE_MARK, 0x518, AUD_FMM_BF_CTRL_RINGBUF_11_FREEBYTE_MARK, 0x271518)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_11_FREEBYTE_MARK, SOURCE_RINGBUF_FREEBYTE_MARK, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_RINGBUF_11_START_WRPOINT, 0x51c, AUD_FMM_BF_CTRL_RINGBUF_11_START_WRPOINT, 0x27151c)
|
|
FldFunc(AUD_FMM_BF_CTRL_RINGBUF_11_START_WRPOINT, SOURCE_RINGBUF_START_WRPOIN, 0, 32)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_2, 0x520, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_2, 0x271520)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_3, 0x524, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_3, 0x271524)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_4, 0x528, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_4, 0x271528)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_5, 0x52c, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_5, 0x27152c)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_6, 0x530, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_6, 0x271530)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_7, 0x534, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_7, 0x271534)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_8, 0x538, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_8, 0x271538)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_9, 0x53c, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_9, 0x27153c)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_10, 0x540, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_10, 0x271540)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_11, 0x544, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_11, 0x271544)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_12, 0x548, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_12, 0x271548)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_13, 0x54c, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_13, 0x27154c)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_14, 0x550, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_14, 0x271550)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_15, 0x554, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_15, 0x271554)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_16, 0x558, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_16, 0x271558)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_17, 0x55c, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_17, 0x27155c)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_18, 0x560, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_18, 0x271560)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_19, 0x564, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_19, 0x271564)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_20, 0x568, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_20, 0x271568)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_21, 0x56c, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_21, 0x27156c)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_22, 0x570, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_22, 0x271570)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_23, 0x574, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_23, 0x271574)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_24, 0x578, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_24, 0x271578)
|
|
RegFunc(AUD_FMM_BF_CTRL, 0x00271000, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_25, 0x57c, AUD_FMM_BF_CTRL_FMM_BF_RESERVE_ECO_25, 0x27157c)
|
|
|
|
RegAreaFunc(AUD_FMM_BF_ESR0_BASE, 0x00271800, 0x00271814)
|
|
RegFunc(AUD_FMM_BF_ESR0, 0x00271800, AUD_FMM_BF_ESR0_STATUS, 0x0, AUD_FMM_BF_ESR0_STATUS, 0x271800)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS, SOURCE_FIFO_5_RD_REPEATORDRO, 29, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS, SOURCE_FIFO_4_RD_REPEATORDRO, 28, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS, SOURCE_FIFO_3_RD_REPEATORDRO, 27, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS, SOURCE_FIFO_2_RD_REPEATORDRO, 26, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS, SOURCE_FIFO_1_RD_REPEATORDRO, 25, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS, SOURCE_FIFO_0_RD_REPEATORDRO, 24, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS, DEST_FIFO_1_OVERFLOW, 23, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS, DEST_FIFO_0_OVERFLOW, 22, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS, SOURCE_FIFO_5_UNDERFLOW, 21, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS, SOURCE_FIFO_4_UNDERFLOW, 20, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS, SOURCE_FIFO_3_UNDERFLOW, 19, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS, SOURCE_FIFO_2_UNDERFLOW, 18, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS, SOURCE_FIFO_1_UNDERFLOW, 17, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS, SOURCE_FIFO_0_UNDERFLOW, 16, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS, DEST_RINGBUF_1_OVERFLOW, 15, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS, DEST_RINGBUF_0_OVERFLOW, 14, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS, SOURCE_RINGBUF_5_UNDERFLOW, 13, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS, SOURCE_RINGBUF_4_UNDERFLOW, 12, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS, SOURCE_RINGBUF_3_UNDERFLOW, 11, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS, SOURCE_RINGBUF_2_UNDERFLOW, 10, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS, SOURCE_RINGBUF_1_UNDERFLOW, 9, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS, SOURCE_RINGBUF_0_UNDERFLOW, 8, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS, DEST_RINGBUF_1_EXCEED_FULLMARK, 7, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS, DEST_RINGBUF_0_EXCEED_FULLMARK, 6, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS, SOURCE_RINGBUF_5_EXCEED_FREEMARK, 5, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS, SOURCE_RINGBUF_4_EXCEED_FREEMARK, 4, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS, SOURCE_RINGBUF_3_EXCEED_FREEMARK, 3, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS, SOURCE_RINGBUF_2_EXCEED_FREEMARK, 2, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS, SOURCE_RINGBUF_1_EXCEED_FREEMARK, 1, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS, SOURCE_RINGBUF_0_EXCEED_FREEMARK, 0, 1)
|
|
RegFunc(AUD_FMM_BF_ESR0, 0x00271800, AUD_FMM_BF_ESR0_STATUS_SET, 0x4, AUD_FMM_BF_ESR0_STATUS_SET, 0x271804)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_SET, SOURCE_FIFO_5_RD_REPEATORDRO, 29, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_SET, SOURCE_FIFO_4_RD_REPEATORDRO, 28, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_SET, SOURCE_FIFO_3_RD_REPEATORDRO, 27, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_SET, SOURCE_FIFO_2_RD_REPEATORDRO, 26, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_SET, SOURCE_FIFO_1_RD_REPEATORDRO, 25, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_SET, SOURCE_FIFO_0_RD_REPEATORDRO, 24, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_SET, DEST_FIFO_1_OVERFLOW, 23, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_SET, DEST_FIFO_0_OVERFLOW, 22, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_SET, SOURCE_FIFO_5_UNDERFLOW, 21, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_SET, SOURCE_FIFO_4_UNDERFLOW, 20, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_SET, SOURCE_FIFO_3_UNDERFLOW, 19, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_SET, SOURCE_FIFO_2_UNDERFLOW, 18, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_SET, SOURCE_FIFO_1_UNDERFLOW, 17, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_SET, SOURCE_FIFO_0_UNDERFLOW, 16, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_SET, DEST_RINGBUF_1_OVERFLOW, 15, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_SET, DEST_RINGBUF_0_OVERFLOW, 14, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_SET, SOURCE_RINGBUF_5_UNDERFLOW, 13, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_SET, SOURCE_RINGBUF_4_UNDERFLOW, 12, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_SET, SOURCE_RINGBUF_3_UNDERFLOW, 11, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_SET, SOURCE_RINGBUF_2_UNDERFLOW, 10, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_SET, SOURCE_RINGBUF_1_UNDERFLOW, 9, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_SET, SOURCE_RINGBUF_0_UNDERFLOW, 8, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_SET, DEST_RINGBUF_1_EXCEED_FULLMARK, 7, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_SET, DEST_RINGBUF_0_EXCEED_FULLMARK, 6, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_SET, SOURCE_RINGBUF_5_EXCEED_FREEMARK, 5, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_SET, SOURCE_RINGBUF_4_EXCEED_FREEMARK, 4, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_SET, SOURCE_RINGBUF_3_EXCEED_FREEMARK, 3, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_SET, SOURCE_RINGBUF_2_EXCEED_FREEMARK, 2, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_SET, SOURCE_RINGBUF_1_EXCEED_FREEMARK, 1, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_SET, SOURCE_RINGBUF_0_EXCEED_FREEMARK, 0, 1)
|
|
RegFunc(AUD_FMM_BF_ESR0, 0x00271800, AUD_FMM_BF_ESR0_STATUS_CLEAR, 0x8, AUD_FMM_BF_ESR0_STATUS_CLEAR, 0x271808)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_CLEAR, SOURCE_FIFO_5_RD_REPEATORDRO, 29, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_CLEAR, SOURCE_FIFO_4_RD_REPEATORDRO, 28, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_CLEAR, SOURCE_FIFO_3_RD_REPEATORDRO, 27, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_CLEAR, SOURCE_FIFO_2_RD_REPEATORDRO, 26, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_CLEAR, SOURCE_FIFO_1_RD_REPEATORDRO, 25, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_CLEAR, SOURCE_FIFO_0_RD_REPEATORDRO, 24, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_CLEAR, DEST_FIFO_1_OVERFLOW, 23, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_CLEAR, DEST_FIFO_0_OVERFLOW, 22, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_CLEAR, SOURCE_FIFO_5_UNDERFLOW, 21, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_CLEAR, SOURCE_FIFO_4_UNDERFLOW, 20, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_CLEAR, SOURCE_FIFO_3_UNDERFLOW, 19, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_CLEAR, SOURCE_FIFO_2_UNDERFLOW, 18, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_CLEAR, SOURCE_FIFO_1_UNDERFLOW, 17, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_CLEAR, SOURCE_FIFO_0_UNDERFLOW, 16, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_CLEAR, DEST_RINGBUF_1_OVERFLOW, 15, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_CLEAR, DEST_RINGBUF_0_OVERFLOW, 14, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_CLEAR, SOURCE_RINGBUF_5_UNDERFLOW, 13, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_CLEAR, SOURCE_RINGBUF_4_UNDERFLOW, 12, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_CLEAR, SOURCE_RINGBUF_3_UNDERFLOW, 11, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_CLEAR, SOURCE_RINGBUF_2_UNDERFLOW, 10, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_CLEAR, SOURCE_RINGBUF_1_UNDERFLOW, 9, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_CLEAR, SOURCE_RINGBUF_0_UNDERFLOW, 8, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_CLEAR, DEST_RINGBUF_1_EXCEED_FULLMARK, 7, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_CLEAR, DEST_RINGBUF_0_EXCEED_FULLMARK, 6, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_CLEAR, SOURCE_RINGBUF_5_EXCEED_FREEMARK, 5, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_CLEAR, SOURCE_RINGBUF_4_EXCEED_FREEMARK, 4, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_CLEAR, SOURCE_RINGBUF_3_EXCEED_FREEMARK, 3, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_CLEAR, SOURCE_RINGBUF_2_EXCEED_FREEMARK, 2, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_CLEAR, SOURCE_RINGBUF_1_EXCEED_FREEMARK, 1, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_STATUS_CLEAR, SOURCE_RINGBUF_0_EXCEED_FREEMARK, 0, 1)
|
|
RegFunc(AUD_FMM_BF_ESR0, 0x00271800, AUD_FMM_BF_ESR0_MASK, 0xc, AUD_FMM_BF_ESR0_MASK, 0x27180c)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK, DEST_FIFO_1_OVERFLOW, 21, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK, DEST_FIFO_0_OVERFLOW, 20, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK, SOURCE_FIFO_3_UNDERFLOW, 19, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK, SOURCE_FIFO_2_UNDERFLOW, 18, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK, SOURCE_FIFO_1_UNDERFLOW, 17, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK, SOURCE_FIFO_0_UNDERFLOW, 16, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK, DEST_RINGBUF_1_UNDERFLOW, 13, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK, DEST_RINGBUF_0_UNDERFLOW, 12, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK, SOURCE_RINGBUF_3_UNDERFLOW, 11, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK, SOURCE_RINGBUF_2_UNDERFLOW, 10, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK, SOURCE_RINGBUF_1_UNDERFLOW, 9, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK, SOURCE_RINGBUF_0_UNDERFLOW, 8, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK, DEST_RINGBUF_1_EXCEED_FULLMARK, 5, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK, DEST_RINGBUF_0_EXCEED_FULLMARK, 4, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK, SOURCE_RINGBUF_3_EXCEED_FREEMARK, 3, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK, SOURCE_RINGBUF_2_EXCEED_FREEMARK, 2, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK, SOURCE_RINGBUF_1_EXCEED_FREEMARK, 1, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK, SOURCE_RINGBUF_0_EXCEED_FREEMARK, 0, 1)
|
|
RegFunc(AUD_FMM_BF_ESR0, 0x00271800, AUD_FMM_BF_ESR0_MASK_SET, 0x10, AUD_FMM_BF_ESR0_MASK_SET, 0x271810)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_SET, DEST_FIFO_1_OVERFLOW, 21, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_SET, DEST_FIFO_0_OVERFLOW, 20, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_SET, SOURCE_FIFO_3_UNDERFLOW, 19, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_SET, SOURCE_FIFO_2_UNDERFLOW, 18, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_SET, SOURCE_FIFO_1_UNDERFLOW, 17, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_SET, SOURCE_FIFO_0_UNDERFLOW, 16, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_SET, DEST_RINGBUF_1_UNDERFLOW, 13, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_SET, DEST_RINGBUF_0_UNDERFLOW, 12, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_SET, SOURCE_RINGBUF_3_UNDERFLOW, 11, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_SET, SOURCE_RINGBUF_2_UNDERFLOW, 10, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_SET, SOURCE_RINGBUF_1_UNDERFLOW, 9, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_SET, SOURCE_RINGBUF_0_UNDERFLOW, 8, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_SET, DEST_RINGBUF_1_EXCEED_FULLMARK, 5, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_SET, DEST_RINGBUF_0_EXCEED_FULLMARK, 4, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_SET, SOURCE_RINGBUF_3_EXCEED_FREEMARK, 3, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_SET, SOURCE_RINGBUF_2_EXCEED_FREEMARK, 2, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_SET, SOURCE_RINGBUF_1_EXCEED_FREEMARK, 1, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_SET, SOURCE_RINGBUF_0_EXCEED_FREEMARK, 0, 1)
|
|
RegFunc(AUD_FMM_BF_ESR0, 0x00271800, AUD_FMM_BF_ESR0_MASK_CLEAR, 0x14, AUD_FMM_BF_ESR0_MASK_CLEAR, 0x271814)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_CLEAR, DEST_FIFO_1_OVERFLOW, 21, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_CLEAR, DEST_FIFO_0_OVERFLOW, 20, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_CLEAR, SOURCE_FIFO_3_UNDERFLOW, 19, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_CLEAR, SOURCE_FIFO_2_UNDERFLOW, 18, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_CLEAR, SOURCE_FIFO_1_UNDERFLOW, 17, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_CLEAR, SOURCE_FIFO_0_UNDERFLOW, 16, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_CLEAR, DEST_RINGBUF_1_UNDERFLOW, 13, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_CLEAR, DEST_RINGBUF_0_UNDERFLOW, 12, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_CLEAR, SOURCE_RINGBUF_3_UNDERFLOW, 11, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_CLEAR, SOURCE_RINGBUF_2_UNDERFLOW, 10, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_CLEAR, SOURCE_RINGBUF_1_UNDERFLOW, 9, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_CLEAR, SOURCE_RINGBUF_0_UNDERFLOW, 8, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_CLEAR, DEST_RINGBUF_1_EXCEED_FULLMARK, 5, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_CLEAR, DEST_RINGBUF_0_EXCEED_FULLMARK, 4, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_CLEAR, SOURCE_RINGBUF_3_EXCEED_FREEMARK, 3, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_CLEAR, SOURCE_RINGBUF_2_EXCEED_FREEMARK, 2, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_CLEAR, SOURCE_RINGBUF_1_EXCEED_FREEMARK, 1, 1)
|
|
FldFunc(AUD_FMM_BF_ESR0_MASK_CLEAR, SOURCE_RINGBUF_0_EXCEED_FREEMARK, 0, 1)
|
|
|
|
RegAreaFunc(AUD_FMM_BF_ESR1_BASE, 0x00271840, 0x00271854)
|
|
RegFunc(AUD_FMM_BF_ESR1, 0x00271840, AUD_FMM_BF_ESR1_STATUS, 0x0, AUD_FMM_BF_ESR1_STATUS, 0x271840)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS, SOURCE_FIFO_5_RD_REPEATORDRO, 29, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS, SOURCE_FIFO_4_RD_REPEATORDRO, 28, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS, SOURCE_FIFO_3_RD_REPEATORDRO, 27, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS, SOURCE_FIFO_2_RD_REPEATORDRO, 26, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS, SOURCE_FIFO_1_RD_REPEATORDRO, 25, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS, SOURCE_FIFO_0_RD_REPEATORDRO, 24, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS, DEST_FIFO_1_OVERFLOW, 23, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS, DEST_FIFO_0_OVERFLOW, 22, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS, SOURCE_FIFO_5_UNDERFLOW, 21, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS, SOURCE_FIFO_4_UNDERFLOW, 20, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS, SOURCE_FIFO_3_UNDERFLOW, 19, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS, SOURCE_FIFO_2_UNDERFLOW, 18, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS, SOURCE_FIFO_1_UNDERFLOW, 17, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS, SOURCE_FIFO_0_UNDERFLOW, 16, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS, DEST_RINGBUF_1_OVERFLOW, 15, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS, DEST_RINGBUF_0_OVERFLOW, 14, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS, SOURCE_RINGBUF_5_UNDERFLOW, 13, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS, SOURCE_RINGBUF_4_UNDERFLOW, 12, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS, SOURCE_RINGBUF_3_UNDERFLOW, 11, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS, SOURCE_RINGBUF_2_UNDERFLOW, 10, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS, SOURCE_RINGBUF_1_UNDERFLOW, 9, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS, SOURCE_RINGBUF_0_UNDERFLOW, 8, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS, DEST_RINGBUF_1_EXCEED_FULLMARK, 7, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS, DEST_RINGBUF_0_EXCEED_FULLMARK, 6, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS, SOURCE_RINGBUF_5_EXCEED_FREEMARK, 5, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS, SOURCE_RINGBUF_4_EXCEED_FREEMARK, 4, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS, SOURCE_RINGBUF_3_EXCEED_FREEMARK, 3, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS, SOURCE_RINGBUF_2_EXCEED_FREEMARK, 2, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS, SOURCE_RINGBUF_1_EXCEED_FREEMARK, 1, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS, SOURCE_RINGBUF_0_EXCEED_FREEMARK, 0, 1)
|
|
RegFunc(AUD_FMM_BF_ESR1, 0x00271840, AUD_FMM_BF_ESR1_STATUS_SET, 0x4, AUD_FMM_BF_ESR1_STATUS_SET, 0x271844)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_SET, SOURCE_FIFO_5_RD_REPEATORDRO, 29, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_SET, SOURCE_FIFO_4_RD_REPEATORDRO, 28, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_SET, SOURCE_FIFO_3_RD_REPEATORDRO, 27, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_SET, SOURCE_FIFO_2_RD_REPEATORDRO, 26, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_SET, SOURCE_FIFO_1_RD_REPEATORDRO, 25, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_SET, SOURCE_FIFO_0_RD_REPEATORDRO, 24, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_SET, DEST_FIFO_1_OVERFLOW, 23, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_SET, DEST_FIFO_0_OVERFLOW, 22, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_SET, SOURCE_FIFO_5_UNDERFLOW, 21, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_SET, SOURCE_FIFO_4_UNDERFLOW, 20, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_SET, SOURCE_FIFO_3_UNDERFLOW, 19, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_SET, SOURCE_FIFO_2_UNDERFLOW, 18, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_SET, SOURCE_FIFO_1_UNDERFLOW, 17, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_SET, SOURCE_FIFO_0_UNDERFLOW, 16, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_SET, DEST_RINGBUF_1_OVERFLOW, 15, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_SET, DEST_RINGBUF_0_OVERFLOW, 14, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_SET, SOURCE_RINGBUF_5_UNDERFLOW, 13, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_SET, SOURCE_RINGBUF_4_UNDERFLOW, 12, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_SET, SOURCE_RINGBUF_3_UNDERFLOW, 11, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_SET, SOURCE_RINGBUF_2_UNDERFLOW, 10, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_SET, SOURCE_RINGBUF_1_UNDERFLOW, 9, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_SET, SOURCE_RINGBUF_0_UNDERFLOW, 8, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_SET, DEST_RINGBUF_1_EXCEED_FULLMARK, 7, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_SET, DEST_RINGBUF_0_EXCEED_FULLMARK, 6, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_SET, SOURCE_RINGBUF_5_EXCEED_FREEMARK, 5, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_SET, SOURCE_RINGBUF_4_EXCEED_FREEMARK, 4, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_SET, SOURCE_RINGBUF_3_EXCEED_FREEMARK, 3, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_SET, SOURCE_RINGBUF_2_EXCEED_FREEMARK, 2, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_SET, SOURCE_RINGBUF_1_EXCEED_FREEMARK, 1, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_SET, SOURCE_RINGBUF_0_EXCEED_FREEMARK, 0, 1)
|
|
RegFunc(AUD_FMM_BF_ESR1, 0x00271840, AUD_FMM_BF_ESR1_STATUS_CLEAR, 0x8, AUD_FMM_BF_ESR1_STATUS_CLEAR, 0x271848)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_CLEAR, SOURCE_FIFO_5_RD_REPEATORDRO, 29, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_CLEAR, SOURCE_FIFO_4_RD_REPEATORDRO, 28, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_CLEAR, SOURCE_FIFO_3_RD_REPEATORDRO, 27, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_CLEAR, SOURCE_FIFO_2_RD_REPEATORDRO, 26, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_CLEAR, SOURCE_FIFO_1_RD_REPEATORDRO, 25, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_CLEAR, SOURCE_FIFO_0_RD_REPEATORDRO, 24, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_CLEAR, DEST_FIFO_1_OVERFLOW, 23, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_CLEAR, DEST_FIFO_0_OVERFLOW, 22, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_CLEAR, SOURCE_FIFO_5_UNDERFLOW, 21, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_CLEAR, SOURCE_FIFO_4_UNDERFLOW, 20, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_CLEAR, SOURCE_FIFO_3_UNDERFLOW, 19, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_CLEAR, SOURCE_FIFO_2_UNDERFLOW, 18, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_CLEAR, SOURCE_FIFO_1_UNDERFLOW, 17, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_CLEAR, SOURCE_FIFO_0_UNDERFLOW, 16, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_CLEAR, DEST_RINGBUF_1_OVERFLOW, 15, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_CLEAR, DEST_RINGBUF_0_OVERFLOW, 14, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_CLEAR, SOURCE_RINGBUF_5_UNDERFLOW, 13, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_CLEAR, SOURCE_RINGBUF_4_UNDERFLOW, 12, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_CLEAR, SOURCE_RINGBUF_3_UNDERFLOW, 11, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_CLEAR, SOURCE_RINGBUF_2_UNDERFLOW, 10, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_CLEAR, SOURCE_RINGBUF_1_UNDERFLOW, 9, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_CLEAR, SOURCE_RINGBUF_0_UNDERFLOW, 8, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_CLEAR, DEST_RINGBUF_1_EXCEED_FULLMARK, 7, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_CLEAR, DEST_RINGBUF_0_EXCEED_FULLMARK, 6, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_CLEAR, SOURCE_RINGBUF_5_EXCEED_FREEMARK, 5, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_CLEAR, SOURCE_RINGBUF_4_EXCEED_FREEMARK, 4, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_CLEAR, SOURCE_RINGBUF_3_EXCEED_FREEMARK, 3, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_CLEAR, SOURCE_RINGBUF_2_EXCEED_FREEMARK, 2, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_CLEAR, SOURCE_RINGBUF_1_EXCEED_FREEMARK, 1, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_STATUS_CLEAR, SOURCE_RINGBUF_0_EXCEED_FREEMARK, 0, 1)
|
|
RegFunc(AUD_FMM_BF_ESR1, 0x00271840, AUD_FMM_BF_ESR1_MASK, 0xc, AUD_FMM_BF_ESR1_MASK, 0x27184c)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK, DEST_FIFO_1_OVERFLOW, 21, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK, DEST_FIFO_0_OVERFLOW, 20, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK, SOURCE_FIFO_3_UNDERFLOW, 19, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK, SOURCE_FIFO_2_UNDERFLOW, 18, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK, SOURCE_FIFO_1_UNDERFLOW, 17, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK, SOURCE_FIFO_0_UNDERFLOW, 16, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK, DEST_RINGBUF_1_UNDERFLOW, 13, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK, DEST_RINGBUF_0_UNDERFLOW, 12, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK, SOURCE_RINGBUF_3_UNDERFLOW, 11, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK, SOURCE_RINGBUF_2_UNDERFLOW, 10, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK, SOURCE_RINGBUF_1_UNDERFLOW, 9, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK, SOURCE_RINGBUF_0_UNDERFLOW, 8, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK, DEST_RINGBUF_1_EXCEED_FULLMARK, 5, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK, DEST_RINGBUF_0_EXCEED_FULLMARK, 4, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK, SOURCE_RINGBUF_3_EXCEED_FREEMARK, 3, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK, SOURCE_RINGBUF_2_EXCEED_FREEMARK, 2, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK, SOURCE_RINGBUF_1_EXCEED_FREEMARK, 1, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK, SOURCE_RINGBUF_0_EXCEED_FREEMARK, 0, 1)
|
|
RegFunc(AUD_FMM_BF_ESR1, 0x00271840, AUD_FMM_BF_ESR1_MASK_SET, 0x10, AUD_FMM_BF_ESR1_MASK_SET, 0x271850)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_SET, DEST_FIFO_1_OVERFLOW, 21, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_SET, DEST_FIFO_0_OVERFLOW, 20, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_SET, SOURCE_FIFO_3_UNDERFLOW, 19, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_SET, SOURCE_FIFO_2_UNDERFLOW, 18, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_SET, SOURCE_FIFO_1_UNDERFLOW, 17, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_SET, SOURCE_FIFO_0_UNDERFLOW, 16, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_SET, DEST_RINGBUF_1_UNDERFLOW, 13, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_SET, DEST_RINGBUF_0_UNDERFLOW, 12, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_SET, SOURCE_RINGBUF_3_UNDERFLOW, 11, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_SET, SOURCE_RINGBUF_2_UNDERFLOW, 10, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_SET, SOURCE_RINGBUF_1_UNDERFLOW, 9, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_SET, SOURCE_RINGBUF_0_UNDERFLOW, 8, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_SET, DEST_RINGBUF_1_EXCEED_FULLMARK, 5, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_SET, DEST_RINGBUF_0_EXCEED_FULLMARK, 4, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_SET, SOURCE_RINGBUF_3_EXCEED_FREEMARK, 3, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_SET, SOURCE_RINGBUF_2_EXCEED_FREEMARK, 2, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_SET, SOURCE_RINGBUF_1_EXCEED_FREEMARK, 1, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_SET, SOURCE_RINGBUF_0_EXCEED_FREEMARK, 0, 1)
|
|
RegFunc(AUD_FMM_BF_ESR1, 0x00271840, AUD_FMM_BF_ESR1_MASK_CLEAR, 0x14, AUD_FMM_BF_ESR1_MASK_CLEAR, 0x271854)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_CLEAR, DEST_FIFO_1_OVERFLOW, 21, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_CLEAR, DEST_FIFO_0_OVERFLOW, 20, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_CLEAR, SOURCE_FIFO_3_UNDERFLOW, 19, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_CLEAR, SOURCE_FIFO_2_UNDERFLOW, 18, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_CLEAR, SOURCE_FIFO_1_UNDERFLOW, 17, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_CLEAR, SOURCE_FIFO_0_UNDERFLOW, 16, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_CLEAR, DEST_RINGBUF_1_UNDERFLOW, 13, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_CLEAR, DEST_RINGBUF_0_UNDERFLOW, 12, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_CLEAR, SOURCE_RINGBUF_3_UNDERFLOW, 11, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_CLEAR, SOURCE_RINGBUF_2_UNDERFLOW, 10, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_CLEAR, SOURCE_RINGBUF_1_UNDERFLOW, 9, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_CLEAR, SOURCE_RINGBUF_0_UNDERFLOW, 8, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_CLEAR, DEST_RINGBUF_1_EXCEED_FULLMARK, 5, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_CLEAR, DEST_RINGBUF_0_EXCEED_FULLMARK, 4, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_CLEAR, SOURCE_RINGBUF_3_EXCEED_FREEMARK, 3, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_CLEAR, SOURCE_RINGBUF_2_EXCEED_FREEMARK, 2, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_CLEAR, SOURCE_RINGBUF_1_EXCEED_FREEMARK, 1, 1)
|
|
FldFunc(AUD_FMM_BF_ESR1_MASK_CLEAR, SOURCE_RINGBUF_0_EXCEED_FREEMARK, 0, 1)
|
|
|
|
RegAreaFunc(AUD_FMM_DP_CTRL0_BASE, 0x00274000, 0x002748fc)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_STRM_ENA, 0x0, AUD_FMM_DP_CTRL0_STRM_ENA, 0x274000)
|
|
FldFunc(AUD_FMM_DP_CTRL0_STRM_ENA, STREAM3_ENA, 3, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_STRM_ENA, STREAM2_ENA, 2, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_STRM_ENA, STREAM1_ENA, 1, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_STRM_ENA, STREAM0_ENA, 0, 1)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_STRM_FORMAT, 0x4, AUD_FMM_DP_CTRL0_STRM_FORMAT, 0x274004)
|
|
FldFunc(AUD_FMM_DP_CTRL0_STRM_FORMAT, STREAM3_UNDERFLOW_PAUSE, 27, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_STRM_FORMAT, STREAM2_UNDERFLOW_PAUSE, 26, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_STRM_FORMAT, STREAM1_UNDERFLOW_PAUSE, 25, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_STRM_FORMAT, STREAM0_UNDERFLOW_PAUSE, 24, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_STRM_FORMAT, STREAM3_BIT_RESOLUTION, 12, 4)
|
|
FldFunc(AUD_FMM_DP_CTRL0_STRM_FORMAT, STREAM2_BIT_RESOLUTION, 8, 4)
|
|
FldFunc(AUD_FMM_DP_CTRL0_STRM_FORMAT, STREAM1_BIT_RESOLUTION, 4, 4)
|
|
FldFunc(AUD_FMM_DP_CTRL0_STRM_FORMAT, STREAM0_BIT_RESOLUTION, 0, 4)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_MISC_CONFIG, 0x8, AUD_FMM_DP_CTRL0_MISC_CONFIG, 0x274008)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MISC_CONFIG, DIAG_PORT_SEL, 28, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MISC_CONFIG, RESET_DP_VOL_SM, 24, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MISC_CONFIG, RESET_DP_RAMP_SCALE_SM, 23, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MISC_CONFIG, RESET_DP_SRC_SM, 22, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MISC_CONFIG, RESET_DP_CLIENT_SM, 21, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MISC_CONFIG, RESET_DP_SM, 20, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MISC_CONFIG, RESET_CLIENT3_MS_IFACE_SM, 19, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MISC_CONFIG, RESET_CLIENT2_MS_IFACE_SM, 18, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MISC_CONFIG, RESET_CLIENT1_MS_IFACE_SM, 17, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MISC_CONFIG, RESET_CLIENT0_MS_IFACE_SM, 16, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MISC_CONFIG, GET_MAX_BB_ACK_CYCLE, 2, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MISC_CONFIG, GET_CLIENT_MAX_CYCLE, 1, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MISC_CONFIG, GET_MAX_PROCESSING_CYCLE, 0, 1)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_DP_STATUS, 0xc, AUD_FMM_DP_CTRL0_DP_STATUS, 0x27400c)
|
|
FldFunc(AUD_FMM_DP_CTRL0_DP_STATUS, PB3_MUTE_STATUS, 11, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_DP_STATUS, PB2_MUTE_STATUS, 10, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_DP_STATUS, PB1_MUTE_STATUS, 9, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_DP_STATUS, PB0_MUTE_STATUS, 8, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_DP_STATUS, PB3_FLOW_ON, 3, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_DP_STATUS, PB2_FLOW_ON, 2, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_DP_STATUS, PB1_FLOW_ON, 1, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_DP_STATUS, PB0_FLOW_ON, 0, 1)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_DP_SM, 0x10, AUD_FMM_DP_CTRL0_DP_SM, 0x274010)
|
|
FldFunc(AUD_FMM_DP_CTRL0_DP_SM, DP_VOL_SM, 28, 4)
|
|
FldFunc(AUD_FMM_DP_CTRL0_DP_SM, DP_SRAMP_SM, 20, 4)
|
|
FldFunc(AUD_FMM_DP_CTRL0_DP_SM, DP_SRC_SMSR, 12, 5)
|
|
FldFunc(AUD_FMM_DP_CTRL0_DP_SM, DP_CL_SMD, 4, 5)
|
|
FldFunc(AUD_FMM_DP_CTRL0_DP_SM, DP_SM, 0, 2)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_DP_SM_DEBUG, 0x14, AUD_FMM_DP_CTRL0_DP_SM_DEBUG, 0x274014)
|
|
FldFunc(AUD_FMM_DP_CTRL0_DP_SM_DEBUG, CLIENT3_MS_SM, 30, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL0_DP_SM_DEBUG, CLIENT2_MS_SM, 28, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL0_DP_SM_DEBUG, CLIENT1_MS_SM, 26, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL0_DP_SM_DEBUG, CLIENT0_MS_SM, 24, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL0_DP_SM_DEBUG, MAX_PROCESSING_CYCLE, 0, 15)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_DP_DEBUG1, 0x18, AUD_FMM_DP_CTRL0_DP_DEBUG1, 0x274018)
|
|
FldFunc(AUD_FMM_DP_CTRL0_DP_DEBUG1, CLIENT_MAX_CYCLE_ID, 28, 3)
|
|
FldFunc(AUD_FMM_DP_CTRL0_DP_DEBUG1, CLIENT_PROCESSING_CYCLE, 16, 12)
|
|
FldFunc(AUD_FMM_DP_CTRL0_DP_DEBUG1, PLAYBACK_ID, 8, 3)
|
|
FldFunc(AUD_FMM_DP_CTRL0_DP_DEBUG1, BB_ACK_CYCLE, 0, 8)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_MS_CLIENT0_CONFIG, 0x400, AUD_FMM_DP_CTRL0_MS_CLIENT0_CONFIG, 0x274400)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT0_CONFIG, VOLUME_ENA, 31, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT0_CONFIG, VOLUME_MUTE_ENA, 30, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT0_CONFIG, VOLUME_RAMP_ENA, 29, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT0_CONFIG, VOLUME_STARTUP_RAMP_DIS, 28, 1)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_MS_CLIENT0_VOLUME, 0x404, AUD_FMM_DP_CTRL0_MS_CLIENT0_VOLUME, 0x274404)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT0_VOLUME, RIGHT_VOLUME_LEVEL, 16, 16)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT0_VOLUME, LEFT_VOLUME_LEVEL, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_BB_PLAYBACK0_SCALE_SRC_CONFIG, 0x408, AUD_FMM_DP_CTRL0_BB_PLAYBACK0_SCALE_SRC_CONFIG, 0x274408)
|
|
FldFunc(AUD_FMM_DP_CTRL0_BB_PLAYBACK0_SCALE_SRC_CONFIG, SRC_ENB, 28, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_BB_PLAYBACK0_SCALE_SRC_CONFIG, SCALE_RAMP_ENA, 27, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_BB_PLAYBACK0_SCALE_SRC_CONFIG, SCALE_MUTE_ENA, 26, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_BB_PLAYBACK0_SCALE_SRC_CONFIG, SCALE_STARTUP_RAMP_ENB, 25, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_BB_PLAYBACK0_SCALE_SRC_CONFIG, SRC_IOR, 0, 19)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_MS_CLIENT0_MIX1_CONFIG, 0x40c, AUD_FMM_DP_CTRL0_MS_CLIENT0_MIX1_CONFIG, 0x27440c)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT0_MIX1_CONFIG, MONO_SEL, 28, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT0_MIX1_CONFIG, MIX_ENABLE, 24, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT0_MIX1_CONFIG, MIX_SCALE_ENB, 20, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT0_MIX1_CONFIG, MIX_PB_ID, 16, 4)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT0_MIX1_CONFIG, MIX_SCALING_COEF, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_MS_CLIENT0_MIX2_CONFIG, 0x410, AUD_FMM_DP_CTRL0_MS_CLIENT0_MIX2_CONFIG, 0x274410)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT0_MIX2_CONFIG, MONO_SEL, 28, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT0_MIX2_CONFIG, MIX_ENABLE, 24, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT0_MIX2_CONFIG, MIX_SCALE_ENB, 20, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT0_MIX2_CONFIG, MIX_PB_ID, 16, 4)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT0_MIX2_CONFIG, MIX_SCALING_COEF, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_MS_CLIENT0_MIX3_CONFIG, 0x414, AUD_FMM_DP_CTRL0_MS_CLIENT0_MIX3_CONFIG, 0x274414)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT0_MIX3_CONFIG, MONO_SEL, 28, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT0_MIX3_CONFIG, MIX_ENABLE, 24, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT0_MIX3_CONFIG, MIX_SCALE_ENB, 20, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT0_MIX3_CONFIG, MIX_PB_ID, 16, 4)
|
|
FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT0_MIX3_CONFIG, MIX_SCALING_COEF, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_FMM_DP_C_RAM_RESERVE_ECO_0, 0x418, AUD_FMM_DP_CTRL0_FMM_DP_C_RAM_RESERVE_ECO_0, 0x274418)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_FMM_DP_C_RAM_RESERVE_ECO_1, 0x41c, AUD_FMM_DP_CTRL0_FMM_DP_C_RAM_RESERVE_ECO_1, 0x27441c)
|
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RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_MS_CLIENT1_CONFIG, 0x420, AUD_FMM_DP_CTRL0_MS_CLIENT1_CONFIG, 0x274420)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT1_CONFIG, VOLUME_ENA, 31, 1)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT1_CONFIG, VOLUME_MUTE_ENA, 30, 1)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT1_CONFIG, VOLUME_RAMP_ENA, 29, 1)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT1_CONFIG, VOLUME_STARTUP_RAMP_DIS, 28, 1)
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RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_MS_CLIENT1_VOLUME, 0x424, AUD_FMM_DP_CTRL0_MS_CLIENT1_VOLUME, 0x274424)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT1_VOLUME, RIGHT_VOLUME_LEVEL, 16, 16)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT1_VOLUME, LEFT_VOLUME_LEVEL, 0, 16)
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RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_BB_PLAYBACK1_SCALE_SRC_CONFIG, 0x428, AUD_FMM_DP_CTRL0_BB_PLAYBACK1_SCALE_SRC_CONFIG, 0x274428)
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FldFunc(AUD_FMM_DP_CTRL0_BB_PLAYBACK1_SCALE_SRC_CONFIG, SRC_ENB, 28, 1)
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FldFunc(AUD_FMM_DP_CTRL0_BB_PLAYBACK1_SCALE_SRC_CONFIG, SCALE_RAMP_ENA, 27, 1)
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FldFunc(AUD_FMM_DP_CTRL0_BB_PLAYBACK1_SCALE_SRC_CONFIG, SCALE_MUTE_ENA, 26, 1)
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FldFunc(AUD_FMM_DP_CTRL0_BB_PLAYBACK1_SCALE_SRC_CONFIG, SCALE_STARTUP_RAMP_ENB, 25, 1)
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FldFunc(AUD_FMM_DP_CTRL0_BB_PLAYBACK1_SCALE_SRC_CONFIG, SRC_IOR, 0, 19)
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RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_MS_CLIENT1_MIX1_CONFIG, 0x42c, AUD_FMM_DP_CTRL0_MS_CLIENT1_MIX1_CONFIG, 0x27442c)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT1_MIX1_CONFIG, MONO_SEL, 28, 2)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT1_MIX1_CONFIG, MIX_ENABLE, 24, 1)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT1_MIX1_CONFIG, MIX_SCALE_ENB, 20, 1)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT1_MIX1_CONFIG, MIX_PB_ID, 16, 4)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT1_MIX1_CONFIG, MIX_SCALING_COEF, 0, 16)
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RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_MS_CLIENT1_MIX2_CONFIG, 0x430, AUD_FMM_DP_CTRL0_MS_CLIENT1_MIX2_CONFIG, 0x274430)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT1_MIX2_CONFIG, MONO_SEL, 28, 2)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT1_MIX2_CONFIG, MIX_ENABLE, 24, 1)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT1_MIX2_CONFIG, MIX_SCALE_ENB, 20, 1)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT1_MIX2_CONFIG, MIX_PB_ID, 16, 4)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT1_MIX2_CONFIG, MIX_SCALING_COEF, 0, 16)
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RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_MS_CLIENT1_MIX3_CONFIG, 0x434, AUD_FMM_DP_CTRL0_MS_CLIENT1_MIX3_CONFIG, 0x274434)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT1_MIX3_CONFIG, MONO_SEL, 28, 2)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT1_MIX3_CONFIG, MIX_ENABLE, 24, 1)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT1_MIX3_CONFIG, MIX_SCALE_ENB, 20, 1)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT1_MIX3_CONFIG, MIX_PB_ID, 16, 4)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT1_MIX3_CONFIG, MIX_SCALING_COEF, 0, 16)
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RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_FMM_DP_C_RAM_RESERVE_ECO_2, 0x438, AUD_FMM_DP_CTRL0_FMM_DP_C_RAM_RESERVE_ECO_2, 0x274438)
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RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_FMM_DP_C_RAM_RESERVE_ECO_3, 0x43c, AUD_FMM_DP_CTRL0_FMM_DP_C_RAM_RESERVE_ECO_3, 0x27443c)
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RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_MS_CLIENT2_CONFIG, 0x440, AUD_FMM_DP_CTRL0_MS_CLIENT2_CONFIG, 0x274440)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT2_CONFIG, VOLUME_ENA, 31, 1)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT2_CONFIG, VOLUME_MUTE_ENA, 30, 1)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT2_CONFIG, VOLUME_RAMP_ENA, 29, 1)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT2_CONFIG, VOLUME_STARTUP_RAMP_DIS, 28, 1)
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RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_MS_CLIENT2_VOLUME, 0x444, AUD_FMM_DP_CTRL0_MS_CLIENT2_VOLUME, 0x274444)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT2_VOLUME, RIGHT_VOLUME_LEVEL, 16, 16)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT2_VOLUME, LEFT_VOLUME_LEVEL, 0, 16)
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RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_BB_PLAYBACK2_SCALE_SRC_CONFIG, 0x448, AUD_FMM_DP_CTRL0_BB_PLAYBACK2_SCALE_SRC_CONFIG, 0x274448)
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FldFunc(AUD_FMM_DP_CTRL0_BB_PLAYBACK2_SCALE_SRC_CONFIG, SRC_ENB, 28, 1)
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FldFunc(AUD_FMM_DP_CTRL0_BB_PLAYBACK2_SCALE_SRC_CONFIG, SCALE_RAMP_ENA, 27, 1)
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FldFunc(AUD_FMM_DP_CTRL0_BB_PLAYBACK2_SCALE_SRC_CONFIG, SCALE_MUTE_ENA, 26, 1)
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FldFunc(AUD_FMM_DP_CTRL0_BB_PLAYBACK2_SCALE_SRC_CONFIG, SCALE_STARTUP_RAMP_ENB, 25, 1)
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FldFunc(AUD_FMM_DP_CTRL0_BB_PLAYBACK2_SCALE_SRC_CONFIG, SRC_IOR, 0, 19)
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RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_MS_CLIENT2_MIX1_CONFIG, 0x44c, AUD_FMM_DP_CTRL0_MS_CLIENT2_MIX1_CONFIG, 0x27444c)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT2_MIX1_CONFIG, MONO_SEL, 28, 2)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT2_MIX1_CONFIG, MIX_ENABLE, 24, 1)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT2_MIX1_CONFIG, MIX_SCALE_ENB, 20, 1)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT2_MIX1_CONFIG, MIX_PB_ID, 16, 4)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT2_MIX1_CONFIG, MIX_SCALING_COEF, 0, 16)
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RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_MS_CLIENT2_MIX2_CONFIG, 0x450, AUD_FMM_DP_CTRL0_MS_CLIENT2_MIX2_CONFIG, 0x274450)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT2_MIX2_CONFIG, MONO_SEL, 28, 2)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT2_MIX2_CONFIG, MIX_ENABLE, 24, 1)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT2_MIX2_CONFIG, MIX_SCALE_ENB, 20, 1)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT2_MIX2_CONFIG, MIX_PB_ID, 16, 4)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT2_MIX2_CONFIG, MIX_SCALING_COEF, 0, 16)
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RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_MS_CLIENT2_MIX3_CONFIG, 0x454, AUD_FMM_DP_CTRL0_MS_CLIENT2_MIX3_CONFIG, 0x274454)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT2_MIX3_CONFIG, MONO_SEL, 28, 2)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT2_MIX3_CONFIG, MIX_ENABLE, 24, 1)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT2_MIX3_CONFIG, MIX_SCALE_ENB, 20, 1)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT2_MIX3_CONFIG, MIX_PB_ID, 16, 4)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT2_MIX3_CONFIG, MIX_SCALING_COEF, 0, 16)
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RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_FMM_DP_C_RAM_RESERVE_ECO_4, 0x458, AUD_FMM_DP_CTRL0_FMM_DP_C_RAM_RESERVE_ECO_4, 0x274458)
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RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_FMM_DP_C_RAM_RESERVE_ECO_5, 0x45c, AUD_FMM_DP_CTRL0_FMM_DP_C_RAM_RESERVE_ECO_5, 0x27445c)
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RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_MS_CLIENT3_CONFIG, 0x460, AUD_FMM_DP_CTRL0_MS_CLIENT3_CONFIG, 0x274460)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT3_CONFIG, VOLUME_ENA, 31, 1)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT3_CONFIG, VOLUME_MUTE_ENA, 30, 1)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT3_CONFIG, VOLUME_RAMP_ENA, 29, 1)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT3_CONFIG, VOLUME_STARTUP_RAMP_DIS, 28, 1)
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RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_MS_CLIENT3_VOLUME, 0x464, AUD_FMM_DP_CTRL0_MS_CLIENT3_VOLUME, 0x274464)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT3_VOLUME, RIGHT_VOLUME_LEVEL, 16, 16)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT3_VOLUME, LEFT_VOLUME_LEVEL, 0, 16)
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RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_BB_PLAYBACK3_SCALE_SRC_CONFIG, 0x468, AUD_FMM_DP_CTRL0_BB_PLAYBACK3_SCALE_SRC_CONFIG, 0x274468)
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FldFunc(AUD_FMM_DP_CTRL0_BB_PLAYBACK3_SCALE_SRC_CONFIG, SRC_ENB, 28, 1)
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FldFunc(AUD_FMM_DP_CTRL0_BB_PLAYBACK3_SCALE_SRC_CONFIG, SCALE_RAMP_ENA, 27, 1)
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FldFunc(AUD_FMM_DP_CTRL0_BB_PLAYBACK3_SCALE_SRC_CONFIG, SCALE_MUTE_ENA, 26, 1)
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FldFunc(AUD_FMM_DP_CTRL0_BB_PLAYBACK3_SCALE_SRC_CONFIG, SCALE_STARTUP_RAMP_ENB, 25, 1)
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FldFunc(AUD_FMM_DP_CTRL0_BB_PLAYBACK3_SCALE_SRC_CONFIG, SRC_IOR, 0, 19)
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RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_MS_CLIENT3_MIX1_CONFIG, 0x46c, AUD_FMM_DP_CTRL0_MS_CLIENT3_MIX1_CONFIG, 0x27446c)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT3_MIX1_CONFIG, MONO_SEL, 28, 2)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT3_MIX1_CONFIG, MIX_ENABLE, 24, 1)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT3_MIX1_CONFIG, MIX_SCALE_ENB, 20, 1)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT3_MIX1_CONFIG, MIX_PB_ID, 16, 4)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT3_MIX1_CONFIG, MIX_SCALING_COEF, 0, 16)
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RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_MS_CLIENT3_MIX2_CONFIG, 0x470, AUD_FMM_DP_CTRL0_MS_CLIENT3_MIX2_CONFIG, 0x274470)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT3_MIX2_CONFIG, MONO_SEL, 28, 2)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT3_MIX2_CONFIG, MIX_ENABLE, 24, 1)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT3_MIX2_CONFIG, MIX_SCALE_ENB, 20, 1)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT3_MIX2_CONFIG, MIX_PB_ID, 16, 4)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT3_MIX2_CONFIG, MIX_SCALING_COEF, 0, 16)
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RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_MS_CLIENT3_MIX3_CONFIG, 0x474, AUD_FMM_DP_CTRL0_MS_CLIENT3_MIX3_CONFIG, 0x274474)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT3_MIX3_CONFIG, MONO_SEL, 28, 2)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT3_MIX3_CONFIG, MIX_ENABLE, 24, 1)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT3_MIX3_CONFIG, MIX_SCALE_ENB, 20, 1)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT3_MIX3_CONFIG, MIX_PB_ID, 16, 4)
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FldFunc(AUD_FMM_DP_CTRL0_MS_CLIENT3_MIX3_CONFIG, MIX_SCALING_COEF, 0, 16)
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RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_FMM_DP_C_RAM_RESERVE_ECO_6, 0x478, AUD_FMM_DP_CTRL0_FMM_DP_C_RAM_RESERVE_ECO_6, 0x274478)
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RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_FMM_SCALE_VOL_STEP, 0x47c, AUD_FMM_DP_CTRL0_FMM_SCALE_VOL_STEP, 0x27447c)
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FldFunc(AUD_FMM_DP_CTRL0_FMM_SCALE_VOL_STEP, SCALE_RAMP_STEP_SIZE, 16, 16)
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FldFunc(AUD_FMM_DP_CTRL0_FMM_SCALE_VOL_STEP, VOL_RAMP_STEP_SIZE, 0, 16)
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RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_C_RAM, 0x480, AUD_FMM_DP_CTRL0_C_RAM, 0x274480)
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RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB0_FIFO_DATA0, 0x800, AUD_FMM_DP_CTRL0_PB0_FIFO_DATA0, 0x274800)
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FldFunc(AUD_FMM_DP_CTRL0_PB0_FIFO_DATA0, PB_FIFO_DATA0, 0, 24)
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RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB0_FIFO_DATA1, 0x804, AUD_FMM_DP_CTRL0_PB0_FIFO_DATA1, 0x274804)
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FldFunc(AUD_FMM_DP_CTRL0_PB0_FIFO_DATA1, PB_FIFO_DATA1, 0, 24)
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|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB0_FIFO_DATA2, 0x808, AUD_FMM_DP_CTRL0_PB0_FIFO_DATA2, 0x274808)
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FldFunc(AUD_FMM_DP_CTRL0_PB0_FIFO_DATA2, PB_FIFO_DATA2, 0, 24)
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|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB0_FIFO_DATA3, 0x80c, AUD_FMM_DP_CTRL0_PB0_FIFO_DATA3, 0x27480c)
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FldFunc(AUD_FMM_DP_CTRL0_PB0_FIFO_DATA3, PB_FIFO_DATA3, 0, 24)
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|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB0_SRC_FIFO_DATA0, 0x810, AUD_FMM_DP_CTRL0_PB0_SRC_FIFO_DATA0, 0x274810)
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|
FldFunc(AUD_FMM_DP_CTRL0_PB0_SRC_FIFO_DATA0, PB_SRC_FIFO_DATA0, 0, 24)
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|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB0_SRC_FIFO_DATA1, 0x814, AUD_FMM_DP_CTRL0_PB0_SRC_FIFO_DATA1, 0x274814)
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|
FldFunc(AUD_FMM_DP_CTRL0_PB0_SRC_FIFO_DATA1, PB_SRC_FIFO_DATA1, 0, 24)
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|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB0_SRC_FIFO_DATA2, 0x818, AUD_FMM_DP_CTRL0_PB0_SRC_FIFO_DATA2, 0x274818)
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|
FldFunc(AUD_FMM_DP_CTRL0_PB0_SRC_FIFO_DATA2, PB_SRC_FIFO_DATA2, 0, 24)
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|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB0_SRC_FIFO_DATA3, 0x81c, AUD_FMM_DP_CTRL0_PB0_SRC_FIFO_DATA3, 0x27481c)
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|
FldFunc(AUD_FMM_DP_CTRL0_PB0_SRC_FIFO_DATA3, PB_SRC_FIFO_DATA3, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_CLIENT_PB0_FIFO_POINTERS, 0x820, AUD_FMM_DP_CTRL0_CLIENT_PB0_FIFO_POINTERS, 0x274820)
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|
FldFunc(AUD_FMM_DP_CTRL0_CLIENT_PB0_FIFO_POINTERS, SRC_FIFO_POINTER, 22, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLIENT_PB0_FIFO_POINTERS, PB_FIFO_POINTER, 20, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLIENT_PB0_FIFO_POINTERS, CLNT3_PB_FIFO_POINTER, 18, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLIENT_PB0_FIFO_POINTERS, CLNT2_PB_FIFO_POINTER, 16, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLIENT_PB0_FIFO_POINTERS, CLNT1_PB_FIFO_POINTER, 14, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLIENT_PB0_FIFO_POINTERS, CLNT0_PB_FIFO_POINTER, 12, 2)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB0_SRC_DDA_DATA, 0x824, AUD_FMM_DP_CTRL0_PB0_SRC_DDA_DATA, 0x274824)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB0_SRC_DDA_DATA, PB_SRC_DDA, 0, 18)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB0_CURRENT_SCALE, 0x828, AUD_FMM_DP_CTRL0_PB0_CURRENT_SCALE, 0x274828)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB0_CURRENT_SCALE, CURRENT_SCALE_RAMPING, 22, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB0_CURRENT_SCALE, CURRENT_SCALE, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_CLNT0_CURRENT_LEFT_VOL, 0x82c, AUD_FMM_DP_CTRL0_CLNT0_CURRENT_LEFT_VOL, 0x27482c)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLNT0_CURRENT_LEFT_VOL, CURRENT_LEFT_VOL_RAMPING, 22, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLNT0_CURRENT_LEFT_VOL, CURRENT_LEFT_VOL, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_CLNT0_CURRENT_RIGHT_VOL, 0x830, AUD_FMM_DP_CTRL0_CLNT0_CURRENT_RIGHT_VOL, 0x274830)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLNT0_CURRENT_RIGHT_VOL, CURRENT_RIGHT_VOL_RAMPING, 23, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLNT0_CURRENT_RIGHT_VOL, CURRENT_RIGHT_VOL, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_FMM_DP_T_RAM_RESERVE_ECO_0, 0x834, AUD_FMM_DP_CTRL0_FMM_DP_T_RAM_RESERVE_ECO_0, 0x274834)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_FMM_DP_T_RAM_RESERVE_ECO_1, 0x838, AUD_FMM_DP_CTRL0_FMM_DP_T_RAM_RESERVE_ECO_1, 0x274838)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_FMM_DP_T_RAM_RESERVE_ECO_2, 0x83c, AUD_FMM_DP_CTRL0_FMM_DP_T_RAM_RESERVE_ECO_2, 0x27483c)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB1_FIFO_DATA0, 0x840, AUD_FMM_DP_CTRL0_PB1_FIFO_DATA0, 0x274840)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB1_FIFO_DATA0, PB_FIFO_DATA0, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB1_FIFO_DATA1, 0x844, AUD_FMM_DP_CTRL0_PB1_FIFO_DATA1, 0x274844)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB1_FIFO_DATA1, PB_FIFO_DATA1, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB1_FIFO_DATA2, 0x848, AUD_FMM_DP_CTRL0_PB1_FIFO_DATA2, 0x274848)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB1_FIFO_DATA2, PB_FIFO_DATA2, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB1_FIFO_DATA3, 0x84c, AUD_FMM_DP_CTRL0_PB1_FIFO_DATA3, 0x27484c)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB1_FIFO_DATA3, PB_FIFO_DATA3, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB1_SRC_FIFO_DATA0, 0x850, AUD_FMM_DP_CTRL0_PB1_SRC_FIFO_DATA0, 0x274850)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB1_SRC_FIFO_DATA0, PB_SRC_FIFO_DATA0, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB1_SRC_FIFO_DATA1, 0x854, AUD_FMM_DP_CTRL0_PB1_SRC_FIFO_DATA1, 0x274854)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB1_SRC_FIFO_DATA1, PB_SRC_FIFO_DATA1, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB1_SRC_FIFO_DATA2, 0x858, AUD_FMM_DP_CTRL0_PB1_SRC_FIFO_DATA2, 0x274858)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB1_SRC_FIFO_DATA2, PB_SRC_FIFO_DATA2, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB1_SRC_FIFO_DATA3, 0x85c, AUD_FMM_DP_CTRL0_PB1_SRC_FIFO_DATA3, 0x27485c)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB1_SRC_FIFO_DATA3, PB_SRC_FIFO_DATA3, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_CLIENT_PB1_FIFO_POINTERS, 0x860, AUD_FMM_DP_CTRL0_CLIENT_PB1_FIFO_POINTERS, 0x274860)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLIENT_PB1_FIFO_POINTERS, SRC_FIFO_POINTER, 22, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLIENT_PB1_FIFO_POINTERS, PB_FIFO_POINTER, 20, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLIENT_PB1_FIFO_POINTERS, CLNT3_PB_FIFO_POINTER, 18, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLIENT_PB1_FIFO_POINTERS, CLNT2_PB_FIFO_POINTER, 16, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLIENT_PB1_FIFO_POINTERS, CLNT1_PB_FIFO_POINTER, 14, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLIENT_PB1_FIFO_POINTERS, CLNT0_PB_FIFO_POINTER, 12, 2)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB1_SRC_DDA_DATA, 0x864, AUD_FMM_DP_CTRL0_PB1_SRC_DDA_DATA, 0x274864)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB1_SRC_DDA_DATA, PB_SRC_DDA, 0, 18)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB1_CURRENT_SCALE, 0x868, AUD_FMM_DP_CTRL0_PB1_CURRENT_SCALE, 0x274868)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB1_CURRENT_SCALE, CURRENT_SCALE_RAMPING, 22, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB1_CURRENT_SCALE, CURRENT_SCALE, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_CLNT1_CURRENT_LEFT_VOL, 0x86c, AUD_FMM_DP_CTRL0_CLNT1_CURRENT_LEFT_VOL, 0x27486c)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLNT1_CURRENT_LEFT_VOL, CURRENT_LEFT_VOL_RAMPING, 22, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLNT1_CURRENT_LEFT_VOL, CURRENT_LEFT_VOL, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_CLNT1_CURRENT_RIGHT_VOL, 0x870, AUD_FMM_DP_CTRL0_CLNT1_CURRENT_RIGHT_VOL, 0x274870)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLNT1_CURRENT_RIGHT_VOL, CURRENT_RIGHT_VOL_RAMPING, 23, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLNT1_CURRENT_RIGHT_VOL, CURRENT_RIGHT_VOL, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_FMM_DP_T_RAM_RESERVE_ECO_3, 0x874, AUD_FMM_DP_CTRL0_FMM_DP_T_RAM_RESERVE_ECO_3, 0x274874)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_FMM_DP_T_RAM_RESERVE_ECO_4, 0x878, AUD_FMM_DP_CTRL0_FMM_DP_T_RAM_RESERVE_ECO_4, 0x274878)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_FMM_DP_T_RAM_RESERVE_ECO_5, 0x87c, AUD_FMM_DP_CTRL0_FMM_DP_T_RAM_RESERVE_ECO_5, 0x27487c)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB2_FIFO_DATA0, 0x880, AUD_FMM_DP_CTRL0_PB2_FIFO_DATA0, 0x274880)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB2_FIFO_DATA0, PB_FIFO_DATA0, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB2_FIFO_DATA1, 0x884, AUD_FMM_DP_CTRL0_PB2_FIFO_DATA1, 0x274884)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB2_FIFO_DATA1, PB_FIFO_DATA1, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB2_FIFO_DATA2, 0x888, AUD_FMM_DP_CTRL0_PB2_FIFO_DATA2, 0x274888)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB2_FIFO_DATA2, PB_FIFO_DATA2, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB2_FIFO_DATA3, 0x88c, AUD_FMM_DP_CTRL0_PB2_FIFO_DATA3, 0x27488c)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB2_FIFO_DATA3, PB_FIFO_DATA3, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB2_SRC_FIFO_DATA0, 0x890, AUD_FMM_DP_CTRL0_PB2_SRC_FIFO_DATA0, 0x274890)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB2_SRC_FIFO_DATA0, PB_SRC_FIFO_DATA0, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB2_SRC_FIFO_DATA1, 0x894, AUD_FMM_DP_CTRL0_PB2_SRC_FIFO_DATA1, 0x274894)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB2_SRC_FIFO_DATA1, PB_SRC_FIFO_DATA1, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB2_SRC_FIFO_DATA2, 0x898, AUD_FMM_DP_CTRL0_PB2_SRC_FIFO_DATA2, 0x274898)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB2_SRC_FIFO_DATA2, PB_SRC_FIFO_DATA2, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB2_SRC_FIFO_DATA3, 0x89c, AUD_FMM_DP_CTRL0_PB2_SRC_FIFO_DATA3, 0x27489c)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB2_SRC_FIFO_DATA3, PB_SRC_FIFO_DATA3, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_CLIENT_PB2_FIFO_POINTERS, 0x8a0, AUD_FMM_DP_CTRL0_CLIENT_PB2_FIFO_POINTERS, 0x2748a0)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLIENT_PB2_FIFO_POINTERS, SRC_FIFO_POINTER, 22, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLIENT_PB2_FIFO_POINTERS, PB_FIFO_POINTER, 20, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLIENT_PB2_FIFO_POINTERS, CLNT3_PB_FIFO_POINTER, 18, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLIENT_PB2_FIFO_POINTERS, CLNT2_PB_FIFO_POINTER, 16, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLIENT_PB2_FIFO_POINTERS, CLNT1_PB_FIFO_POINTER, 14, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLIENT_PB2_FIFO_POINTERS, CLNT0_PB_FIFO_POINTER, 12, 2)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB2_SRC_DDA_DATA, 0x8a4, AUD_FMM_DP_CTRL0_PB2_SRC_DDA_DATA, 0x2748a4)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB2_SRC_DDA_DATA, PB_SRC_DDA, 0, 18)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB2_CURRENT_SCALE, 0x8a8, AUD_FMM_DP_CTRL0_PB2_CURRENT_SCALE, 0x2748a8)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB2_CURRENT_SCALE, CURRENT_SCALE_RAMPING, 22, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB2_CURRENT_SCALE, CURRENT_SCALE, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_CLNT2_CURRENT_LEFT_VOL, 0x8ac, AUD_FMM_DP_CTRL0_CLNT2_CURRENT_LEFT_VOL, 0x2748ac)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLNT2_CURRENT_LEFT_VOL, CURRENT_LEFT_VOL_RAMPING, 22, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLNT2_CURRENT_LEFT_VOL, CURRENT_LEFT_VOL, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_CLNT2_CURRENT_RIGHT_VOL, 0x8b0, AUD_FMM_DP_CTRL0_CLNT2_CURRENT_RIGHT_VOL, 0x2748b0)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLNT2_CURRENT_RIGHT_VOL, CURRENT_RIGHT_VOL_RAMPING, 23, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLNT2_CURRENT_RIGHT_VOL, CURRENT_RIGHT_VOL, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_FMM_DP_T_RAM_RESERVE_ECO_6, 0x8b4, AUD_FMM_DP_CTRL0_FMM_DP_T_RAM_RESERVE_ECO_6, 0x2748b4)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_FMM_DP_T_RAM_RESERVE_ECO_7, 0x8b8, AUD_FMM_DP_CTRL0_FMM_DP_T_RAM_RESERVE_ECO_7, 0x2748b8)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_FMM_DP_T_RAM_RESERVE_ECO_8, 0x8bc, AUD_FMM_DP_CTRL0_FMM_DP_T_RAM_RESERVE_ECO_8, 0x2748bc)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB3_FIFO_DATA0, 0x8c0, AUD_FMM_DP_CTRL0_PB3_FIFO_DATA0, 0x2748c0)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB3_FIFO_DATA0, PB_FIFO_DATA0, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB3_FIFO_DATA1, 0x8c4, AUD_FMM_DP_CTRL0_PB3_FIFO_DATA1, 0x2748c4)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB3_FIFO_DATA1, PB_FIFO_DATA1, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB3_FIFO_DATA2, 0x8c8, AUD_FMM_DP_CTRL0_PB3_FIFO_DATA2, 0x2748c8)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB3_FIFO_DATA2, PB_FIFO_DATA2, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB3_FIFO_DATA3, 0x8cc, AUD_FMM_DP_CTRL0_PB3_FIFO_DATA3, 0x2748cc)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB3_FIFO_DATA3, PB_FIFO_DATA3, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB3_SRC_FIFO_DATA0, 0x8d0, AUD_FMM_DP_CTRL0_PB3_SRC_FIFO_DATA0, 0x2748d0)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB3_SRC_FIFO_DATA0, PB_SRC_FIFO_DATA0, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB3_SRC_FIFO_DATA1, 0x8d4, AUD_FMM_DP_CTRL0_PB3_SRC_FIFO_DATA1, 0x2748d4)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB3_SRC_FIFO_DATA1, PB_SRC_FIFO_DATA1, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB3_SRC_FIFO_DATA2, 0x8d8, AUD_FMM_DP_CTRL0_PB3_SRC_FIFO_DATA2, 0x2748d8)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB3_SRC_FIFO_DATA2, PB_SRC_FIFO_DATA2, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB3_SRC_FIFO_DATA3, 0x8dc, AUD_FMM_DP_CTRL0_PB3_SRC_FIFO_DATA3, 0x2748dc)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB3_SRC_FIFO_DATA3, PB_SRC_FIFO_DATA3, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_CLIENT_PB3_FIFO_POINTERS, 0x8e0, AUD_FMM_DP_CTRL0_CLIENT_PB3_FIFO_POINTERS, 0x2748e0)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLIENT_PB3_FIFO_POINTERS, SRC_FIFO_POINTER, 22, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLIENT_PB3_FIFO_POINTERS, PB_FIFO_POINTER, 20, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLIENT_PB3_FIFO_POINTERS, CLNT3_PB_FIFO_POINTER, 18, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLIENT_PB3_FIFO_POINTERS, CLNT2_PB_FIFO_POINTER, 16, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLIENT_PB3_FIFO_POINTERS, CLNT1_PB_FIFO_POINTER, 14, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLIENT_PB3_FIFO_POINTERS, CLNT0_PB_FIFO_POINTER, 12, 2)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB3_SRC_DDA_DATA, 0x8e4, AUD_FMM_DP_CTRL0_PB3_SRC_DDA_DATA, 0x2748e4)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB3_SRC_DDA_DATA, PB_SRC_DDA, 0, 18)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_PB3_CURRENT_SCALE, 0x8e8, AUD_FMM_DP_CTRL0_PB3_CURRENT_SCALE, 0x2748e8)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB3_CURRENT_SCALE, CURRENT_SCALE_RAMPING, 22, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_PB3_CURRENT_SCALE, CURRENT_SCALE, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_CLNT3_CURRENT_LEFT_VOL, 0x8ec, AUD_FMM_DP_CTRL0_CLNT3_CURRENT_LEFT_VOL, 0x2748ec)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLNT3_CURRENT_LEFT_VOL, CURRENT_LEFT_VOL_RAMPING, 22, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLNT3_CURRENT_LEFT_VOL, CURRENT_LEFT_VOL, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_CLNT3_CURRENT_RIGHT_VOL, 0x8f0, AUD_FMM_DP_CTRL0_CLNT3_CURRENT_RIGHT_VOL, 0x2748f0)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLNT3_CURRENT_RIGHT_VOL, CURRENT_RIGHT_VOL_RAMPING, 23, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL0_CLNT3_CURRENT_RIGHT_VOL, CURRENT_RIGHT_VOL, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_FMM_DP_T_RAM_RESERVE_ECO_9, 0x8f4, AUD_FMM_DP_CTRL0_FMM_DP_T_RAM_RESERVE_ECO_9, 0x2748f4)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_FMM_DP_T_RAM_RESERVE_ECO_10, 0x8f8, AUD_FMM_DP_CTRL0_FMM_DP_T_RAM_RESERVE_ECO_10, 0x2748f8)
|
|
RegFunc(AUD_FMM_DP_CTRL0, 0x00274000, AUD_FMM_DP_CTRL0_FMM_DP_T_RAM_RESERVE_ECO_11, 0x8fc, AUD_FMM_DP_CTRL0_FMM_DP_T_RAM_RESERVE_ECO_11, 0x2748fc)
|
|
|
|
RegAreaFunc(AUD_FMM_DP_ESR0_BASE, 0x00275000, 0x00275014)
|
|
RegFunc(AUD_FMM_DP_ESR0, 0x00275000, AUD_FMM_DP_ESR0_STATUS, 0x0, AUD_FMM_DP_ESR0_STATUS, 0x275000)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS, CLIENT3_RATE_ERR, 15, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS, CLIENT2_RATE_ERR, 14, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS, CLIENT1_RATE_ERR, 13, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS, CLIENT0_RATE_ERR, 12, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS, VOL_RAMP_DONE3, 11, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS, VOL_RAMP_DONE2, 10, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS, VOL_RAMP_DONE1, 9, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS, VOL_RAMP_DONE0, 8, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS, SCALE_RAMP_DONE3, 7, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS, SCALE_RAMP_DONE2, 6, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS, SCALE_RAMP_DONE1, 5, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS, SCALE_RAMP_DONE0, 4, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS, UNDERFLOW3, 3, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS, UNDERFLOW2, 2, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS, UNDERFLOW1, 1, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS, UNDERFLOW0, 0, 1)
|
|
RegFunc(AUD_FMM_DP_ESR0, 0x00275000, AUD_FMM_DP_ESR0_STATUS_SET, 0x4, AUD_FMM_DP_ESR0_STATUS_SET, 0x275004)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS_SET, CLIENT3_RATE_ERR, 15, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS_SET, CLIENT2_RATE_ERR, 14, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS_SET, CLIENT1_RATE_ERR, 13, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS_SET, CLIENT0_RATE_ERR, 12, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS_SET, VOL_RAMP_DONE3, 11, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS_SET, VOL_RAMP_DONE2, 10, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS_SET, VOL_RAMP_DONE1, 9, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS_SET, VOL_RAMP_DONE0, 8, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS_SET, SCALE_RAMP_DONE3, 7, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS_SET, SCALE_RAMP_DONE2, 6, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS_SET, SCALE_RAMP_DONE1, 5, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS_SET, SCALE_RAMP_DONE0, 4, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS_SET, UNDERFLOW3, 3, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS_SET, UNDERFLOW2, 2, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS_SET, UNDERFLOW1, 1, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS_SET, UNDERFLOW0, 0, 1)
|
|
RegFunc(AUD_FMM_DP_ESR0, 0x00275000, AUD_FMM_DP_ESR0_STATUS_CLEAR, 0x8, AUD_FMM_DP_ESR0_STATUS_CLEAR, 0x275008)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS_CLEAR, CLIENT3_RATE_ERR, 15, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS_CLEAR, CLIENT2_RATE_ERR, 14, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS_CLEAR, CLIENT1_RATE_ERR, 13, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS_CLEAR, CLIENT0_RATE_ERR, 12, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS_CLEAR, VOL_RAMP_DONE3, 11, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS_CLEAR, VOL_RAMP_DONE2, 10, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS_CLEAR, VOL_RAMP_DONE1, 9, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS_CLEAR, VOL_RAMP_DONE0, 8, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS_CLEAR, SCALE_RAMP_DONE3, 7, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS_CLEAR, SCALE_RAMP_DONE2, 6, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS_CLEAR, SCALE_RAMP_DONE1, 5, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS_CLEAR, SCALE_RAMP_DONE0, 4, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS_CLEAR, UNDERFLOW3, 3, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS_CLEAR, UNDERFLOW2, 2, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS_CLEAR, UNDERFLOW1, 1, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_STATUS_CLEAR, UNDERFLOW0, 0, 1)
|
|
RegFunc(AUD_FMM_DP_ESR0, 0x00275000, AUD_FMM_DP_ESR0_MASK, 0xc, AUD_FMM_DP_ESR0_MASK, 0x27500c)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK, CLIENT3_RATE_ERR, 15, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK, CLIENT2_RATE_ERR, 14, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK, CLIENT1_RATE_ERR, 13, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK, CLIENT0_RATE_ERR, 12, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK, VOL_RAMP_DONE3, 11, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK, VOL_RAMP_DONE2, 10, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK, VOL_RAMP_DONE1, 9, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK, VOL_RAMP_DONE0, 8, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK, SCALE_RAMP_DONE3, 7, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK, SCALE_RAMP_DONE2, 6, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK, SCALE_RAMP_DONE1, 5, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK, SCALE_RAMP_DONE0, 4, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK, UNDERFLOW3, 3, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK, UNDERFLOW2, 2, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK, UNDERFLOW1, 1, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK, UNDERFLOW0, 0, 1)
|
|
RegFunc(AUD_FMM_DP_ESR0, 0x00275000, AUD_FMM_DP_ESR0_MASK_SET, 0x10, AUD_FMM_DP_ESR0_MASK_SET, 0x275010)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK_SET, CLIENT3_RATE_ERR, 15, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK_SET, CLIENT2_RATE_ERR, 14, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK_SET, CLIENT1_RATE_ERR, 13, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK_SET, CLIENT0_RATE_ERR, 12, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK_SET, VOL_RAMP_DONE3, 11, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK_SET, VOL_RAMP_DONE2, 10, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK_SET, VOL_RAMP_DONE1, 9, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK_SET, VOL_RAMP_DONE0, 8, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK_SET, SCALE_RAMP_DONE3, 7, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK_SET, SCALE_RAMP_DONE2, 6, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK_SET, SCALE_RAMP_DONE1, 5, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK_SET, SCALE_RAMP_DONE0, 4, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK_SET, UNDERFLOW3, 3, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK_SET, UNDERFLOW2, 2, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK_SET, UNDERFLOW1, 1, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK_SET, UNDERFLOW0, 0, 1)
|
|
RegFunc(AUD_FMM_DP_ESR0, 0x00275000, AUD_FMM_DP_ESR0_MASK_CLEAR, 0x14, AUD_FMM_DP_ESR0_MASK_CLEAR, 0x275014)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK_CLEAR, CLIENT3_RATE_ERR, 15, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK_CLEAR, CLIENT2_RATE_ERR, 14, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK_CLEAR, CLIENT1_RATE_ERR, 13, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK_CLEAR, CLIENT0_RATE_ERR, 12, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK_CLEAR, VOL_RAMP_DONE3, 11, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK_CLEAR, VOL_RAMP_DONE2, 10, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK_CLEAR, VOL_RAMP_DONE1, 9, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK_CLEAR, VOL_RAMP_DONE0, 8, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK_CLEAR, SCALE_RAMP_DONE3, 7, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK_CLEAR, SCALE_RAMP_DONE2, 6, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK_CLEAR, SCALE_RAMP_DONE1, 5, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK_CLEAR, SCALE_RAMP_DONE0, 4, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK_CLEAR, UNDERFLOW3, 3, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK_CLEAR, UNDERFLOW2, 2, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK_CLEAR, UNDERFLOW1, 1, 1)
|
|
FldFunc(AUD_FMM_DP_ESR0_MASK_CLEAR, UNDERFLOW0, 0, 1)
|
|
|
|
RegAreaFunc(AUD_FMM_DP_CTRL1_BASE, 0x00276000, 0x002768fc)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_STRM_ENA, 0x0, AUD_FMM_DP_CTRL1_STRM_ENA, 0x276000)
|
|
FldFunc(AUD_FMM_DP_CTRL1_STRM_ENA, STREAM3_ENA, 3, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_STRM_ENA, STREAM2_ENA, 2, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_STRM_ENA, STREAM1_ENA, 1, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_STRM_ENA, STREAM0_ENA, 0, 1)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_STRM_FORMAT, 0x4, AUD_FMM_DP_CTRL1_STRM_FORMAT, 0x276004)
|
|
FldFunc(AUD_FMM_DP_CTRL1_STRM_FORMAT, STREAM3_UNDERFLOW_PAUSE, 27, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_STRM_FORMAT, STREAM2_UNDERFLOW_PAUSE, 26, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_STRM_FORMAT, STREAM1_UNDERFLOW_PAUSE, 25, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_STRM_FORMAT, STREAM0_UNDERFLOW_PAUSE, 24, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_STRM_FORMAT, STREAM3_BIT_RESOLUTION, 12, 4)
|
|
FldFunc(AUD_FMM_DP_CTRL1_STRM_FORMAT, STREAM2_BIT_RESOLUTION, 8, 4)
|
|
FldFunc(AUD_FMM_DP_CTRL1_STRM_FORMAT, STREAM1_BIT_RESOLUTION, 4, 4)
|
|
FldFunc(AUD_FMM_DP_CTRL1_STRM_FORMAT, STREAM0_BIT_RESOLUTION, 0, 4)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_MISC_CONFIG, 0x8, AUD_FMM_DP_CTRL1_MISC_CONFIG, 0x276008)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MISC_CONFIG, DIAG_PORT_SEL, 28, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MISC_CONFIG, RESET_DP_VOL_SM, 24, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MISC_CONFIG, RESET_DP_RAMP_SCALE_SM, 23, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MISC_CONFIG, RESET_DP_SRC_SM, 22, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MISC_CONFIG, RESET_DP_CLIENT_SM, 21, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MISC_CONFIG, RESET_DP_SM, 20, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MISC_CONFIG, RESET_CLIENT3_MS_IFACE_SM, 19, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MISC_CONFIG, RESET_CLIENT2_MS_IFACE_SM, 18, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MISC_CONFIG, RESET_CLIENT1_MS_IFACE_SM, 17, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MISC_CONFIG, RESET_CLIENT0_MS_IFACE_SM, 16, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MISC_CONFIG, GET_MAX_BB_ACK_CYCLE, 2, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MISC_CONFIG, GET_CLIENT_MAX_CYCLE, 1, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MISC_CONFIG, GET_MAX_PROCESSING_CYCLE, 0, 1)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_DP_STATUS, 0xc, AUD_FMM_DP_CTRL1_DP_STATUS, 0x27600c)
|
|
FldFunc(AUD_FMM_DP_CTRL1_DP_STATUS, PB3_MUTE_STATUS, 11, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_DP_STATUS, PB2_MUTE_STATUS, 10, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_DP_STATUS, PB1_MUTE_STATUS, 9, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_DP_STATUS, PB0_MUTE_STATUS, 8, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_DP_STATUS, PB3_FLOW_ON, 3, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_DP_STATUS, PB2_FLOW_ON, 2, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_DP_STATUS, PB1_FLOW_ON, 1, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_DP_STATUS, PB0_FLOW_ON, 0, 1)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_DP_SM, 0x10, AUD_FMM_DP_CTRL1_DP_SM, 0x276010)
|
|
FldFunc(AUD_FMM_DP_CTRL1_DP_SM, DP_VOL_SM, 28, 4)
|
|
FldFunc(AUD_FMM_DP_CTRL1_DP_SM, DP_SRAMP_SM, 20, 4)
|
|
FldFunc(AUD_FMM_DP_CTRL1_DP_SM, DP_SRC_SMSR, 12, 5)
|
|
FldFunc(AUD_FMM_DP_CTRL1_DP_SM, DP_CL_SMD, 4, 5)
|
|
FldFunc(AUD_FMM_DP_CTRL1_DP_SM, DP_SM, 0, 2)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_DP_SM_DEBUG, 0x14, AUD_FMM_DP_CTRL1_DP_SM_DEBUG, 0x276014)
|
|
FldFunc(AUD_FMM_DP_CTRL1_DP_SM_DEBUG, CLIENT3_MS_SM, 30, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL1_DP_SM_DEBUG, CLIENT2_MS_SM, 28, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL1_DP_SM_DEBUG, CLIENT1_MS_SM, 26, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL1_DP_SM_DEBUG, CLIENT0_MS_SM, 24, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL1_DP_SM_DEBUG, MAX_PROCESSING_CYCLE, 0, 15)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_DP_DEBUG1, 0x18, AUD_FMM_DP_CTRL1_DP_DEBUG1, 0x276018)
|
|
FldFunc(AUD_FMM_DP_CTRL1_DP_DEBUG1, CLIENT_MAX_CYCLE_ID, 28, 3)
|
|
FldFunc(AUD_FMM_DP_CTRL1_DP_DEBUG1, CLIENT_PROCESSING_CYCLE, 16, 12)
|
|
FldFunc(AUD_FMM_DP_CTRL1_DP_DEBUG1, PLAYBACK_ID, 8, 3)
|
|
FldFunc(AUD_FMM_DP_CTRL1_DP_DEBUG1, BB_ACK_CYCLE, 0, 8)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_MS_CLIENT0_CONFIG, 0x400, AUD_FMM_DP_CTRL1_MS_CLIENT0_CONFIG, 0x276400)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT0_CONFIG, VOLUME_ENA, 31, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT0_CONFIG, VOLUME_MUTE_ENA, 30, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT0_CONFIG, VOLUME_RAMP_ENA, 29, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT0_CONFIG, VOLUME_STARTUP_RAMP_DIS, 28, 1)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_MS_CLIENT0_VOLUME, 0x404, AUD_FMM_DP_CTRL1_MS_CLIENT0_VOLUME, 0x276404)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT0_VOLUME, RIGHT_VOLUME_LEVEL, 16, 16)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT0_VOLUME, LEFT_VOLUME_LEVEL, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_BB_PLAYBACK0_SCALE_SRC_CONFIG, 0x408, AUD_FMM_DP_CTRL1_BB_PLAYBACK0_SCALE_SRC_CONFIG, 0x276408)
|
|
FldFunc(AUD_FMM_DP_CTRL1_BB_PLAYBACK0_SCALE_SRC_CONFIG, SRC_ENB, 28, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_BB_PLAYBACK0_SCALE_SRC_CONFIG, SCALE_RAMP_ENA, 27, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_BB_PLAYBACK0_SCALE_SRC_CONFIG, SCALE_MUTE_ENA, 26, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_BB_PLAYBACK0_SCALE_SRC_CONFIG, SCALE_STARTUP_RAMP_ENB, 25, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_BB_PLAYBACK0_SCALE_SRC_CONFIG, SRC_IOR, 0, 19)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_MS_CLIENT0_MIX1_CONFIG, 0x40c, AUD_FMM_DP_CTRL1_MS_CLIENT0_MIX1_CONFIG, 0x27640c)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT0_MIX1_CONFIG, MONO_SEL, 28, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT0_MIX1_CONFIG, MIX_ENABLE, 24, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT0_MIX1_CONFIG, MIX_SCALE_ENB, 20, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT0_MIX1_CONFIG, MIX_PB_ID, 16, 4)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT0_MIX1_CONFIG, MIX_SCALING_COEF, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_MS_CLIENT0_MIX2_CONFIG, 0x410, AUD_FMM_DP_CTRL1_MS_CLIENT0_MIX2_CONFIG, 0x276410)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT0_MIX2_CONFIG, MONO_SEL, 28, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT0_MIX2_CONFIG, MIX_ENABLE, 24, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT0_MIX2_CONFIG, MIX_SCALE_ENB, 20, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT0_MIX2_CONFIG, MIX_PB_ID, 16, 4)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT0_MIX2_CONFIG, MIX_SCALING_COEF, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_MS_CLIENT0_MIX3_CONFIG, 0x414, AUD_FMM_DP_CTRL1_MS_CLIENT0_MIX3_CONFIG, 0x276414)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT0_MIX3_CONFIG, MONO_SEL, 28, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT0_MIX3_CONFIG, MIX_ENABLE, 24, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT0_MIX3_CONFIG, MIX_SCALE_ENB, 20, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT0_MIX3_CONFIG, MIX_PB_ID, 16, 4)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT0_MIX3_CONFIG, MIX_SCALING_COEF, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_FMM_DP_C_RAM_RESERVE_ECO_0, 0x418, AUD_FMM_DP_CTRL1_FMM_DP_C_RAM_RESERVE_ECO_0, 0x276418)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_FMM_DP_C_RAM_RESERVE_ECO_1, 0x41c, AUD_FMM_DP_CTRL1_FMM_DP_C_RAM_RESERVE_ECO_1, 0x27641c)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_MS_CLIENT1_CONFIG, 0x420, AUD_FMM_DP_CTRL1_MS_CLIENT1_CONFIG, 0x276420)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT1_CONFIG, VOLUME_ENA, 31, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT1_CONFIG, VOLUME_MUTE_ENA, 30, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT1_CONFIG, VOLUME_RAMP_ENA, 29, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT1_CONFIG, VOLUME_STARTUP_RAMP_DIS, 28, 1)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_MS_CLIENT1_VOLUME, 0x424, AUD_FMM_DP_CTRL1_MS_CLIENT1_VOLUME, 0x276424)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT1_VOLUME, RIGHT_VOLUME_LEVEL, 16, 16)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT1_VOLUME, LEFT_VOLUME_LEVEL, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_BB_PLAYBACK1_SCALE_SRC_CONFIG, 0x428, AUD_FMM_DP_CTRL1_BB_PLAYBACK1_SCALE_SRC_CONFIG, 0x276428)
|
|
FldFunc(AUD_FMM_DP_CTRL1_BB_PLAYBACK1_SCALE_SRC_CONFIG, SRC_ENB, 28, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_BB_PLAYBACK1_SCALE_SRC_CONFIG, SCALE_RAMP_ENA, 27, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_BB_PLAYBACK1_SCALE_SRC_CONFIG, SCALE_MUTE_ENA, 26, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_BB_PLAYBACK1_SCALE_SRC_CONFIG, SCALE_STARTUP_RAMP_ENB, 25, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_BB_PLAYBACK1_SCALE_SRC_CONFIG, SRC_IOR, 0, 19)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_MS_CLIENT1_MIX1_CONFIG, 0x42c, AUD_FMM_DP_CTRL1_MS_CLIENT1_MIX1_CONFIG, 0x27642c)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT1_MIX1_CONFIG, MONO_SEL, 28, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT1_MIX1_CONFIG, MIX_ENABLE, 24, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT1_MIX1_CONFIG, MIX_SCALE_ENB, 20, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT1_MIX1_CONFIG, MIX_PB_ID, 16, 4)
|
|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT1_MIX1_CONFIG, MIX_SCALING_COEF, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_MS_CLIENT1_MIX2_CONFIG, 0x430, AUD_FMM_DP_CTRL1_MS_CLIENT1_MIX2_CONFIG, 0x276430)
|
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT1_MIX2_CONFIG, MONO_SEL, 28, 2)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT1_MIX2_CONFIG, MIX_ENABLE, 24, 1)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT1_MIX2_CONFIG, MIX_SCALE_ENB, 20, 1)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT1_MIX2_CONFIG, MIX_PB_ID, 16, 4)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT1_MIX2_CONFIG, MIX_SCALING_COEF, 0, 16)
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RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_MS_CLIENT1_MIX3_CONFIG, 0x434, AUD_FMM_DP_CTRL1_MS_CLIENT1_MIX3_CONFIG, 0x276434)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT1_MIX3_CONFIG, MONO_SEL, 28, 2)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT1_MIX3_CONFIG, MIX_ENABLE, 24, 1)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT1_MIX3_CONFIG, MIX_SCALE_ENB, 20, 1)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT1_MIX3_CONFIG, MIX_PB_ID, 16, 4)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT1_MIX3_CONFIG, MIX_SCALING_COEF, 0, 16)
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RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_FMM_DP_C_RAM_RESERVE_ECO_2, 0x438, AUD_FMM_DP_CTRL1_FMM_DP_C_RAM_RESERVE_ECO_2, 0x276438)
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RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_FMM_DP_C_RAM_RESERVE_ECO_3, 0x43c, AUD_FMM_DP_CTRL1_FMM_DP_C_RAM_RESERVE_ECO_3, 0x27643c)
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RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_MS_CLIENT2_CONFIG, 0x440, AUD_FMM_DP_CTRL1_MS_CLIENT2_CONFIG, 0x276440)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT2_CONFIG, VOLUME_ENA, 31, 1)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT2_CONFIG, VOLUME_MUTE_ENA, 30, 1)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT2_CONFIG, VOLUME_RAMP_ENA, 29, 1)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT2_CONFIG, VOLUME_STARTUP_RAMP_DIS, 28, 1)
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RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_MS_CLIENT2_VOLUME, 0x444, AUD_FMM_DP_CTRL1_MS_CLIENT2_VOLUME, 0x276444)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT2_VOLUME, RIGHT_VOLUME_LEVEL, 16, 16)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT2_VOLUME, LEFT_VOLUME_LEVEL, 0, 16)
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RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_BB_PLAYBACK2_SCALE_SRC_CONFIG, 0x448, AUD_FMM_DP_CTRL1_BB_PLAYBACK2_SCALE_SRC_CONFIG, 0x276448)
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FldFunc(AUD_FMM_DP_CTRL1_BB_PLAYBACK2_SCALE_SRC_CONFIG, SRC_ENB, 28, 1)
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FldFunc(AUD_FMM_DP_CTRL1_BB_PLAYBACK2_SCALE_SRC_CONFIG, SCALE_RAMP_ENA, 27, 1)
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FldFunc(AUD_FMM_DP_CTRL1_BB_PLAYBACK2_SCALE_SRC_CONFIG, SCALE_MUTE_ENA, 26, 1)
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FldFunc(AUD_FMM_DP_CTRL1_BB_PLAYBACK2_SCALE_SRC_CONFIG, SCALE_STARTUP_RAMP_ENB, 25, 1)
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FldFunc(AUD_FMM_DP_CTRL1_BB_PLAYBACK2_SCALE_SRC_CONFIG, SRC_IOR, 0, 19)
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RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_MS_CLIENT2_MIX1_CONFIG, 0x44c, AUD_FMM_DP_CTRL1_MS_CLIENT2_MIX1_CONFIG, 0x27644c)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT2_MIX1_CONFIG, MONO_SEL, 28, 2)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT2_MIX1_CONFIG, MIX_ENABLE, 24, 1)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT2_MIX1_CONFIG, MIX_SCALE_ENB, 20, 1)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT2_MIX1_CONFIG, MIX_PB_ID, 16, 4)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT2_MIX1_CONFIG, MIX_SCALING_COEF, 0, 16)
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RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_MS_CLIENT2_MIX2_CONFIG, 0x450, AUD_FMM_DP_CTRL1_MS_CLIENT2_MIX2_CONFIG, 0x276450)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT2_MIX2_CONFIG, MONO_SEL, 28, 2)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT2_MIX2_CONFIG, MIX_ENABLE, 24, 1)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT2_MIX2_CONFIG, MIX_SCALE_ENB, 20, 1)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT2_MIX2_CONFIG, MIX_PB_ID, 16, 4)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT2_MIX2_CONFIG, MIX_SCALING_COEF, 0, 16)
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RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_MS_CLIENT2_MIX3_CONFIG, 0x454, AUD_FMM_DP_CTRL1_MS_CLIENT2_MIX3_CONFIG, 0x276454)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT2_MIX3_CONFIG, MONO_SEL, 28, 2)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT2_MIX3_CONFIG, MIX_ENABLE, 24, 1)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT2_MIX3_CONFIG, MIX_SCALE_ENB, 20, 1)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT2_MIX3_CONFIG, MIX_PB_ID, 16, 4)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT2_MIX3_CONFIG, MIX_SCALING_COEF, 0, 16)
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|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_FMM_DP_C_RAM_RESERVE_ECO_4, 0x458, AUD_FMM_DP_CTRL1_FMM_DP_C_RAM_RESERVE_ECO_4, 0x276458)
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RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_FMM_DP_C_RAM_RESERVE_ECO_5, 0x45c, AUD_FMM_DP_CTRL1_FMM_DP_C_RAM_RESERVE_ECO_5, 0x27645c)
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RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_MS_CLIENT3_CONFIG, 0x460, AUD_FMM_DP_CTRL1_MS_CLIENT3_CONFIG, 0x276460)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT3_CONFIG, VOLUME_ENA, 31, 1)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT3_CONFIG, VOLUME_MUTE_ENA, 30, 1)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT3_CONFIG, VOLUME_RAMP_ENA, 29, 1)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT3_CONFIG, VOLUME_STARTUP_RAMP_DIS, 28, 1)
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RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_MS_CLIENT3_VOLUME, 0x464, AUD_FMM_DP_CTRL1_MS_CLIENT3_VOLUME, 0x276464)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT3_VOLUME, RIGHT_VOLUME_LEVEL, 16, 16)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT3_VOLUME, LEFT_VOLUME_LEVEL, 0, 16)
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|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_BB_PLAYBACK3_SCALE_SRC_CONFIG, 0x468, AUD_FMM_DP_CTRL1_BB_PLAYBACK3_SCALE_SRC_CONFIG, 0x276468)
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FldFunc(AUD_FMM_DP_CTRL1_BB_PLAYBACK3_SCALE_SRC_CONFIG, SRC_ENB, 28, 1)
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FldFunc(AUD_FMM_DP_CTRL1_BB_PLAYBACK3_SCALE_SRC_CONFIG, SCALE_RAMP_ENA, 27, 1)
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FldFunc(AUD_FMM_DP_CTRL1_BB_PLAYBACK3_SCALE_SRC_CONFIG, SCALE_MUTE_ENA, 26, 1)
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FldFunc(AUD_FMM_DP_CTRL1_BB_PLAYBACK3_SCALE_SRC_CONFIG, SCALE_STARTUP_RAMP_ENB, 25, 1)
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FldFunc(AUD_FMM_DP_CTRL1_BB_PLAYBACK3_SCALE_SRC_CONFIG, SRC_IOR, 0, 19)
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RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_MS_CLIENT3_MIX1_CONFIG, 0x46c, AUD_FMM_DP_CTRL1_MS_CLIENT3_MIX1_CONFIG, 0x27646c)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT3_MIX1_CONFIG, MONO_SEL, 28, 2)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT3_MIX1_CONFIG, MIX_ENABLE, 24, 1)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT3_MIX1_CONFIG, MIX_SCALE_ENB, 20, 1)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT3_MIX1_CONFIG, MIX_PB_ID, 16, 4)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT3_MIX1_CONFIG, MIX_SCALING_COEF, 0, 16)
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RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_MS_CLIENT3_MIX2_CONFIG, 0x470, AUD_FMM_DP_CTRL1_MS_CLIENT3_MIX2_CONFIG, 0x276470)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT3_MIX2_CONFIG, MONO_SEL, 28, 2)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT3_MIX2_CONFIG, MIX_ENABLE, 24, 1)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT3_MIX2_CONFIG, MIX_SCALE_ENB, 20, 1)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT3_MIX2_CONFIG, MIX_PB_ID, 16, 4)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT3_MIX2_CONFIG, MIX_SCALING_COEF, 0, 16)
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RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_MS_CLIENT3_MIX3_CONFIG, 0x474, AUD_FMM_DP_CTRL1_MS_CLIENT3_MIX3_CONFIG, 0x276474)
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|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT3_MIX3_CONFIG, MONO_SEL, 28, 2)
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|
FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT3_MIX3_CONFIG, MIX_ENABLE, 24, 1)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT3_MIX3_CONFIG, MIX_SCALE_ENB, 20, 1)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT3_MIX3_CONFIG, MIX_PB_ID, 16, 4)
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FldFunc(AUD_FMM_DP_CTRL1_MS_CLIENT3_MIX3_CONFIG, MIX_SCALING_COEF, 0, 16)
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RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_FMM_DP_C_RAM_RESERVE_ECO_6, 0x478, AUD_FMM_DP_CTRL1_FMM_DP_C_RAM_RESERVE_ECO_6, 0x276478)
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RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_FMM_SCALE_VOL_STEP, 0x47c, AUD_FMM_DP_CTRL1_FMM_SCALE_VOL_STEP, 0x27647c)
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FldFunc(AUD_FMM_DP_CTRL1_FMM_SCALE_VOL_STEP, SCALE_RAMP_STEP_SIZE, 16, 16)
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FldFunc(AUD_FMM_DP_CTRL1_FMM_SCALE_VOL_STEP, VOL_RAMP_STEP_SIZE, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_C_RAM, 0x480, AUD_FMM_DP_CTRL1_C_RAM, 0x276480)
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RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB0_FIFO_DATA0, 0x800, AUD_FMM_DP_CTRL1_PB0_FIFO_DATA0, 0x276800)
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FldFunc(AUD_FMM_DP_CTRL1_PB0_FIFO_DATA0, PB_FIFO_DATA0, 0, 24)
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|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB0_FIFO_DATA1, 0x804, AUD_FMM_DP_CTRL1_PB0_FIFO_DATA1, 0x276804)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB0_FIFO_DATA1, PB_FIFO_DATA1, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB0_FIFO_DATA2, 0x808, AUD_FMM_DP_CTRL1_PB0_FIFO_DATA2, 0x276808)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB0_FIFO_DATA2, PB_FIFO_DATA2, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB0_FIFO_DATA3, 0x80c, AUD_FMM_DP_CTRL1_PB0_FIFO_DATA3, 0x27680c)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB0_FIFO_DATA3, PB_FIFO_DATA3, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB0_SRC_FIFO_DATA0, 0x810, AUD_FMM_DP_CTRL1_PB0_SRC_FIFO_DATA0, 0x276810)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB0_SRC_FIFO_DATA0, PB_SRC_FIFO_DATA0, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB0_SRC_FIFO_DATA1, 0x814, AUD_FMM_DP_CTRL1_PB0_SRC_FIFO_DATA1, 0x276814)
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|
FldFunc(AUD_FMM_DP_CTRL1_PB0_SRC_FIFO_DATA1, PB_SRC_FIFO_DATA1, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB0_SRC_FIFO_DATA2, 0x818, AUD_FMM_DP_CTRL1_PB0_SRC_FIFO_DATA2, 0x276818)
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|
FldFunc(AUD_FMM_DP_CTRL1_PB0_SRC_FIFO_DATA2, PB_SRC_FIFO_DATA2, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB0_SRC_FIFO_DATA3, 0x81c, AUD_FMM_DP_CTRL1_PB0_SRC_FIFO_DATA3, 0x27681c)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB0_SRC_FIFO_DATA3, PB_SRC_FIFO_DATA3, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_CLIENT_PB0_FIFO_POINTERS, 0x820, AUD_FMM_DP_CTRL1_CLIENT_PB0_FIFO_POINTERS, 0x276820)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLIENT_PB0_FIFO_POINTERS, SRC_FIFO_POINTER, 22, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLIENT_PB0_FIFO_POINTERS, PB_FIFO_POINTER, 20, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLIENT_PB0_FIFO_POINTERS, CLNT3_PB_FIFO_POINTER, 18, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLIENT_PB0_FIFO_POINTERS, CLNT2_PB_FIFO_POINTER, 16, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLIENT_PB0_FIFO_POINTERS, CLNT1_PB_FIFO_POINTER, 14, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLIENT_PB0_FIFO_POINTERS, CLNT0_PB_FIFO_POINTER, 12, 2)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB0_SRC_DDA_DATA, 0x824, AUD_FMM_DP_CTRL1_PB0_SRC_DDA_DATA, 0x276824)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB0_SRC_DDA_DATA, PB_SRC_DDA, 0, 18)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB0_CURRENT_SCALE, 0x828, AUD_FMM_DP_CTRL1_PB0_CURRENT_SCALE, 0x276828)
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|
FldFunc(AUD_FMM_DP_CTRL1_PB0_CURRENT_SCALE, CURRENT_SCALE_RAMPING, 22, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB0_CURRENT_SCALE, CURRENT_SCALE, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_CLNT0_CURRENT_LEFT_VOL, 0x82c, AUD_FMM_DP_CTRL1_CLNT0_CURRENT_LEFT_VOL, 0x27682c)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLNT0_CURRENT_LEFT_VOL, CURRENT_LEFT_VOL_RAMPING, 22, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLNT0_CURRENT_LEFT_VOL, CURRENT_LEFT_VOL, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_CLNT0_CURRENT_RIGHT_VOL, 0x830, AUD_FMM_DP_CTRL1_CLNT0_CURRENT_RIGHT_VOL, 0x276830)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLNT0_CURRENT_RIGHT_VOL, CURRENT_RIGHT_VOL_RAMPING, 23, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLNT0_CURRENT_RIGHT_VOL, CURRENT_RIGHT_VOL, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_FMM_DP_T_RAM_RESERVE_ECO_0, 0x834, AUD_FMM_DP_CTRL1_FMM_DP_T_RAM_RESERVE_ECO_0, 0x276834)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_FMM_DP_T_RAM_RESERVE_ECO_1, 0x838, AUD_FMM_DP_CTRL1_FMM_DP_T_RAM_RESERVE_ECO_1, 0x276838)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_FMM_DP_T_RAM_RESERVE_ECO_2, 0x83c, AUD_FMM_DP_CTRL1_FMM_DP_T_RAM_RESERVE_ECO_2, 0x27683c)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB1_FIFO_DATA0, 0x840, AUD_FMM_DP_CTRL1_PB1_FIFO_DATA0, 0x276840)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB1_FIFO_DATA0, PB_FIFO_DATA0, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB1_FIFO_DATA1, 0x844, AUD_FMM_DP_CTRL1_PB1_FIFO_DATA1, 0x276844)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB1_FIFO_DATA1, PB_FIFO_DATA1, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB1_FIFO_DATA2, 0x848, AUD_FMM_DP_CTRL1_PB1_FIFO_DATA2, 0x276848)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB1_FIFO_DATA2, PB_FIFO_DATA2, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB1_FIFO_DATA3, 0x84c, AUD_FMM_DP_CTRL1_PB1_FIFO_DATA3, 0x27684c)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB1_FIFO_DATA3, PB_FIFO_DATA3, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB1_SRC_FIFO_DATA0, 0x850, AUD_FMM_DP_CTRL1_PB1_SRC_FIFO_DATA0, 0x276850)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB1_SRC_FIFO_DATA0, PB_SRC_FIFO_DATA0, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB1_SRC_FIFO_DATA1, 0x854, AUD_FMM_DP_CTRL1_PB1_SRC_FIFO_DATA1, 0x276854)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB1_SRC_FIFO_DATA1, PB_SRC_FIFO_DATA1, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB1_SRC_FIFO_DATA2, 0x858, AUD_FMM_DP_CTRL1_PB1_SRC_FIFO_DATA2, 0x276858)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB1_SRC_FIFO_DATA2, PB_SRC_FIFO_DATA2, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB1_SRC_FIFO_DATA3, 0x85c, AUD_FMM_DP_CTRL1_PB1_SRC_FIFO_DATA3, 0x27685c)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB1_SRC_FIFO_DATA3, PB_SRC_FIFO_DATA3, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_CLIENT_PB1_FIFO_POINTERS, 0x860, AUD_FMM_DP_CTRL1_CLIENT_PB1_FIFO_POINTERS, 0x276860)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLIENT_PB1_FIFO_POINTERS, SRC_FIFO_POINTER, 22, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLIENT_PB1_FIFO_POINTERS, PB_FIFO_POINTER, 20, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLIENT_PB1_FIFO_POINTERS, CLNT3_PB_FIFO_POINTER, 18, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLIENT_PB1_FIFO_POINTERS, CLNT2_PB_FIFO_POINTER, 16, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLIENT_PB1_FIFO_POINTERS, CLNT1_PB_FIFO_POINTER, 14, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLIENT_PB1_FIFO_POINTERS, CLNT0_PB_FIFO_POINTER, 12, 2)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB1_SRC_DDA_DATA, 0x864, AUD_FMM_DP_CTRL1_PB1_SRC_DDA_DATA, 0x276864)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB1_SRC_DDA_DATA, PB_SRC_DDA, 0, 18)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB1_CURRENT_SCALE, 0x868, AUD_FMM_DP_CTRL1_PB1_CURRENT_SCALE, 0x276868)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB1_CURRENT_SCALE, CURRENT_SCALE_RAMPING, 22, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB1_CURRENT_SCALE, CURRENT_SCALE, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_CLNT1_CURRENT_LEFT_VOL, 0x86c, AUD_FMM_DP_CTRL1_CLNT1_CURRENT_LEFT_VOL, 0x27686c)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLNT1_CURRENT_LEFT_VOL, CURRENT_LEFT_VOL_RAMPING, 22, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLNT1_CURRENT_LEFT_VOL, CURRENT_LEFT_VOL, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_CLNT1_CURRENT_RIGHT_VOL, 0x870, AUD_FMM_DP_CTRL1_CLNT1_CURRENT_RIGHT_VOL, 0x276870)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLNT1_CURRENT_RIGHT_VOL, CURRENT_RIGHT_VOL_RAMPING, 23, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLNT1_CURRENT_RIGHT_VOL, CURRENT_RIGHT_VOL, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_FMM_DP_T_RAM_RESERVE_ECO_3, 0x874, AUD_FMM_DP_CTRL1_FMM_DP_T_RAM_RESERVE_ECO_3, 0x276874)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_FMM_DP_T_RAM_RESERVE_ECO_4, 0x878, AUD_FMM_DP_CTRL1_FMM_DP_T_RAM_RESERVE_ECO_4, 0x276878)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_FMM_DP_T_RAM_RESERVE_ECO_5, 0x87c, AUD_FMM_DP_CTRL1_FMM_DP_T_RAM_RESERVE_ECO_5, 0x27687c)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB2_FIFO_DATA0, 0x880, AUD_FMM_DP_CTRL1_PB2_FIFO_DATA0, 0x276880)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB2_FIFO_DATA0, PB_FIFO_DATA0, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB2_FIFO_DATA1, 0x884, AUD_FMM_DP_CTRL1_PB2_FIFO_DATA1, 0x276884)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB2_FIFO_DATA1, PB_FIFO_DATA1, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB2_FIFO_DATA2, 0x888, AUD_FMM_DP_CTRL1_PB2_FIFO_DATA2, 0x276888)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB2_FIFO_DATA2, PB_FIFO_DATA2, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB2_FIFO_DATA3, 0x88c, AUD_FMM_DP_CTRL1_PB2_FIFO_DATA3, 0x27688c)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB2_FIFO_DATA3, PB_FIFO_DATA3, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB2_SRC_FIFO_DATA0, 0x890, AUD_FMM_DP_CTRL1_PB2_SRC_FIFO_DATA0, 0x276890)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB2_SRC_FIFO_DATA0, PB_SRC_FIFO_DATA0, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB2_SRC_FIFO_DATA1, 0x894, AUD_FMM_DP_CTRL1_PB2_SRC_FIFO_DATA1, 0x276894)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB2_SRC_FIFO_DATA1, PB_SRC_FIFO_DATA1, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB2_SRC_FIFO_DATA2, 0x898, AUD_FMM_DP_CTRL1_PB2_SRC_FIFO_DATA2, 0x276898)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB2_SRC_FIFO_DATA2, PB_SRC_FIFO_DATA2, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB2_SRC_FIFO_DATA3, 0x89c, AUD_FMM_DP_CTRL1_PB2_SRC_FIFO_DATA3, 0x27689c)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB2_SRC_FIFO_DATA3, PB_SRC_FIFO_DATA3, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_CLIENT_PB2_FIFO_POINTERS, 0x8a0, AUD_FMM_DP_CTRL1_CLIENT_PB2_FIFO_POINTERS, 0x2768a0)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLIENT_PB2_FIFO_POINTERS, SRC_FIFO_POINTER, 22, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLIENT_PB2_FIFO_POINTERS, PB_FIFO_POINTER, 20, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLIENT_PB2_FIFO_POINTERS, CLNT3_PB_FIFO_POINTER, 18, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLIENT_PB2_FIFO_POINTERS, CLNT2_PB_FIFO_POINTER, 16, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLIENT_PB2_FIFO_POINTERS, CLNT1_PB_FIFO_POINTER, 14, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLIENT_PB2_FIFO_POINTERS, CLNT0_PB_FIFO_POINTER, 12, 2)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB2_SRC_DDA_DATA, 0x8a4, AUD_FMM_DP_CTRL1_PB2_SRC_DDA_DATA, 0x2768a4)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB2_SRC_DDA_DATA, PB_SRC_DDA, 0, 18)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB2_CURRENT_SCALE, 0x8a8, AUD_FMM_DP_CTRL1_PB2_CURRENT_SCALE, 0x2768a8)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB2_CURRENT_SCALE, CURRENT_SCALE_RAMPING, 22, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB2_CURRENT_SCALE, CURRENT_SCALE, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_CLNT2_CURRENT_LEFT_VOL, 0x8ac, AUD_FMM_DP_CTRL1_CLNT2_CURRENT_LEFT_VOL, 0x2768ac)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLNT2_CURRENT_LEFT_VOL, CURRENT_LEFT_VOL_RAMPING, 22, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLNT2_CURRENT_LEFT_VOL, CURRENT_LEFT_VOL, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_CLNT2_CURRENT_RIGHT_VOL, 0x8b0, AUD_FMM_DP_CTRL1_CLNT2_CURRENT_RIGHT_VOL, 0x2768b0)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLNT2_CURRENT_RIGHT_VOL, CURRENT_RIGHT_VOL_RAMPING, 23, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLNT2_CURRENT_RIGHT_VOL, CURRENT_RIGHT_VOL, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_FMM_DP_T_RAM_RESERVE_ECO_6, 0x8b4, AUD_FMM_DP_CTRL1_FMM_DP_T_RAM_RESERVE_ECO_6, 0x2768b4)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_FMM_DP_T_RAM_RESERVE_ECO_7, 0x8b8, AUD_FMM_DP_CTRL1_FMM_DP_T_RAM_RESERVE_ECO_7, 0x2768b8)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_FMM_DP_T_RAM_RESERVE_ECO_8, 0x8bc, AUD_FMM_DP_CTRL1_FMM_DP_T_RAM_RESERVE_ECO_8, 0x2768bc)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB3_FIFO_DATA0, 0x8c0, AUD_FMM_DP_CTRL1_PB3_FIFO_DATA0, 0x2768c0)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB3_FIFO_DATA0, PB_FIFO_DATA0, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB3_FIFO_DATA1, 0x8c4, AUD_FMM_DP_CTRL1_PB3_FIFO_DATA1, 0x2768c4)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB3_FIFO_DATA1, PB_FIFO_DATA1, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB3_FIFO_DATA2, 0x8c8, AUD_FMM_DP_CTRL1_PB3_FIFO_DATA2, 0x2768c8)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB3_FIFO_DATA2, PB_FIFO_DATA2, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB3_FIFO_DATA3, 0x8cc, AUD_FMM_DP_CTRL1_PB3_FIFO_DATA3, 0x2768cc)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB3_FIFO_DATA3, PB_FIFO_DATA3, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB3_SRC_FIFO_DATA0, 0x8d0, AUD_FMM_DP_CTRL1_PB3_SRC_FIFO_DATA0, 0x2768d0)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB3_SRC_FIFO_DATA0, PB_SRC_FIFO_DATA0, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB3_SRC_FIFO_DATA1, 0x8d4, AUD_FMM_DP_CTRL1_PB3_SRC_FIFO_DATA1, 0x2768d4)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB3_SRC_FIFO_DATA1, PB_SRC_FIFO_DATA1, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB3_SRC_FIFO_DATA2, 0x8d8, AUD_FMM_DP_CTRL1_PB3_SRC_FIFO_DATA2, 0x2768d8)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB3_SRC_FIFO_DATA2, PB_SRC_FIFO_DATA2, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB3_SRC_FIFO_DATA3, 0x8dc, AUD_FMM_DP_CTRL1_PB3_SRC_FIFO_DATA3, 0x2768dc)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB3_SRC_FIFO_DATA3, PB_SRC_FIFO_DATA3, 0, 24)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_CLIENT_PB3_FIFO_POINTERS, 0x8e0, AUD_FMM_DP_CTRL1_CLIENT_PB3_FIFO_POINTERS, 0x2768e0)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLIENT_PB3_FIFO_POINTERS, SRC_FIFO_POINTER, 22, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLIENT_PB3_FIFO_POINTERS, PB_FIFO_POINTER, 20, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLIENT_PB3_FIFO_POINTERS, CLNT3_PB_FIFO_POINTER, 18, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLIENT_PB3_FIFO_POINTERS, CLNT2_PB_FIFO_POINTER, 16, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLIENT_PB3_FIFO_POINTERS, CLNT1_PB_FIFO_POINTER, 14, 2)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLIENT_PB3_FIFO_POINTERS, CLNT0_PB_FIFO_POINTER, 12, 2)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB3_SRC_DDA_DATA, 0x8e4, AUD_FMM_DP_CTRL1_PB3_SRC_DDA_DATA, 0x2768e4)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB3_SRC_DDA_DATA, PB_SRC_DDA, 0, 18)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_PB3_CURRENT_SCALE, 0x8e8, AUD_FMM_DP_CTRL1_PB3_CURRENT_SCALE, 0x2768e8)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB3_CURRENT_SCALE, CURRENT_SCALE_RAMPING, 22, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_PB3_CURRENT_SCALE, CURRENT_SCALE, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_CLNT3_CURRENT_LEFT_VOL, 0x8ec, AUD_FMM_DP_CTRL1_CLNT3_CURRENT_LEFT_VOL, 0x2768ec)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLNT3_CURRENT_LEFT_VOL, CURRENT_LEFT_VOL_RAMPING, 22, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLNT3_CURRENT_LEFT_VOL, CURRENT_LEFT_VOL, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_CLNT3_CURRENT_RIGHT_VOL, 0x8f0, AUD_FMM_DP_CTRL1_CLNT3_CURRENT_RIGHT_VOL, 0x2768f0)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLNT3_CURRENT_RIGHT_VOL, CURRENT_RIGHT_VOL_RAMPING, 23, 1)
|
|
FldFunc(AUD_FMM_DP_CTRL1_CLNT3_CURRENT_RIGHT_VOL, CURRENT_RIGHT_VOL, 0, 16)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_FMM_DP_T_RAM_RESERVE_ECO_9, 0x8f4, AUD_FMM_DP_CTRL1_FMM_DP_T_RAM_RESERVE_ECO_9, 0x2768f4)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_FMM_DP_T_RAM_RESERVE_ECO_10, 0x8f8, AUD_FMM_DP_CTRL1_FMM_DP_T_RAM_RESERVE_ECO_10, 0x2768f8)
|
|
RegFunc(AUD_FMM_DP_CTRL1, 0x00276000, AUD_FMM_DP_CTRL1_FMM_DP_T_RAM_RESERVE_ECO_11, 0x8fc, AUD_FMM_DP_CTRL1_FMM_DP_T_RAM_RESERVE_ECO_11, 0x2768fc)
|
|
|
|
RegAreaFunc(AUD_FMM_DP_ESR1_BASE, 0x00277000, 0x00277014)
|
|
RegFunc(AUD_FMM_DP_ESR1, 0x00277000, AUD_FMM_DP_ESR1_STATUS, 0x0, AUD_FMM_DP_ESR1_STATUS, 0x277000)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS, CLIENT3_RATE_ERR, 15, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS, CLIENT2_RATE_ERR, 14, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS, CLIENT1_RATE_ERR, 13, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS, CLIENT0_RATE_ERR, 12, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS, VOL_RAMP_DONE3, 11, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS, VOL_RAMP_DONE2, 10, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS, VOL_RAMP_DONE1, 9, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS, VOL_RAMP_DONE0, 8, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS, SCALE_RAMP_DONE3, 7, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS, SCALE_RAMP_DONE2, 6, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS, SCALE_RAMP_DONE1, 5, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS, SCALE_RAMP_DONE0, 4, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS, UNDERFLOW3, 3, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS, UNDERFLOW2, 2, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS, UNDERFLOW1, 1, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS, UNDERFLOW0, 0, 1)
|
|
RegFunc(AUD_FMM_DP_ESR1, 0x00277000, AUD_FMM_DP_ESR1_STATUS_SET, 0x4, AUD_FMM_DP_ESR1_STATUS_SET, 0x277004)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS_SET, CLIENT3_RATE_ERR, 15, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS_SET, CLIENT2_RATE_ERR, 14, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS_SET, CLIENT1_RATE_ERR, 13, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS_SET, CLIENT0_RATE_ERR, 12, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS_SET, VOL_RAMP_DONE3, 11, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS_SET, VOL_RAMP_DONE2, 10, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS_SET, VOL_RAMP_DONE1, 9, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS_SET, VOL_RAMP_DONE0, 8, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS_SET, SCALE_RAMP_DONE3, 7, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS_SET, SCALE_RAMP_DONE2, 6, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS_SET, SCALE_RAMP_DONE1, 5, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS_SET, SCALE_RAMP_DONE0, 4, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS_SET, UNDERFLOW3, 3, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS_SET, UNDERFLOW2, 2, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS_SET, UNDERFLOW1, 1, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS_SET, UNDERFLOW0, 0, 1)
|
|
RegFunc(AUD_FMM_DP_ESR1, 0x00277000, AUD_FMM_DP_ESR1_STATUS_CLEAR, 0x8, AUD_FMM_DP_ESR1_STATUS_CLEAR, 0x277008)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS_CLEAR, CLIENT3_RATE_ERR, 15, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS_CLEAR, CLIENT2_RATE_ERR, 14, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS_CLEAR, CLIENT1_RATE_ERR, 13, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS_CLEAR, CLIENT0_RATE_ERR, 12, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS_CLEAR, VOL_RAMP_DONE3, 11, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS_CLEAR, VOL_RAMP_DONE2, 10, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS_CLEAR, VOL_RAMP_DONE1, 9, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS_CLEAR, VOL_RAMP_DONE0, 8, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS_CLEAR, SCALE_RAMP_DONE3, 7, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS_CLEAR, SCALE_RAMP_DONE2, 6, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS_CLEAR, SCALE_RAMP_DONE1, 5, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS_CLEAR, SCALE_RAMP_DONE0, 4, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS_CLEAR, UNDERFLOW3, 3, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS_CLEAR, UNDERFLOW2, 2, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS_CLEAR, UNDERFLOW1, 1, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_STATUS_CLEAR, UNDERFLOW0, 0, 1)
|
|
RegFunc(AUD_FMM_DP_ESR1, 0x00277000, AUD_FMM_DP_ESR1_MASK, 0xc, AUD_FMM_DP_ESR1_MASK, 0x27700c)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK, CLIENT3_RATE_ERR, 15, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK, CLIENT2_RATE_ERR, 14, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK, CLIENT1_RATE_ERR, 13, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK, CLIENT0_RATE_ERR, 12, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK, VOL_RAMP_DONE3, 11, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK, VOL_RAMP_DONE2, 10, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK, VOL_RAMP_DONE1, 9, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK, VOL_RAMP_DONE0, 8, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK, SCALE_RAMP_DONE3, 7, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK, SCALE_RAMP_DONE2, 6, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK, SCALE_RAMP_DONE1, 5, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK, SCALE_RAMP_DONE0, 4, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK, UNDERFLOW3, 3, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK, UNDERFLOW2, 2, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK, UNDERFLOW1, 1, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK, UNDERFLOW0, 0, 1)
|
|
RegFunc(AUD_FMM_DP_ESR1, 0x00277000, AUD_FMM_DP_ESR1_MASK_SET, 0x10, AUD_FMM_DP_ESR1_MASK_SET, 0x277010)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK_SET, CLIENT3_RATE_ERR, 15, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK_SET, CLIENT2_RATE_ERR, 14, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK_SET, CLIENT1_RATE_ERR, 13, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK_SET, CLIENT0_RATE_ERR, 12, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK_SET, VOL_RAMP_DONE3, 11, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK_SET, VOL_RAMP_DONE2, 10, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK_SET, VOL_RAMP_DONE1, 9, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK_SET, VOL_RAMP_DONE0, 8, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK_SET, SCALE_RAMP_DONE3, 7, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK_SET, SCALE_RAMP_DONE2, 6, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK_SET, SCALE_RAMP_DONE1, 5, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK_SET, SCALE_RAMP_DONE0, 4, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK_SET, UNDERFLOW3, 3, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK_SET, UNDERFLOW2, 2, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK_SET, UNDERFLOW1, 1, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK_SET, UNDERFLOW0, 0, 1)
|
|
RegFunc(AUD_FMM_DP_ESR1, 0x00277000, AUD_FMM_DP_ESR1_MASK_CLEAR, 0x14, AUD_FMM_DP_ESR1_MASK_CLEAR, 0x277014)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK_CLEAR, CLIENT3_RATE_ERR, 15, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK_CLEAR, CLIENT2_RATE_ERR, 14, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK_CLEAR, CLIENT1_RATE_ERR, 13, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK_CLEAR, CLIENT0_RATE_ERR, 12, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK_CLEAR, VOL_RAMP_DONE3, 11, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK_CLEAR, VOL_RAMP_DONE2, 10, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK_CLEAR, VOL_RAMP_DONE1, 9, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK_CLEAR, VOL_RAMP_DONE0, 8, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK_CLEAR, SCALE_RAMP_DONE3, 7, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK_CLEAR, SCALE_RAMP_DONE2, 6, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK_CLEAR, SCALE_RAMP_DONE1, 5, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK_CLEAR, SCALE_RAMP_DONE0, 4, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK_CLEAR, UNDERFLOW3, 3, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK_CLEAR, UNDERFLOW2, 2, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK_CLEAR, UNDERFLOW1, 1, 1)
|
|
FldFunc(AUD_FMM_DP_ESR1_MASK_CLEAR, UNDERFLOW0, 0, 1)
|
|
|
|
RegAreaFunc(AUD_FMM_MS_CTRL_BASE, 0x00278000, 0x00279bfc)
|
|
RegFunc(AUD_FMM_MS_CTRL, 0x00278000, AUD_FMM_MS_CTRL_STRM_ENA, 0x0, AUD_FMM_MS_CTRL_STRM_ENA, 0x278000)
|
|
FldFunc(AUD_FMM_MS_CTRL_STRM_ENA, STREAM1_ENA, 1, 1)
|
|
FldFunc(AUD_FMM_MS_CTRL_STRM_ENA, STREAM0_ENA, 0, 1)
|
|
RegFunc(AUD_FMM_MS_CTRL, 0x00278000, AUD_FMM_MS_CTRL_USEQ_BYPASS, 0x4, AUD_FMM_MS_CTRL_USEQ_BYPASS, 0x278004)
|
|
FldFunc(AUD_FMM_MS_CTRL_USEQ_BYPASS, STREAM1, 1, 1)
|
|
FldFunc(AUD_FMM_MS_CTRL_USEQ_BYPASS, STREAM0, 0, 1)
|
|
RegFunc(AUD_FMM_MS_CTRL, 0x00278000, AUD_FMM_MS_CTRL_USEQ_CTRL, 0x8, AUD_FMM_MS_CTRL_USEQ_CTRL, 0x278008)
|
|
FldFunc(AUD_FMM_MS_CTRL_USEQ_CTRL, WAKE, 4, 1)
|
|
FldFunc(AUD_FMM_MS_CTRL_USEQ_CTRL, CFG_CTRL, 0, 2)
|
|
RegFunc(AUD_FMM_MS_CTRL, 0x00278000, AUD_FMM_MS_CTRL_USEQ_STATUS, 0xc, AUD_FMM_MS_CTRL_USEQ_STATUS, 0x27800c)
|
|
FldFunc(AUD_FMM_MS_CTRL_USEQ_STATUS, ILLEGAL_FLAG, 17, 1)
|
|
FldFunc(AUD_FMM_MS_CTRL_USEQ_STATUS, WAIT_FLAG, 16, 1)
|
|
FldFunc(AUD_FMM_MS_CTRL_USEQ_STATUS, PC, 0, 9)
|
|
RegFunc(AUD_FMM_MS_CTRL, 0x00278000, AUD_FMM_MS_CTRL_USEQ_MSG, 0x10, AUD_FMM_MS_CTRL_USEQ_MSG, 0x278010)
|
|
FldFunc(AUD_FMM_MS_CTRL_USEQ_MSG, STREAM1, 8, 8)
|
|
FldFunc(AUD_FMM_MS_CTRL_USEQ_MSG, STREAM0, 0, 8)
|
|
RegFunc(AUD_FMM_MS_CTRL, 0x00278000, AUD_FMM_MS_CTRL_USEQ_MSG_SET, 0x14, AUD_FMM_MS_CTRL_USEQ_MSG_SET, 0x278014)
|
|
FldFunc(AUD_FMM_MS_CTRL_USEQ_MSG_SET, STREAM1, 8, 8)
|
|
FldFunc(AUD_FMM_MS_CTRL_USEQ_MSG_SET, STREAM0, 0, 8)
|
|
RegFunc(AUD_FMM_MS_CTRL, 0x00278000, AUD_FMM_MS_CTRL_USEQ_MSG_CLEAR, 0x18, AUD_FMM_MS_CTRL_USEQ_MSG_CLEAR, 0x278018)
|
|
FldFunc(AUD_FMM_MS_CTRL_USEQ_MSG_CLEAR, STREAM1, 8, 8)
|
|
FldFunc(AUD_FMM_MS_CTRL_USEQ_MSG_CLEAR, STREAM0, 0, 8)
|
|
RegFunc(AUD_FMM_MS_CTRL, 0x00278000, AUD_FMM_MS_CTRL_USEQ_FLAGS, 0x1c, AUD_FMM_MS_CTRL_USEQ_FLAGS, 0x27801c)
|
|
FldFunc(AUD_FMM_MS_CTRL_USEQ_FLAGS, STREAM1, 8, 8)
|
|
FldFunc(AUD_FMM_MS_CTRL_USEQ_FLAGS, STREAM0, 0, 8)
|
|
RegFunc(AUD_FMM_MS_CTRL, 0x00278000, AUD_FMM_MS_CTRL_FW_STREAM_CTRL_0, 0x800, AUD_FMM_MS_CTRL_FW_STREAM_CTRL_0, 0x278800)
|
|
FldFunc(AUD_FMM_MS_CTRL_FW_STREAM_CTRL_0, RESERVED, 9, 7)
|
|
FldFunc(AUD_FMM_MS_CTRL_FW_STREAM_CTRL_0, DITHER_ENA, 8, 1)
|
|
FldFunc(AUD_FMM_MS_CTRL_FW_STREAM_CTRL_0, CHAN_OVERRIDE, 7, 1)
|
|
FldFunc(AUD_FMM_MS_CTRL_FW_STREAM_CTRL_0, VALIDITYSPDI, 6, 1)
|
|
FldFunc(AUD_FMM_MS_CTRL_FW_STREAM_CTRL_0, COMP_OR_LINEAR, 5, 1)
|
|
FldFunc(AUD_FMM_MS_CTRL_FW_STREAM_CTRL_0, SPDIF_OR_PCM, 4, 1)
|
|
FldFunc(AUD_FMM_MS_CTRL_FW_STREAM_CTRL_0, FLUSH_ON_UFLOW, 3, 1)
|
|
FldFunc(AUD_FMM_MS_CTRL_FW_STREAM_CTRL_0, INSERT_ON_UFLOW, 2, 1)
|
|
FldFunc(AUD_FMM_MS_CTRL_FW_STREAM_CTRL_0, INSERT_WHEN_DISA, 1, 1)
|
|
FldFunc(AUD_FMM_MS_CTRL_FW_STREAM_CTRL_0, STREAM_ENA, 0, 1)
|
|
RegFunc(AUD_FMM_MS_CTRL, 0x00278000, AUD_FMM_MS_CTRL_FW_RAMP_AMOUNT_0, 0x804, AUD_FMM_MS_CTRL_FW_RAMP_AMOUNT_0, 0x278804)
|
|
FldFunc(AUD_FMM_MS_CTRL_FW_RAMP_AMOUNT_0, STEPSIZE, 0, 16)
|
|
RegFunc(AUD_FMM_MS_CTRL, 0x00278000, AUD_FMM_MS_CTRL_FW_CBIT_CTRL_0, 0x808, AUD_FMM_MS_CTRL_FW_CBIT_CTRL_0, 0x278808)
|
|
FldFunc(AUD_FMM_MS_CTRL_FW_CBIT_CTRL_0, CP_TOGGLE_RATE, 8, 8)
|
|
FldFunc(AUD_FMM_MS_CTRL_FW_CBIT_CTRL_0, OFFSET, 0, 8)
|
|
RegFunc(AUD_FMM_MS_CTRL, 0x00278000, AUD_FMM_MS_CTRL_FW_RESERVED0_, 0x80c, AUD_FMM_MS_CTRL_FW_RESERVED0_, 0x27880c)
|
|
FldFunc(AUD_FMM_MS_CTRL_FW_RESERVED0_, RESERVED, 0, 16)
|
|
RegFunc(AUD_FMM_MS_CTRL, 0x00278000, AUD_FMM_MS_CTRL_FW_STREAM_CTRL_1, 0x840, AUD_FMM_MS_CTRL_FW_STREAM_CTRL_1, 0x278840)
|
|
FldFunc(AUD_FMM_MS_CTRL_FW_STREAM_CTRL_1, RESERVED, 9, 7)
|
|
FldFunc(AUD_FMM_MS_CTRL_FW_STREAM_CTRL_1, DITHER_ENA, 8, 1)
|
|
FldFunc(AUD_FMM_MS_CTRL_FW_STREAM_CTRL_1, CHAN_OVERRIDE, 7, 1)
|
|
FldFunc(AUD_FMM_MS_CTRL_FW_STREAM_CTRL_1, VALIDITYSPDI, 6, 1)
|
|
FldFunc(AUD_FMM_MS_CTRL_FW_STREAM_CTRL_1, COMP_OR_LINEAR, 5, 1)
|
|
FldFunc(AUD_FMM_MS_CTRL_FW_STREAM_CTRL_1, SPDIF_OR_PCM, 4, 1)
|
|
FldFunc(AUD_FMM_MS_CTRL_FW_STREAM_CTRL_1, FLUSH_ON_UFLOW, 3, 1)
|
|
FldFunc(AUD_FMM_MS_CTRL_FW_STREAM_CTRL_1, INSERT_ON_UFLOW, 2, 1)
|
|
FldFunc(AUD_FMM_MS_CTRL_FW_STREAM_CTRL_1, INSERT_WHEN_DISA, 1, 1)
|
|
FldFunc(AUD_FMM_MS_CTRL_FW_STREAM_CTRL_1, STREAM_ENA, 0, 1)
|
|
RegFunc(AUD_FMM_MS_CTRL, 0x00278000, AUD_FMM_MS_CTRL_FW_RAMP_AMOUNT_1, 0x844, AUD_FMM_MS_CTRL_FW_RAMP_AMOUNT_1, 0x278844)
|
|
FldFunc(AUD_FMM_MS_CTRL_FW_RAMP_AMOUNT_1, STEPSIZE, 0, 16)
|
|
RegFunc(AUD_FMM_MS_CTRL, 0x00278000, AUD_FMM_MS_CTRL_FW_CBIT_CTRL_1, 0x848, AUD_FMM_MS_CTRL_FW_CBIT_CTRL_1, 0x278848)
|
|
FldFunc(AUD_FMM_MS_CTRL_FW_CBIT_CTRL_1, CP_TOGGLE_RATE, 8, 8)
|
|
FldFunc(AUD_FMM_MS_CTRL_FW_CBIT_CTRL_1, OFFSET, 0, 8)
|
|
RegFunc(AUD_FMM_MS_CTRL, 0x00278000, AUD_FMM_MS_CTRL_FW_RESERVED1_, 0x84c, AUD_FMM_MS_CTRL_FW_RESERVED1_, 0x27884c)
|
|
FldFunc(AUD_FMM_MS_CTRL_FW_RESERVED1_, RESERVED, 0, 16)
|
|
RegFunc(AUD_FMM_MS_CTRL, 0x00278000, AUD_FMM_MS_CTRL_FW_RESERVED2, 0x880, AUD_FMM_MS_CTRL_FW_RESERVED2, 0x278880)
|
|
FldFunc(AUD_FMM_MS_CTRL_FW_RESERVED2, RESERVED, 0, 16)
|
|
RegFunc(AUD_FMM_MS_CTRL, 0x00278000, AUD_FMM_MS_CTRL_FW_RESERVED3, 0x8c0, AUD_FMM_MS_CTRL_FW_RESERVED3, 0x2788c0)
|
|
FldFunc(AUD_FMM_MS_CTRL_FW_RESERVED3, RESERVED, 0, 16)
|
|
RegFunc(AUD_FMM_MS_CTRL, 0x00278000, AUD_FMM_MS_CTRL_FW_SCRATCH, 0x900, AUD_FMM_MS_CTRL_FW_SCRATCH, 0x278900)
|
|
FldFunc(AUD_FMM_MS_CTRL_FW_SCRATCH, RESERVED, 0, 16)
|
|
RegFunc(AUD_FMM_MS_CTRL, 0x00278000, AUD_FMM_MS_CTRL_FW_CBITS, 0x940, AUD_FMM_MS_CTRL_FW_CBITS, 0x278940)
|
|
FldFunc(AUD_FMM_MS_CTRL_FW_CBITS, TWO_BYTES, 0, 16)
|
|
RegFunc(AUD_FMM_MS_CTRL, 0x00278000, AUD_FMM_MS_CTRL_USEQ_INST, 0x1000, AUD_FMM_MS_CTRL_USEQ_INST, 0x279000)
|
|
FldFunc(AUD_FMM_MS_CTRL_USEQ_INST, INST, 0, 16)
|
|
|
|
RegAreaFunc(AUD_FMM_MS_ESR_BASE, 0x0027a000, 0x0027a014)
|
|
RegFunc(AUD_FMM_MS_ESR, 0x0027a000, AUD_FMM_MS_ESR_STATUS, 0x0, AUD_FMM_MS_ESR_STATUS, 0x27a000)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS, USEQ_SLEEP, 10, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS, USEQ_ERROR1, 9, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS, CBIT_PING_PONG1, 8, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS, RAMP_DONE1, 7, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS, FLOWON1, 6, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS, UNDERFLOW1, 5, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS, USEQ_ERROR0, 4, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS, CBIT_PING_PONG0, 3, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS, RAMP_DONE0, 2, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS, FLOWON0, 1, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS, UNDERFLOW0, 0, 1)
|
|
RegFunc(AUD_FMM_MS_ESR, 0x0027a000, AUD_FMM_MS_ESR_STATUS_SET, 0x4, AUD_FMM_MS_ESR_STATUS_SET, 0x27a004)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS_SET, USEQ_SLEEP, 10, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS_SET, USEQ_ERROR1, 9, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS_SET, CBIT_PING_PONG1, 8, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS_SET, RAMP_DONE1, 7, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS_SET, FLOWON1, 6, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS_SET, UNDERFLOW1, 5, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS_SET, USEQ_ERROR0, 4, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS_SET, CBIT_PING_PONG0, 3, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS_SET, RAMP_DONE0, 2, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS_SET, FLOWON0, 1, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS_SET, UNDERFLOW0, 0, 1)
|
|
RegFunc(AUD_FMM_MS_ESR, 0x0027a000, AUD_FMM_MS_ESR_STATUS_CLEAR, 0x8, AUD_FMM_MS_ESR_STATUS_CLEAR, 0x27a008)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS_CLEAR, USEQ_SLEEP, 10, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS_CLEAR, USEQ_ERROR1, 9, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS_CLEAR, CBIT_PING_PONG1, 8, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS_CLEAR, RAMP_DONE1, 7, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS_CLEAR, FLOWON1, 6, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS_CLEAR, UNDERFLOW1, 5, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS_CLEAR, USEQ_ERROR0, 4, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS_CLEAR, CBIT_PING_PONG0, 3, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS_CLEAR, RAMP_DONE0, 2, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS_CLEAR, FLOWON0, 1, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_STATUS_CLEAR, UNDERFLOW0, 0, 1)
|
|
RegFunc(AUD_FMM_MS_ESR, 0x0027a000, AUD_FMM_MS_ESR_MASK, 0xc, AUD_FMM_MS_ESR_MASK, 0x27a00c)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK, USEQ_SLEEP, 10, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK, USEQ_ERROR1, 9, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK, CBIT_PING_PONG1, 8, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK, RAMP_DONE1, 7, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK, FLOWON1, 6, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK, UNDERFLOW1, 5, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK, USEQ_ERROR0, 4, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK, CBIT_PING_PONG0, 3, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK, RAMP_DONE0, 2, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK, FLOWON0, 1, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK, UNDERFLOW0, 0, 1)
|
|
RegFunc(AUD_FMM_MS_ESR, 0x0027a000, AUD_FMM_MS_ESR_MASK_SET, 0x10, AUD_FMM_MS_ESR_MASK_SET, 0x27a010)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK_SET, USEQ_SLEEP, 10, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK_SET, USEQ_ERROR1, 9, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK_SET, CBIT_PING_PONG1, 8, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK_SET, RAMP_DONE1, 7, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK_SET, FLOWON1, 6, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK_SET, UNDERFLOW1, 5, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK_SET, USEQ_ERROR0, 4, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK_SET, CBIT_PING_PONG0, 3, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK_SET, RAMP_DONE0, 2, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK_SET, FLOWON0, 1, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK_SET, UNDERFLOW0, 0, 1)
|
|
RegFunc(AUD_FMM_MS_ESR, 0x0027a000, AUD_FMM_MS_ESR_MASK_CLEAR, 0x14, AUD_FMM_MS_ESR_MASK_CLEAR, 0x27a014)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK_CLEAR, USEQ_SLEEP, 10, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK_CLEAR, USEQ_ERROR1, 9, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK_CLEAR, CBIT_PING_PONG1, 8, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK_CLEAR, RAMP_DONE1, 7, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK_CLEAR, FLOWON1, 6, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK_CLEAR, UNDERFLOW1, 5, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK_CLEAR, USEQ_ERROR0, 4, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK_CLEAR, CBIT_PING_PONG0, 3, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK_CLEAR, RAMP_DONE0, 2, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK_CLEAR, FLOWON0, 1, 1)
|
|
FldFunc(AUD_FMM_MS_ESR_MASK_CLEAR, UNDERFLOW0, 0, 1)
|
|
|
|
RegAreaFunc(AUD_FMM_OP_CTRL_BASE, 0x0027c000, 0x0027c1fc)
|
|
RegFunc(AUD_FMM_OP_CTRL, 0x0027c000, AUD_FMM_OP_CTRL_ENABLE_STATUS, 0x0, AUD_FMM_OP_CTRL_ENABLE_STATUS, 0x27c000)
|
|
FldFunc(AUD_FMM_OP_CTRL_ENABLE_STATUS, ALIGN_I2S_SAMPLES, 19, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_ENABLE_STATUS, ALIGN_FLEX_SAMPLES, 18, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_ENABLE_STATUS, I2S_LRCK_ENAI2, 17, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_ENABLE_STATUS, FLEX_LRCK_ENA, 16, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_ENABLE_STATUS, STREAM5_ENA, 5, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_ENABLE_STATUS, STREAM4_ENA, 4, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_ENABLE_STATUS, STREAM3_ENA, 3, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_ENABLE_STATUS, STREAM2_ENA, 2, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_ENABLE_STATUS, STREAM1_ENA, 1, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_ENABLE_STATUS, STREAM0_ENA, 0, 1)
|
|
RegFunc(AUD_FMM_OP_CTRL, 0x0027c000, AUD_FMM_OP_CTRL_ENABLE_SET, 0x4, AUD_FMM_OP_CTRL_ENABLE_SET, 0x27c004)
|
|
FldFunc(AUD_FMM_OP_CTRL_ENABLE_SET, ALIGN_I2S_SAMPLES, 19, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_ENABLE_SET, ALIGN_FLEX_SAMPLES, 18, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_ENABLE_SET, I2S_LRCK_ENAI2, 17, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_ENABLE_SET, FLEX_LRCK_ENA, 16, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_ENABLE_SET, STREAM5_ENA, 5, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_ENABLE_SET, STREAM4_ENA, 4, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_ENABLE_SET, STREAM3_ENA, 3, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_ENABLE_SET, STREAM2_ENA, 2, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_ENABLE_SET, STREAM1_ENA, 1, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_ENABLE_SET, STREAM0_ENA, 0, 1)
|
|
RegFunc(AUD_FMM_OP_CTRL, 0x0027c000, AUD_FMM_OP_CTRL_ENABLE_CLEAR, 0x8, AUD_FMM_OP_CTRL_ENABLE_CLEAR, 0x27c008)
|
|
FldFunc(AUD_FMM_OP_CTRL_ENABLE_CLEAR, ALIGN_I2S_SAMPLES, 19, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_ENABLE_CLEAR, ALIGN_FLEX_SAMPLES, 18, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_ENABLE_CLEAR, I2S_LRCK_ENAI2, 17, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_ENABLE_CLEAR, FLEX_LRCK_ENA, 16, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_ENABLE_CLEAR, STREAM5_ENA, 5, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_ENABLE_CLEAR, STREAM4_ENA, 4, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_ENABLE_CLEAR, STREAM3_ENA, 3, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_ENABLE_CLEAR, STREAM2_ENA, 2, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_ENABLE_CLEAR, STREAM1_ENA, 1, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_ENABLE_CLEAR, STREAM0_ENA, 0, 1)
|
|
RegFunc(AUD_FMM_OP_CTRL, 0x0027c000, AUD_FMM_OP_CTRL_TIMING_INIT, 0x10, AUD_FMM_OP_CTRL_TIMING_INIT, 0x27c010)
|
|
FldFunc(AUD_FMM_OP_CTRL_TIMING_INIT, ALIGN_FS, 16, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_TIMING_INIT, ALIGN_ENA_SPDIF, 12, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_TIMING_INIT, ALIGN_ENA_FLEX, 11, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_TIMING_INIT, ALIGN_ENA_I2S2, 10, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_TIMING_INIT, ALIGN_ENA_I2S1, 9, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_TIMING_INIT, ALIGN_ENA_I2S0, 8, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_TIMING_INIT, INIT_FSCNT_SPDIF0, 4, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_TIMING_INIT, INIT_FSCNT_FLEX, 3, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_TIMING_INIT, INIT_FSCNT_I2S2, 2, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_TIMING_INIT, INIT_FSCNT_I2S1, 1, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_TIMING_INIT, INIT_FSCNT_I2S0, 0, 1)
|
|
RegFunc(AUD_FMM_OP_CTRL, 0x0027c000, AUD_FMM_OP_CTRL_STREAM_CFG, 0x20, AUD_FMM_OP_CTRL_STREAM_CFG, 0x27c020)
|
|
FldFunc(AUD_FMM_OP_CTRL_STREAM_CFG, RFMOD_SEL, 28, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_STREAM_CFG, MAI_SEL, 24, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_STREAM_CFG, FLEX_USE_SPDIF, 22, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_STREAM_CFG, FLEX_SEL, 20, 2)
|
|
FldFunc(AUD_FMM_OP_CTRL_STREAM_CFG, DAC0_USE_SPDIF, 18, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_STREAM_CFG, DAC1_DRIVE_REQ, 17, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_STREAM_CFG, DAC0_DRIVE_REQ, 16, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_STREAM_CFG, WAIT_FOR_VALID5, 13, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_STREAM_CFG, WAIT_FOR_VALID4, 12, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_STREAM_CFG, WAIT_FOR_VALID3, 11, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_STREAM_CFG, WAIT_FOR_VALID2, 10, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_STREAM_CFG, WAIT_FOR_VALID1, 9, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_STREAM_CFG, WAIT_FOR_VALID0, 8, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_STREAM_CFG, IGNORE_FIRST_UNDERFLOW5, 5, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_STREAM_CFG, IGNORE_FIRST_UNDERFLOW4, 4, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_STREAM_CFG, IGNORE_FIRST_UNDERFLOW3, 3, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_STREAM_CFG, IGNORE_FIRST_UNDERFLOW2, 2, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_STREAM_CFG, IGNORE_FIRST_UNDERFLOW1, 1, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_STREAM_CFG, IGNORE_FIRST_UNDERFLOW0, 0, 1)
|
|
RegFunc(AUD_FMM_OP_CTRL, 0x0027c000, AUD_FMM_OP_CTRL_SPDIF_CFG_0, 0x30, AUD_FMM_OP_CTRL_SPDIF_CFG_0, 0x27c030)
|
|
FldFunc(AUD_FMM_OP_CTRL_SPDIF_CFG_0, LR_SELECT, 24, 2)
|
|
FldFunc(AUD_FMM_OP_CTRL_SPDIF_CFG_0, LIMIT_TO_16_BITS, 8, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_SPDIF_CFG_0, MCLK_RATE, 4, 4)
|
|
FldFunc(AUD_FMM_OP_CTRL_SPDIF_CFG_0, PREAM_POL, 3, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_SPDIF_CFG_0, SOFT_PARITY, 2, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_SPDIF_CFG_0, DATA_ENABLE, 1, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_SPDIF_CFG_0, CLOCK_ENABLE, 0, 1)
|
|
RegFunc(AUD_FMM_OP_CTRL, 0x0027c000, AUD_FMM_OP_CTRL_I2S_CFG_, 0x40, AUD_FMM_OP_CTRL_I2S_CFG_, 0x27c040)
|
|
FldFunc(AUD_FMM_OP_CTRL_I2S_CFG_, LR_SELECT, 24, 2)
|
|
FldFunc(AUD_FMM_OP_CTRL_I2S_CFG_, DATA_JUSTIFICATION, 23, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_I2S_CFG_, DATA_ALIGNMENT, 22, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_I2S_CFG_, SCLK_POLARITY, 21, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_I2S_CFG_, LRCK_POLARITY, 20, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_I2S_CFG_, SCLKS_PER_1FS_DIV32, 16, 4)
|
|
FldFunc(AUD_FMM_OP_CTRL_I2S_CFG_, BITS_PER_SAMPLE, 8, 5)
|
|
FldFunc(AUD_FMM_OP_CTRL_I2S_CFG_, MCLK_RATE, 4, 4)
|
|
FldFunc(AUD_FMM_OP_CTRL_I2S_CFG_, DATA_ENABLE, 1, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_I2S_CFG_, CLOCK_ENABLE, 0, 1)
|
|
RegFunc(AUD_FMM_OP_CTRL, 0x0027c000, AUD_FMM_OP_CTRL_FLEX_CFG1, 0x50, AUD_FMM_OP_CTRL_FLEX_CFG1, 0x27c050)
|
|
FldFunc(AUD_FMM_OP_CTRL_FLEX_CFG1, SLAVE_STREAM, 13, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_FLEX_CFG1, IGNORE_VALID, 12, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_FLEX_CFG1, REQUEST_LOW, 11, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_FLEX_CFG1, IGNORE_REQ_TO_SEND, 10, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_FLEX_CFG1, WORD_LENGTH, 8, 2)
|
|
FldFunc(AUD_FMM_OP_CTRL_FLEX_CFG1, LSB_FIRST, 7, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_FLEX_CFG1, SYNC_LOW, 6, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_FLEX_CFG1, SYNC_FORMAT, 5, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_FLEX_CFG1, SYNC_POSITION, 4, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_FLEX_CFG1, SYNC_LENGTH, 3, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_FLEX_CFG1, SCLK_CON_GAP, 2, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_FLEX_CFG1, SCLK_PHASE, 1, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_FLEX_CFG1, ENABLE, 0, 1)
|
|
RegFunc(AUD_FMM_OP_CTRL, 0x0027c000, AUD_FMM_OP_CTRL_FLEX_CFG2, 0x54, AUD_FMM_OP_CTRL_FLEX_CFG2, 0x27c054)
|
|
FldFunc(AUD_FMM_OP_CTRL_FLEX_CFG2, CLOCK_SEL, 28, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_FLEX_CFG2, CLOCK_RATE, 20, 8)
|
|
FldFunc(AUD_FMM_OP_CTRL_FLEX_CFG2, M, 19, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_FLEX_CFG2, USE_STRM_BYTECNT, 18, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_FLEX_CFG2, BYTES_PER_FMM_REQ, 15, 3)
|
|
FldFunc(AUD_FMM_OP_CTRL_FLEX_CFG2, BITS_PER_SAMPLE, 7, 5)
|
|
FldFunc(AUD_FMM_OP_CTRL_FLEX_CFG2, DATA_JUSTIFICATION, 3, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_FLEX_CFG2, DATA_ENABLE, 0, 1)
|
|
RegFunc(AUD_FMM_OP_CTRL, 0x0027c000, AUD_FMM_OP_CTRL_FLEX_BYTE_ORDER, 0x58, AUD_FMM_OP_CTRL_FLEX_BYTE_ORDER, 0x27c058)
|
|
FldFunc(AUD_FMM_OP_CTRL_FLEX_BYTE_ORDER, BYTE_0, 28, 4)
|
|
FldFunc(AUD_FMM_OP_CTRL_FLEX_BYTE_ORDER, BYTE_1, 24, 4)
|
|
FldFunc(AUD_FMM_OP_CTRL_FLEX_BYTE_ORDER, BYTE_2, 20, 4)
|
|
FldFunc(AUD_FMM_OP_CTRL_FLEX_BYTE_ORDER, BYTE_3, 16, 4)
|
|
FldFunc(AUD_FMM_OP_CTRL_FLEX_BYTE_ORDER, BYTE_4, 12, 4)
|
|
FldFunc(AUD_FMM_OP_CTRL_FLEX_BYTE_ORDER, BYTE_5, 8, 4)
|
|
FldFunc(AUD_FMM_OP_CTRL_FLEX_BYTE_ORDER, BYTE_6, 4, 4)
|
|
FldFunc(AUD_FMM_OP_CTRL_FLEX_BYTE_ORDER, BYTE_7, 0, 4)
|
|
RegFunc(AUD_FMM_OP_CTRL, 0x0027c000, AUD_FMM_OP_CTRL_FLEX_THROTTLE, 0x5c, AUD_FMM_OP_CTRL_FLEX_THROTTLE, 0x27c05c)
|
|
FldFunc(AUD_FMM_OP_CTRL_FLEX_THROTTLE, THROTTLE, 0, 12)
|
|
RegFunc(AUD_FMM_OP_CTRL, 0x0027c000, AUD_FMM_OP_CTRL_MAI_CFG, 0x70, AUD_FMM_OP_CTRL_MAI_CFG, 0x27c070)
|
|
FldFunc(AUD_FMM_OP_CTRL_MAI_CFG, LR_SELECT, 24, 2)
|
|
FldFunc(AUD_FMM_OP_CTRL_MAI_CFG, SPDIF_MODE, 1, 1)
|
|
FldFunc(AUD_FMM_OP_CTRL_MAI_CFG, ENABLE_MAI, 0, 1)
|
|
RegFunc(AUD_FMM_OP_CTRL, 0x0027c000, AUD_FMM_OP_CTRL_MAI_FORMAT, 0x74, AUD_FMM_OP_CTRL_MAI_FORMAT, 0x27c074)
|
|
FldFunc(AUD_FMM_OP_CTRL_MAI_FORMAT, RESERVED, 29, 3)
|
|
FldFunc(AUD_FMM_OP_CTRL_MAI_FORMAT, SAMPLE_WIDTH, 24, 5)
|
|
FldFunc(AUD_FMM_OP_CTRL_MAI_FORMAT, AUDIO_FORMAT, 16, 8)
|
|
FldFunc(AUD_FMM_OP_CTRL_MAI_FORMAT, SAMPLE_RATE, 8, 8)
|
|
FldFunc(AUD_FMM_OP_CTRL_MAI_FORMAT, STREAM_ID, 4, 4)
|
|
FldFunc(AUD_FMM_OP_CTRL_MAI_FORMAT, MAI_VERSION, 0, 4)
|
|
RegFunc(AUD_FMM_OP_CTRL, 0x0027c000, AUD_FMM_OP_CTRL_MCLK_CFG_SPDIF0, 0x100, AUD_FMM_OP_CTRL_MCLK_CFG_SPDIF0, 0x27c100)
|
|
FldFunc(AUD_FMM_OP_CTRL_MCLK_CFG_SPDIF0, PLLCLKSEL, 0, 3)
|
|
RegFunc(AUD_FMM_OP_CTRL, 0x0027c000, AUD_FMM_OP_CTRL_MCLK_CFG_FLEX, 0x110, AUD_FMM_OP_CTRL_MCLK_CFG_FLEX, 0x27c110)
|
|
FldFunc(AUD_FMM_OP_CTRL_MCLK_CFG_FLEX, PLLCLKSEL, 0, 3)
|
|
RegFunc(AUD_FMM_OP_CTRL, 0x0027c000, AUD_FMM_OP_CTRL_MCLK_CFG_I2S, 0x120, AUD_FMM_OP_CTRL_MCLK_CFG_I2S, 0x27c120)
|
|
FldFunc(AUD_FMM_OP_CTRL_MCLK_CFG_I2S, PLLCLKSEL, 0, 3)
|
|
RegFunc(AUD_FMM_OP_CTRL, 0x0027c000, AUD_FMM_OP_CTRL_MCLK_CFG_EXT, 0x130, AUD_FMM_OP_CTRL_MCLK_CFG_EXT, 0x27c130)
|
|
FldFunc(AUD_FMM_OP_CTRL_MCLK_CFG_EXT, PLLCLKSEL, 0, 3)
|
|
RegFunc(AUD_FMM_OP_CTRL, 0x0027c000, AUD_FMM_OP_CTRL_DIAG_CFG, 0x1fc, AUD_FMM_OP_CTRL_DIAG_CFG, 0x27c1fc)
|
|
FldFunc(AUD_FMM_OP_CTRL_DIAG_CFG, SEL, 0, 3)
|
|
|
|
RegAreaFunc(AUD_FMM_OP_ESR_BASE, 0x0027c400, 0x0027c414)
|
|
RegFunc(AUD_FMM_OP_ESR, 0x0027c400, AUD_FMM_OP_ESR_STATUS, 0x0, AUD_FMM_OP_ESR_STATUS, 0x27c400)
|
|
FldFunc(AUD_FMM_OP_ESR_STATUS, PLL2_LOCKPL, 9, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_STATUS, PLL1_LOCKPL, 8, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_STATUS, PLL0_LOCKPL, 7, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_STATUS, MAI_TIMING_ERRORMA, 6, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_STATUS, STREAM5_UNDERFLOW, 5, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_STATUS, STREAM4_UNDERFLOW, 4, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_STATUS, STREAM3_UNDERFLOW, 3, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_STATUS, STREAM2_UNDERFLOW, 2, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_STATUS, STREAM1_UNDERFLOW, 1, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_STATUS, STREAM0_UNDERFLOW, 0, 1)
|
|
RegFunc(AUD_FMM_OP_ESR, 0x0027c400, AUD_FMM_OP_ESR_STATUS_SET, 0x4, AUD_FMM_OP_ESR_STATUS_SET, 0x27c404)
|
|
FldFunc(AUD_FMM_OP_ESR_STATUS_SET, PLL2_LOCKPL, 9, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_STATUS_SET, PLL1_LOCKPL, 8, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_STATUS_SET, PLL0_LOCKPL, 7, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_STATUS_SET, MAI_TIMING_ERRORMA, 6, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_STATUS_SET, STREAM5_UNDERFLOW, 5, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_STATUS_SET, STREAM4_UNDERFLOW, 4, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_STATUS_SET, STREAM3_UNDERFLOW, 3, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_STATUS_SET, STREAM2_UNDERFLOW, 2, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_STATUS_SET, STREAM1_UNDERFLOW, 1, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_STATUS_SET, STREAM0_UNDERFLOW, 0, 1)
|
|
RegFunc(AUD_FMM_OP_ESR, 0x0027c400, AUD_FMM_OP_ESR_STATUS_CLEAR, 0x8, AUD_FMM_OP_ESR_STATUS_CLEAR, 0x27c408)
|
|
FldFunc(AUD_FMM_OP_ESR_STATUS_CLEAR, PLL2_LOCKPL, 9, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_STATUS_CLEAR, PLL1_LOCKPL, 8, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_STATUS_CLEAR, PLL0_LOCKPL, 7, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_STATUS_CLEAR, MAI_TIMING_ERRORMA, 6, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_STATUS_CLEAR, STREAM5_UNDERFLOW, 5, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_STATUS_CLEAR, STREAM4_UNDERFLOW, 4, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_STATUS_CLEAR, STREAM3_UNDERFLOW, 3, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_STATUS_CLEAR, STREAM2_UNDERFLOW, 2, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_STATUS_CLEAR, STREAM1_UNDERFLOW, 1, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_STATUS_CLEAR, STREAM0_UNDERFLOW, 0, 1)
|
|
RegFunc(AUD_FMM_OP_ESR, 0x0027c400, AUD_FMM_OP_ESR_MASK, 0xc, AUD_FMM_OP_ESR_MASK, 0x27c40c)
|
|
FldFunc(AUD_FMM_OP_ESR_MASK, PLL2_LOCKPL, 9, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_MASK, PLL1_LOCKPL, 8, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_MASK, PLL0_LOCKPL, 7, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_MASK, MAI_TIMING_ERRORMA, 6, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_MASK, STREAM5_UNDERFLOW, 5, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_MASK, STREAM4_UNDERFLOW, 4, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_MASK, STREAM3_UNDERFLOW, 3, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_MASK, STREAM2_UNDERFLOW, 2, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_MASK, STREAM1_UNDERFLOW, 1, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_MASK, STREAM0_UNDERFLOW, 0, 1)
|
|
RegFunc(AUD_FMM_OP_ESR, 0x0027c400, AUD_FMM_OP_ESR_MASK_SET, 0x10, AUD_FMM_OP_ESR_MASK_SET, 0x27c410)
|
|
FldFunc(AUD_FMM_OP_ESR_MASK_SET, PLL2_LOCKPL, 9, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_MASK_SET, PLL1_LOCKPL, 8, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_MASK_SET, PLL0_LOCKPL, 7, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_MASK_SET, MAI_TIMING_ERRORMA, 6, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_MASK_SET, STREAM5_UNDERFLOW, 5, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_MASK_SET, STREAM4_UNDERFLOW, 4, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_MASK_SET, STREAM3_UNDERFLOW, 3, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_MASK_SET, STREAM2_UNDERFLOW, 2, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_MASK_SET, STREAM1_UNDERFLOW, 1, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_MASK_SET, STREAM0_UNDERFLOW, 0, 1)
|
|
RegFunc(AUD_FMM_OP_ESR, 0x0027c400, AUD_FMM_OP_ESR_MASK_CLEAR, 0x14, AUD_FMM_OP_ESR_MASK_CLEAR, 0x27c414)
|
|
FldFunc(AUD_FMM_OP_ESR_MASK_CLEAR, PLL2_LOCKPL, 9, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_MASK_CLEAR, PLL1_LOCKPL, 8, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_MASK_CLEAR, PLL0_LOCKPL, 7, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_MASK_CLEAR, MAI_TIMING_ERRORMA, 6, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_MASK_CLEAR, STREAM5_UNDERFLOW, 5, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_MASK_CLEAR, STREAM4_UNDERFLOW, 4, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_MASK_CLEAR, STREAM3_UNDERFLOW, 3, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_MASK_CLEAR, STREAM2_UNDERFLOW, 2, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_MASK_CLEAR, STREAM1_UNDERFLOW, 1, 1)
|
|
FldFunc(AUD_FMM_OP_ESR_MASK_CLEAR, STREAM0_UNDERFLOW, 0, 1)
|
|
|
|
RegAreaFunc(AUD_FMM_PLL0_BASE, 0x0027c800, 0x0027c81c)
|
|
RegFunc(AUD_FMM_PLL0, 0x0027c800, AUD_FMM_PLL0_MACRO, 0x0, AUD_FMM_PLL0_MACRO, 0x27c800)
|
|
FldFunc(AUD_FMM_PLL0_MACRO, MACRO_SELECT, 0, 3)
|
|
RegFunc(AUD_FMM_PLL0, 0x0027c800, AUD_FMM_PLL0_STATUS, 0x4, AUD_FMM_PLL0_STATUS, 0x27c804)
|
|
FldFunc(AUD_FMM_PLL0_STATUS, PLL_FSM_STATE, 1, 2)
|
|
FldFunc(AUD_FMM_PLL0_STATUS, PLL_FSM_OUTPUT_ENA, 0, 1)
|
|
RegFunc(AUD_FMM_PLL0, 0x0027c800, AUD_FMM_PLL0_CONTROL, 0x8, AUD_FMM_PLL0_CONTROL, 0x27c808)
|
|
FldFunc(AUD_FMM_PLL0_CONTROL, REFERENCE_SELECT, 4, 2)
|
|
FldFunc(AUD_FMM_PLL0_CONTROL, UPDATE_OVERRIDE, 3, 1)
|
|
FldFunc(AUD_FMM_PLL0_CONTROL, USER_UPDATE_DIVIDERS, 2, 1)
|
|
FldFunc(AUD_FMM_PLL0_CONTROL, OUTPUT_OVERRIDE, 1, 1)
|
|
FldFunc(AUD_FMM_PLL0_CONTROL, USER_OUTPUT_ENABLE, 0, 1)
|
|
RegFunc(AUD_FMM_PLL0, 0x0027c800, AUD_FMM_PLL0_USER_DIV1, 0xc, AUD_FMM_PLL0_USER_DIV1, 0x27c80c)
|
|
FldFunc(AUD_FMM_PLL0_USER_DIV1, USER_PLLBYP2, 26, 1)
|
|
FldFunc(AUD_FMM_PLL0_USER_DIV1, USER_HGEAR2, 25, 1)
|
|
FldFunc(AUD_FMM_PLL0_USER_DIV1, USER_FDIV2, 21, 4)
|
|
FldFunc(AUD_FMM_PLL0_USER_DIV1, USER_FSEL2, 16, 5)
|
|
FldFunc(AUD_FMM_PLL0_USER_DIV1, USER_PLLBYP1, 10, 1)
|
|
FldFunc(AUD_FMM_PLL0_USER_DIV1, USER_HGEAR1, 9, 1)
|
|
FldFunc(AUD_FMM_PLL0_USER_DIV1, USER_FDIV1, 5, 4)
|
|
FldFunc(AUD_FMM_PLL0_USER_DIV1, USER_FSEL1, 0, 5)
|
|
RegFunc(AUD_FMM_PLL0, 0x0027c800, AUD_FMM_PLL0_USER_DIV2, 0x10, AUD_FMM_PLL0_USER_DIV2, 0x27c810)
|
|
FldFunc(AUD_FMM_PLL0_USER_DIV2, USER_HGEAR3, 9, 1)
|
|
FldFunc(AUD_FMM_PLL0_USER_DIV2, USER_FDIV3, 5, 4)
|
|
FldFunc(AUD_FMM_PLL0_USER_DIV2, USER_FSEL3, 0, 5)
|
|
RegFunc(AUD_FMM_PLL0, 0x0027c800, AUD_FMM_PLL0_ACTIVE_DIV1, 0x14, AUD_FMM_PLL0_ACTIVE_DIV1, 0x27c814)
|
|
FldFunc(AUD_FMM_PLL0_ACTIVE_DIV1, PLLBYP2, 26, 1)
|
|
FldFunc(AUD_FMM_PLL0_ACTIVE_DIV1, HGEAR2, 25, 1)
|
|
FldFunc(AUD_FMM_PLL0_ACTIVE_DIV1, FDIV2, 21, 4)
|
|
FldFunc(AUD_FMM_PLL0_ACTIVE_DIV1, FSEL2, 16, 5)
|
|
FldFunc(AUD_FMM_PLL0_ACTIVE_DIV1, EXTCLKDIV, 11, 5)
|
|
FldFunc(AUD_FMM_PLL0_ACTIVE_DIV1, PLLBYP1, 10, 1)
|
|
FldFunc(AUD_FMM_PLL0_ACTIVE_DIV1, HGEAR1, 9, 1)
|
|
FldFunc(AUD_FMM_PLL0_ACTIVE_DIV1, FDIV1, 5, 4)
|
|
FldFunc(AUD_FMM_PLL0_ACTIVE_DIV1, FSEL1, 0, 5)
|
|
RegFunc(AUD_FMM_PLL0, 0x0027c800, AUD_FMM_PLL0_ACTIVE_DIV2, 0x18, AUD_FMM_PLL0_ACTIVE_DIV2, 0x27c818)
|
|
FldFunc(AUD_FMM_PLL0_ACTIVE_DIV2, HGEAR3, 9, 1)
|
|
FldFunc(AUD_FMM_PLL0_ACTIVE_DIV2, FDIV3, 5, 4)
|
|
FldFunc(AUD_FMM_PLL0_ACTIVE_DIV2, FSEL3, 0, 5)
|
|
RegFunc(AUD_FMM_PLL0, 0x0027c800, AUD_FMM_PLL0_DIVIDER, 0x1c, AUD_FMM_PLL0_DIVIDER, 0x27c81c)
|
|
FldFunc(AUD_FMM_PLL0_DIVIDER, USERCLKDIV, 11, 5)
|
|
FldFunc(AUD_FMM_PLL0_DIVIDER, LOCK_TIMERPL, 0, 11)
|
|
|
|
RegAreaFunc(AUD_FMM_PLL1_BASE, 0x0027c900, 0x0027c91c)
|
|
RegFunc(AUD_FMM_PLL1, 0x0027c900, AUD_FMM_PLL1_MACRO, 0x0, AUD_FMM_PLL1_MACRO, 0x27c900)
|
|
FldFunc(AUD_FMM_PLL1_MACRO, MACRO_SELECT, 0, 3)
|
|
RegFunc(AUD_FMM_PLL1, 0x0027c900, AUD_FMM_PLL1_STATUS, 0x4, AUD_FMM_PLL1_STATUS, 0x27c904)
|
|
FldFunc(AUD_FMM_PLL1_STATUS, PLL_FSM_STATE, 1, 2)
|
|
FldFunc(AUD_FMM_PLL1_STATUS, PLL_FSM_OUTPUT_ENA, 0, 1)
|
|
RegFunc(AUD_FMM_PLL1, 0x0027c900, AUD_FMM_PLL1_CONTROL, 0x8, AUD_FMM_PLL1_CONTROL, 0x27c908)
|
|
FldFunc(AUD_FMM_PLL1_CONTROL, REFERENCE_SELECT, 4, 2)
|
|
FldFunc(AUD_FMM_PLL1_CONTROL, UPDATE_OVERRIDE, 3, 1)
|
|
FldFunc(AUD_FMM_PLL1_CONTROL, USER_UPDATE_DIVIDERS, 2, 1)
|
|
FldFunc(AUD_FMM_PLL1_CONTROL, OUTPUT_OVERRIDE, 1, 1)
|
|
FldFunc(AUD_FMM_PLL1_CONTROL, USER_OUTPUT_ENABLE, 0, 1)
|
|
RegFunc(AUD_FMM_PLL1, 0x0027c900, AUD_FMM_PLL1_USER_DIV1, 0xc, AUD_FMM_PLL1_USER_DIV1, 0x27c90c)
|
|
FldFunc(AUD_FMM_PLL1_USER_DIV1, USER_PLLBYP2, 26, 1)
|
|
FldFunc(AUD_FMM_PLL1_USER_DIV1, USER_HGEAR2, 25, 1)
|
|
FldFunc(AUD_FMM_PLL1_USER_DIV1, USER_FDIV2, 21, 4)
|
|
FldFunc(AUD_FMM_PLL1_USER_DIV1, USER_FSEL2, 16, 5)
|
|
FldFunc(AUD_FMM_PLL1_USER_DIV1, USER_PLLBYP1, 10, 1)
|
|
FldFunc(AUD_FMM_PLL1_USER_DIV1, USER_HGEAR1, 9, 1)
|
|
FldFunc(AUD_FMM_PLL1_USER_DIV1, USER_FDIV1, 5, 4)
|
|
FldFunc(AUD_FMM_PLL1_USER_DIV1, USER_FSEL1, 0, 5)
|
|
RegFunc(AUD_FMM_PLL1, 0x0027c900, AUD_FMM_PLL1_USER_DIV2, 0x10, AUD_FMM_PLL1_USER_DIV2, 0x27c910)
|
|
FldFunc(AUD_FMM_PLL1_USER_DIV2, USER_HGEAR3, 9, 1)
|
|
FldFunc(AUD_FMM_PLL1_USER_DIV2, USER_FDIV3, 5, 4)
|
|
FldFunc(AUD_FMM_PLL1_USER_DIV2, USER_FSEL3, 0, 5)
|
|
RegFunc(AUD_FMM_PLL1, 0x0027c900, AUD_FMM_PLL1_ACTIVE_DIV1, 0x14, AUD_FMM_PLL1_ACTIVE_DIV1, 0x27c914)
|
|
FldFunc(AUD_FMM_PLL1_ACTIVE_DIV1, PLLBYP2, 26, 1)
|
|
FldFunc(AUD_FMM_PLL1_ACTIVE_DIV1, HGEAR2, 25, 1)
|
|
FldFunc(AUD_FMM_PLL1_ACTIVE_DIV1, FDIV2, 21, 4)
|
|
FldFunc(AUD_FMM_PLL1_ACTIVE_DIV1, FSEL2, 16, 5)
|
|
FldFunc(AUD_FMM_PLL1_ACTIVE_DIV1, EXTCLKDIV, 11, 5)
|
|
FldFunc(AUD_FMM_PLL1_ACTIVE_DIV1, PLLBYP1, 10, 1)
|
|
FldFunc(AUD_FMM_PLL1_ACTIVE_DIV1, HGEAR1, 9, 1)
|
|
FldFunc(AUD_FMM_PLL1_ACTIVE_DIV1, FDIV1, 5, 4)
|
|
FldFunc(AUD_FMM_PLL1_ACTIVE_DIV1, FSEL1, 0, 5)
|
|
RegFunc(AUD_FMM_PLL1, 0x0027c900, AUD_FMM_PLL1_ACTIVE_DIV2, 0x18, AUD_FMM_PLL1_ACTIVE_DIV2, 0x27c918)
|
|
FldFunc(AUD_FMM_PLL1_ACTIVE_DIV2, HGEAR3, 9, 1)
|
|
FldFunc(AUD_FMM_PLL1_ACTIVE_DIV2, FDIV3, 5, 4)
|
|
FldFunc(AUD_FMM_PLL1_ACTIVE_DIV2, FSEL3, 0, 5)
|
|
RegFunc(AUD_FMM_PLL1, 0x0027c900, AUD_FMM_PLL1_DIVIDER, 0x1c, AUD_FMM_PLL1_DIVIDER, 0x27c91c)
|
|
FldFunc(AUD_FMM_PLL1_DIVIDER, USERCLKDIV, 11, 5)
|
|
FldFunc(AUD_FMM_PLL1_DIVIDER, LOCK_TIMERPL, 0, 11)
|
|
|
|
RegAreaFunc(AUD_FMM_PLL2_BASE, 0x0027ca00, 0x0027ca1c)
|
|
RegFunc(AUD_FMM_PLL2, 0x0027ca00, AUD_FMM_PLL2_MACRO, 0x0, AUD_FMM_PLL2_MACRO, 0x27ca00)
|
|
FldFunc(AUD_FMM_PLL2_MACRO, MACRO_SELECT, 0, 3)
|
|
RegFunc(AUD_FMM_PLL2, 0x0027ca00, AUD_FMM_PLL2_STATUS, 0x4, AUD_FMM_PLL2_STATUS, 0x27ca04)
|
|
FldFunc(AUD_FMM_PLL2_STATUS, PLL_FSM_STATE, 1, 2)
|
|
FldFunc(AUD_FMM_PLL2_STATUS, PLL_FSM_OUTPUT_ENA, 0, 1)
|
|
RegFunc(AUD_FMM_PLL2, 0x0027ca00, AUD_FMM_PLL2_CONTROL, 0x8, AUD_FMM_PLL2_CONTROL, 0x27ca08)
|
|
FldFunc(AUD_FMM_PLL2_CONTROL, REFERENCE_SELECT, 4, 2)
|
|
FldFunc(AUD_FMM_PLL2_CONTROL, UPDATE_OVERRIDE, 3, 1)
|
|
FldFunc(AUD_FMM_PLL2_CONTROL, USER_UPDATE_DIVIDERS, 2, 1)
|
|
FldFunc(AUD_FMM_PLL2_CONTROL, OUTPUT_OVERRIDE, 1, 1)
|
|
FldFunc(AUD_FMM_PLL2_CONTROL, USER_OUTPUT_ENABLE, 0, 1)
|
|
RegFunc(AUD_FMM_PLL2, 0x0027ca00, AUD_FMM_PLL2_USER_DIV1, 0xc, AUD_FMM_PLL2_USER_DIV1, 0x27ca0c)
|
|
FldFunc(AUD_FMM_PLL2_USER_DIV1, USER_PLLBYP2, 26, 1)
|
|
FldFunc(AUD_FMM_PLL2_USER_DIV1, USER_HGEAR2, 25, 1)
|
|
FldFunc(AUD_FMM_PLL2_USER_DIV1, USER_FDIV2, 21, 4)
|
|
FldFunc(AUD_FMM_PLL2_USER_DIV1, USER_FSEL2, 16, 5)
|
|
FldFunc(AUD_FMM_PLL2_USER_DIV1, USER_PLLBYP1, 10, 1)
|
|
FldFunc(AUD_FMM_PLL2_USER_DIV1, USER_HGEAR1, 9, 1)
|
|
FldFunc(AUD_FMM_PLL2_USER_DIV1, USER_FDIV1, 5, 4)
|
|
FldFunc(AUD_FMM_PLL2_USER_DIV1, USER_FSEL1, 0, 5)
|
|
RegFunc(AUD_FMM_PLL2, 0x0027ca00, AUD_FMM_PLL2_USER_DIV2, 0x10, AUD_FMM_PLL2_USER_DIV2, 0x27ca10)
|
|
FldFunc(AUD_FMM_PLL2_USER_DIV2, USER_HGEAR3, 9, 1)
|
|
FldFunc(AUD_FMM_PLL2_USER_DIV2, USER_FDIV3, 5, 4)
|
|
FldFunc(AUD_FMM_PLL2_USER_DIV2, USER_FSEL3, 0, 5)
|
|
RegFunc(AUD_FMM_PLL2, 0x0027ca00, AUD_FMM_PLL2_ACTIVE_DIV1, 0x14, AUD_FMM_PLL2_ACTIVE_DIV1, 0x27ca14)
|
|
FldFunc(AUD_FMM_PLL2_ACTIVE_DIV1, PLLBYP2, 26, 1)
|
|
FldFunc(AUD_FMM_PLL2_ACTIVE_DIV1, HGEAR2, 25, 1)
|
|
FldFunc(AUD_FMM_PLL2_ACTIVE_DIV1, FDIV2, 21, 4)
|
|
FldFunc(AUD_FMM_PLL2_ACTIVE_DIV1, FSEL2, 16, 5)
|
|
FldFunc(AUD_FMM_PLL2_ACTIVE_DIV1, EXTCLKDIV, 11, 5)
|
|
FldFunc(AUD_FMM_PLL2_ACTIVE_DIV1, PLLBYP1, 10, 1)
|
|
FldFunc(AUD_FMM_PLL2_ACTIVE_DIV1, HGEAR1, 9, 1)
|
|
FldFunc(AUD_FMM_PLL2_ACTIVE_DIV1, FDIV1, 5, 4)
|
|
FldFunc(AUD_FMM_PLL2_ACTIVE_DIV1, FSEL1, 0, 5)
|
|
RegFunc(AUD_FMM_PLL2, 0x0027ca00, AUD_FMM_PLL2_ACTIVE_DIV2, 0x18, AUD_FMM_PLL2_ACTIVE_DIV2, 0x27ca18)
|
|
FldFunc(AUD_FMM_PLL2_ACTIVE_DIV2, HGEAR3, 9, 1)
|
|
FldFunc(AUD_FMM_PLL2_ACTIVE_DIV2, FDIV3, 5, 4)
|
|
FldFunc(AUD_FMM_PLL2_ACTIVE_DIV2, FSEL3, 0, 5)
|
|
RegFunc(AUD_FMM_PLL2, 0x0027ca00, AUD_FMM_PLL2_DIVIDER, 0x1c, AUD_FMM_PLL2_DIVIDER, 0x27ca1c)
|
|
FldFunc(AUD_FMM_PLL2_DIVIDER, USERCLKDIV, 11, 5)
|
|
FldFunc(AUD_FMM_PLL2_DIVIDER, LOCK_TIMERPL, 0, 11)
|
|
|
|
RegAreaFunc(AUD_FMM_NCO_BASE, 0x0027d000, 0x0027d004)
|
|
RegFunc(AUD_FMM_NCO, 0x0027d000, AUD_FMM_NCO_FMM_NCO_CNTL0, 0x0, AUD_FMM_NCO_FMM_NCO_CNTL0, 0x27d000)
|
|
FldFunc(AUD_FMM_NCO_FMM_NCO_CNTL0, FMM_NCO_NUM, 16, 16)
|
|
FldFunc(AUD_FMM_NCO_FMM_NCO_CNTL0, FMM_NCO_INT, 0, 16)
|
|
RegFunc(AUD_FMM_NCO, 0x0027d000, AUD_FMM_NCO_FMM_NCO_CNTL1, 0x4, AUD_FMM_NCO_FMM_NCO_CNTL1, 0x27d004)
|
|
FldFunc(AUD_FMM_NCO_FMM_NCO_CNTL1, FMM_NCO_DEN, 0, 32)
|
|
|
|
#endif
|
|
|
|
|
|
//******************************************************************************
|
|
//
|
|
// Host Interfaces Ring Bus Node
|
|
//
|
|
//******************************************************************************
|
|
#ifndef EXCLUDE_HOST_INTERFACES
|
|
|
|
RegAreaFunc(HostifRbnodeRegsBase, 0x300000, 0x30007F)
|
|
RegFunc(HostifRbnodeRegs, 0x300000, RbConfig , 0x0, HosRRs_RbConfig , 0x300000)
|
|
FldFunc(HosRRs_RbConfig , RdPostEna, 1, 1)
|
|
FldFunc(HosRRs_RbConfig , RdBypEna, 0, 1)
|
|
RegFunc(HostifRbnodeRegs, 0x300000, RbStickyError, 0x4, HosRRs_RbStickyError, 0x300004)
|
|
FldFunc(HosRRs_RbStickyError, Node, 1, 1)
|
|
FldFunc(HosRRs_RbStickyError, Tgt, 0, 1)
|
|
RegFunc(HostifRbnodeRegs, 0x300000, RbCurrentError, 0x8, HosRRs_RbCurrentError, 0x300008)
|
|
FldFunc(HosRRs_RbCurrentError, Node, 1, 1)
|
|
FldFunc(HosRRs_RbCurrentError, Tgt, 0, 1)
|
|
RegFunc(HostifRbnodeRegs, 0x300000, RbReadData, 0xC, HosRRs_RbReadData, 0x30000c)
|
|
FldFunc(HosRRs_RbReadData, Data, 0, 32)
|
|
|
|
RegAreaFunc(HostifRingbusDebugRegs0Base, 0x300080, 0x3000FF)
|
|
RegFunc(HostifRingbusDebugRegs0, 0x300080, RbDebugConfig, 0x0, HosRDR0_RbDebugConfig, 0x300080)
|
|
FldFunc(HosRDR0_RbDebugConfig, Addr3WrStat, 15, 1)
|
|
FldFunc(HosRDR0_RbDebugConfig, Addr2WrStat, 14, 1)
|
|
FldFunc(HosRDR0_RbDebugConfig, Addr1WrStat, 13, 1)
|
|
FldFunc(HosRDR0_RbDebugConfig, Addr0WrStat, 12, 1)
|
|
FldFunc(HosRDR0_RbDebugConfig, Addr3RdStat, 11, 1)
|
|
FldFunc(HosRDR0_RbDebugConfig, Addr2RdStat, 10, 1)
|
|
FldFunc(HosRDR0_RbDebugConfig, Addr1RdStat, 9, 1)
|
|
FldFunc(HosRDR0_RbDebugConfig, Addr0RdStat, 8, 1)
|
|
FldFunc(HosRDR0_RbDebugConfig, Addr3WrEna, 7, 1)
|
|
FldFunc(HosRDR0_RbDebugConfig, Addr2WrEna, 6, 1)
|
|
FldFunc(HosRDR0_RbDebugConfig, Addr1WrEna, 5, 1)
|
|
FldFunc(HosRDR0_RbDebugConfig, Addr0WrEna, 4, 1)
|
|
FldFunc(HosRDR0_RbDebugConfig, Addr3RdEna, 3, 1)
|
|
FldFunc(HosRDR0_RbDebugConfig, Addr2RdEna, 2, 1)
|
|
FldFunc(HosRDR0_RbDebugConfig, Addr1RdEna, 1, 1)
|
|
FldFunc(HosRDR0_RbDebugConfig, Addr0RdEna, 0, 1)
|
|
RegFunc(HostifRingbusDebugRegs0, 0x300080, RbDebugReg0Addr, 0x4, HosRDR0_RbDebugReg0Addr, 0x300084)
|
|
FldFunc(HosRDR0_RbDebugReg0Addr, Addr, 0, 16)
|
|
RegFunc(HostifRingbusDebugRegs0, 0x300080, RbDebugReg1Addr, 0x8, HosRDR0_RbDebugReg1Addr, 0x300088)
|
|
FldFunc(HosRDR0_RbDebugReg1Addr, Addr, 0, 16)
|
|
RegFunc(HostifRingbusDebugRegs0, 0x300080, RbDebugReg2Addr, 0xC, HosRDR0_RbDebugReg2Addr, 0x30008c)
|
|
FldFunc(HosRDR0_RbDebugReg2Addr, Addr, 0, 16)
|
|
RegFunc(HostifRingbusDebugRegs0, 0x300080, RbDebugReg3Addr, 0x10, HosRDR0_RbDebugReg3Addr, 0x300090)
|
|
FldFunc(HosRDR0_RbDebugReg3Addr, Addr, 0, 16)
|
|
RegFunc(HostifRingbusDebugRegs0, 0x300080, RbDebugOutputReg, 0x14, HosRDR0_RbDebugOutputReg, 0x300094)
|
|
FldFunc(HosRDR0_RbDebugOutputReg, DspRst, 1, 1)
|
|
FldFunc(HosRDR0_RbDebugOutputReg, FmmRst, 0, 1)
|
|
|
|
RegAreaFunc(HostifRingbusDebugRegs1Base, 0x300100, 0x30017F)
|
|
RegFunc(HostifRingbusDebugRegs1, 0x300100, RbDebugConfig, 0x0, HosRDR1_RbDebugConfig, 0x300100)
|
|
FldFunc(HosRDR1_RbDebugConfig, Addr3WrStat, 15, 1)
|
|
FldFunc(HosRDR1_RbDebugConfig, Addr2WrStat, 14, 1)
|
|
FldFunc(HosRDR1_RbDebugConfig, Addr1WrStat, 13, 1)
|
|
FldFunc(HosRDR1_RbDebugConfig, Addr0WrStat, 12, 1)
|
|
FldFunc(HosRDR1_RbDebugConfig, Addr3RdStat, 11, 1)
|
|
FldFunc(HosRDR1_RbDebugConfig, Addr2RdStat, 10, 1)
|
|
FldFunc(HosRDR1_RbDebugConfig, Addr1RdStat, 9, 1)
|
|
FldFunc(HosRDR1_RbDebugConfig, Addr0RdStat, 8, 1)
|
|
FldFunc(HosRDR1_RbDebugConfig, Addr3WrEna, 7, 1)
|
|
FldFunc(HosRDR1_RbDebugConfig, Addr2WrEna, 6, 1)
|
|
FldFunc(HosRDR1_RbDebugConfig, Addr1WrEna, 5, 1)
|
|
FldFunc(HosRDR1_RbDebugConfig, Addr0WrEna, 4, 1)
|
|
FldFunc(HosRDR1_RbDebugConfig, Addr3RdEna, 3, 1)
|
|
FldFunc(HosRDR1_RbDebugConfig, Addr2RdEna, 2, 1)
|
|
FldFunc(HosRDR1_RbDebugConfig, Addr1RdEna, 1, 1)
|
|
FldFunc(HosRDR1_RbDebugConfig, Addr0RdEna, 0, 1)
|
|
RegFunc(HostifRingbusDebugRegs1, 0x300100, RbDebugReg0Addr, 0x4, HosRDR1_RbDebugReg0Addr, 0x300104)
|
|
FldFunc(HosRDR1_RbDebugReg0Addr, Addr, 0, 16)
|
|
RegFunc(HostifRingbusDebugRegs1, 0x300100, RbDebugReg1Addr, 0x8, HosRDR1_RbDebugReg1Addr, 0x300108)
|
|
FldFunc(HosRDR1_RbDebugReg1Addr, Addr, 0, 16)
|
|
RegFunc(HostifRingbusDebugRegs1, 0x300100, RbDebugReg2Addr, 0xC, HosRDR1_RbDebugReg2Addr, 0x30010c)
|
|
FldFunc(HosRDR1_RbDebugReg2Addr, Addr, 0, 16)
|
|
RegFunc(HostifRingbusDebugRegs1, 0x300100, RbDebugReg3Addr, 0x10, HosRDR1_RbDebugReg3Addr, 0x300110)
|
|
FldFunc(HosRDR1_RbDebugReg3Addr, Addr, 0, 16)
|
|
RegFunc(HostifRingbusDebugRegs1, 0x300100, RbDebugOutputReg, 0x14, HosRDR1_RbDebugOutputReg, 0x300114)
|
|
FldFunc(HosRDR1_RbDebugOutputReg, DspRst, 1, 1)
|
|
FldFunc(HosRDR1_RbDebugOutputReg, FmmRst, 0, 1)
|
|
|
|
RegAreaFunc(DecodeHostBase, 0x340000, 0x3400FF)
|
|
RegFunc(DecodeHost, 0x340000, HostSwReset, 0x0, DecHt_HostSwReset, 0x340000)
|
|
FldFunc(DecHt_HostSwReset, Rst, 0, 1)
|
|
RegFunc(DecodeHost, 0x340000, HostIntmask, 0x4, DecHt_HostIntmask, 0x340004)
|
|
FldFunc(DecHt_HostIntmask, High, 2, 1)
|
|
FldFunc(DecHt_HostIntmask, Low, 1, 1)
|
|
FldFunc(DecHt_HostIntmask, Ext, 0, 1)
|
|
RegFunc(DecodeHost, 0x340000, HostJtagSel, 0x8, DecHt_HostJtagSel, 0x340008)
|
|
FldFunc(DecHt_HostJtagSel, MuxACtl, 3, 3)
|
|
FldFunc(DecHt_HostJtagSel, MuxBCtl, 0, 3)
|
|
RegFunc(DecodeHost, 0x340000, HostPllaCtl, 0xC, DecHt_HostPllaCtl, 0x34000c)
|
|
FldFunc(DecHt_HostPllaCtl, Lock, 17, 1)
|
|
FldFunc(DecHt_HostPllaCtl, Bypen, 16, 1)
|
|
FldFunc(DecHt_HostPllaCtl, Pdn, 15, 1)
|
|
FldFunc(DecHt_HostPllaCtl, Reset, 14, 1)
|
|
FldFunc(DecHt_HostPllaCtl, VcoMg, 12, 2)
|
|
FldFunc(DecHt_HostPllaCtl, M, 6, 6)
|
|
FldFunc(DecHt_HostPllaCtl, N, 0, 6)
|
|
RegFunc(DecodeHost, 0x340000, HostPllbCtl, 0x10, DecHt_HostPllbCtl, 0x340010)
|
|
FldFunc(DecHt_HostPllbCtl, Lock, 17, 1)
|
|
FldFunc(DecHt_HostPllbCtl, Bypen, 16, 1)
|
|
FldFunc(DecHt_HostPllbCtl, Pdn, 15, 1)
|
|
FldFunc(DecHt_HostPllbCtl, Reset, 14, 1)
|
|
FldFunc(DecHt_HostPllbCtl, VcoMg, 12, 2)
|
|
FldFunc(DecHt_HostPllbCtl, M, 6, 6)
|
|
FldFunc(DecHt_HostPllbCtl, N, 0, 6)
|
|
RegFunc(DecodeHost, 0x340000, HostPllcCtl, 0x14, DecHt_HostPllcCtl, 0x340014)
|
|
FldFunc(DecHt_HostPllcCtl, Lock, 17, 1)
|
|
FldFunc(DecHt_HostPllcCtl, Bypen, 16, 1)
|
|
FldFunc(DecHt_HostPllcCtl, Pdn, 15, 1)
|
|
FldFunc(DecHt_HostPllcCtl, Reset, 14, 1)
|
|
FldFunc(DecHt_HostPllcCtl, VcoMg, 12, 2)
|
|
FldFunc(DecHt_HostPllcCtl, M, 6, 6)
|
|
FldFunc(DecHt_HostPllcCtl, N, 0, 6)
|
|
RegFunc(DecodeHost, 0x340000, HostTsOutHalfFull, 0x18, DecHt_HostTsOutHalfFull, 0x340018)
|
|
FldFunc(DecHt_HostTsOutHalfFull, FifoNonEmpty, 1, 1)
|
|
FldFunc(DecHt_HostTsOutHalfFull, HalfFull, 0, 1)
|
|
RegFunc(DecodeHost, 0x340000, HostBondoutCode, 0x1C, DecHt_HostBondoutCode, 0x34001c)
|
|
FldFunc(DecHt_HostBondoutCode, BondoutValue, 0, 4)
|
|
RegFunc(DecodeHost, 0x340000, HostPciDramWindow, 0x20, DecHt_HostPciDramWindow, 0x340020)
|
|
FldFunc(DecHt_HostPciDramWindow, Window, 0, 13)
|
|
RegFunc(DecodeHost, 0x340000, HostH8Inc, 0x24, DecHt_HostH8Inc, 0x340024)
|
|
FldFunc(DecHt_HostH8Inc, Inc, 0, 1)
|
|
RegFunc(DecodeHost, 0x340000, HostSpiInc, 0x28, DecHt_HostSpiInc, 0x340028)
|
|
FldFunc(DecHt_HostSpiInc, Inc, 0, 1)
|
|
RegFunc(DecodeHost, 0x340000, HostStreamA, 0x2C, DecHt_HostStreamA, 0x34002c)
|
|
FldFunc(DecHt_HostStreamA, Data, 0, 32)
|
|
RegFunc(DecodeHost, 0x340000, HostStreamB, 0x30, DecHt_HostStreamB, 0x340030)
|
|
FldFunc(DecHt_HostStreamB, Data, 0, 32)
|
|
RegFunc(DecodeHost, 0x340000, HostPlldCtl, 0x34, DecHt_HostPlldCtl, 0x340034)
|
|
FldFunc(DecHt_HostPlldCtl, Lock, 17, 1)
|
|
FldFunc(DecHt_HostPlldCtl, Bypen, 16, 1)
|
|
FldFunc(DecHt_HostPlldCtl, Pdn, 15, 1)
|
|
FldFunc(DecHt_HostPlldCtl, Reset, 14, 1)
|
|
FldFunc(DecHt_HostPlldCtl, VcoMg, 12, 2)
|
|
FldFunc(DecHt_HostPlldCtl, M, 6, 6)
|
|
FldFunc(DecHt_HostPlldCtl, N, 0, 6)
|
|
RegFunc(DecodeHost, 0x340000, HostPlleCtl, 0x38, DecHt_HostPlleCtl, 0x340038)
|
|
FldFunc(DecHt_HostPlleCtl, Lock, 17, 1)
|
|
FldFunc(DecHt_HostPlleCtl, Bypen, 16, 1)
|
|
FldFunc(DecHt_HostPlleCtl, Pdn, 15, 1)
|
|
FldFunc(DecHt_HostPlleCtl, Reset, 14, 1)
|
|
FldFunc(DecHt_HostPlleCtl, VcoMg, 12, 2)
|
|
FldFunc(DecHt_HostPlleCtl, M, 6, 6)
|
|
FldFunc(DecHt_HostPlleCtl, N, 0, 6)
|
|
RegFunc(DecodeHost, 0x340000, HostSpiDramWindow, 0x3C, DecHt_HostSpiDramWindow, 0x34003c)
|
|
FldFunc(DecHt_HostSpiDramWindow, Window, 0, 13)
|
|
RegFunc(DecodeHost, 0x340000, HostStreamTimeout, 0x40, DecHt_HostStreamTimeout, 0x340040)
|
|
FldFunc(DecHt_HostStreamTimeout, Timeout, 0, 16)
|
|
RegFunc(DecodeHost, 0x340000, HostDramTimeout, 0x44, DecHt_HostDramTimeout, 0x340044)
|
|
FldFunc(DecHt_HostDramTimeout, Timeout, 0, 16)
|
|
RegFunc(DecodeHost, 0x340000, HostTimeoutStatus, 0x48, DecHt_HostTimeoutStatus, 0x340048)
|
|
FldFunc(DecHt_HostTimeoutStatus, CodeOut, 8, 1)
|
|
FldFunc(DecHt_HostTimeoutStatus, CodeIn, 7, 1)
|
|
FldFunc(DecHt_HostTimeoutStatus, DramRd, 6, 1)
|
|
FldFunc(DecHt_HostTimeoutStatus, DramWr, 5, 1)
|
|
FldFunc(DecHt_HostTimeoutStatus, RingBus, 4, 1)
|
|
FldFunc(DecHt_HostTimeoutStatus, TsAfullB, 3, 1)
|
|
FldFunc(DecHt_HostTimeoutStatus, TsAfullA, 2, 1)
|
|
FldFunc(DecHt_HostTimeoutStatus, TsHfullB, 1, 1)
|
|
FldFunc(DecHt_HostTimeoutStatus, TsHfullA, 0, 1)
|
|
RegFunc(DecodeHost, 0x340000, HostSelRefClk, 0x4C, DecHt_HostSelRefClk, 0x34004c)
|
|
FldFunc(DecHt_HostSelRefClk, Sel, 0, 1)
|
|
|
|
RegAreaFunc(PciDmaRegBase, 0x340100, 0x3401FF)
|
|
RegFunc(PciDmaReg, 0x340100, PciDmaSrcAddr0, 0x0, PciDRg_PciDmaSrcAddr0, 0x340100)
|
|
FldFunc(PciDRg_PciDmaSrcAddr0, Addr, 0, 32)
|
|
RegFunc(PciDmaReg, 0x340100, PciDmaDstAddr0, 0x4, PciDRg_PciDmaDstAddr0, 0x340104)
|
|
FldFunc(PciDRg_PciDmaDstAddr0, Addr, 0, 32)
|
|
RegFunc(PciDmaReg, 0x340100, PciDmaCnt0, 0x8, PciDRg_PciDmaCnt0, 0x340108)
|
|
FldFunc(PciDRg_PciDmaCnt0, Active, 31, 1)
|
|
FldFunc(PciDRg_PciDmaCnt0, Error, 30, 1)
|
|
FldFunc(PciDRg_PciDmaCnt0, Int, 29, 1)
|
|
FldFunc(PciDRg_PciDmaCnt0, Sdram, 22, 1)
|
|
FldFunc(PciDRg_PciDmaCnt0, IncDst, 21, 1)
|
|
FldFunc(PciDRg_PciDmaCnt0, IncSrc, 20, 1)
|
|
FldFunc(PciDRg_PciDmaCnt0, XferCnt, 0, 20)
|
|
RegFunc(PciDmaReg, 0x340100, PciDmaSrcAddr1, 0x10, PciDRg_PciDmaSrcAddr1, 0x340110)
|
|
FldFunc(PciDRg_PciDmaSrcAddr1, Addr, 0, 32)
|
|
RegFunc(PciDmaReg, 0x340100, PciDmaDstAddr1, 0x14, PciDRg_PciDmaDstAddr1, 0x340114)
|
|
FldFunc(PciDRg_PciDmaDstAddr1, Addr, 0, 32)
|
|
RegFunc(PciDmaReg, 0x340100, PciDmaCnt1, 0x18, PciDRg_PciDmaCnt1, 0x340118)
|
|
FldFunc(PciDRg_PciDmaCnt1, Active, 31, 1)
|
|
FldFunc(PciDRg_PciDmaCnt1, Error, 30, 1)
|
|
FldFunc(PciDRg_PciDmaCnt1, Int, 29, 1)
|
|
FldFunc(PciDRg_PciDmaCnt1, Sdram, 22, 1)
|
|
FldFunc(PciDRg_PciDmaCnt1, IncDst, 21, 1)
|
|
FldFunc(PciDRg_PciDmaCnt1, IncSrc, 20, 1)
|
|
FldFunc(PciDRg_PciDmaCnt1, XferCnt, 0, 20)
|
|
RegFunc(PciDmaReg, 0x340100, PciDmaSrcAddr2, 0x20, PciDRg_PciDmaSrcAddr2, 0x340120)
|
|
FldFunc(PciDRg_PciDmaSrcAddr2, Addr, 0, 32)
|
|
RegFunc(PciDmaReg, 0x340100, PciDmaDstAddr2, 0x24, PciDRg_PciDmaDstAddr2, 0x340124)
|
|
FldFunc(PciDRg_PciDmaDstAddr2, Addr, 0, 32)
|
|
RegFunc(PciDmaReg, 0x340100, PciDmaCnt2, 0x28, PciDRg_PciDmaCnt2, 0x340128)
|
|
FldFunc(PciDRg_PciDmaCnt2, Active, 31, 1)
|
|
FldFunc(PciDRg_PciDmaCnt2, Error, 30, 1)
|
|
FldFunc(PciDRg_PciDmaCnt2, Int, 29, 1)
|
|
FldFunc(PciDRg_PciDmaCnt2, Sdram, 22, 1)
|
|
FldFunc(PciDRg_PciDmaCnt2, IncDst, 21, 1)
|
|
FldFunc(PciDRg_PciDmaCnt2, IncSrc, 20, 1)
|
|
FldFunc(PciDRg_PciDmaCnt2, XferCnt, 0, 20)
|
|
RegFunc(PciDmaReg, 0x340100, PciDmaSrcAddr3, 0x30, PciDRg_PciDmaSrcAddr3, 0x340130)
|
|
FldFunc(PciDRg_PciDmaSrcAddr3, Addr, 0, 32)
|
|
RegFunc(PciDmaReg, 0x340100, PciDmaDstAddr3, 0x34, PciDRg_PciDmaDstAddr3, 0x340134)
|
|
FldFunc(PciDRg_PciDmaDstAddr3, Addr, 0, 32)
|
|
RegFunc(PciDmaReg, 0x340100, PciDmaCnt3, 0x38, PciDRg_PciDmaCnt3, 0x340138)
|
|
FldFunc(PciDRg_PciDmaCnt3, Active, 31, 1)
|
|
FldFunc(PciDRg_PciDmaCnt3, Error, 30, 1)
|
|
FldFunc(PciDRg_PciDmaCnt3, Int, 29, 1)
|
|
FldFunc(PciDRg_PciDmaCnt3, Sdram, 22, 1)
|
|
FldFunc(PciDRg_PciDmaCnt3, IncDst, 21, 1)
|
|
FldFunc(PciDRg_PciDmaCnt3, IncSrc, 20, 1)
|
|
FldFunc(PciDRg_PciDmaCnt3, XferCnt, 0, 20)
|
|
|
|
RegAreaFunc(HostStreamaWindowBase, 0x340200, 0x34023F)
|
|
RegFunc(HostStreamaWindow, 0x340200, HostStreamaWindow, 0x0, HosSWw_HostStreamaWindow, 0x340200)
|
|
FldFunc(HosSWw_HostStreamaWindow, Data, 0, 32)
|
|
|
|
RegAreaFunc(HostStreambWindowBase, 0x340300, 0x34033F)
|
|
RegFunc(HostStreambWindow, 0x340300, HostStreambWindow, 0x0, HosSWw_HostStreambWindow, 0x340300)
|
|
FldFunc(HosSWw_HostStreambWindow, Data, 0, 32)
|
|
|
|
#endif
|
|
|
|
|
|
//******************************************************************************
|
|
//
|
|
// Encoder Pre Ring Bus Node
|
|
//
|
|
//******************************************************************************
|
|
#ifndef EXCLUDE_ENCODER_PRE
|
|
|
|
RegAreaFunc(EncPreRbnodeRegsBase, 0x400000, 0x40007F)
|
|
RegFunc(EncPreRbnodeRegs, 0x400000, RbConfig , 0x0, EncPRRs_RbConfig , 0x400000)
|
|
FldFunc(EncPRRs_RbConfig , RdPostEna, 1, 1)
|
|
FldFunc(EncPRRs_RbConfig , RdBypEna, 0, 1)
|
|
RegFunc(EncPreRbnodeRegs, 0x400000, RbStickyError, 0x4, EncPRRs_RbStickyError, 0x400004)
|
|
FldFunc(EncPRRs_RbStickyError, Node, 1, 1)
|
|
FldFunc(EncPRRs_RbStickyError, Tgt, 0, 1)
|
|
RegFunc(EncPreRbnodeRegs, 0x400000, RbCurrentError, 0x8, EncPRRs_RbCurrentError, 0x400008)
|
|
FldFunc(EncPRRs_RbCurrentError, Node, 1, 1)
|
|
FldFunc(EncPRRs_RbCurrentError, Tgt, 0, 1)
|
|
RegFunc(EncPreRbnodeRegs, 0x400000, RbReadData, 0xC, EncPRRs_RbReadData, 0x40000c)
|
|
FldFunc(EncPRRs_RbReadData, Data, 0, 32)
|
|
|
|
RegAreaFunc(EncPreRingbusDebugRegsBase, 0x400080, 0x4000FF)
|
|
RegFunc(EncPreRingbusDebugRegs, 0x400080, RbDebugConfig, 0x0, EncPRDRs_RbDebugConfig, 0x400080)
|
|
FldFunc(EncPRDRs_RbDebugConfig, Addr3WrStat, 15, 1)
|
|
FldFunc(EncPRDRs_RbDebugConfig, Addr2WrStat, 14, 1)
|
|
FldFunc(EncPRDRs_RbDebugConfig, Addr1WrStat, 13, 1)
|
|
FldFunc(EncPRDRs_RbDebugConfig, Addr0WrStat, 12, 1)
|
|
FldFunc(EncPRDRs_RbDebugConfig, Addr3RdStat, 11, 1)
|
|
FldFunc(EncPRDRs_RbDebugConfig, Addr2RdStat, 10, 1)
|
|
FldFunc(EncPRDRs_RbDebugConfig, Addr1RdStat, 9, 1)
|
|
FldFunc(EncPRDRs_RbDebugConfig, Addr0RdStat, 8, 1)
|
|
FldFunc(EncPRDRs_RbDebugConfig, Addr3WrEna, 7, 1)
|
|
FldFunc(EncPRDRs_RbDebugConfig, Addr2WrEna, 6, 1)
|
|
FldFunc(EncPRDRs_RbDebugConfig, Addr1WrEna, 5, 1)
|
|
FldFunc(EncPRDRs_RbDebugConfig, Addr0WrEna, 4, 1)
|
|
FldFunc(EncPRDRs_RbDebugConfig, Addr3RdEna, 3, 1)
|
|
FldFunc(EncPRDRs_RbDebugConfig, Addr2RdEna, 2, 1)
|
|
FldFunc(EncPRDRs_RbDebugConfig, Addr1RdEna, 1, 1)
|
|
FldFunc(EncPRDRs_RbDebugConfig, Addr0RdEna, 0, 1)
|
|
RegFunc(EncPreRingbusDebugRegs, 0x400080, RbDebugReg0Addr, 0x4, EncPRDRs_RbDebugReg0Addr, 0x400084)
|
|
FldFunc(EncPRDRs_RbDebugReg0Addr, Addr, 0, 16)
|
|
RegFunc(EncPreRingbusDebugRegs, 0x400080, RbDebugReg1Addr, 0x8, EncPRDRs_RbDebugReg1Addr, 0x400088)
|
|
FldFunc(EncPRDRs_RbDebugReg1Addr, Addr, 0, 16)
|
|
RegFunc(EncPreRingbusDebugRegs, 0x400080, RbDebugReg2Addr, 0xC, EncPRDRs_RbDebugReg2Addr, 0x40008c)
|
|
FldFunc(EncPRDRs_RbDebugReg2Addr, Addr, 0, 16)
|
|
RegFunc(EncPreRingbusDebugRegs, 0x400080, RbDebugReg3Addr, 0x10, EncPRDRs_RbDebugReg3Addr, 0x400090)
|
|
FldFunc(EncPRDRs_RbDebugReg3Addr, Addr, 0, 16)
|
|
RegFunc(EncPreRingbusDebugRegs, 0x400080, RbDebugOutputReg, 0x14, EncPRDRs_RbDebugOutputReg, 0x400094)
|
|
FldFunc(EncPRDRs_RbDebugOutputReg, DspRst, 1, 1)
|
|
FldFunc(EncPRDRs_RbDebugOutputReg, FmmRst, 0, 1)
|
|
|
|
RegAreaFunc(EncViBase, 0x400100, 0x40013F)
|
|
RegFunc(EncVi, 0x400100, EncViHostYuvFrameSize, 0x0, EncVi_EncViHostYuvFrameSize, 0x400100)
|
|
FldFunc(EncVi_EncViHostYuvFrameSize, Size, 0, 32)
|
|
RegFunc(EncVi, 0x400100, EncViHostYuvBase, 0x4, EncVi_EncViHostYuvBase, 0x400104)
|
|
FldFunc(EncVi_EncViHostYuvBase, BaseAddr, 0, 32)
|
|
RegFunc(EncVi, 0x400100, EncViHostCtl, 0x8, EncVi_EncViHostCtl, 0x400108)
|
|
FldFunc(EncVi_EncViHostCtl, FrDrpCnt, 16, 16)
|
|
FldFunc(EncVi_EncViHostCtl, IntMode, 3, 1)
|
|
FldFunc(EncVi_EncViHostCtl, FrmDne, 2, 1)
|
|
FldFunc(EncVi_EncViHostCtl, HostMode, 1, 1)
|
|
FldFunc(EncVi_EncViHostCtl, SftRst, 0, 1)
|
|
RegFunc(EncVi, 0x400100, EncViHostYuvBase1, 0xC, EncVi_EncViHostYuvBase1, 0x40010c)
|
|
FldFunc(EncVi_EncViHostYuvBase1, BaseAddr, 0, 32)
|
|
|
|
RegAreaFunc(EncCmeBase, 0x400300, 0x4003FF)
|
|
#if 1
|
|
RegFunc(EncCme, 0x400300, EncCmeCurY, 0x0, EncCe_EncCmeCurY, 0x400300)
|
|
RegFunc(EncCme, 0x400300, EncCmeCurC, 0x4, EncCe_EncCmeCurC, 0x400304)
|
|
RegFunc(EncCme, 0x400300, EncCmeRefY, 0x8, EncCe_EncCmeRefY, 0x400308)
|
|
RegFunc(EncCme, 0x400300, EncCmeRefC, 0xC, EncCe_EncCmeRefC, 0x40030C)
|
|
RegFunc(EncCme, 0x400300, EncCmeLoadCtrl, 0x10, EncCe_EncCmeLoadCtrl, 0x400310)
|
|
FldFunc(EncCe_EncCmeLoadCtrl, VCB, 30, 2)
|
|
FldFunc(EncCe_EncCmeLoadCtrl, HCB, 28, 2)
|
|
FldFunc(EncCe_EncCmeLoadCtrl, RefHPos, 26, 2)
|
|
FldFunc(EncCe_EncCmeLoadCtrl, RefVPos, 22, 4)
|
|
FldFunc(EncCe_EncCmeLoadCtrl, RefHeight, 18, 4)
|
|
FldFunc(EncCe_EncCmeLoadCtrl, CurHPos, 16, 2)
|
|
FldFunc(EncCe_EncCmeLoadCtrl, CurVPos, 12, 4)
|
|
FldFunc(EncCe_EncCmeLoadCtrl, CurHeight, 8, 4)
|
|
FldFunc(EncCe_EncCmeLoadCtrl, DoRefC, 7, 1)
|
|
FldFunc(EncCe_EncCmeLoadCtrl, DoRefY, 6, 1)
|
|
FldFunc(EncCe_EncCmeLoadCtrl, DoCurC, 5, 1)
|
|
FldFunc(EncCe_EncCmeLoadCtrl, DoCurY, 4, 1)
|
|
FldFunc(EncCe_EncCmeLoadCtrl, Pitch, 3, 1)
|
|
FldFunc(EncCe_EncCmeLoadCtrl, EI, 2, 1)
|
|
FldFunc(EncCe_EncCmeLoadCtrl, Busy, 1, 1)
|
|
FldFunc(EncCe_EncCmeLoadCtrl, Go, 0, 1)
|
|
RegFunc(EncCme, 0x400300, EncCmeSearchCtrl, 0x14, EncCe_EncCmeSearchCtrl, 0x400314)
|
|
FldFunc(EncCe_EncCmeSearchCtrl, VCB, 30, 2)
|
|
FldFunc(EncCe_EncCmeSearchCtrl, HCB, 28, 2)
|
|
FldFunc(EncCe_EncCmeSearchCtrl, AltCMB, 26, 2)
|
|
FldFunc(EncCe_EncCmeSearchCtrl, Enable, 25, 1)
|
|
FldFunc(EncCe_EncCmeSearchCtrl, IgnoreC, 24, 1)
|
|
FldFunc(EncCe_EncCmeSearchCtrl, Lambda, 16, 8)
|
|
FldFunc(EncCe_EncCmeSearchCtrl, VRadius, 14, 2)
|
|
FldFunc(EncCe_EncCmeSearchCtrl, HRadius, 12, 2)
|
|
FldFunc(EncCe_EncCmeSearchCtrl, VLimit, 9, 3)
|
|
FldFunc(EncCe_EncCmeSearchCtrl, HLimit, 6, 3)
|
|
FldFunc(EncCe_EncCmeSearchCtrl, Top, 5, 1)
|
|
FldFunc(EncCe_EncCmeSearchCtrl, Left, 4, 1)
|
|
FldFunc(EncCe_EncCmeSearchCtrl, WaitLoad, 3, 1)
|
|
FldFunc(EncCe_EncCmeSearchCtrl, EI, 2, 1)
|
|
FldFunc(EncCe_EncCmeSearchCtrl, Busy, 1, 1)
|
|
FldFunc(EncCe_EncCmeSearchCtrl, Go, 0, 1)
|
|
RegFunc(EncCme, 0x400300, EncCmeVersion, 0x3c, EncCe_EncCmeVersion, 0x40033c)
|
|
RegFunc(EncCme, 0x400300, EncCmeResults0, 0x40, EncCe_EncCmeResults0, 0x400340)
|
|
FldFunc(EncCe_EncCmeResults0, Invalid, 31, 1)
|
|
FldFunc(EncCe_EncCmeResults0, SAD, 16, 15)
|
|
FldFunc(EncCe_EncCmeResults0, Voff, 8, 8)
|
|
FldFunc(EncCe_EncCmeResults0, Hoff, 0, 8)
|
|
RegFunc(EncCme, 0x400300, EncCmeResults1, 0x44, EncCe_EncCmeResults1, 0x400344)
|
|
RegFunc(EncCme, 0x400300, EncCmeResults2, 0x48, EncCe_EncCmeResults2, 0x400348)
|
|
RegFunc(EncCme, 0x400300, EncCmeResults3, 0x4C, EncCe_EncCmeResults3, 0x40034C)
|
|
RegFunc(EncCme, 0x400300, EncCmeResults4, 0x50, EncCe_EncCmeResults4, 0x400350)
|
|
RegFunc(EncCme, 0x400300, EncCmeResults5, 0x54, EncCe_EncCmeResults5, 0x400354)
|
|
RegFunc(EncCme, 0x400300, EncCmeResults6, 0x58, EncCe_EncCmeResults6, 0x400358)
|
|
RegFunc(EncCme, 0x400300, EncCmeResults7, 0x5C, EncCe_EncCmeResults7, 0x40035C)
|
|
RegFunc(EncCme, 0x400300, EncCmeResults8, 0x60, EncCe_EncCmeResults8, 0x400360)
|
|
RegFunc(EncCme, 0x400300, EncCmeResults9, 0x64, EncCe_EncCmeResults9, 0x400364)
|
|
RegFunc(EncCme, 0x400300, EncCmeResults10, 0x68, EncCe_EncCmeResults10, 0x400368)
|
|
RegFunc(EncCme, 0x400300, EncCmeResults11, 0x6C, EncCe_EncCmeResults11, 0x40036C)
|
|
RegFunc(EncCme, 0x400300, EncCmeResults12, 0x70, EncCe_EncCmeResults12, 0x400370)
|
|
RegFunc(EncCme, 0x400300, EncCmeResults13, 0x74, EncCe_EncCmeResults13, 0x400374)
|
|
RegFunc(EncCme, 0x400300, EncCmeResults14, 0x78, EncCe_EncCmeResults14, 0x400378)
|
|
RegFunc(EncCme, 0x400300, EncCmeResults15, 0x7C, EncCe_EncCmeResults15, 0x40037C)
|
|
RegFunc(EncCme, 0x400300, EncCmeYXResults0, 0xC0, EncCe_EncCmeYXResults0, 0x4003C0)
|
|
RegFunc(EncCme, 0x400300, EncCmeYXResults1, 0xC4, EncCe_EncCmeYXResults1, 0x4003C4)
|
|
RegFunc(EncCme, 0x400300, EncCmeYXResults2, 0xC8, EncCe_EncCmeYXResults2, 0x4003C8)
|
|
RegFunc(EncCme, 0x400300, EncCmeYXResults3, 0xCC, EncCe_EncCmeYXResults3, 0x4003CC)
|
|
RegFunc(EncCme, 0x400300, EncCmeYXResults4, 0xD0, EncCe_EncCmeYXResults4, 0x4003D0)
|
|
RegFunc(EncCme, 0x400300, EncCmeYXResults5, 0xD4, EncCe_EncCmeYXResults5, 0x4003D4)
|
|
RegFunc(EncCme, 0x400300, EncCmeYXResults6, 0xD8, EncCe_EncCmeYXResults6, 0x4003D8)
|
|
RegFunc(EncCme, 0x400300, EncCmeYXResults7, 0xDC, EncCe_EncCmeYXResults7, 0x4003DC)
|
|
RegFunc(EncCme, 0x400300, EncCmeYXResults8, 0xE0, EncCe_EncCmeYXResults8, 0x4003E0)
|
|
RegFunc(EncCme, 0x400300, EncCmeYXResults9, 0xE4, EncCe_EncCmeYXResults9, 0x4003E4)
|
|
RegFunc(EncCme, 0x400300, EncCmeYXResults10, 0xE8, EncCe_EncCmeYXResults10, 0x4003E8)
|
|
RegFunc(EncCme, 0x400300, EncCmeYXResults11, 0xEC, EncCe_EncCmeYXResults11, 0x4003EC)
|
|
RegFunc(EncCme, 0x400300, EncCmeYXResults12, 0xF0, EncCe_EncCmeYXResults12, 0x4003F0)
|
|
RegFunc(EncCme, 0x400300, EncCmeYXResults13, 0xF4, EncCe_EncCmeYXResults13, 0x4003F4)
|
|
RegFunc(EncCme, 0x400300, EncCmeYXResults14, 0xF8, EncCe_EncCmeYXResults14, 0x4003F8)
|
|
RegFunc(EncCme, 0x400300, EncCmeYXResults15, 0xFC, EncCe_EncCmeYXResults15, 0x4003FC)
|
|
#endif
|
|
#if 0 // Old SV CME no longer in use
|
|
RegFunc(EncCme, 0x400300, EncCmeCtl, 0x0, EncCe_EncCmeCtl, 0x400300)
|
|
FldFunc(EncCe_EncCmeCtl, DmaIntEn, 23, 1)
|
|
FldFunc(EncCe_EncCmeCtl, SadIntEn, 22, 1)
|
|
FldFunc(EncCe_EncCmeCtl, Lambda, 10, 12)
|
|
FldFunc(EncCe_EncCmeCtl, FieldNum, 9, 1)
|
|
FldFunc(EncCe_EncCmeCtl, FieldMode, 8, 1)
|
|
FldFunc(EncCe_EncCmeCtl, Zigzagstate, 4, 4)
|
|
FldFunc(EncCe_EncCmeCtl, Offscreendis, 3, 1)
|
|
FldFunc(EncCe_EncCmeCtl, Vertdp, 2, 1)
|
|
FldFunc(EncCe_EncCmeCtl, Loadref, 1, 1)
|
|
FldFunc(EncCe_EncCmeCtl, Enable, 0, 1)
|
|
RegFunc(EncCme, 0x400300, EncCmeCur, 0x4, EncCe_EncCmeCur, 0x400304)
|
|
FldFunc(EncCe_EncCmeCur, Curnum, 24, 8)
|
|
FldFunc(EncCe_EncCmeCur, Cury, 12, 12)
|
|
FldFunc(EncCe_EncCmeCur, Curx, 0, 12)
|
|
RegFunc(EncCme, 0x400300, EncCmeRef0, 0x8, EncCe_EncCmeRef0, 0x400308)
|
|
FldFunc(EncCe_EncCmeRef0, Refnum, 24, 8)
|
|
FldFunc(EncCe_EncCmeRef0, Refy, 12, 12)
|
|
FldFunc(EncCe_EncCmeRef0, Refx, 0, 12)
|
|
RegFunc(EncCme, 0x400300, EncCmeRef1, 0xC, EncCe_EncCmeRef1, 0x40030c)
|
|
FldFunc(EncCe_EncCmeRef1, FieldNum, 25, 1)
|
|
FldFunc(EncCe_EncCmeRef1, FieldMode, 24, 1)
|
|
FldFunc(EncCe_EncCmeRef1, Ysize, 12, 12)
|
|
FldFunc(EncCe_EncCmeRef1, Xsize, 0, 12)
|
|
RegFunc(EncCme, 0x400300, EncCmeSramwraddr, 0x10, EncCe_EncCmeSramwraddr, 0x400310)
|
|
FldFunc(EncCe_EncCmeSramwraddr, Uvwrptr, 16, 16)
|
|
FldFunc(EncCe_EncCmeSramwraddr, Ywrptr, 0, 16)
|
|
RegFunc(EncCme, 0x400300, EncCmeSramrdaddr, 0x14, EncCe_EncCmeSramrdaddr, 0x400314)
|
|
FldFunc(EncCe_EncCmeSramrdaddr, Uvrdptr, 16, 16)
|
|
FldFunc(EncCe_EncCmeSramrdaddr, Yrdptr, 0, 16)
|
|
RegFunc(EncCme, 0x400300, EncCmePitch, 0x18, EncCe_EncCmePitch, 0x400318)
|
|
FldFunc(EncCe_EncCmePitch, Pitch, 0, 11)
|
|
RegFunc(EncCme, 0x400300, EncCmeDeltax, 0x1C, EncCe_EncCmeDeltax, 0x40031c)
|
|
FldFunc(EncCe_EncCmeDeltax, Posx, 16, 16)
|
|
FldFunc(EncCe_EncCmeDeltax, Negx, 0, 16)
|
|
RegFunc(EncCme, 0x400300, EncCmeDeltay, 0x20, EncCe_EncCmeDeltay, 0x400320)
|
|
FldFunc(EncCe_EncCmeDeltay, Posy, 16, 16)
|
|
FldFunc(EncCe_EncCmeDeltay, Negy, 0, 16)
|
|
RegFunc(EncCme, 0x400300, EncCmeCount, 0x24, EncCe_EncCmeCount, 0x400324)
|
|
FldFunc(EncCe_EncCmeCount, Mbcount, 0, 16)
|
|
RegFunc(EncCme, 0x400300, EncCmeStatus, 0x28, EncCe_EncCmeStatus, 0x400328)
|
|
FldFunc(EncCe_EncCmeStatus, DmaDone, 1, 1)
|
|
FldFunc(EncCe_EncCmeStatus, Done, 0, 1)
|
|
RegFunc(EncCme, 0x400300, EncCmeImgsize, 0x2C, EncCe_EncCmeImgsize, 0x40032c)
|
|
FldFunc(EncCe_EncCmeImgsize, Ysize, 12, 12)
|
|
FldFunc(EncCe_EncCmeImgsize, Xsize, 0, 12)
|
|
RegFunc(EncCme, 0x400300, EncCmeVecfrSad, 0x30, EncCe_EncCmeVecfrSad, 0x400330)
|
|
FldFunc(EncCe_EncCmeVecfrSad, Sad, 0, 16)
|
|
RegFunc(EncCme, 0x400300, EncCmeVecfrLoc, 0x34, EncCe_EncCmeVecfrLoc, 0x400334)
|
|
FldFunc(EncCe_EncCmeVecfrLoc, X, 12, 12)
|
|
FldFunc(EncCe_EncCmeVecfrLoc, Y, 0, 12)
|
|
RegFunc(EncCme, 0x400300, EncCmeVecttSad, 0x38, EncCe_EncCmeVecttSad, 0x400338)
|
|
FldFunc(EncCe_EncCmeVecttSad, Sad, 0, 16)
|
|
RegFunc(EncCme, 0x400300, EncCmeVecttLoc, 0x3C, EncCe_EncCmeVecttLoc, 0x40033c)
|
|
FldFunc(EncCe_EncCmeVecttLoc, X, 12, 12)
|
|
FldFunc(EncCe_EncCmeVecttLoc, Y, 0, 12)
|
|
RegFunc(EncCme, 0x400300, EncCmeVecbbSad, 0x40, EncCe_EncCmeVecbbSad, 0x400340)
|
|
FldFunc(EncCe_EncCmeVecbbSad, Sad, 0, 16)
|
|
RegFunc(EncCme, 0x400300, EncCmeVecbbLoc, 0x44, EncCe_EncCmeVecbbLoc, 0x400344)
|
|
FldFunc(EncCe_EncCmeVecbbLoc, X, 12, 12)
|
|
FldFunc(EncCe_EncCmeVecbbLoc, Y, 0, 12)
|
|
RegFunc(EncCme, 0x400300, EncCmeVectbSad, 0x48, EncCe_EncCmeVectbSad, 0x400348)
|
|
FldFunc(EncCe_EncCmeVectbSad, Sad, 0, 16)
|
|
RegFunc(EncCme, 0x400300, EncCmeVectbLoc, 0x4C, EncCe_EncCmeVectbLoc, 0x40034c)
|
|
FldFunc(EncCe_EncCmeVectbLoc, X, 12, 12)
|
|
FldFunc(EncCe_EncCmeVectbLoc, Y, 0, 12)
|
|
RegFunc(EncCme, 0x400300, EncCmeVecbtSad, 0x50, EncCe_EncCmeVecbtSad, 0x400350)
|
|
FldFunc(EncCe_EncCmeVecbtSad, Sad, 0, 16)
|
|
RegFunc(EncCme, 0x400300, EncCmeVecbtLoc, 0x54, EncCe_EncCmeVecbtLoc, 0x400354)
|
|
FldFunc(EncCe_EncCmeVecbtLoc, X, 12, 12)
|
|
FldFunc(EncCe_EncCmeVecbtLoc, Y, 0, 12)
|
|
RegFunc(EncCme, 0x400300, EncCmePrvecfr, 0x58, EncCe_EncCmePrvecfr, 0x400358)
|
|
FldFunc(EncCe_EncCmePrvecfr, X, 12, 12)
|
|
FldFunc(EncCe_EncCmePrvecfr, Y, 0, 12)
|
|
RegFunc(EncCme, 0x400300, EncCmePrvectt, 0x5C, EncCe_EncCmePrvectt, 0x40035c)
|
|
FldFunc(EncCe_EncCmePrvectt, X, 12, 12)
|
|
FldFunc(EncCe_EncCmePrvectt, Y, 0, 12)
|
|
RegFunc(EncCme, 0x400300, EncCmePrvecbb, 0x60, EncCe_EncCmePrvecbb, 0x400360)
|
|
FldFunc(EncCe_EncCmePrvecbb, X, 12, 12)
|
|
FldFunc(EncCe_EncCmePrvecbb, Y, 0, 12)
|
|
RegFunc(EncCme, 0x400300, EncCmePrvectb, 0x64, EncCe_EncCmePrvectb, 0x400364)
|
|
FldFunc(EncCe_EncCmePrvectb, X, 12, 12)
|
|
FldFunc(EncCe_EncCmePrvectb, Y, 0, 12)
|
|
RegFunc(EncCme, 0x400300, EncCmePrvecbt, 0x68, EncCe_EncCmePrvecbt, 0x400368)
|
|
FldFunc(EncCe_EncCmePrvecbt, X, 12, 12)
|
|
FldFunc(EncCe_EncCmePrvecbt, Y, 0, 12)
|
|
#endif
|
|
|
|
RegAreaFunc(EncPreCpuregsBase, 0x400F00, 0x400F7F)
|
|
RegFunc(EncPreCpuregs, 0x400F00, RegHst2cpuMbx, 0x0, EncPCs_RegHst2cpuMbx, 0x400f00)
|
|
FldFunc(EncPCs_RegHst2cpuMbx, Value, 0, 32)
|
|
RegFunc(EncPreCpuregs, 0x400F00, RegCpu2hstMbx, 0x4, EncPCs_RegCpu2hstMbx, 0x400f04)
|
|
FldFunc(EncPCs_RegCpu2hstMbx, Value, 0, 32)
|
|
RegFunc(EncPreCpuregs, 0x400F00, RegMbxStat, 0x8, EncPCs_RegMbxStat, 0x400f08)
|
|
RegFunc(EncPreCpuregs, 0x400F00, RegCpuIntBase, 0xC, EncPCs_RegCpuIntBase, 0x400f0c)
|
|
FldFunc(EncPCs_RegCpuIntBase, Addr, 8, 24)
|
|
RegFunc(EncPreCpuregs, 0x400F00, RegCpuIntEna, 0x10, EncPCs_RegCpuIntEna, 0x400f10)
|
|
FldFunc(EncPCs_RegCpuIntEna, Mbx, 31, 1)
|
|
FldFunc(EncPCs_RegCpuIntEna, Com7, 23, 1)
|
|
FldFunc(EncPCs_RegCpuIntEna, Com6, 22, 1)
|
|
FldFunc(EncPCs_RegCpuIntEna, Com5, 21, 1)
|
|
FldFunc(EncPCs_RegCpuIntEna, Com4, 20, 1)
|
|
FldFunc(EncPCs_RegCpuIntEna, Com3, 19, 1)
|
|
FldFunc(EncPCs_RegCpuIntEna, Com2, 18, 1)
|
|
FldFunc(EncPCs_RegCpuIntEna, Com1, 17, 1)
|
|
FldFunc(EncPCs_RegCpuIntEna, Com0, 16, 1)
|
|
FldFunc(EncPCs_RegCpuIntEna, Hw7, 15, 1)
|
|
FldFunc(EncPCs_RegCpuIntEna, Hw6, 14, 1)
|
|
FldFunc(EncPCs_RegCpuIntEna, Hw5, 13, 1)
|
|
FldFunc(EncPCs_RegCpuIntEna, Hw4, 12, 1)
|
|
FldFunc(EncPCs_RegCpuIntEna, Hw3, 11, 1)
|
|
FldFunc(EncPCs_RegCpuIntEna, Hw2, 10, 1)
|
|
FldFunc(EncPCs_RegCpuIntEna, Hw1, 9, 1)
|
|
FldFunc(EncPCs_RegCpuIntEna, Hw0, 8, 1)
|
|
FldFunc(EncPCs_RegCpuIntEna, Db7, 7, 1)
|
|
FldFunc(EncPCs_RegCpuIntEna, Db6, 6, 1)
|
|
FldFunc(EncPCs_RegCpuIntEna, Db5, 5, 1)
|
|
FldFunc(EncPCs_RegCpuIntEna, Db4, 4, 1)
|
|
FldFunc(EncPCs_RegCpuIntEna, Db3, 3, 1)
|
|
FldFunc(EncPCs_RegCpuIntEna, Db2, 2, 1)
|
|
FldFunc(EncPCs_RegCpuIntEna, Db1, 1, 1)
|
|
FldFunc(EncPCs_RegCpuIntEna, Db0, 0, 1)
|
|
RegFunc(EncPreCpuregs, 0x400F00, StreamCpuIntEna, 0x10, EncPCs_StreamCpuIntEna, 0x400f10)
|
|
FldFunc(EncPCs_StreamCpuIntEna, Mbx, 31, 1)
|
|
FldFunc(EncPCs_StreamCpuIntEna, Dec, 18, 1)
|
|
FldFunc(EncPCs_StreamCpuIntEna, Aud, 17, 1)
|
|
FldFunc(EncPCs_StreamCpuIntEna, M2m, 15, 1)
|
|
FldFunc(EncPCs_StreamCpuIntEna, Pci, 14, 1)
|
|
FldFunc(EncPCs_StreamCpuIntEna, Ts1, 13, 1)
|
|
FldFunc(EncPCs_StreamCpuIntEna, Ts0, 12, 1)
|
|
FldFunc(EncPCs_StreamCpuIntEna, GpioHi, 11, 1)
|
|
FldFunc(EncPCs_StreamCpuIntEna, GpioLo, 10, 1)
|
|
FldFunc(EncPCs_StreamCpuIntEna, Vpp1, 9, 1)
|
|
FldFunc(EncPCs_StreamCpuIntEna, Vpp0, 8, 1)
|
|
FldFunc(EncPCs_StreamCpuIntEna, Rb, 1, 1)
|
|
FldFunc(EncPCs_StreamCpuIntEna, Sd, 0, 1)
|
|
RegFunc(EncPreCpuregs, 0x400F00, Dec0CpuIntEna, 0x10, EncPCs_Dec0CpuIntEna, 0x400f10)
|
|
FldFunc(EncPCs_Dec0CpuIntEna, Mbx, 31, 1)
|
|
FldFunc(EncPCs_Dec0CpuIntEna, Dec, 16, 1)
|
|
FldFunc(EncPCs_Dec0CpuIntEna, Si, 8, 1)
|
|
FldFunc(EncPCs_Dec0CpuIntEna, Rb, 1, 1)
|
|
FldFunc(EncPCs_Dec0CpuIntEna, Sd, 0, 1)
|
|
RegFunc(EncPreCpuregs, 0x400F00, Dec1CpuIntEna, 0x10, EncPCs_Dec1CpuIntEna, 0x400f10)
|
|
FldFunc(EncPCs_Dec1CpuIntEna, Mbx, 31, 1)
|
|
FldFunc(EncPCs_Dec1CpuIntEna, Cab, 9, 1)
|
|
FldFunc(EncPCs_Dec1CpuIntEna, Si, 8, 1)
|
|
FldFunc(EncPCs_Dec1CpuIntEna, Rb, 1, 1)
|
|
FldFunc(EncPCs_Dec1CpuIntEna, Sd, 0, 1)
|
|
RegFunc(EncPreCpuregs, 0x400F00, RegCpuIntStat, 0x14, EncPCs_RegCpuIntStat, 0x400f14)
|
|
FldFunc(EncPCs_RegCpuIntStat, Mbx, 31, 1)
|
|
FldFunc(EncPCs_RegCpuIntStat, Com7, 23, 1)
|
|
FldFunc(EncPCs_RegCpuIntStat, Com6, 22, 1)
|
|
FldFunc(EncPCs_RegCpuIntStat, Com5, 21, 1)
|
|
FldFunc(EncPCs_RegCpuIntStat, Com4, 20, 1)
|
|
FldFunc(EncPCs_RegCpuIntStat, Com3, 19, 1)
|
|
FldFunc(EncPCs_RegCpuIntStat, Com2, 18, 1)
|
|
FldFunc(EncPCs_RegCpuIntStat, Com1, 17, 1)
|
|
FldFunc(EncPCs_RegCpuIntStat, Com0, 16, 1)
|
|
FldFunc(EncPCs_RegCpuIntStat, Hw7, 15, 1)
|
|
FldFunc(EncPCs_RegCpuIntStat, Hw6, 14, 1)
|
|
FldFunc(EncPCs_RegCpuIntStat, Hw5, 13, 1)
|
|
FldFunc(EncPCs_RegCpuIntStat, Hw4, 12, 1)
|
|
FldFunc(EncPCs_RegCpuIntStat, Hw3, 11, 1)
|
|
FldFunc(EncPCs_RegCpuIntStat, Hw2, 10, 1)
|
|
FldFunc(EncPCs_RegCpuIntStat, Hw1, 9, 1)
|
|
FldFunc(EncPCs_RegCpuIntStat, Hw0, 8, 1)
|
|
FldFunc(EncPCs_RegCpuIntStat, Db7, 7, 1)
|
|
FldFunc(EncPCs_RegCpuIntStat, Db6, 6, 1)
|
|
FldFunc(EncPCs_RegCpuIntStat, Db5, 5, 1)
|
|
FldFunc(EncPCs_RegCpuIntStat, Db4, 4, 1)
|
|
FldFunc(EncPCs_RegCpuIntStat, Db3, 3, 1)
|
|
FldFunc(EncPCs_RegCpuIntStat, Db2, 2, 1)
|
|
FldFunc(EncPCs_RegCpuIntStat, Db1, 1, 1)
|
|
FldFunc(EncPCs_RegCpuIntStat, Db0, 0, 1)
|
|
RegFunc(EncPreCpuregs, 0x400F00, StreamCpuIntStat, 0x14, EncPCs_StreamCpuIntStat, 0x400f14)
|
|
FldFunc(EncPCs_StreamCpuIntStat, Mbx, 31, 1)
|
|
FldFunc(EncPCs_StreamCpuIntStat, Dec, 18, 1)
|
|
FldFunc(EncPCs_StreamCpuIntStat, Aud, 17, 1)
|
|
FldFunc(EncPCs_StreamCpuIntStat, M2m, 15, 1)
|
|
FldFunc(EncPCs_StreamCpuIntStat, Pci, 14, 1)
|
|
FldFunc(EncPCs_StreamCpuIntStat, Ts1, 13, 1)
|
|
FldFunc(EncPCs_StreamCpuIntStat, Ts0, 12, 1)
|
|
FldFunc(EncPCs_StreamCpuIntStat, GpioHi, 11, 1)
|
|
FldFunc(EncPCs_StreamCpuIntStat, GpioLo, 10, 1)
|
|
FldFunc(EncPCs_StreamCpuIntStat, Vpp1, 9, 1)
|
|
FldFunc(EncPCs_StreamCpuIntStat, Vpp0, 8, 1)
|
|
FldFunc(EncPCs_StreamCpuIntStat, Rb, 1, 1)
|
|
FldFunc(EncPCs_StreamCpuIntStat, Sd, 0, 1)
|
|
RegFunc(EncPreCpuregs, 0x400F00, Dec0CpuIntStat, 0x14, EncPCs_Dec0CpuIntStat, 0x400f14)
|
|
FldFunc(EncPCs_Dec0CpuIntStat, Mbx, 31, 1)
|
|
FldFunc(EncPCs_Dec0CpuIntStat, Dec, 16, 1)
|
|
FldFunc(EncPCs_Dec0CpuIntStat, Si, 8, 1)
|
|
FldFunc(EncPCs_Dec0CpuIntStat, Rb, 1, 1)
|
|
FldFunc(EncPCs_Dec0CpuIntStat, Sd, 0, 1)
|
|
RegFunc(EncPreCpuregs, 0x400F00, Dec1CpuIntStat, 0x14, EncPCs_Dec1CpuIntStat, 0x400f14)
|
|
FldFunc(EncPCs_Dec1CpuIntStat, Mbx, 31, 1)
|
|
FldFunc(EncPCs_Dec1CpuIntStat, Cab, 9, 1)
|
|
FldFunc(EncPCs_Dec1CpuIntStat, Si, 8, 1)
|
|
FldFunc(EncPCs_Dec1CpuIntStat, Rb, 1, 1)
|
|
FldFunc(EncPCs_Dec1CpuIntStat, Sd, 0, 1)
|
|
RegFunc(EncPreCpuregs, 0x400F00, RegHst2cpuStat, 0x18, EncPCs_RegHst2cpuStat, 0x400f18)
|
|
FldFunc(EncPCs_RegHst2cpuStat, Value, 0, 32)
|
|
RegFunc(EncPreCpuregs, 0x400F00, RegCpu2hstStat, 0x1C, EncPCs_RegCpu2hstStat, 0x400f1c)
|
|
FldFunc(EncPCs_RegCpu2hstStat, Value, 0, 32)
|
|
RegFunc(EncPreCpuregs, 0x400F00, RegCpuIntgenSet, 0x20, EncPCs_RegCpuIntgenSet, 0x400f20)
|
|
FldFunc(EncPCs_RegCpuIntgenSet, Cpu2HstMbx, 31, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenSet, Int15, 15, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenSet, Int14, 14, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenSet, Int13, 13, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenSet, Int12, 12, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenSet, Int11, 11, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenSet, Int10, 10, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenSet, Int9, 9, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenSet, Int8, 8, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenSet, Int7, 7, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenSet, Int6, 6, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenSet, Int5, 5, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenSet, Int4, 4, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenSet, Int3, 3, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenSet, Int2, 2, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenSet, Int1, 1, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenSet, Int0, 0, 1)
|
|
RegFunc(EncPreCpuregs, 0x400F00, RegCpuIntgenClr, 0x24, EncPCs_RegCpuIntgenClr, 0x400f24)
|
|
FldFunc(EncPCs_RegCpuIntgenClr, Cpu2HstMbx, 31, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenClr, Int15, 15, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenClr, Int14, 14, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenClr, Int13, 13, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenClr, Int12, 12, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenClr, Int11, 11, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenClr, Int10, 10, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenClr, Int9, 9, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenClr, Int8, 8, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenClr, Int7, 7, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenClr, Int6, 6, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenClr, Int5, 5, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenClr, Int4, 4, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenClr, Int3, 3, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenClr, Int2, 2, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenClr, Int1, 1, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenClr, Int0, 0, 1)
|
|
RegFunc(EncPreCpuregs, 0x400F00, RegCpuIcacheMiss, 0x28, EncPCs_RegCpuIcacheMiss, 0x400f28)
|
|
FldFunc(EncPCs_RegCpuIcacheMiss, Count, 0, 32)
|
|
RegFunc(EncPreCpuregs, 0x400F00, RegCpuIntgenMask, 0x2C, EncPCs_RegCpuIntgenMask, 0x400f2c)
|
|
FldFunc(EncPCs_RegCpuIntgenMask, Cpu2HstMbx, 31, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenMask, Int15, 15, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenMask, Int14, 14, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenMask, Int13, 13, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenMask, Int12, 12, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenMask, Int11, 11, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenMask, Int10, 10, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenMask, Int9, 9, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenMask, Int8, 8, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenMask, Int7, 7, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenMask, Int6, 6, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenMask, Int5, 5, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenMask, Int4, 4, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenMask, Int3, 3, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenMask, Int2, 2, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenMask, Int1, 1, 1)
|
|
FldFunc(EncPCs_RegCpuIntgenMask, Int0, 0, 1)
|
|
|
|
RegAreaFunc(EncPreCpudmaBase, 0x401800, 0x4018FF)
|
|
RegFunc(EncPreCpudma, 0x401800, RegDma0SdAddr, 0x0, EncPCa_RegDma0SdAddr, 0x401800)
|
|
FldFunc(EncPCa_RegDma0SdAddr, SdAddr, 0, 32)
|
|
RegFunc(EncPreCpudma, 0x401800, RegDma0LclAddr, 0x4, EncPCa_RegDma0LclAddr, 0x401804)
|
|
FldFunc(EncPCa_RegDma0LclAddr, Addr, 2, 7)
|
|
RegFunc(EncPreCpudma, 0x401800, RegDma0Len, 0x8, EncPCa_RegDma0Len, 0x401808)
|
|
FldFunc(EncPCa_RegDma0Len, Length, 2, 8)
|
|
RegFunc(EncPreCpudma, 0x401800, RegDma1SdAddr, 0x10, EncPCa_RegDma1SdAddr, 0x401810)
|
|
FldFunc(EncPCa_RegDma1SdAddr, SdAddr, 0, 32)
|
|
RegFunc(EncPreCpudma, 0x401800, RegDma1LclAddr, 0x14, EncPCa_RegDma1LclAddr, 0x401814)
|
|
FldFunc(EncPCa_RegDma1LclAddr, Addr, 2, 7)
|
|
RegFunc(EncPreCpudma, 0x401800, RegDma1Len, 0x18, EncPCa_RegDma1Len, 0x401818)
|
|
FldFunc(EncPCa_RegDma1Len, Length, 2, 8)
|
|
RegFunc(EncPreCpudma, 0x401800, RegDma2SdAddr, 0x20, EncPCa_RegDma2SdAddr, 0x401820)
|
|
FldFunc(EncPCa_RegDma2SdAddr, SdAddr, 0, 32)
|
|
RegFunc(EncPreCpudma, 0x401800, RegDma2LclAddr, 0x24, EncPCa_RegDma2LclAddr, 0x401824)
|
|
FldFunc(EncPCa_RegDma2LclAddr, Addr, 2, 7)
|
|
RegFunc(EncPreCpudma, 0x401800, RegDma2Len, 0x28, EncPCa_RegDma2Len, 0x401828)
|
|
FldFunc(EncPCa_RegDma2Len, Length, 2, 8)
|
|
RegFunc(EncPreCpudma, 0x401800, RegDma3SdAddr, 0x30, EncPCa_RegDma3SdAddr, 0x401830)
|
|
FldFunc(EncPCa_RegDma3SdAddr, SdAddr, 0, 32)
|
|
RegFunc(EncPreCpudma, 0x401800, RegDma3LclAddr, 0x34, EncPCa_RegDma3LclAddr, 0x401834)
|
|
FldFunc(EncPCa_RegDma3LclAddr, Addr, 2, 7)
|
|
RegFunc(EncPreCpudma, 0x401800, RegDma3Len, 0x38, EncPCa_RegDma3Len, 0x401838)
|
|
FldFunc(EncPCa_RegDma3Len, Length, 2, 8)
|
|
RegFunc(EncPreCpudma, 0x401800, RegDmaStatus, 0x40, EncPCa_RegDmaStatus, 0x401840)
|
|
FldFunc(EncPCa_RegDmaStatus, Act3, 3, 1)
|
|
FldFunc(EncPCa_RegDmaStatus, Act2, 2, 1)
|
|
FldFunc(EncPCa_RegDmaStatus, Act1, 1, 1)
|
|
FldFunc(EncPCa_RegDmaStatus, Act0, 0, 1)
|
|
|
|
RegAreaFunc(EncPreDmamemBase, 0x401A00, 0x4021FF)
|
|
RegFunc(EncPreDmamem, 0x401A00, DmaMem, 0x0, EncPDm_DmaMem, 0x401a00)
|
|
FldFunc(EncPDm_DmaMem, Data, 0, 32)
|
|
|
|
RegAreaFunc(EncDsBase, 0x40A000, 0x40A0FF)
|
|
RegFunc(EncDs, 0x40A000, EncDsCtl, 0x0, EncDs_EncDsCtl, 0x40a000)
|
|
#ifdef VCMODS_REGMAP
|
|
FldFunc(EncDs_EncDsCtl, Rsv12, 12, 20)
|
|
FldFunc(EncDs_EncDsCtl, FieldDP, 11, 1)
|
|
FldFunc(EncDs_EncDsCtl, Interleaved, 10, 1)
|
|
FldFunc(EncDs_EncDsCtl, DSVShift, 8, 2)
|
|
FldFunc(EncDs_EncDsCtl, DSHshift, 7, 1)
|
|
FldFunc(EncDs_EncDsCtl, DPVert, 6, 1)
|
|
FldFunc(EncDs_EncDsCtl, DPDis, 5, 1)
|
|
FldFunc(EncDs_EncDsCtl, RegInfo, 4, 1)
|
|
FldFunc(EncDs_EncDsCtl, PicDPIntEn, 3, 1)
|
|
FldFunc(EncDs_EncDsCtl, PicDSIntEn, 2, 1)
|
|
FldFunc(EncDs_EncDsCtl, PktIntEn, 1, 1)
|
|
FldFunc(EncDs_EncDsCtl, Reset, 0, 1)
|
|
#else
|
|
FldFunc(EncDs_EncDsCtl, DpFieldDp, 10, 1)
|
|
FldFunc(EncDs_EncDsCtl, DsInterleaved, 9, 1)
|
|
FldFunc(EncDs_EncDsCtl, DsVshift, 8, 1)
|
|
FldFunc(EncDs_EncDsCtl, DsHshift, 7, 1)
|
|
FldFunc(EncDs_EncDsCtl, DpVert, 6, 1)
|
|
FldFunc(EncDs_EncDsCtl, DpDis, 5, 1)
|
|
FldFunc(EncDs_EncDsCtl, RegEn, 4, 1)
|
|
FldFunc(EncDs_EncDsCtl, DpIntEn, 3, 1)
|
|
FldFunc(EncDs_EncDsCtl, DsIntEn, 2, 1)
|
|
FldFunc(EncDs_EncDsCtl, PktIntEn, 1, 1)
|
|
FldFunc(EncDs_EncDsCtl, Rst, 0, 1)
|
|
#endif
|
|
RegFunc(EncDs, 0x40A000, EncDsWidth, 0x4, EncDs_EncDsWidth, 0x40a004)
|
|
#ifdef VCMODS_REGMAP
|
|
FldFunc(EncDs_EncDsWidth, YSize, 16, 16)
|
|
FldFunc(EncDs_EncDsWidth, XSize, 0, 16)
|
|
#else
|
|
FldFunc(EncDs_EncDsWidth, YWidth, 16, 12)
|
|
FldFunc(EncDs_EncDsWidth, XWidth, 0, 12)
|
|
#endif
|
|
RegFunc(EncDs, 0x40A000, EncDsPktAddr, 0x8, EncDs_EncDsPktAddr, 0x40a008)
|
|
FldFunc(EncDs_EncDsPktAddr, PacketBufferAddress, 0, 32)
|
|
RegFunc(EncDs, 0x40A000, EncDsPicAddr, 0xC, EncDs_EncDsPicAddr, 0x40a00c)
|
|
#ifdef VCMODS_REGMAP
|
|
FldFunc(EncDs_EncDsPicAddr, Rsv24, 24, 8)
|
|
FldFunc(EncDs_EncDsPicAddr, DPNumB, 16, 8)
|
|
FldFunc(EncDs_EncDsPicAddr, DPNum, 8, 8)
|
|
FldFunc(EncDs_EncDsPicAddr, DSNum, 0, 8)
|
|
#else
|
|
FldFunc(EncDs_EncDsPicAddr, DpPicNumB, 16, 8)
|
|
FldFunc(EncDs_EncDsPicAddr, DpPicNum, 8, 8)
|
|
FldFunc(EncDs_EncDsPicAddr, DsPicNum, 0, 8)
|
|
#endif
|
|
RegFunc(EncDs, 0x40A000, EncDsStatus, 0x10, EncDs_EncDsStatus, 0x40a010)
|
|
#ifdef VCMODS_REGMAP
|
|
FldFunc(EncDs_EncDsStatus, Rsv26, 26, 6)
|
|
FldFunc(EncDs_EncDsStatus, PicErr, 25, 1)
|
|
FldFunc(EncDs_EncDsStatus, PktErr, 24, 1)
|
|
FldFunc(EncDs_EncDsStatus, PicDPCnt, 16, 8)
|
|
FldFunc(EncDs_EncDsStatus, PicDSCnt, 8, 8)
|
|
FldFunc(EncDs_EncDsStatus, PktCnt, 0, 8)
|
|
#else
|
|
FldFunc(EncDs_EncDsStatus, PicErr, 25, 1)
|
|
FldFunc(EncDs_EncDsStatus, PktErr, 24, 1)
|
|
FldFunc(EncDs_EncDsStatus, DpCnt, 16, 3)
|
|
FldFunc(EncDs_EncDsStatus, DsCnt, 8, 3)
|
|
FldFunc(EncDs_EncDsStatus, PktCnt, 0, 3)
|
|
#endif
|
|
RegFunc(EncDs, 0x40A000, EncDsConfig, 0x14, EncDs_EncDsConfig, 0x40a014)
|
|
#ifdef VCMODS_REGMAP
|
|
FldFunc(EncDs_EncDsConfig, Rsv3, 3, 29)
|
|
FldFunc(EncDs_EncDsConfig, 422Mode, 2, 1)
|
|
FldFunc(EncDs_EncDsConfig, FldMode, 1, 1)
|
|
FldFunc(EncDs_EncDsConfig, FldID, 0, 1)
|
|
#else
|
|
FldFunc(EncDs_EncDsConfig, 422Md, 2, 1)
|
|
FldFunc(EncDs_EncDsConfig, FldMd, 1, 1)
|
|
FldFunc(EncDs_EncDsConfig, FldId, 0, 1)
|
|
#endif
|
|
RegFunc(EncDs, 0x40A000, EncDsIntStat, 0x18, EncDs_EncDsIntStat, 0x40a018)
|
|
FldFunc(EncDs_EncDsIntStat, DpEop, 1, 1)
|
|
FldFunc(EncDs_EncDsIntStat, DsEop, 0, 1)
|
|
RegFunc(EncDs, 0x40A000, EncDsStat, 0x1C, EncDs_EncDsStat, 0x40a01c)
|
|
FldFunc(EncDs_EncDsStat, Done, 8, 1)
|
|
FldFunc(EncDs_EncDsStat, AveDiff, 0, 8)
|
|
RegFunc(EncDs, 0x40A000, EncDsStatCtl, 0x20, EncDs_EncDsStatCtl, 0x40a020)
|
|
FldFunc(EncDs_EncDsStatCtl, Pict, 24, 8)
|
|
FldFunc(EncDs_EncDsStatCtl, Fnum, 23, 1)
|
|
FldFunc(EncDs_EncDsStatCtl, Field, 22, 1)
|
|
FldFunc(EncDs_EncDsStatCtl, Y, 11, 11)
|
|
FldFunc(EncDs_EncDsStatCtl, X, 0, 11)
|
|
RegFunc(EncDs, 0x40A000, EncDsAbsdiffSum, 0x24, EncDs_EncDsAbsdiffSum, 0x40a024)
|
|
FldFunc(EncDs_EncDsAbsdiffSum, Done, 31, 1)
|
|
FldFunc(EncDs_EncDsAbsdiffSum, Val, 0, 30)
|
|
|
|
RegAreaFunc(EncPreIndSdramRegsBase, 0x441000, 0x44107F)
|
|
RegFunc(EncPreIndSdramRegs, 0x441000, RegSdramInc, 0x0, EncPISRs_RegSdramInc, 0x441000)
|
|
FldFunc(EncPISRs_RegSdramInc, Inc, 0, 1)
|
|
RegFunc(EncPreIndSdramRegs, 0x441000, RegSdramAddr, 0x4, EncPISRs_RegSdramAddr, 0x441004)
|
|
FldFunc(EncPISRs_RegSdramAddr, Addr, 0, 32)
|
|
RegFunc(EncPreIndSdramRegs, 0x441000, RegSdramData, 0x8, EncPISRs_RegSdramData, 0x441008)
|
|
FldFunc(EncPISRs_RegSdramData, Data, 0, 32)
|
|
RegFunc(EncPreIndSdramRegs, 0x441000, RegCpuDbg, 0x10, EncPISRs_RegCpuDbg, 0x441010)
|
|
FldFunc(EncPISRs_RegCpuDbg, Hst, 0, 1)
|
|
|
|
RegAreaFunc(EncPreCpucoreBase, 0x444000, 0x444FFF)
|
|
RegFunc(EncPreCpucore, 0x444000, CpucoreReg, 0x0, EncPCe_CpucoreReg, 0x444000)
|
|
FldFunc(EncPCe_CpucoreReg, Addr, 0, 32)
|
|
|
|
RegAreaFunc(EncPreCpuauxBase, 0x445000, 0x445FFF)
|
|
RegFunc(EncPreCpuaux, 0x445000, CpuauxReg, 0x0, EncPCx_CpuauxReg, 0x445000)
|
|
FldFunc(EncPCx_CpuauxReg, Addr, 0, 32)
|
|
|
|
RegAreaFunc(EncPreCpuimemBase, 0x446000, 0x447FFF)
|
|
RegFunc(EncPreCpuimem, 0x446000, CpuimemReg, 0x0, EncPCm_CpuimemReg, 0x446000)
|
|
FldFunc(EncPCm_CpuimemReg, Addr, 0, 32)
|
|
|
|
RegAreaFunc(EncPreCpudmemBase, 0x448000, 0x44FFFF)
|
|
RegFunc(EncPreCpudmem, 0x448000, CpudmemReg, 0x0, EncPCm_CpudmemReg, 0x448000)
|
|
FldFunc(EncPCm_CpudmemReg, Addr, 0, 32)
|
|
|
|
#endif
|
|
|
|
|
|
//******************************************************************************
|
|
//
|
|
// Encoder Mid Ring Bus Node
|
|
//
|
|
//******************************************************************************
|
|
#ifndef EXCLUDE_ENCODER_MID
|
|
|
|
RegAreaFunc(EncMidRbnodeRegsBase, 0x500000, 0x50007F)
|
|
RegFunc(EncMidRbnodeRegs, 0x500000, RbConfig , 0x0, EncMRRs_RbConfig , 0x500000)
|
|
FldFunc(EncMRRs_RbConfig , RdPostEna, 1, 1)
|
|
FldFunc(EncMRRs_RbConfig , RdBypEna, 0, 1)
|
|
RegFunc(EncMidRbnodeRegs, 0x500000, RbStickyError, 0x4, EncMRRs_RbStickyError, 0x500004)
|
|
FldFunc(EncMRRs_RbStickyError, Node, 1, 1)
|
|
FldFunc(EncMRRs_RbStickyError, Tgt, 0, 1)
|
|
RegFunc(EncMidRbnodeRegs, 0x500000, RbCurrentError, 0x8, EncMRRs_RbCurrentError, 0x500008)
|
|
FldFunc(EncMRRs_RbCurrentError, Node, 1, 1)
|
|
FldFunc(EncMRRs_RbCurrentError, Tgt, 0, 1)
|
|
RegFunc(EncMidRbnodeRegs, 0x500000, RbReadData, 0xC, EncMRRs_RbReadData, 0x50000c)
|
|
FldFunc(EncMRRs_RbReadData, Data, 0, 32)
|
|
|
|
RegAreaFunc(EncMidRingbusDebugRegsBase, 0x500080, 0x5000FF)
|
|
RegFunc(EncMidRingbusDebugRegs, 0x500080, RbDebugConfig, 0x0, EncMRDRs_RbDebugConfig, 0x500080)
|
|
FldFunc(EncMRDRs_RbDebugConfig, Addr3WrStat, 15, 1)
|
|
FldFunc(EncMRDRs_RbDebugConfig, Addr2WrStat, 14, 1)
|
|
FldFunc(EncMRDRs_RbDebugConfig, Addr1WrStat, 13, 1)
|
|
FldFunc(EncMRDRs_RbDebugConfig, Addr0WrStat, 12, 1)
|
|
FldFunc(EncMRDRs_RbDebugConfig, Addr3RdStat, 11, 1)
|
|
FldFunc(EncMRDRs_RbDebugConfig, Addr2RdStat, 10, 1)
|
|
FldFunc(EncMRDRs_RbDebugConfig, Addr1RdStat, 9, 1)
|
|
FldFunc(EncMRDRs_RbDebugConfig, Addr0RdStat, 8, 1)
|
|
FldFunc(EncMRDRs_RbDebugConfig, Addr3WrEna, 7, 1)
|
|
FldFunc(EncMRDRs_RbDebugConfig, Addr2WrEna, 6, 1)
|
|
FldFunc(EncMRDRs_RbDebugConfig, Addr1WrEna, 5, 1)
|
|
FldFunc(EncMRDRs_RbDebugConfig, Addr0WrEna, 4, 1)
|
|
FldFunc(EncMRDRs_RbDebugConfig, Addr3RdEna, 3, 1)
|
|
FldFunc(EncMRDRs_RbDebugConfig, Addr2RdEna, 2, 1)
|
|
FldFunc(EncMRDRs_RbDebugConfig, Addr1RdEna, 1, 1)
|
|
FldFunc(EncMRDRs_RbDebugConfig, Addr0RdEna, 0, 1)
|
|
RegFunc(EncMidRingbusDebugRegs, 0x500080, RbDebugReg0Addr, 0x4, EncMRDRs_RbDebugReg0Addr, 0x500084)
|
|
FldFunc(EncMRDRs_RbDebugReg0Addr, Addr, 0, 16)
|
|
RegFunc(EncMidRingbusDebugRegs, 0x500080, RbDebugReg1Addr, 0x8, EncMRDRs_RbDebugReg1Addr, 0x500088)
|
|
FldFunc(EncMRDRs_RbDebugReg1Addr, Addr, 0, 16)
|
|
RegFunc(EncMidRingbusDebugRegs, 0x500080, RbDebugReg2Addr, 0xC, EncMRDRs_RbDebugReg2Addr, 0x50008c)
|
|
FldFunc(EncMRDRs_RbDebugReg2Addr, Addr, 0, 16)
|
|
RegFunc(EncMidRingbusDebugRegs, 0x500080, RbDebugReg3Addr, 0x10, EncMRDRs_RbDebugReg3Addr, 0x500090)
|
|
FldFunc(EncMRDRs_RbDebugReg3Addr, Addr, 0, 16)
|
|
RegFunc(EncMidRingbusDebugRegs, 0x500080, RbDebugOutputReg, 0x14, EncMRDRs_RbDebugOutputReg, 0x500094)
|
|
FldFunc(EncMRDRs_RbDebugOutputReg, DspRst, 1, 1)
|
|
FldFunc(EncMRDRs_RbDebugOutputReg, FmmRst, 0, 1)
|
|
|
|
RegAreaFunc(EncWprdBase, 0x500340, 0x50035F)
|
|
RegFunc(EncWprd, 0x500340, RegWprdCtl, 0x0, EncWd_RegWprdCtl, 0x500340)
|
|
FldFunc(EncWd_RegWprdCtl, Chromadenom, 12, 3)
|
|
FldFunc(EncWd_RegWprdCtl, Lumdenom, 8, 3)
|
|
FldFunc(EncWd_RegWprdCtl, Predtype, 0, 2)
|
|
|
|
RegAreaFunc(EncMidCpudmaBase, 0x501800, 0x5018FF)
|
|
RegFunc(EncMidCpudma, 0x501800, RegDma0SdAddr, 0x0, EncMCa_RegDma0SdAddr, 0x501800)
|
|
FldFunc(EncMCa_RegDma0SdAddr, SdAddr, 0, 32)
|
|
RegFunc(EncMidCpudma, 0x501800, RegDma0LclAddr, 0x4, EncMCa_RegDma0LclAddr, 0x501804)
|
|
FldFunc(EncMCa_RegDma0LclAddr, Addr, 2, 7)
|
|
RegFunc(EncMidCpudma, 0x501800, RegDma0Len, 0x8, EncMCa_RegDma0Len, 0x501808)
|
|
FldFunc(EncMCa_RegDma0Len, Length, 2, 8)
|
|
RegFunc(EncMidCpudma, 0x501800, RegDma1SdAddr, 0x10, EncMCa_RegDma1SdAddr, 0x501810)
|
|
FldFunc(EncMCa_RegDma1SdAddr, SdAddr, 0, 32)
|
|
RegFunc(EncMidCpudma, 0x501800, RegDma1LclAddr, 0x14, EncMCa_RegDma1LclAddr, 0x501814)
|
|
FldFunc(EncMCa_RegDma1LclAddr, Addr, 2, 7)
|
|
RegFunc(EncMidCpudma, 0x501800, RegDma1Len, 0x18, EncMCa_RegDma1Len, 0x501818)
|
|
FldFunc(EncMCa_RegDma1Len, Length, 2, 8)
|
|
RegFunc(EncMidCpudma, 0x501800, RegDma2SdAddr, 0x20, EncMCa_RegDma2SdAddr, 0x501820)
|
|
FldFunc(EncMCa_RegDma2SdAddr, SdAddr, 0, 32)
|
|
RegFunc(EncMidCpudma, 0x501800, RegDma2LclAddr, 0x24, EncMCa_RegDma2LclAddr, 0x501824)
|
|
FldFunc(EncMCa_RegDma2LclAddr, Addr, 2, 7)
|
|
RegFunc(EncMidCpudma, 0x501800, RegDma2Len, 0x28, EncMCa_RegDma2Len, 0x501828)
|
|
FldFunc(EncMCa_RegDma2Len, Length, 2, 8)
|
|
RegFunc(EncMidCpudma, 0x501800, RegDma3SdAddr, 0x30, EncMCa_RegDma3SdAddr, 0x501830)
|
|
FldFunc(EncMCa_RegDma3SdAddr, SdAddr, 0, 32)
|
|
RegFunc(EncMidCpudma, 0x501800, RegDma3LclAddr, 0x34, EncMCa_RegDma3LclAddr, 0x501834)
|
|
FldFunc(EncMCa_RegDma3LclAddr, Addr, 2, 7)
|
|
RegFunc(EncMidCpudma, 0x501800, RegDma3Len, 0x38, EncMCa_RegDma3Len, 0x501838)
|
|
FldFunc(EncMCa_RegDma3Len, Length, 2, 8)
|
|
RegFunc(EncMidCpudma, 0x501800, RegDmaStatus, 0x40, EncMCa_RegDmaStatus, 0x501840)
|
|
FldFunc(EncMCa_RegDmaStatus, Act3, 3, 1)
|
|
FldFunc(EncMCa_RegDmaStatus, Act2, 2, 1)
|
|
FldFunc(EncMCa_RegDmaStatus, Act1, 1, 1)
|
|
FldFunc(EncMCa_RegDmaStatus, Act0, 0, 1)
|
|
|
|
RegAreaFunc(EncMidDmaMemBase, 0x501A00, 0x5021FF)
|
|
RegFunc(EncMidDmaMem, 0x501A00, DmaMem, 0x0, EncMDMm_DmaMem, 0x501a00)
|
|
FldFunc(EncMDMm_DmaMem, Data, 0, 32)
|
|
|
|
RegAreaFunc(EncSpBase, 0x504000, 0x504FFF)
|
|
RegFunc(EncSp, 0x504000, EncSpStart, 0x0, EncSp_EncSpStart, 0x504000)
|
|
#ifdef VCMODS_REGMAP
|
|
//
|
|
// WARNING: This register has different layouts for read and writing.
|
|
//
|
|
|
|
// Read
|
|
FldFunc(EncSp_EncSpStart, Rsv6, 6, 26)
|
|
FldFunc(EncSp_EncSpStart, Done8x8, 5, 1) // read only
|
|
FldFunc(EncSp_EncSpStart, Idle8x8, 4, 1) // read only
|
|
FldFunc(EncSp_EncSpStart, Done16x16, 3, 1) // read only
|
|
FldFunc(EncSp_EncSpStart, Done4x4, 2, 1) // read only
|
|
FldFunc(EncSp_EncSpStart, Idle16x16, 1, 1) // read only
|
|
FldFunc(EncSp_EncSpStart, Idle4x4, 0, 1) // read only
|
|
|
|
// Write
|
|
FldFunc(EncSp_EncSpStart, Rsv3, 3, 29)
|
|
FldFunc(EncSp_EncSpStart, Start8x8, 2, 1) // write only
|
|
FldFunc(EncSp_EncSpStart, Start16x16, 1, 1) // write only
|
|
FldFunc(EncSp_EncSpStart, Start4x4, 0, 1) // write only
|
|
FldFunc(EncSp_EncSpStart, Start, 0, 3) // aggregated field
|
|
#else
|
|
FldFunc(EncSp_EncSpStart, Start, 0, 2)
|
|
#endif
|
|
RegFunc(EncSp, 0x504000, EncSpMbaddr, 0x4, EncSp_EncSpMbaddr, 0x504004)
|
|
#ifdef VCMODS_REGMAP
|
|
FldFunc(EncSp_EncSpMbaddr, Rsv18, 18, 15)
|
|
FldFunc(EncSp_EncSpMbaddr, LeftIsIntra16x16, 17, 1)
|
|
FldFunc(EncSp_EncSpMbaddr, TopIsIntra16x16, 16, 1)
|
|
FldFunc(EncSp_EncSpMbaddr, Rsv15, 15, 1)
|
|
FldFunc(EncSp_EncSpMbaddr, XPos, 8, 7)
|
|
FldFunc(EncSp_EncSpMbaddr, SadCosting, 7, 1)
|
|
FldFunc(EncSp_EncSpMbaddr, FollowChroma, 6, 1)
|
|
FldFunc(EncSp_EncSpMbaddr, LeftIsInter, 5, 1)
|
|
FldFunc(EncSp_EncSpMbaddr, TopIsInter, 4, 1)
|
|
FldFunc(EncSp_EncSpMbaddr, TLAvail, 3, 1)
|
|
FldFunc(EncSp_EncSpMbaddr, LeftAvail, 2, 1)
|
|
FldFunc(EncSp_EncSpMbaddr, TopAvail, 1, 1)
|
|
FldFunc(EncSp_EncSpMbaddr, TRAvail, 0, 1)
|
|
FldFunc(EncSp_EncSpMbaddr, Avail, 0, 4) // aggregated field
|
|
#else
|
|
FldFunc(EncSp_EncSpMbaddr, MbXaddr, 8, 7)
|
|
FldFunc(EncSp_EncSpMbaddr, LeftIsInter, 5, 1)
|
|
FldFunc(EncSp_EncSpMbaddr, TopIsInter, 4, 1)
|
|
FldFunc(EncSp_EncSpMbaddr, TopLeftValid, 3, 1)
|
|
FldFunc(EncSp_EncSpMbaddr, LeftValid, 2, 1)
|
|
FldFunc(EncSp_EncSpMbaddr, TopValid, 1, 1)
|
|
FldFunc(EncSp_EncSpMbaddr, RightValid, 0, 1)
|
|
#endif
|
|
RegFunc(EncSp, 0x504000, EncSpMode4x4l, 0x8, EncSp_EncSpMode4x4l, 0x504008)
|
|
FldFunc(EncSp_EncSpMode4x4l, Mode4x4l, 0, 32)
|
|
RegFunc(EncSp, 0x504000, EncSpMode4x4h, 0xC, EncSp_EncSpMode4x4h, 0x50400c)
|
|
FldFunc(EncSp_EncSpMode4x4h, Mode4x4h, 0, 32)
|
|
RegFunc(EncSp, 0x504000, EncSpMode16x16, 0x10, EncSp_EncSpMode16x16, 0x504010)
|
|
FldFunc(EncSp_EncSpMode16x16, Mode16x16, 0, 32)
|
|
RegFunc(EncSp, 0x504000, EncSpLumatl, 0x14, EncSp_EncSpLumatl, 0x504014)
|
|
FldFunc(EncSp_EncSpLumatl, Edgeval, 0, 32)
|
|
RegFunc(EncSp, 0x504000, EncSpLumatopl, 0x18, EncSp_EncSpLumatopl, 0x504018)
|
|
FldFunc(EncSp_EncSpLumatopl, Edgeval, 0, 32)
|
|
RegFunc(EncSp, 0x504000, EncSpLumatoplm, 0x1C, EncSp_EncSpLumatoplm, 0x50401c)
|
|
FldFunc(EncSp_EncSpLumatoplm, Edgeval, 0, 32)
|
|
RegFunc(EncSp, 0x504000, EncSpLumatopmh, 0x20, EncSp_EncSpLumatopmh, 0x504020)
|
|
FldFunc(EncSp_EncSpLumatopmh, Edgeval, 0, 32)
|
|
RegFunc(EncSp, 0x504000, EncSpLumatoph, 0x24, EncSp_EncSpLumatoph, 0x504024)
|
|
FldFunc(EncSp_EncSpLumatoph, Edgeval, 0, 32)
|
|
RegFunc(EncSp, 0x504000, EncSpLumaleftl, 0x28, EncSp_EncSpLumaleftl, 0x504028)
|
|
FldFunc(EncSp_EncSpLumaleftl, Edgeval, 0, 32)
|
|
RegFunc(EncSp, 0x504000, EncSpLumaleftlm, 0x2C, EncSp_EncSpLumaleftlm, 0x50402c)
|
|
FldFunc(EncSp_EncSpLumaleftlm, Edgeval, 0, 32)
|
|
RegFunc(EncSp, 0x504000, EncSpLumaleftmh, 0x30, EncSp_EncSpLumaleftmh, 0x504030)
|
|
FldFunc(EncSp_EncSpLumaleftmh, Edgeval, 0, 32)
|
|
RegFunc(EncSp, 0x504000, EncSpLumalefth, 0x34, EncSp_EncSpLumalefth, 0x504034)
|
|
FldFunc(EncSp_EncSpLumalefth, Edgeval, 0, 32)
|
|
RegFunc(EncSp, 0x504000, EncSpLumaext, 0x38, EncSp_EncSpLumaext, 0x504038)
|
|
FldFunc(EncSp_EncSpLumaext, Edgeval, 0, 32)
|
|
RegFunc(EncSp, 0x504000, EncSpCatl, 0x3C, EncSp_EncSpCatl, 0x50403c)
|
|
FldFunc(EncSp_EncSpCatl, Edgeval, 0, 32)
|
|
RegFunc(EncSp, 0x504000, EncSpCatopl, 0x40, EncSp_EncSpCatopl, 0x504040)
|
|
FldFunc(EncSp_EncSpCatopl, Edgeval, 0, 32)
|
|
RegFunc(EncSp, 0x504000, EncSpCatoph, 0x44, EncSp_EncSpCatoph, 0x504044)
|
|
FldFunc(EncSp_EncSpCatoph, Edgeval, 0, 32)
|
|
RegFunc(EncSp, 0x504000, EncSpCaleftl, 0x48, EncSp_EncSpCaleftl, 0x504048)
|
|
FldFunc(EncSp_EncSpCaleftl, Edgeval, 0, 32)
|
|
RegFunc(EncSp, 0x504000, EncSpCalefth, 0x4C, EncSp_EncSpCalefth, 0x50404c)
|
|
FldFunc(EncSp_EncSpCalefth, Edgeval, 0, 32)
|
|
RegFunc(EncSp, 0x504000, EncSpCbtl, 0x50, EncSp_EncSpCbtl, 0x504050)
|
|
FldFunc(EncSp_EncSpCbtl, Edgeval, 0, 32)
|
|
RegFunc(EncSp, 0x504000, EncSpCbtopl, 0x54, EncSp_EncSpCbtopl, 0x504054)
|
|
FldFunc(EncSp_EncSpCbtopl, Edgeval, 0, 32)
|
|
RegFunc(EncSp, 0x504000, EncSpCbtoph, 0x58, EncSp_EncSpCbtoph, 0x504058)
|
|
FldFunc(EncSp_EncSpCbtoph, Edgeval, 0, 32)
|
|
RegFunc(EncSp, 0x504000, EncSpCbleftl, 0x5C, EncSp_EncSpCbleftl, 0x50405c)
|
|
FldFunc(EncSp_EncSpCbleftl, Edgeval, 0, 32)
|
|
RegFunc(EncSp, 0x504000, EncSpCblefth, 0x60, EncSp_EncSpCblefth, 0x504060)
|
|
FldFunc(EncSp_EncSpCblefth, Edgeval, 0, 32)
|
|
RegFunc(EncSp, 0x504000, EncSpQp, 0x64, EncSp_EncSpQp, 0x504064)
|
|
#ifdef VCMODS_REGMAP
|
|
FldFunc(EncSp_EncSpQp, Qp8x8, 8, 6)
|
|
FldFunc(EncSp_EncSpQp, Rsv7, 7, 1)
|
|
FldFunc(EncSp_EncSpQp, IFrame, 6, 1)
|
|
FldFunc(EncSp_EncSpQp, QP, 0, 6)
|
|
#else
|
|
FldFunc(EncSp_EncSpQp, Qp8x8, 8, 6)
|
|
FldFunc(EncSp_EncSpQp, IfraMe, 6, 1)
|
|
FldFunc(EncSp_EncSpQp, Op, 0, 6)
|
|
#endif
|
|
RegFunc(EncSp, 0x504000, EncSpLambda, 0x68, EncSp_EncSpLambda, 0x504068)
|
|
FldFunc(EncSp_EncSpLambda, Lambda, 0, 16)
|
|
RegFunc(EncSp, 0x504000, EncSpCost4x4, 0x6c, EncSp_EncSpCost4x4, 0x50406c)
|
|
FldFunc(EncSp_EncSpCost4x4, Cost4x4, 0, 32)
|
|
RegFunc(EncSp, 0x504000, EncSpCost16x16, 0x70, EncSp_EncSpCost16x16, 0x504070)
|
|
FldFunc(EncSp_EncSpCost16x16, Cost16x16, 0, 32)
|
|
RegFunc(EncSp, 0x504000, EncSpCost8x8, 0x74, EncSp_EncSpCost8x8, 0x504074)
|
|
FldFunc(EncSp_EncSpCost8x8, Cost8x8, 0, 32)
|
|
RegFunc(EncSp, 0x504000, EncSpTimer, 0x78, EncSp_EncSpTimer, 0x504078)
|
|
FldFunc(EncSp_EncSpTimer, Ovf, 16, 1)
|
|
FldFunc(EncSp_EncSpTimer, Timer, 0, 16)
|
|
#ifdef VCMODS_REGMAP
|
|
RegFunc(EncSp, 0x504000, EncSpTopmode, 0x7c, EncSp_EncSpTopmode, 0x50407c)
|
|
#endif
|
|
RegFunc(EncSp, 0x504000, EncSpBestmodeLuma4x4, 0x80, EncSp_EncSpBestmodeLuma4x4, 0x504080)
|
|
FldFunc(EncSp_EncSpBestmodeLuma4x4, Mode, 0, 4)
|
|
RegFunc(EncSp, 0x504000, EncSpBestmodeLuma16x16, 0xc0, EncSp_EncSpBestmodeLuma16x16, 0x5040c0)
|
|
FldFunc(EncSp_EncSpBestmodeLuma16x16, Mode, 0, 2)
|
|
RegFunc(EncSp, 0x504000, EncSpBestmodeChroma, 0xc4, EncSp_EncSpBestmodeChroma, 0x5040c4)
|
|
FldFunc(EncSp_EncSpBestmodeChroma, Mode, 0, 2)
|
|
RegFunc(EncSp, 0x504000, EncSpBestpredLuma4x4, 0x600, EncSp_EncSpBestpredLuma4x4, 0x504600)
|
|
FldFunc(EncSp_EncSpBestpredLuma4x4, Prediction, 0, 32)
|
|
RegFunc(EncSp, 0x504000, EncSpBestpredLuma16x16, 0x800, EncSp_EncSpBestpredLuma16x16, 0x504800)
|
|
FldFunc(EncSp_EncSpBestpredLuma16x16, Prediction, 0, 32)
|
|
RegFunc(EncSp, 0x504000, EncSpBestpredCa8x8, 0xa00, EncSp_EncSpBestpredCa8x8, 0x504a00)
|
|
FldFunc(EncSp_EncSpBestpredCa8x8, Prediction, 0, 32)
|
|
RegFunc(EncSp, 0x504000, EncSpBestpredCb8x8, 0xa80, EncSp_EncSpBestpredCb8x8, 0x504a80)
|
|
FldFunc(EncSp_EncSpBestpredCb8x8, Prediction, 0, 32)
|
|
RegFunc(EncSp, 0x504000, EncSpLambda8x8, 0xb00, EncSp_EncSpLambda8x8, 0x504b00)
|
|
FldFunc(EncSp_EncSpLambda8x8, Lambda8x8, 0, 16)
|
|
RegFunc(EncSp, 0x504000, EncSpCostluma8x8, 0xB04, EncSp_EncSpCostluma8x8, 0x504b04)
|
|
FldFunc(EncSp_EncSpCostluma8x8, Costluma8x8, 0, 32)
|
|
RegFunc(EncSp, 0x504000, EncSpBestmodeLuma8x8, 0xB08, EncSp_EncSpBestmodeLuma8x8, 0x504b08)
|
|
FldFunc(EncSp_EncSpBestmodeLuma8x8, Mode, 0, 16)
|
|
RegFunc(EncSp, 0x504000, EncSpBestpredLuma8x8, 0xB0C, EncSp_EncSpBestpredLuma8x8, 0x504b0c)
|
|
FldFunc(EncSp_EncSpBestpredLuma8x8, Prediction, 0, 32)
|
|
|
|
RegFunc(EncSp, 0x504000, EncSpBestmodeLuma4x4Pack0, 0xB10, EncSp_EncSpBestmodeLuma4x4Pack0, 0x504b10)
|
|
RegFunc(EncSp, 0x504000, EncSpBestmodeLuma4x4Pack1, 0xB14, EncSp_EncSpBestmodeLuma4x4Pack1, 0x504b14)
|
|
|
|
RegAreaFunc(EncMcRegsBase, 0x506000, 0x5067FF)
|
|
RegFunc(EncMcRegs, 0x506000, EncMcStart, 0x0, EncMRs_EncMcStart, 0x506000)
|
|
FldFunc(EncMRs_EncMcStart, Mbaff, 18, 1)
|
|
FldFunc(EncMRs_EncMcStart, Topfield, 17, 1)
|
|
FldFunc(EncMRs_EncMcStart, Fieldmode, 16, 1)
|
|
FldFunc(EncMRs_EncMcStart, Mbaddry, 8, 7)
|
|
FldFunc(EncMRs_EncMcStart, Mbaddrx, 0, 7)
|
|
RegFunc(EncMcRegs, 0x506000, EncMcCost0, 0x4, EncMRs_EncMcCost0, 0x506004)
|
|
FldFunc(EncMRs_EncMcCost0, Cost, 0, 32)
|
|
RegFunc(EncMcRegs, 0x506000, EncMcCost1, 0x8, EncMRs_EncMcCost1, 0x506008)
|
|
FldFunc(EncMRs_EncMcCost1, Cost, 0, 32)
|
|
RegFunc(EncMcRegs, 0x506000, EncMcCost0Uv, 0xC, EncMRs_EncMcCost0Uv, 0x50600c)
|
|
FldFunc(EncMRs_EncMcCost0Uv, Cost, 0, 32)
|
|
RegFunc(EncMcRegs, 0x506000, EncMcCost1Uv, 0x10, EncMRs_EncMcCost1Uv, 0x506010)
|
|
FldFunc(EncMRs_EncMcCost1Uv, Cost, 0, 32)
|
|
RegFunc(EncMcRegs, 0x506000, EncMcPred0, 0x800, EncMRs_EncMcPred0, 0x506800)
|
|
FldFunc(EncMRs_EncMcPred0, Prediction, 0, 32)
|
|
RegFunc(EncMcRegs, 0x506000, EncMcPred1, 0xc00, EncMRs_EncMcPred1, 0x506c00)
|
|
FldFunc(EncMRs_EncMcPred1, Prediction, 0, 32)
|
|
|
|
RegAreaFunc(EncMcBase, 0x506800, 0x50681F)
|
|
RegFunc(EncMc, 0x506800, RegMcomCtl, 0x0, EncMc_RegMcomCtl, 0x506800)
|
|
FldFunc(EncMc_RegMcomCtl, Bintl, 31, 1)
|
|
FldFunc(EncMc_RegMcomCtl, Bref, 24, 7)
|
|
FldFunc(EncMc_RegMcomCtl, Aintl, 23, 1)
|
|
FldFunc(EncMc_RegMcomCtl, Aref, 16, 7)
|
|
FldFunc(EncMc_RegMcomCtl, Subblock, 12, 4)
|
|
FldFunc(EncMc_RegMcomCtl, Bbot, 11, 1)
|
|
FldFunc(EncMc_RegMcomCtl, Bfld, 10, 1)
|
|
FldFunc(EncMc_RegMcomCtl, Abot, 9, 1)
|
|
FldFunc(EncMc_RegMcomCtl, Afld, 8, 1)
|
|
FldFunc(EncMc_RegMcomCtl, Ysize, 6, 2)
|
|
FldFunc(EncMc_RegMcomCtl, Xsize, 4, 2)
|
|
FldFunc(EncMc_RegMcomCtl, Luma, 3, 1)
|
|
FldFunc(EncMc_RegMcomCtl, Filter261, 2, 1)
|
|
FldFunc(EncMc_RegMcomCtl, Mde, 1, 1)
|
|
FldFunc(EncMc_RegMcomCtl, Back, 0, 1)
|
|
RegFunc(EncMc, 0x506800, RegMcomSrcA, 0x4, EncMc_RegMcomSrcA, 0x506804)
|
|
FldFunc(EncMc_RegMcomSrcA, Ysrc, 16, 16)
|
|
FldFunc(EncMc_RegMcomSrcA, Xsrc, 0, 16)
|
|
RegFunc(EncMc, 0x506800, RegMcomSrcB, 0x8, EncMc_RegMcomSrcB, 0x506808)
|
|
FldFunc(EncMc_RegMcomSrcB, Ysrc, 16, 16)
|
|
FldFunc(EncMc_RegMcomSrcB, Xsrc, 0, 16)
|
|
RegFunc(EncMc, 0x506800, RegWprdVc1Pic, 0xC, EncMc_RegWprdVc1Pic, 0x50680c)
|
|
FldFunc(EncMc_RegWprdVc1Pic, Shift2, 22, 7)
|
|
FldFunc(EncMc_RegWprdVc1Pic, Scale2, 16, 6)
|
|
FldFunc(EncMc_RegWprdVc1Pic, Shift1, 10, 6)
|
|
FldFunc(EncMc_RegWprdVc1Pic, Scale1, 4, 6)
|
|
FldFunc(EncMc_RegWprdVc1Pic, Bicubic, 1, 1)
|
|
FldFunc(EncMc_RegWprdVc1Pic, Rnd, 0, 1)
|
|
RegFunc(EncMc, 0x506800, RegWprdVc1BotPic, 0x10, EncMc_RegWprdVc1BotPic, 0x506810)
|
|
FldFunc(EncMc_RegWprdVc1BotPic, Shift2, 22, 7)
|
|
FldFunc(EncMc_RegWprdVc1BotPic, Scale2, 16, 6)
|
|
FldFunc(EncMc_RegWprdVc1BotPic, Shift1, 10, 6)
|
|
FldFunc(EncMc_RegWprdVc1BotPic, Scale1, 4, 6)
|
|
RegFunc(EncMc, 0x506800, RegWprdSel, 0x14, EncMc_RegWprdSel, 0x506814)
|
|
FldFunc(EncMc_RegWprdSel, Wt0, 31, 1)
|
|
FldFunc(EncMc_RegWprdSel, A0l1, 30, 1)
|
|
FldFunc(EncMc_RegWprdSel, Vecawtsel0, 25, 5)
|
|
FldFunc(EncMc_RegWprdSel, Vecbwtsel0, 16, 9)
|
|
FldFunc(EncMc_RegWprdSel, Wt1, 15, 1)
|
|
FldFunc(EncMc_RegWprdSel, A1l1, 14, 1)
|
|
FldFunc(EncMc_RegWprdSel, Vecawtsel1, 9, 5)
|
|
FldFunc(EncMc_RegWprdSel, Vecbwtsel1, 0, 9)
|
|
RegFunc(EncMc, 0x506800, RegWprdVc1BackPic, 0x18, EncMc_RegWprdVc1BackPic, 0x506818)
|
|
FldFunc(EncMc_RegWprdVc1BackPic, Shift1, 10, 6)
|
|
FldFunc(EncMc_RegWprdVc1BackPic, Scale1, 4, 6)
|
|
FldFunc(EncMc_RegWprdVc1BackPic, Bot, 0, 1)
|
|
|
|
RegAreaFunc(EncMbmuxBase, 0x508000, 0x508FFF)
|
|
RegFunc(EncMbmux, 0x508000, EncMbmuxQp, 0x0, EncMx_EncMbmuxQp, 0x508000)
|
|
#ifdef VCMODS_REGMAP
|
|
FldFunc(EncMx_EncMbmuxQp, Rsv7, 7, 25)
|
|
FldFunc(EncMx_EncMbmuxQp, IFrame, 6, 1)
|
|
FldFunc(EncMx_EncMbmuxQp, QP, 0, 6)
|
|
#else
|
|
FldFunc(EncMx_EncMbmuxQp, QpvOffset, 13, 5)
|
|
FldFunc(EncMx_EncMbmuxQp, QpuOffset, 8, 5)
|
|
FldFunc(EncMx_EncMbmuxQp, IfraMe, 6, 1)
|
|
FldFunc(EncMx_EncMbmuxQp, Op, 0, 6)
|
|
#endif
|
|
RegFunc(EncMbmux, 0x508000, EncMbmuxMbmode, 0x4, EncMx_EncMbmuxMbmode, 0x508004)
|
|
#ifdef VCMODS_REGMAP
|
|
FldFunc(EncMx_EncMbmuxMbmode, xform8x8, 31, 1)
|
|
FldFunc(EncMx_EncMbmuxMbmode, Rsv21, 21, 10)
|
|
FldFunc(EncMx_EncMbmuxMbmode, SP8x8Ena, 20, 1)
|
|
FldFunc(EncMx_EncMbmuxMbmode, MCPass1Ena, 19, 1)
|
|
FldFunc(EncMx_EncMbmuxMbmode, MCPass0Ena, 18, 1)
|
|
FldFunc(EncMx_EncMbmuxMbmode, SP16x16Ena, 17, 1)
|
|
FldFunc(EncMx_EncMbmuxMbmode, SP4x4Ena, 16, 1)
|
|
FldFunc(EncMx_EncMbmuxMbmode, ModeEna, 16, 5) // aggregated field
|
|
FldFunc(EncMx_EncMbmuxMbmode, Rsv9, 9, 7)
|
|
FldFunc(EncMx_EncMbmuxMbmode, HWReady, 8, 1)
|
|
FldFunc(EncMx_EncMbmuxMbmode, Rsv5, 5, 3)
|
|
FldFunc(EncMx_EncMbmuxMbmode, SP8x8, 4, 1)
|
|
FldFunc(EncMx_EncMbmuxMbmode, MCPass1, 3, 1)
|
|
FldFunc(EncMx_EncMbmuxMbmode, MCPass0, 2, 1)
|
|
FldFunc(EncMx_EncMbmuxMbmode, SP16x16, 1, 1)
|
|
FldFunc(EncMx_EncMbmuxMbmode, SP4x4, 0, 1)
|
|
FldFunc(EncMx_EncMbmuxMbmode, Mode, 0, 5) // aggregated field
|
|
#else
|
|
FldFunc(EncMx_EncMbmuxMbmode, FrextMode, 31, 1)
|
|
FldFunc(EncMx_EncMbmuxMbmode, ModeEnb, 16, 4)
|
|
FldFunc(EncMx_EncMbmuxMbmode, Rdy, 8, 1)
|
|
FldFunc(EncMx_EncMbmuxMbmode, SwMode, 0, 4)
|
|
#endif
|
|
RegFunc(EncMbmux, 0x508000, EncMbmuxCbf, 0x8, EncMx_EncMbmuxCbf, 0x508008)
|
|
#ifdef VCMODS_REGMAP
|
|
FldFunc(EncMx_EncMbmuxCbf, UDC, 28, 4)
|
|
FldFunc(EncMx_EncMbmuxCbf, VDC, 24, 4)
|
|
FldFunc(EncMx_EncMbmuxCbf, ChromaDC, 24, 8) // aggregated field
|
|
FldFunc(EncMx_EncMbmuxCbf, UAC, 20, 4)
|
|
FldFunc(EncMx_EncMbmuxCbf, VAC, 16, 4)
|
|
FldFunc(EncMx_EncMbmuxCbf, ChromaAC, 16, 8) // aggregated field
|
|
FldFunc(EncMx_EncMbmuxCbf, Luma, 0, 16)
|
|
#else
|
|
FldFunc(EncMx_EncMbmuxCbf, Udc, 28, 4)
|
|
FldFunc(EncMx_EncMbmuxCbf, Vdc, 24, 4)
|
|
FldFunc(EncMx_EncMbmuxCbf, Uac, 20, 4)
|
|
FldFunc(EncMx_EncMbmuxCbf, Vac, 16, 4)
|
|
FldFunc(EncMx_EncMbmuxCbf, Luma, 0, 16)
|
|
#endif
|
|
RegFunc(EncMbmux, 0x508000, EncMbmuxFinalcoeffLuma, 0x400, EncMx_EncMbmuxFinalcoeffLuma, 0x508400)
|
|
FldFunc(EncMx_EncMbmuxFinalcoeffLuma, Coeff, 0, 32)
|
|
RegFunc(EncMbmux, 0x508000, EncMbmuxFinalcoeffCa, 0x600, EncMx_EncMbmuxFinalcoeffCa, 0x508600)
|
|
FldFunc(EncMx_EncMbmuxFinalcoeffCa, Coeff, 0, 32)
|
|
RegFunc(EncMbmux, 0x508000, EncMbmuxFinalcoeffCb, 0x680, EncMx_EncMbmuxFinalcoeffCb, 0x508680)
|
|
FldFunc(EncMx_EncMbmuxFinalcoeffCb, Coeff, 0, 32)
|
|
RegFunc(EncMbmux, 0x508000, EncMbmuxDeltarLuma, 0x400, EncMx_EncMbmuxDeltarLuma, 0x508400)
|
|
FldFunc(EncMx_EncMbmuxDeltarLuma, DeltaR, 0, 32)
|
|
RegFunc(EncMbmux, 0x508000, EncMbmuxDeltarCa, 0x600, EncMx_EncMbmuxDeltarCa, 0x508600)
|
|
FldFunc(EncMx_EncMbmuxDeltarCa, DeltaR, 0, 32)
|
|
RegFunc(EncMbmux, 0x508000, EncMbmuxDeltarCb, 0x680, EncMx_EncMbmuxDeltarCb, 0x508680)
|
|
FldFunc(EncMx_EncMbmuxDeltarCb, DeltaR, 0, 32)
|
|
|
|
RegAreaFunc(EncSg2Base, 0x5F0000, 0x5FFFFF)
|
|
|
|
#ifdef VCMODS_REGMAP
|
|
#if 1 // Moved mvd in verilog (for encoder only)
|
|
RegAreaFunc(EncSintBase, 0x008000, 0x0080FF)
|
|
RegFunc(EncSint, 0x008000, EncSintDmaAddr, 0x0, EncSt_EncSintDmaAddr, 0x008000)
|
|
FldFunc(EncSt_EncSintDmaAddr, Addr, 5, 27)
|
|
RegFunc(EncSint, 0x008000, EncSintDmaLen, 0x4, EncSt_EncSintDmaLen, 0x008004)
|
|
FldFunc(EncSt_EncSintDmaLen, Length, 5, 27)
|
|
RegFunc(EncSint, 0x008000, EncSintDmaBase, 0x8, EncSt_EncSintDmaBase, 0x008008)
|
|
FldFunc(EncSt_EncSintDmaBase, Base, 6, 26)
|
|
RegFunc(EncSint, 0x008000, EncSintDmaEnd, 0xC, EncSt_EncSintDmaEnd, 0x008080)
|
|
FldFunc(EncSt_EncSintDmaEnd, End, 6, 26)
|
|
RegFunc(EncSint, 0x008000, EncSintStrmPos, 0x10, EncSt_EncSintStrmPos, 0x008010)
|
|
FldFunc(EncSt_EncSintStrmPos, BitPos, 0, 32)
|
|
RegFunc(EncSint, 0x580000, EncSintStrmStat, 0x14, EncSt_EncSintStrmStat, 0x008014)
|
|
FldFunc(EncSt_EncSintStrmStat, Rst, 16, 1)
|
|
FldFunc(EncSt_EncSintStrmStat, Derr, 9, 1)
|
|
FldFunc(EncSt_EncSintStrmStat, Serr, 8, 1)
|
|
FldFunc(EncSt_EncSintStrmStat, Ccac, 6, 1)
|
|
FldFunc(EncSt_EncSintStrmStat, Vcac, 5, 1)
|
|
FldFunc(EncSt_EncSintStrmStat, Vact, 4, 1)
|
|
FldFunc(EncSt_EncSintStrmStat, Dact, 3, 1)
|
|
FldFunc(EncSt_EncSintStrmStat, Sact, 2, 1)
|
|
FldFunc(EncSt_EncSintStrmStat, Cact, 1, 1)
|
|
FldFunc(EncSt_EncSintStrmStat, Sval, 0, 1)
|
|
RegFunc(EncSint, 0x008000, EncSintIena, 0x18, EncSt_EncSintIena, 0x008018)
|
|
FldFunc(EncSt_EncSintIena, Derr, 9, 1)
|
|
FldFunc(EncSt_EncSintIena, Serr, 8, 1)
|
|
RegFunc(EncSint, 0x008000, EncSintStrmBits, 0x1C, EncSt_EncSintStrmBits, 0x00801c)
|
|
FldFunc(EncSt_EncSintStrmBits, StreamBits, 0, 32)
|
|
RegFunc(EncSint, 0x008000, EncSintGetSymb, 0x20, EncSt_EncSintGetSymb, 0x008020)
|
|
FldFunc(EncSt_EncSintGetSymb, Type, 12, 4)
|
|
FldFunc(EncSt_EncSintGetSymb, Subtype, 8, 4)
|
|
FldFunc(EncSt_EncSintGetSymb, N, 0, 8)
|
|
RegFunc(EncSint, 0x008000, EncSintVecMbtype, 0x24, EncSt_EncSintVecMbtype, 0x008030)
|
|
FldFunc(EncSt_EncSintVecMbtype, Submbtype3, 21, 4)
|
|
FldFunc(EncSt_EncSintVecMbtype, Submbtype2, 16, 4)
|
|
FldFunc(EncSt_EncSintVecMbtype, Submbtype1, 11, 4)
|
|
FldFunc(EncSt_EncSintVecMbtype, Submbtype0, 6, 4)
|
|
FldFunc(EncSt_EncSintVecMbtype, Mbtype, 1, 5)
|
|
FldFunc(EncSt_EncSintVecMbtype, Isb, 0, 1)
|
|
//RegFunc(EncSint, 0x008000, EncSintVecRegstart, 0x30, EncSt_EncSintVecRegstart, 0x008030)
|
|
RegFunc(EncSint, 0x008000, EncSintVecResid, 0x28, EncSt_EncSintVecResid, 0x008034)
|
|
FldFunc(EncSt_EncSintVecResid, YResidual, 16, 16)
|
|
FldFunc(EncSt_EncSintVecResid, XResidual, 0, 16)
|
|
//RegFunc(EncSint, 0x008000, EncSintVecDmode, 0x2C, EncSt_EncSintVecDmode, 0x00802c)
|
|
FldFunc(EncSt_EncSintVecDmode, Dmode, 0, 4)
|
|
//RegFunc(EncSint, 0x008000, EncSintVecTopLd, 0x30, EncSt_EncSintVecTopLd, 0x008030)
|
|
FldFunc(EncSt_EncSintVecTopLd, TopRow, 30, 2)
|
|
FldFunc(EncSt_EncSintVecTopLd, TtropOffset, 16, 8)
|
|
FldFunc(EncSt_EncSintVecTopLd, UrtOffset, 8, 8)
|
|
FldFunc(EncSt_EncSintVecTopLd, TopOffest, 0, 8)
|
|
RegFunc(EncSint, 0x008000, EncSintVecDoConst, 0x40, EncSt_EncSintVecDoConst, 0x008040)
|
|
FldFunc(EncSt_EncSintVecDoConst, Mvdiff, 9, 1)
|
|
FldFunc(EncSt_EncSintVecDoConst, Rolt, 8, 1)
|
|
FldFunc(EncSt_EncSintVecDoConst, Lcpy, 7, 1)
|
|
FldFunc(EncSt_EncSintVecDoConst, Ulfld, 6, 1)
|
|
FldFunc(EncSt_EncSintVecDoConst, Pskip, 5, 1)
|
|
FldFunc(EncSt_EncSintVecDoConst, Intra, 4, 1)
|
|
RegFunc(EncSint, 0x008000, EncSintVecMvdiff, 0x44, EncSt_EncSintVecMvdiff, 0x008044)
|
|
FldFunc(EncSt_EncSintVecMvdiff, V15, 31, 1)
|
|
FldFunc(EncSt_EncSintVecMvdiff, V14, 30, 1)
|
|
FldFunc(EncSt_EncSintVecMvdiff, V13, 29, 1)
|
|
FldFunc(EncSt_EncSintVecMvdiff, V12, 28, 1)
|
|
FldFunc(EncSt_EncSintVecMvdiff, V11, 27, 1)
|
|
FldFunc(EncSt_EncSintVecMvdiff, V10, 26, 1)
|
|
FldFunc(EncSt_EncSintVecMvdiff, V9, 25, 1)
|
|
FldFunc(EncSt_EncSintVecMvdiff, V8, 24, 1)
|
|
FldFunc(EncSt_EncSintVecMvdiff, V7, 23, 1)
|
|
FldFunc(EncSt_EncSintVecMvdiff, V6, 22, 1)
|
|
FldFunc(EncSt_EncSintVecMvdiff, V5, 21, 1)
|
|
FldFunc(EncSt_EncSintVecMvdiff, V4, 20, 1)
|
|
FldFunc(EncSt_EncSintVecMvdiff, V3, 19, 1)
|
|
FldFunc(EncSt_EncSintVecMvdiff, V2, 18, 1)
|
|
FldFunc(EncSt_EncSintVecMvdiff, V1, 17, 1)
|
|
FldFunc(EncSt_EncSintVecMvdiff, V0, 16, 1)
|
|
FldFunc(EncSt_EncSintVecMvdiff, H15, 15, 1)
|
|
FldFunc(EncSt_EncSintVecMvdiff, H14, 14, 1)
|
|
FldFunc(EncSt_EncSintVecMvdiff, H13, 13, 1)
|
|
FldFunc(EncSt_EncSintVecMvdiff, H12, 12, 1)
|
|
FldFunc(EncSt_EncSintVecMvdiff, H11, 11, 1)
|
|
FldFunc(EncSt_EncSintVecMvdiff, H10, 10, 1)
|
|
FldFunc(EncSt_EncSintVecMvdiff, H9, 9, 1)
|
|
FldFunc(EncSt_EncSintVecMvdiff, H8, 8, 1)
|
|
FldFunc(EncSt_EncSintVecMvdiff, H7, 7, 1)
|
|
FldFunc(EncSt_EncSintVecMvdiff, H6, 6, 1)
|
|
FldFunc(EncSt_EncSintVecMvdiff, H5, 5, 1)
|
|
FldFunc(EncSt_EncSintVecMvdiff, H4, 4, 1)
|
|
FldFunc(EncSt_EncSintVecMvdiff, H3, 3, 1)
|
|
FldFunc(EncSt_EncSintVecMvdiff, H2, 2, 1)
|
|
FldFunc(EncSt_EncSintVecMvdiff, H1, 1, 1)
|
|
FldFunc(EncSt_EncSintVecMvdiff, H0, 0, 1)
|
|
RegFunc(EncSint, 0x008000, EncSintVecRefidx, 0x48, EncSt_EncSintVecRefidx, 0x008048)
|
|
FldFunc(EncSt_EncSintVecRefidx, Refidx3, 24, 6)
|
|
FldFunc(EncSt_EncSintVecRefidx, Refidx2, 16, 6)
|
|
FldFunc(EncSt_EncSintVecRefidx, Refidx1, 8, 6)
|
|
FldFunc(EncSt_EncSintVecRefidx, Refidx0, 0, 6)
|
|
RegFunc(EncSint, 0x008000, EncSintVecTopref, 0x4C, EncSt_EncSintVecTopref, 0x00804c)
|
|
FldFunc(EncSt_EncSintVecTopref, L1refb1, 24, 8)
|
|
FldFunc(EncSt_EncSintVecTopref, L1refb0, 16, 8)
|
|
FldFunc(EncSt_EncSintVecTopref, L0refb1, 8, 8)
|
|
FldFunc(EncSt_EncSintVecTopref, L0refb0, 0, 8)
|
|
RegFunc(EncSint, 0x008000, EncSintVecToppic, 0x80, EncSt_EncSintVecToppic, 0x00805c)
|
|
FldFunc(EncSt_EncSintVecToppic, L1picb1, 24, 8)
|
|
FldFunc(EncSt_EncSintVecToppic, L1picb0, 16, 8)
|
|
FldFunc(EncSt_EncSintVecToppic, L0picb1, 8, 8)
|
|
FldFunc(EncSt_EncSintVecToppic, L0picb0, 0, 8)
|
|
RegFunc(EncSint, 0x008000, EncSintVecToptopref, 0x00, EncSt_EncSintVecToptopref, 0x008050)
|
|
FldFunc(EncSt_EncSintVecToptopref, L1picb1, 24, 8)
|
|
FldFunc(EncSt_EncSintVecToptopref, L0picb1, 8, 8)
|
|
RegFunc(EncSint, 0x008000, EncSintVecColType, 0x54, EncSt_EncSintVecColType, 0x008054)
|
|
FldFunc(EncSt_EncSintVecColType, Mbaff, 31, 1)
|
|
FldFunc(EncSt_EncSintVecColType, Tfld, 30, 1)
|
|
FldFunc(EncSt_EncSintVecColType, Field, 29, 1)
|
|
FldFunc(EncSt_EncSintVecColType, Sub3, 8, 2)
|
|
FldFunc(EncSt_EncSintVecColType, Sub2, 6, 2)
|
|
FldFunc(EncSt_EncSintVecColType, Sub1, 4, 2)
|
|
FldFunc(EncSt_EncSintVecColType, Sub0, 2, 2)
|
|
FldFunc(EncSt_EncSintVecColType, Type, 0, 2)
|
|
RegFunc(EncSint, 0x008000, EncSintVecColRefid, 0x58, EncSt_EncSintVecColRefid, 0x008058)
|
|
FldFunc(EncSt_EncSintVecColRefid, Refidx3, 24, 5)
|
|
FldFunc(EncSt_EncSintVecColRefid, Refidx2, 16, 5)
|
|
FldFunc(EncSt_EncSintVecColRefid, Refidx1, 8, 5)
|
|
FldFunc(EncSt_EncSintVecColRefid, Refidx0, 0, 5)
|
|
|
|
RegFunc(EncSint, 0x008000, EncSintVecRefpic, 0x64, EncSt_EncSintVecRefpic, 0x8064)
|
|
FldFunc(EncSt_EncSintVecRefpic, Hwimpiwt, 2, 1)
|
|
FldFunc(EncSt_EncSintVecRefpic, Userrev, 1, 1)
|
|
FldFunc(EncSt_EncSintVecRefpic, Ramsel, 0, 1)
|
|
|
|
RegFunc(EncSint, 0x580000, EncSintVecMvdFifo, 0x60, EncSt_EncSintVecMvdFifo, 0x806C)
|
|
RegFunc(EncSint, 0x008000, EncSintVecRegend, 0x7F, EncSt_EncSintVecRegend, 0x00807f)
|
|
|
|
RegFunc(EncSint, 0x580000, EncSintCtl, 0x80, EncSt_RegSintCtl, 0x8080)
|
|
FldFunc(EncSt_RegSintCtl, Vc1, 31, 1)
|
|
|
|
RegFunc(EncSint, 0x008000, EncSintOpicMemBase, 0xC0, EncSt_EncSintOpicMemBase, 0x80c0)
|
|
RegFunc(EncSint, 0x008000, EncSintOpicMemEnd, 0xFF, EncSt_EncSintOpicMemEnd, 0x80ff)
|
|
|
|
RegFunc(EncSint, 0x008000, EncSintVecMemBase, 0x100, EncSt_EncSintVecMemBase, 0x008100)
|
|
FldFunc(EncSt_EncSintVecMemBase, VectorYDelta, 16, 16)
|
|
FldFunc(EncSt_EncSintVecMemBase, VectorXDelta, 0, 16)
|
|
RegFunc(EncSint, 0x008000, EncSintVecMemEnd, 0x1FF, EncSt_EncSintVecMemEnd, 0x0081ff)
|
|
#endif
|
|
#endif
|
|
|
|
RegAreaFunc(EncReconBase, 0x503000, 0x503FFF)
|
|
RegFunc(EncRecon, 0x503000, EncReconMbaddr, 0x0, EncRn_EncReconMbaddr, 0x503000)
|
|
FldFunc(EncRn_EncReconMbaddr, YPos, 8, 8)
|
|
FldFunc(EncRn_EncReconMbaddr, XPos, 0, 8)
|
|
RegFunc(EncRecon, 0x503000, EncReconDone, 0x4, EncRn_EncReconDone, 0x503004)
|
|
#ifdef VCMODS_REGMAP
|
|
|
|
FldFunc(EncRn_EncReconDone, Rsv1, 1, 31)
|
|
FldFunc(EncRn_EncReconDone, Done, 0, 1)
|
|
#else
|
|
FldFunc(EncRn_EncReconDone, Done, 0, 1)
|
|
#endif
|
|
|
|
// On final chips always have shared deblocker nowadays.
|
|
#define VCMODS_SHAREDDEBLOCKER
|
|
#ifdef VCMODS_SHAREDDEBLOCKER
|
|
|
|
RegAreaFunc(EncDblkBase, 0x00720, 0x0073F)
|
|
RegFunc(EncDblk, 0x00720, RegDblkCtl, 0x0, EncDk_RegDblkCtl, 0x00720)
|
|
#ifdef VCMODS_REGMAP
|
|
FldFunc(EncDk_RegDblkCtl, Rsv8, 8, 24)
|
|
FldFunc(EncDk_RegDblkCtl, H2648x8, 7, 1)
|
|
FldFunc(EncDk_RegDblkCtl, Rsv6, 6, 1)
|
|
FldFunc(EncDk_RegDblkCtl, IsLast, 5, 1)
|
|
FldFunc(EncDk_RegDblkCtl, IsIntra, 4, 1)
|
|
FldFunc(EncDk_RegDblkCtl, FLeft, 3, 1)
|
|
FldFunc(EncDk_RegDblkCtl, FTop, 2, 1)
|
|
FldFunc(EncDk_RegDblkCtl, FInt, 1, 1)
|
|
FldFunc(EncDk_RegDblkCtl, CES, 0, 1)
|
|
#else
|
|
FldFunc(EncDk_RegDblkCtl, Mpeg, 8, 1)
|
|
FldFunc(EncDk_RegDblkCtl, H2648x8, 7, 1)
|
|
FldFunc(EncDk_RegDblkCtl, Mono, 6, 1)
|
|
FldFunc(EncDk_RegDblkCtl, IsLast, 5, 1)
|
|
FldFunc(EncDk_RegDblkCtl, Intra, 4, 1)
|
|
FldFunc(EncDk_RegDblkCtl, Fleft, 3, 1)
|
|
FldFunc(EncDk_RegDblkCtl, Ftop, 2, 1)
|
|
FldFunc(EncDk_RegDblkCtl, Fint, 1, 1)
|
|
FldFunc(EncDk_RegDblkCtl, Ces, 0, 1)
|
|
#endif
|
|
RegFunc(EncDblk, 0x00720, RegDblkOut, 0x4, EncDk_RegDblkOut, 0x00724)
|
|
FldFunc(EncDk_RegDblkOut, Out2, 16, 1)
|
|
FldFunc(EncDk_RegDblkOut, Picnum2, 8, 8)
|
|
FldFunc(EncDk_RegDblkOut, Picnum, 0, 8)
|
|
RegFunc(EncDblk, 0x00720, RegOlapXform, 0x8, EncDk_RegOlapXform, 0x00728)
|
|
FldFunc(EncDk_RegOlapXform, Topvintra, 29, 1)
|
|
FldFunc(EncDk_RegOlapXform, Topuintra, 28, 1)
|
|
FldFunc(EncDk_RegOlapXform, Toplintra, 24, 4)
|
|
FldFunc(EncDk_RegOlapXform, Vintra, 21, 1)
|
|
FldFunc(EncDk_RegOlapXform, Uintra, 20, 1)
|
|
FldFunc(EncDk_RegOlapXform, Lumaintra, 16, 4)
|
|
FldFunc(EncDk_RegOlapXform, Vv, 11, 1)
|
|
FldFunc(EncDk_RegOlapXform, Vh, 10, 1)
|
|
FldFunc(EncDk_RegOlapXform, Uv, 9, 1)
|
|
FldFunc(EncDk_RegOlapXform, Uh, 8, 1)
|
|
FldFunc(EncDk_RegOlapXform, Lumavert, 4, 4)
|
|
FldFunc(EncDk_RegOlapXform, Lumahoriz, 0, 4)
|
|
RegFunc(EncDblk, 0x00720, RegDblkQnt, 0xC, EncDk_RegDblkQnt, 0x0072c)
|
|
#ifdef VCMODS_REGMAP
|
|
FldFunc(EncDk_RegDblkQnt, Rsv24, 24, 8)
|
|
FldFunc(EncDk_RegDblkQnt, QpyTopTop, 16, 8)
|
|
FldFunc(EncDk_RegDblkQnt, QpyTop, 8, 8)
|
|
FldFunc(EncDk_RegDblkQnt, Qpy, 0, 8)
|
|
#else
|
|
FldFunc(EncDk_RegDblkQnt, Opvtoptop, 16, 8)
|
|
FldFunc(EncDk_RegDblkQnt, Opvtop, 8, 8)
|
|
FldFunc(EncDk_RegDblkQnt, Opv, 0, 8)
|
|
#endif
|
|
RegFunc(EncDblk, 0x00720, RegDblkOffset, 0x10, EncDk_RegDblkOffset, 0x00730)
|
|
FldFunc(EncDk_RegDblkOffset, Offsetb, 8, 8)
|
|
FldFunc(EncDk_RegDblkOffset, Offseta, 0, 8)
|
|
RegFunc(EncDblk, 0x00720, RegDblkTopCtx, 0x14, EncDk_RegDblkTopCtx, 0x00734)
|
|
#ifdef VCMODS_REGMAP
|
|
FldFunc(EncDk_RegDblkTopCtx, Rsv22, 22, 10)
|
|
FldFunc(EncDk_RegDblkTopCtx, TB15, 21, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, TB14, 20, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, TB11, 19, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, TB10, 18, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, Rcv17, 17, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, TIsIntra, 16, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, Rsv6, 6, 10)
|
|
FldFunc(EncDk_RegDblkTopCtx, B15, 5, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, B14, 4, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, B11, 3, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, B10, 2, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, IsField, 1, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, IsIntra, 0, 1)
|
|
#else
|
|
FldFunc(EncDk_RegDblkTopCtx, Tb15, 21, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, Tb14, 20, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, Tb11, 19, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, Tb10, 18, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, Tintra, 16, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, B15, 5, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, B14, 4, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, B11, 3, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, B10, 2, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, Field, 1, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, Intra, 0, 1)
|
|
#endif
|
|
RegFunc(EncDblk, 0x00720, RegDblkXzero, 0x18, EncDk_RegDblkXzero, 0x00738)
|
|
FldFunc(EncDk_RegDblkXzero, B15, 15, 1)
|
|
FldFunc(EncDk_RegDblkXzero, B14, 14, 1)
|
|
FldFunc(EncDk_RegDblkXzero, B13, 13, 1)
|
|
FldFunc(EncDk_RegDblkXzero, B12, 12, 1)
|
|
FldFunc(EncDk_RegDblkXzero, B11, 11, 1)
|
|
FldFunc(EncDk_RegDblkXzero, B10, 10, 1)
|
|
FldFunc(EncDk_RegDblkXzero, B9, 9, 1)
|
|
FldFunc(EncDk_RegDblkXzero, B8, 8, 1)
|
|
FldFunc(EncDk_RegDblkXzero, B7, 7, 1)
|
|
FldFunc(EncDk_RegDblkXzero, B6, 6, 1)
|
|
FldFunc(EncDk_RegDblkXzero, B5, 5, 1)
|
|
FldFunc(EncDk_RegDblkXzero, B4, 4, 1)
|
|
FldFunc(EncDk_RegDblkXzero, B3, 3, 1)
|
|
FldFunc(EncDk_RegDblkXzero, B2, 2, 1)
|
|
FldFunc(EncDk_RegDblkXzero, B1, 1, 1)
|
|
FldFunc(EncDk_RegDblkXzero, B0, 0, 1)
|
|
RegFunc(EncDblk, 0x00720, RegDblkMvdiff, 0x1C, EncDk_RegDblkMvdiff, 0x0073c)
|
|
FldFunc(EncDk_RegDblkMvdiff, V15, 31, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, V14, 30, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, V13, 29, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, V12, 28, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, V11, 27, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, V10, 26, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, V9, 25, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, V8, 24, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, V7, 23, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, V6, 22, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, V5, 21, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, V4, 20, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, V3, 19, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, V2, 18, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, V1, 17, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, V0, 16, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, H15, 15, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, H14, 14, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, H13, 13, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, H12, 12, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, H11, 11, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, H10, 10, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, H9, 9, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, H8, 8, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, H7, 7, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, H6, 6, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, H5, 5, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, H4, 4, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, H3, 3, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, H2, 2, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, H1, 1, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, H0, 0, 1)
|
|
|
|
RegAreaFunc(EncMbCtlBase, 0x000740, 0x00075F)
|
|
RegFunc(EncMbCtl, 0x000740, RegMbCtl, 0x0, EncMCl_RegMbCtl, 0x000740)
|
|
#ifdef VCMODS_REGMAP
|
|
FldFunc(EncMCl_RegMbCtl, Rsv18, 19, 13)
|
|
FldFunc(EncMCl_RegMbCtl, MBAFF, 18, 1)
|
|
FldFunc(EncMCl_RegMbCtl, TopField, 17, 1)
|
|
FldFunc(EncMCl_RegMbCtl, FieldMode, 16, 1)
|
|
FldFunc(EncMCl_RegMbCtl, Rsv15, 15, 1)
|
|
FldFunc(EncMCl_RegMbCtl, YDestMB, 8, 7)
|
|
FldFunc(EncMCl_RegMbCtl, Rsv7, 7, 1)
|
|
FldFunc(EncMCl_RegMbCtl, XDestMB, 0, 7)
|
|
#else
|
|
FldFunc(EncMCl_RegMbCtl, Fcm, 26, 2)
|
|
FldFunc(EncMCl_RegMbCtl, Type, 24, 2)
|
|
FldFunc(EncMCl_RegMbCtl, Mbaff, 18, 1)
|
|
FldFunc(EncMCl_RegMbCtl, Top, 17, 1)
|
|
FldFunc(EncMCl_RegMbCtl, Fld, 16, 1)
|
|
FldFunc(EncMCl_RegMbCtl, Ydestmb, 8, 7)
|
|
FldFunc(EncMCl_RegMbCtl, Rv, 7, 1)
|
|
FldFunc(EncMCl_RegMbCtl, Xdestmb, 0, 7)
|
|
#endif
|
|
|
|
|
|
|
|
#else
|
|
|
|
//#error Separate deblockers, probably wrong
|
|
|
|
RegAreaFunc(EncDblkBase, 0x500720, 0x50073F)
|
|
RegFunc(EncDblk, 0x500720, RegDblkCtl, 0x0, EncDk_RegDblkCtl, 0x500720)
|
|
#ifdef VCMODS_REGMAP
|
|
FldFunc(EncDk_RegDblkCtl, Rsv8, 8, 24)
|
|
FldFunc(EncDk_RegDblkCtl, H2648x8, 7, 1)
|
|
FldFunc(EncDk_RegDblkCtl, Rsv6, 6, 1)
|
|
FldFunc(EncDk_RegDblkCtl, IsLast, 5, 1)
|
|
FldFunc(EncDk_RegDblkCtl, IsIntra, 4, 1)
|
|
FldFunc(EncDk_RegDblkCtl, FLeft, 3, 1)
|
|
FldFunc(EncDk_RegDblkCtl, FTop, 2, 1)
|
|
FldFunc(EncDk_RegDblkCtl, FInt, 1, 1)
|
|
FldFunc(EncDk_RegDblkCtl, CES, 0, 1)
|
|
#else
|
|
FldFunc(EncDk_RegDblkCtl, Mpeg, 8, 1)
|
|
FldFunc(EncDk_RegDblkCtl, H2648x8, 7, 1)
|
|
FldFunc(EncDk_RegDblkCtl, Mono, 6, 1)
|
|
FldFunc(EncDk_RegDblkCtl, IsLast, 5, 1)
|
|
FldFunc(EncDk_RegDblkCtl, Intra, 4, 1)
|
|
FldFunc(EncDk_RegDblkCtl, Fleft, 3, 1)
|
|
FldFunc(EncDk_RegDblkCtl, Ftop, 2, 1)
|
|
FldFunc(EncDk_RegDblkCtl, Fint, 1, 1)
|
|
FldFunc(EncDk_RegDblkCtl, Ces, 0, 1)
|
|
#endif
|
|
RegFunc(EncDblk, 0x500720, RegDblkOut, 0x4, EncDk_RegDblkOut, 0x500724)
|
|
FldFunc(EncDk_RegDblkOut, Out2, 16, 1)
|
|
FldFunc(EncDk_RegDblkOut, Picnum2, 8, 8)
|
|
FldFunc(EncDk_RegDblkOut, Picnum, 0, 8)
|
|
RegFunc(EncDblk, 0x500720, RegOlapXform, 0x8, EncDk_RegOlapXform, 0x500728)
|
|
FldFunc(EncDk_RegOlapXform, Topvintra, 29, 1)
|
|
FldFunc(EncDk_RegOlapXform, Topuintra, 28, 1)
|
|
FldFunc(EncDk_RegOlapXform, Toplintra, 24, 4)
|
|
FldFunc(EncDk_RegOlapXform, Vintra, 21, 1)
|
|
FldFunc(EncDk_RegOlapXform, Uintra, 20, 1)
|
|
FldFunc(EncDk_RegOlapXform, Lumaintra, 16, 4)
|
|
FldFunc(EncDk_RegOlapXform, Vv, 11, 1)
|
|
FldFunc(EncDk_RegOlapXform, Vh, 10, 1)
|
|
FldFunc(EncDk_RegOlapXform, Uv, 9, 1)
|
|
FldFunc(EncDk_RegOlapXform, Uh, 8, 1)
|
|
FldFunc(EncDk_RegOlapXform, Lumavert, 4, 4)
|
|
FldFunc(EncDk_RegOlapXform, Lumahoriz, 0, 4)
|
|
RegFunc(EncDblk, 0x500720, RegDblkQnt, 0xC, EncDk_RegDblkQnt, 0x50072c)
|
|
#ifdef VCMODS_REGMAP
|
|
FldFunc(EncDk_RegDblkQnt, Rsv24, 24, 8)
|
|
FldFunc(EncDk_RegDblkQnt, QpyTopTop, 16, 8)
|
|
FldFunc(EncDk_RegDblkQnt, QpyTop, 8, 8)
|
|
FldFunc(EncDk_RegDblkQnt, Qpy, 0, 8)
|
|
#else
|
|
FldFunc(EncDk_RegDblkQnt, Opvtoptop, 16, 8)
|
|
FldFunc(EncDk_RegDblkQnt, Opvtop, 8, 8)
|
|
FldFunc(EncDk_RegDblkQnt, Opv, 0, 8)
|
|
#endif
|
|
RegFunc(EncDblk, 0x500720, RegDblkOffset, 0x10, EncDk_RegDblkOffset, 0x500730)
|
|
FldFunc(EncDk_RegDblkOffset, Offsetb, 8, 8)
|
|
FldFunc(EncDk_RegDblkOffset, Offseta, 0, 8)
|
|
RegFunc(EncDblk, 0x500720, RegDblkTopCtx, 0x14, EncDk_RegDblkTopCtx, 0x500734)
|
|
#ifdef VCMODS_REGMAP
|
|
FldFunc(EncDk_RegDblkTopCtx, Rsv22, 22, 10)
|
|
FldFunc(EncDk_RegDblkTopCtx, TB15, 21, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, TB14, 20, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, TB11, 19, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, TB10, 18, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, Rcv17, 17, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, TIsIntra, 16, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, Rsv6, 6, 10)
|
|
FldFunc(EncDk_RegDblkTopCtx, B15, 5, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, B14, 4, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, B11, 3, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, B10, 2, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, IsField, 1, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, IsIntra, 0, 1)
|
|
#else
|
|
FldFunc(EncDk_RegDblkTopCtx, Tb15, 21, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, Tb14, 20, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, Tb11, 19, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, Tb10, 18, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, Tintra, 16, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, B15, 5, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, B14, 4, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, B11, 3, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, B10, 2, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, Field, 1, 1)
|
|
FldFunc(EncDk_RegDblkTopCtx, Intra, 0, 1)
|
|
#endif
|
|
RegFunc(EncDblk, 0x500720, RegDblkXzero, 0x18, EncDk_RegDblkXzero, 0x500738)
|
|
FldFunc(EncDk_RegDblkXzero, B15, 15, 1)
|
|
FldFunc(EncDk_RegDblkXzero, B14, 14, 1)
|
|
FldFunc(EncDk_RegDblkXzero, B13, 13, 1)
|
|
FldFunc(EncDk_RegDblkXzero, B12, 12, 1)
|
|
FldFunc(EncDk_RegDblkXzero, B11, 11, 1)
|
|
FldFunc(EncDk_RegDblkXzero, B10, 10, 1)
|
|
FldFunc(EncDk_RegDblkXzero, B9, 9, 1)
|
|
FldFunc(EncDk_RegDblkXzero, B8, 8, 1)
|
|
FldFunc(EncDk_RegDblkXzero, B7, 7, 1)
|
|
FldFunc(EncDk_RegDblkXzero, B6, 6, 1)
|
|
FldFunc(EncDk_RegDblkXzero, B5, 5, 1)
|
|
FldFunc(EncDk_RegDblkXzero, B4, 4, 1)
|
|
FldFunc(EncDk_RegDblkXzero, B3, 3, 1)
|
|
FldFunc(EncDk_RegDblkXzero, B2, 2, 1)
|
|
FldFunc(EncDk_RegDblkXzero, B1, 1, 1)
|
|
FldFunc(EncDk_RegDblkXzero, B0, 0, 1)
|
|
RegFunc(EncDblk, 0x500720, RegDblkMvdiff, 0x1C, EncDk_RegDblkMvdiff, 0x50073c)
|
|
FldFunc(EncDk_RegDblkMvdiff, V15, 31, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, V14, 30, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, V13, 29, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, V12, 28, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, V11, 27, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, V10, 26, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, V9, 25, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, V8, 24, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, V7, 23, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, V6, 22, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, V5, 21, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, V4, 20, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, V3, 19, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, V2, 18, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, V1, 17, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, V0, 16, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, H15, 15, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, H14, 14, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, H13, 13, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, H12, 12, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, H11, 11, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, H10, 10, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, H9, 9, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, H8, 8, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, H7, 7, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, H6, 6, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, H5, 5, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, H4, 4, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, H3, 3, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, H2, 2, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, H1, 1, 1)
|
|
FldFunc(EncDk_RegDblkMvdiff, H0, 0, 1)
|
|
|
|
RegAreaFunc(EncMbCtlBase, 0x500740, 0x50075F)
|
|
RegFunc(EncMbCtl, 0x500740, RegMbCtl, 0x0, EncMCl_RegMbCtl, 0x500740)
|
|
#ifdef VCMODS_REGMAP
|
|
FldFunc(EncMCl_RegMbCtl, Rsv18, 19, 13)
|
|
FldFunc(EncMCl_RegMbCtl, MBAFF, 18, 1)
|
|
FldFunc(EncMCl_RegMbCtl, TopField, 17, 1)
|
|
FldFunc(EncMCl_RegMbCtl, FieldMode, 16, 1)
|
|
FldFunc(EncMCl_RegMbCtl, Rsv15, 15, 1)
|
|
FldFunc(EncMCl_RegMbCtl, YDestMB, 8, 7)
|
|
FldFunc(EncMCl_RegMbCtl, Rsv7, 7, 1)
|
|
FldFunc(EncMCl_RegMbCtl, XDestMB, 0, 7)
|
|
#else
|
|
FldFunc(EncMCl_RegMbCtl, Fcm, 26, 2)
|
|
FldFunc(EncMCl_RegMbCtl, Type, 24, 2)
|
|
FldFunc(EncMCl_RegMbCtl, Mbaff, 18, 1)
|
|
FldFunc(EncMCl_RegMbCtl, Top, 17, 1)
|
|
FldFunc(EncMCl_RegMbCtl, Fld, 16, 1)
|
|
FldFunc(EncMCl_RegMbCtl, Ydestmb, 8, 7)
|
|
FldFunc(EncMCl_RegMbCtl, Rv, 7, 1)
|
|
FldFunc(EncMCl_RegMbCtl, Xdestmb, 0, 7)
|
|
#endif
|
|
|
|
#endif
|
|
|
|
|
|
|
|
RegAreaFunc(EncCmbBase, 0x505000, 0x505FFF)
|
|
RegFunc(EncCmb, 0x505000, EncCmbMbaddr, 0x0, EncCb_EncCmbMbaddr, 0x505000)
|
|
#ifdef VCMODS_REGMAP
|
|
FldFunc(EncCb_EncCmbMbaddr, YPos, 8, 8)
|
|
FldFunc(EncCb_EncCmbMbaddr, XPos, 0, 8)
|
|
#else
|
|
FldFunc(EncCb_EncCmbMbaddr, Ypos, 8, 8)
|
|
FldFunc(EncCb_EncCmbMbaddr, Xpos, 0, 8)
|
|
#endif
|
|
RegFunc(EncCmb, 0x505000, EncCmbPict, 0x4, EncCb_EncCmbPict, 0x505004)
|
|
FldFunc(EncCb_EncCmbPict, BotField, 9, 1)
|
|
FldFunc(EncCb_EncCmbPict, TopField, 8, 1)
|
|
FldFunc(EncCb_EncCmbPict, Pict, 0, 8)
|
|
RegFunc(EncCmb, 0x505000, EncCmbDone, 0x8, EncCb_EncCmbDone, 0x505008)
|
|
FldFunc(EncCb_EncCmbDone, Done, 0, 1)
|
|
RegFunc(EncCmb, 0x505000, EncCmbTrafficKnob, 0x10, EncCb_EncCmbTrafficKnob, 0x505010)
|
|
FldFunc(EncCb_EncCmbTrafficKnob, NumCycles, 0, 32)
|
|
RegFunc(EncCmb, 0x505000, EncCmbLuma, 0x200, EncCb_EncCmbLuma, 0x505200)
|
|
RegFunc(EncCmb, 0x505000, EncCmbCa, 0x300, EncCb_EncCmbCa, 0x505300)
|
|
RegFunc(EncCmb, 0x505000, EncCmbCb, 0x340, EncCb_EncCmbCb, 0x505340)
|
|
|
|
RegAreaFunc(EncMvdBase, 0x50C000, 0x50C0FF)
|
|
|
|
RegAreaFunc(EncIframeCtlBase, 0x500100, 0x5001FF)
|
|
RegFunc(EncIframeCtl, 0x500100, EncIframeCtl, 0x0, EncICl_EncIframeCtl, 0x500100)
|
|
#ifdef VCMODS_REGMAP
|
|
FldFunc(EncICl_EncIframeCtl, DBReady, 30, 1) // read-only
|
|
FldFunc(EncICl_EncIframeCtl, Rsv27, 27, 3)
|
|
FldFunc(EncICl_EncIframeCtl, ImgHeight, 16, 11) // write_only
|
|
FldFunc(EncICl_EncIframeCtl, Rsv11, 11, 5)
|
|
FldFunc(EncICl_EncIframeCtl, ImgWidth, 0, 11) // write-only
|
|
#else
|
|
FldFunc(EncICl_EncIframeCtl, EncStd, 27, 3)
|
|
FldFunc(EncICl_EncIframeCtl, Lines, 16, 11)
|
|
FldFunc(EncICl_EncIframeCtl, Width, 0, 11)
|
|
#endif
|
|
RegFunc(EncIframeCtl, 0x500100, EncIframeMpeg, 0x4, EncICl_EncIframeMpeg, 0x500104)
|
|
FldFunc(EncICl_EncIframeMpeg, CmbMpegMode, 2, 1)
|
|
FldFunc(EncICl_EncIframeMpeg, ReconMpegMode, 1, 1)
|
|
FldFunc(EncICl_EncIframeMpeg, MpegMode, 0, 1)
|
|
|
|
RegAreaFunc(EncSe2binBase, 0x500E00, 0x500E7F)
|
|
RegFunc(EncSe2bin, 0x500E00, EncSe2binPutsym, 0x0, EncSn_EncSe2binPutsym, 0x500e00)
|
|
#ifdef VCMODS_REGMAP
|
|
FldFunc(EncSn_EncSe2binPutsym, Rsv16, 16, 16)
|
|
FldFunc(EncSn_EncSe2binPutsym, Type, 12, 4)
|
|
FldFunc(EncSn_EncSe2binPutsym, SubType, 8, 4)
|
|
FldFunc(EncSn_EncSe2binPutsym, N, 0, 8)
|
|
#else
|
|
FldFunc(EncSn_EncSe2binPutsym, Type, 12, 4)
|
|
FldFunc(EncSn_EncSe2binPutsym, SubType, 7, 5)
|
|
FldFunc(EncSn_EncSe2binPutsym, N, 0, 7)
|
|
#endif
|
|
RegFunc(EncSe2bin, 0x500E00, EncSe2binSymbol, 0x4, EncSn_EncSe2binSymbol, 0x500e04)
|
|
FldFunc(EncSn_EncSe2binSymbol, Symbol, 0, 32)
|
|
RegFunc(EncSe2bin, 0x500E00, EncSe2binBufAddr, 0x8, EncSn_EncSe2binBufAddr, 0x500e08)
|
|
FldFunc(EncSn_EncSe2binBufAddr, BufferAddress, 0, 32)
|
|
RegFunc(EncSe2bin, 0x500E00, EncSe2binBufStartAddr, 0xC, EncSn_EncSe2binBufStartAddr, 0x500e0c)
|
|
FldFunc(EncSn_EncSe2binBufStartAddr, BufferStartAddress, 0, 32)
|
|
RegFunc(EncSe2bin, 0x500E00, EncSe2binBufEndAddr, 0x10, EncSn_EncSe2binBufEndAddr, 0x500e10)
|
|
FldFunc(EncSn_EncSe2binBufEndAddr, BufferEndAddress, 0, 32)
|
|
RegFunc(EncSe2bin, 0x500E00, EncSe2binBufMarkAddr, 0x14, EncSn_EncSe2binBufMarkAddr, 0x500e14)
|
|
FldFunc(EncSn_EncSe2binBufMarkAddr, BufferMarkAddress, 0, 32)
|
|
RegFunc(EncSe2bin, 0x500E00, EncSe2binDoResid, 0x18, EncSn_EncSe2binDoResid, 0x500e18)
|
|
#ifdef VCMODS_REGMAP
|
|
FldFunc(EncSn_EncSe2binDoResid, Rsv17, 17, 15)
|
|
FldFunc(EncSn_EncSe2binDoResid, I8x8, 16, 1)
|
|
FldFunc(EncSn_EncSe2binDoResid, Type, 14, 2)
|
|
FldFunc(EncSn_EncSe2binDoResid, Rsv10, 10, 4)
|
|
FldFunc(EncSn_EncSe2binDoResid, TopAvail, 9, 1)
|
|
FldFunc(EncSn_EncSe2binDoResid, LeftAvail, 8, 1)
|
|
FldFunc(EncSn_EncSe2binDoResid, Busy, 7, 1)
|
|
FldFunc(EncSn_EncSe2binDoResid, I16, 6, 1)
|
|
FldFunc(EncSn_EncSe2binDoResid, CBP, 0, 6)
|
|
FldFunc(EncSn_EncSe2binDoResid, CbpChr, 4, 2)
|
|
FldFunc(EncSn_EncSe2binDoResid, CbpLum, 0, 4)
|
|
#else
|
|
FldFunc(EncSn_EncSe2binDoResid, Type, 14, 2)
|
|
FldFunc(EncSn_EncSe2binDoResid, Busy, 7, 1)
|
|
FldFunc(EncSn_EncSe2binDoResid, I16, 6, 1)
|
|
FldFunc(EncSn_EncSe2binDoResid, Cbp, 0, 6)
|
|
#endif
|
|
RegFunc(EncSe2bin, 0x500E00, EncSe2binBufStallCount, 0x1C, EncSn_EncSe2binBufStallCount, 0x500e1c)
|
|
RegFunc(EncSe2bin, 0x500E00, EncSe2binBufBitsWritten, 0x20, EncSn_EncSe2binBufBitsWritten, 0x500e20)
|
|
RegFunc(EncSe2bin, 0x500E00, EncSe2binTopCtx, 0x24, EncSn_EncSe2binTopCtx, 0x500e24)
|
|
#ifdef VCMODS_REGMAP
|
|
RegFunc(EncSe2bin, 0x500E00, EncSe2binFastputsym, 0x28, EncSn_EncSe2binFastputsym, 0x500e28)
|
|
FldFunc(EncSn_EncSe2binFastputsym, Type, 28, 4)
|
|
FldFunc(EncSn_EncSe2binFastputsym, SubType, 25, 3)
|
|
FldFunc(EncSn_EncSe2binFastputsym, N, 19, 6)
|
|
FldFunc(EncSn_EncSe2binFastputsym, Symbol, 0, 19)
|
|
#endif
|
|
|
|
RegAreaFunc(EncMidCpuregsBase, 0x500F00, 0x500F7F)
|
|
RegFunc(EncMidCpuregs, 0x500F00, RegHst2cpuMbx, 0x0, EncMCs_RegHst2cpuMbx, 0x500f00)
|
|
FldFunc(EncMCs_RegHst2cpuMbx, Value, 0, 32)
|
|
RegFunc(EncMidCpuregs, 0x500F00, RegCpu2hstMbx, 0x4, EncMCs_RegCpu2hstMbx, 0x500f04)
|
|
FldFunc(EncMCs_RegCpu2hstMbx, Value, 0, 32)
|
|
RegFunc(EncMidCpuregs, 0x500F00, RegMbxStat, 0x8, EncMCs_RegMbxStat, 0x500f08)
|
|
RegFunc(EncMidCpuregs, 0x500F00, RegCpuIntBase, 0xC, EncMCs_RegCpuIntBase, 0x500f0c)
|
|
FldFunc(EncMCs_RegCpuIntBase, Addr, 8, 24)
|
|
RegFunc(EncMidCpuregs, 0x500F00, RegCpuIntEna, 0x10, EncMCs_RegCpuIntEna, 0x500f10)
|
|
FldFunc(EncMCs_RegCpuIntEna, Mbx, 31, 1)
|
|
FldFunc(EncMCs_RegCpuIntEna, Com7, 23, 1)
|
|
FldFunc(EncMCs_RegCpuIntEna, Com6, 22, 1)
|
|
FldFunc(EncMCs_RegCpuIntEna, Com5, 21, 1)
|
|
FldFunc(EncMCs_RegCpuIntEna, Com4, 20, 1)
|
|
FldFunc(EncMCs_RegCpuIntEna, Com3, 19, 1)
|
|
FldFunc(EncMCs_RegCpuIntEna, Com2, 18, 1)
|
|
FldFunc(EncMCs_RegCpuIntEna, Com1, 17, 1)
|
|
FldFunc(EncMCs_RegCpuIntEna, Com0, 16, 1)
|
|
FldFunc(EncMCs_RegCpuIntEna, Hw7, 15, 1)
|
|
FldFunc(EncMCs_RegCpuIntEna, Hw6, 14, 1)
|
|
FldFunc(EncMCs_RegCpuIntEna, Hw5, 13, 1)
|
|
FldFunc(EncMCs_RegCpuIntEna, Hw4, 12, 1)
|
|
FldFunc(EncMCs_RegCpuIntEna, Hw3, 11, 1)
|
|
FldFunc(EncMCs_RegCpuIntEna, Hw2, 10, 1)
|
|
FldFunc(EncMCs_RegCpuIntEna, Hw1, 9, 1)
|
|
FldFunc(EncMCs_RegCpuIntEna, Hw0, 8, 1)
|
|
FldFunc(EncMCs_RegCpuIntEna, Db7, 7, 1)
|
|
FldFunc(EncMCs_RegCpuIntEna, Db6, 6, 1)
|
|
FldFunc(EncMCs_RegCpuIntEna, Db5, 5, 1)
|
|
FldFunc(EncMCs_RegCpuIntEna, Db4, 4, 1)
|
|
FldFunc(EncMCs_RegCpuIntEna, Db3, 3, 1)
|
|
FldFunc(EncMCs_RegCpuIntEna, Db2, 2, 1)
|
|
FldFunc(EncMCs_RegCpuIntEna, Db1, 1, 1)
|
|
FldFunc(EncMCs_RegCpuIntEna, Db0, 0, 1)
|
|
RegFunc(EncMidCpuregs, 0x500F00, StreamCpuIntEna, 0x10, EncMCs_StreamCpuIntEna, 0x500f10)
|
|
FldFunc(EncMCs_StreamCpuIntEna, Mbx, 31, 1)
|
|
FldFunc(EncMCs_StreamCpuIntEna, Dec, 18, 1)
|
|
FldFunc(EncMCs_StreamCpuIntEna, Aud, 17, 1)
|
|
FldFunc(EncMCs_StreamCpuIntEna, M2m, 15, 1)
|
|
FldFunc(EncMCs_StreamCpuIntEna, Pci, 14, 1)
|
|
FldFunc(EncMCs_StreamCpuIntEna, Ts1, 13, 1)
|
|
FldFunc(EncMCs_StreamCpuIntEna, Ts0, 12, 1)
|
|
FldFunc(EncMCs_StreamCpuIntEna, GpioHi, 11, 1)
|
|
FldFunc(EncMCs_StreamCpuIntEna, GpioLo, 10, 1)
|
|
FldFunc(EncMCs_StreamCpuIntEna, Vpp1, 9, 1)
|
|
FldFunc(EncMCs_StreamCpuIntEna, Vpp0, 8, 1)
|
|
FldFunc(EncMCs_StreamCpuIntEna, Rb, 1, 1)
|
|
FldFunc(EncMCs_StreamCpuIntEna, Sd, 0, 1)
|
|
RegFunc(EncMidCpuregs, 0x500F00, Dec0CpuIntEna, 0x10, EncMCs_Dec0CpuIntEna, 0x500f10)
|
|
FldFunc(EncMCs_Dec0CpuIntEna, Mbx, 31, 1)
|
|
FldFunc(EncMCs_Dec0CpuIntEna, Dec, 16, 1)
|
|
FldFunc(EncMCs_Dec0CpuIntEna, Si, 8, 1)
|
|
FldFunc(EncMCs_Dec0CpuIntEna, Rb, 1, 1)
|
|
FldFunc(EncMCs_Dec0CpuIntEna, Sd, 0, 1)
|
|
RegFunc(EncMidCpuregs, 0x500F00, Dec1CpuIntEna, 0x10, EncMCs_Dec1CpuIntEna, 0x500f10)
|
|
FldFunc(EncMCs_Dec1CpuIntEna, Mbx, 31, 1)
|
|
FldFunc(EncMCs_Dec1CpuIntEna, Cab, 9, 1)
|
|
FldFunc(EncMCs_Dec1CpuIntEna, Si, 8, 1)
|
|
FldFunc(EncMCs_Dec1CpuIntEna, Rb, 1, 1)
|
|
FldFunc(EncMCs_Dec1CpuIntEna, Sd, 0, 1)
|
|
RegFunc(EncMidCpuregs, 0x500F00, RegCpuIntStat, 0x14, EncMCs_RegCpuIntStat, 0x500f14)
|
|
FldFunc(EncMCs_RegCpuIntStat, Mbx, 31, 1)
|
|
FldFunc(EncMCs_RegCpuIntStat, Com7, 23, 1)
|
|
FldFunc(EncMCs_RegCpuIntStat, Com6, 22, 1)
|
|
FldFunc(EncMCs_RegCpuIntStat, Com5, 21, 1)
|
|
FldFunc(EncMCs_RegCpuIntStat, Com4, 20, 1)
|
|
FldFunc(EncMCs_RegCpuIntStat, Com3, 19, 1)
|
|
FldFunc(EncMCs_RegCpuIntStat, Com2, 18, 1)
|
|
FldFunc(EncMCs_RegCpuIntStat, Com1, 17, 1)
|
|
FldFunc(EncMCs_RegCpuIntStat, Com0, 16, 1)
|
|
FldFunc(EncMCs_RegCpuIntStat, Hw7, 15, 1)
|
|
FldFunc(EncMCs_RegCpuIntStat, Hw6, 14, 1)
|
|
FldFunc(EncMCs_RegCpuIntStat, Hw5, 13, 1)
|
|
FldFunc(EncMCs_RegCpuIntStat, Hw4, 12, 1)
|
|
FldFunc(EncMCs_RegCpuIntStat, Hw3, 11, 1)
|
|
FldFunc(EncMCs_RegCpuIntStat, Hw2, 10, 1)
|
|
FldFunc(EncMCs_RegCpuIntStat, Hw1, 9, 1)
|
|
FldFunc(EncMCs_RegCpuIntStat, Hw0, 8, 1)
|
|
FldFunc(EncMCs_RegCpuIntStat, Db7, 7, 1)
|
|
FldFunc(EncMCs_RegCpuIntStat, Db6, 6, 1)
|
|
FldFunc(EncMCs_RegCpuIntStat, Db5, 5, 1)
|
|
FldFunc(EncMCs_RegCpuIntStat, Db4, 4, 1)
|
|
FldFunc(EncMCs_RegCpuIntStat, Db3, 3, 1)
|
|
FldFunc(EncMCs_RegCpuIntStat, Db2, 2, 1)
|
|
FldFunc(EncMCs_RegCpuIntStat, Db1, 1, 1)
|
|
FldFunc(EncMCs_RegCpuIntStat, Db0, 0, 1)
|
|
RegFunc(EncMidCpuregs, 0x500F00, StreamCpuIntStat, 0x14, EncMCs_StreamCpuIntStat, 0x500f14)
|
|
FldFunc(EncMCs_StreamCpuIntStat, Mbx, 31, 1)
|
|
FldFunc(EncMCs_StreamCpuIntStat, Dec, 18, 1)
|
|
FldFunc(EncMCs_StreamCpuIntStat, Aud, 17, 1)
|
|
FldFunc(EncMCs_StreamCpuIntStat, M2m, 15, 1)
|
|
FldFunc(EncMCs_StreamCpuIntStat, Pci, 14, 1)
|
|
FldFunc(EncMCs_StreamCpuIntStat, Ts1, 13, 1)
|
|
FldFunc(EncMCs_StreamCpuIntStat, Ts0, 12, 1)
|
|
FldFunc(EncMCs_StreamCpuIntStat, GpioHi, 11, 1)
|
|
FldFunc(EncMCs_StreamCpuIntStat, GpioLo, 10, 1)
|
|
FldFunc(EncMCs_StreamCpuIntStat, Vpp1, 9, 1)
|
|
FldFunc(EncMCs_StreamCpuIntStat, Vpp0, 8, 1)
|
|
FldFunc(EncMCs_StreamCpuIntStat, Rb, 1, 1)
|
|
FldFunc(EncMCs_StreamCpuIntStat, Sd, 0, 1)
|
|
RegFunc(EncMidCpuregs, 0x500F00, Dec0CpuIntStat, 0x14, EncMCs_Dec0CpuIntStat, 0x500f14)
|
|
FldFunc(EncMCs_Dec0CpuIntStat, Mbx, 31, 1)
|
|
FldFunc(EncMCs_Dec0CpuIntStat, Dec, 16, 1)
|
|
FldFunc(EncMCs_Dec0CpuIntStat, Si, 8, 1)
|
|
FldFunc(EncMCs_Dec0CpuIntStat, Rb, 1, 1)
|
|
FldFunc(EncMCs_Dec0CpuIntStat, Sd, 0, 1)
|
|
RegFunc(EncMidCpuregs, 0x500F00, Dec1CpuIntStat, 0x14, EncMCs_Dec1CpuIntStat, 0x500f14)
|
|
FldFunc(EncMCs_Dec1CpuIntStat, Mbx, 31, 1)
|
|
FldFunc(EncMCs_Dec1CpuIntStat, Cab, 9, 1)
|
|
FldFunc(EncMCs_Dec1CpuIntStat, Si, 8, 1)
|
|
FldFunc(EncMCs_Dec1CpuIntStat, Rb, 1, 1)
|
|
FldFunc(EncMCs_Dec1CpuIntStat, Sd, 0, 1)
|
|
RegFunc(EncMidCpuregs, 0x500F00, RegHst2cpuStat, 0x18, EncMCs_RegHst2cpuStat, 0x500f18)
|
|
FldFunc(EncMCs_RegHst2cpuStat, Value, 0, 32)
|
|
RegFunc(EncMidCpuregs, 0x500F00, RegCpu2hstStat, 0x1C, EncMCs_RegCpu2hstStat, 0x500f1c)
|
|
FldFunc(EncMCs_RegCpu2hstStat, Value, 0, 32)
|
|
RegFunc(EncMidCpuregs, 0x500F00, RegCpuIntgenSet, 0x20, EncMCs_RegCpuIntgenSet, 0x500f20)
|
|
FldFunc(EncMCs_RegCpuIntgenSet, Cpu2HstMbx, 31, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenSet, Int15, 15, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenSet, Int14, 14, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenSet, Int13, 13, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenSet, Int12, 12, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenSet, Int11, 11, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenSet, Int10, 10, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenSet, Int9, 9, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenSet, Int8, 8, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenSet, Int7, 7, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenSet, Int6, 6, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenSet, Int5, 5, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenSet, Int4, 4, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenSet, Int3, 3, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenSet, Int2, 2, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenSet, Int1, 1, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenSet, Int0, 0, 1)
|
|
RegFunc(EncMidCpuregs, 0x500F00, RegCpuIntgenClr, 0x24, EncMCs_RegCpuIntgenClr, 0x500f24)
|
|
FldFunc(EncMCs_RegCpuIntgenClr, Cpu2HstMbx, 31, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenClr, Int15, 15, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenClr, Int14, 14, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenClr, Int13, 13, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenClr, Int12, 12, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenClr, Int11, 11, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenClr, Int10, 10, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenClr, Int9, 9, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenClr, Int8, 8, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenClr, Int7, 7, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenClr, Int6, 6, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenClr, Int5, 5, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenClr, Int4, 4, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenClr, Int3, 3, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenClr, Int2, 2, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenClr, Int1, 1, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenClr, Int0, 0, 1)
|
|
RegFunc(EncMidCpuregs, 0x500F00, RegCpuIcacheMiss, 0x28, EncMCs_RegCpuIcacheMiss, 0x500f28)
|
|
FldFunc(EncMCs_RegCpuIcacheMiss, Count, 0, 32)
|
|
RegFunc(EncMidCpuregs, 0x500F00, RegCpuIntgenMask, 0x2C, EncMCs_RegCpuIntgenMask, 0x500f2c)
|
|
FldFunc(EncMCs_RegCpuIntgenMask, Cpu2HstMbx, 31, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenMask, Int15, 15, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenMask, Int14, 14, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenMask, Int13, 13, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenMask, Int12, 12, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenMask, Int11, 11, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenMask, Int10, 10, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenMask, Int9, 9, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenMask, Int8, 8, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenMask, Int7, 7, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenMask, Int6, 6, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenMask, Int5, 5, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenMask, Int4, 4, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenMask, Int3, 3, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenMask, Int2, 2, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenMask, Int1, 1, 1)
|
|
FldFunc(EncMCs_RegCpuIntgenMask, Int0, 0, 1)
|
|
|
|
RegAreaFunc(EncCabac2binsBase, 0x500B00, 0x500BFF)
|
|
RegFunc(EncCabac2bins, 0x500B00, RegCabac2binsImgCtxLast, 0xBC, EncCs_RegCabac2binsImgCtxLast, 0x500bbc)
|
|
FldFunc(EncCs_RegCabac2binsImgCtxLast, Ctxlast, 0, 9)
|
|
RegFunc(EncCabac2bins, 0x500B00, RegCabac2binsRdContextBaseAddr, 0xD0, EncCs_RegCabac2binsRdContextBaseAddr, 0x500bd0)
|
|
FldFunc(EncCs_RegCabac2binsRdContextBaseAddr, Addr, 0, 32)
|
|
RegFunc(EncCabac2bins, 0x500B00, RegCabac2binsWrContextBaseAddr, 0xD4, EncCs_RegCabac2binsWrContextBaseAddr, 0x500bd4)
|
|
FldFunc(EncCs_RegCabac2binsWrContextBaseAddr, Addr, 0, 32)
|
|
|
|
RegAreaFunc(EncCabac2bins2Base, 0x507400, 0x5077FF)
|
|
RegFunc(EncCabac2bins2, 0x507400, RegCabac2binsRdContextId, 0x178, EncC2_RegCabac2binsRdContextId, 0x507578)
|
|
FldFunc(EncC2_RegCabac2binsRdContextId, Id, 0, 6)
|
|
RegFunc(EncCabac2bins2, 0x507400, RegCabac2binsRdBuffAddr, 0x188, EncC2_RegCabac2binsRdBuffAddr, 0x507588)
|
|
FldFunc(EncC2_RegCabac2binsRdBuffAddr, Addr, 0, 32)
|
|
RegFunc(EncCabac2bins2, 0x507400, RegCabac2binsRdBuffCtl, 0x18C, EncC2_RegCabac2binsRdBuffCtl, 0x50758c)
|
|
FldFunc(EncC2_RegCabac2binsRdBuffCtl, AtMark, 4, 1)
|
|
FldFunc(EncC2_RegCabac2binsRdBuffCtl, NotRdy, 3, 1)
|
|
FldFunc(EncC2_RegCabac2binsRdBuffCtl, WrapEn, 2, 1)
|
|
FldFunc(EncC2_RegCabac2binsRdBuffCtl, Init, 1, 1)
|
|
FldFunc(EncC2_RegCabac2binsRdBuffCtl, BuffEn, 0, 1)
|
|
RegFunc(EncCabac2bins2, 0x507400, RegCabac2binsRdBuffStartAddr, 0x194, EncC2_RegCabac2binsRdBuffStartAddr, 0x507594)
|
|
FldFunc(EncC2_RegCabac2binsRdBuffStartAddr, Addr, 0, 32)
|
|
RegFunc(EncCabac2bins2, 0x507400, RegCabac2binsRdBuffEndAddr, 0x198, EncC2_RegCabac2binsRdBuffEndAddr, 0x507598)
|
|
FldFunc(EncC2_RegCabac2binsRdBuffEndAddr, Addr, 0, 32)
|
|
RegFunc(EncCabac2bins2, 0x507400, RegCabac2binsRdBuffMarkAddr, 0x17C, EncC2_RegCabac2binsRdBuffMarkAddr, 0x50757c)
|
|
FldFunc(EncC2_RegCabac2binsRdBuffMarkAddr, Addr, 0, 32)
|
|
RegFunc(EncCabac2bins2, 0x507400, RegCabac2binsRdBuffStallCnt, 0x19C, EncC2_RegCabac2binsRdBuffStallCnt, 0x50759c)
|
|
FldFunc(EncC2_RegCabac2binsRdBuffStallCnt, Count, 0, 32)
|
|
RegFunc(EncCabac2bins2, 0x507400, RegCabac2binsWrBuffStartAddr, 0x1A8, EncC2_RegCabac2binsWrBuffStartAddr, 0x5075a8)
|
|
FldFunc(EncC2_RegCabac2binsWrBuffStartAddr, Addr, 0, 32)
|
|
RegFunc(EncCabac2bins2, 0x507400, RegCabac2binsWrBuffCtl, 0x1AC, EncC2_RegCabac2binsWrBuffCtl, 0x5075ac)
|
|
FldFunc(EncC2_RegCabac2binsWrBuffCtl, BuffClose, 2, 1)
|
|
FldFunc(EncC2_RegCabac2binsWrBuffCtl, Init, 1, 1)
|
|
FldFunc(EncC2_RegCabac2binsWrBuffCtl, BuffEn, 0, 1)
|
|
RegFunc(EncCabac2bins2, 0x507400, RegCabac2binsWrBuffEndAddr, 0x1B0, EncC2_RegCabac2binsWrBuffEndAddr, 0x5075b0)
|
|
FldFunc(EncC2_RegCabac2binsWrBuffEndAddr, Addr, 0, 32)
|
|
RegFunc(EncCabac2bins2, 0x507400, RegCabac2binsWrBuffMarkAddr, 0x1B4, EncC2_RegCabac2binsWrBuffMarkAddr, 0x5075b4)
|
|
FldFunc(EncC2_RegCabac2binsWrBuffMarkAddr, Addr, 0, 32)
|
|
RegFunc(EncCabac2bins2, 0x507400, RegCabac2binsWrBuffStallCnt, 0x1B8, EncC2_RegCabac2binsWrBuffStallCnt, 0x5075b8)
|
|
FldFunc(EncC2_RegCabac2binsWrBuffStallCnt, Count, 0, 32)
|
|
RegFunc(EncCabac2bins2, 0x507400, RegCabac2binsWrBuffAddr, 0x1BC, EncC2_RegCabac2binsWrBuffAddr, 0x5075bc)
|
|
FldFunc(EncC2_RegCabac2binsWrBuffAddr, Addr, 0, 32)
|
|
RegFunc(EncCabac2bins2, 0x507400, RegCabac2binsWrContextId, 0x1C0, EncC2_RegCabac2binsWrContextId, 0x5075c0)
|
|
FldFunc(EncC2_RegCabac2binsWrContextId, Id, 0, 6)
|
|
RegFunc(EncCabac2bins2, 0x507400, RegCabac2binsNotIdleCycles, 0x220, EncC2_RegCabac2binsNotIdleCycles, 0x507620)
|
|
FldFunc(EncC2_RegCabac2binsNotIdleCycles, CycleCount, 0, 32)
|
|
RegFunc(EncCabac2bins2, 0x507400, RegCabac2binsState0, 0x230, EncC2_RegCabac2binsState0, 0x507630)
|
|
FldFunc(EncC2_RegCabac2binsState0, State, 0, 11)
|
|
RegFunc(EncCabac2bins2, 0x507400, RegCabac2binsState1, 0x234, EncC2_RegCabac2binsState1, 0x507634)
|
|
FldFunc(EncC2_RegCabac2binsState1, State, 0, 11)
|
|
RegFunc(EncCabac2bins2, 0x507400, RegCabac2binsUpstripembBaseAddr, 0x300, EncC2_RegCabac2binsUpstripembBaseAddr, 0x507700)
|
|
FldFunc(EncC2_RegCabac2binsUpstripembBaseAddr, Addr, 0, 32)
|
|
RegFunc(EncCabac2bins2, 0x507400, RegCabac2binsCommandBufferAddr, 0x310, EncC2_RegCabac2binsCommandBufferAddr, 0x507710)
|
|
FldFunc(EncC2_RegCabac2binsCommandBufferAddr, Addr, 0, 32)
|
|
RegFunc(EncCabac2bins2, 0x507400, RegCabac2binsCommandBufferCount, 0x314, EncC2_RegCabac2binsCommandBufferCount, 0x507714)
|
|
FldFunc(EncC2_RegCabac2binsCommandBufferCount, CommandBufferCount, 0, 11)
|
|
RegFunc(EncCabac2bins2, 0x507400, RegCabac2binsCommandBufferLogSize, 0x318, EncC2_RegCabac2binsCommandBufferLogSize, 0x507718)
|
|
FldFunc(EncC2_RegCabac2binsCommandBufferLogSize, CommandBufferSize, 0, 5)
|
|
RegFunc(EncCabac2bins2, 0x507400, RegCabac2binsCtl, 0x32C, EncC2_RegCabac2binsCtl, 0x50772c)
|
|
FldFunc(EncC2_RegCabac2binsCtl, Int, 11, 1)
|
|
FldFunc(EncC2_RegCabac2binsCtl, Busy, 10, 1)
|
|
FldFunc(EncC2_RegCabac2binsCtl, Wrnr, 9, 1)
|
|
FldFunc(EncC2_RegCabac2binsCtl, Rdnr, 8, 1)
|
|
FldFunc(EncC2_RegCabac2binsCtl, Wrmk, 7, 1)
|
|
FldFunc(EncC2_RegCabac2binsCtl, Rdmk, 6, 1)
|
|
FldFunc(EncC2_RegCabac2binsCtl, Sdpre, 5, 1)
|
|
FldFunc(EncC2_RegCabac2binsCtl, Sdq, 4, 1)
|
|
FldFunc(EncC2_RegCabac2binsCtl, Sdwr, 3, 1)
|
|
FldFunc(EncC2_RegCabac2binsCtl, Sdact, 2, 1)
|
|
FldFunc(EncC2_RegCabac2binsCtl, Sdreq, 1, 1)
|
|
FldFunc(EncC2_RegCabac2binsCtl, Reset, 0, 1)
|
|
|
|
RegAreaFunc(EncCodeOutABase, 0x500E80, 0x500EBF)
|
|
RegFunc(EncCodeOutA, 0x500E80, RegCodeOutRdBuffAddr, 0x0, EncCOA_RegCodeOutRdBuffAddr, 0x500e80)
|
|
FldFunc(EncCOA_RegCodeOutRdBuffAddr, Addr, 0, 28)
|
|
RegFunc(EncCodeOutA, 0x500E80, RegCodeOutRdBuffStartAddr, 0x4, EncCOA_RegCodeOutRdBuffStartAddr, 0x500e84)
|
|
FldFunc(EncCOA_RegCodeOutRdBuffStartAddr, Addr, 0, 28)
|
|
RegFunc(EncCodeOutA, 0x500E80, RegCodeOutRdBuffEndAddr, 0x8, EncCOA_RegCodeOutRdBuffEndAddr, 0x500e88)
|
|
FldFunc(EncCOA_RegCodeOutRdBuffEndAddr, Addr, 0, 28)
|
|
RegFunc(EncCodeOutA, 0x500E80, RegCodeOutRdBuffMarkAddr, 0xC, EncCOA_RegCodeOutRdBuffMarkAddr, 0x500e8c)
|
|
FldFunc(EncCOA_RegCodeOutRdBuffMarkAddr, Addr, 0, 28)
|
|
RegFunc(EncCodeOutA, 0x500E80, RegCodeOutRdBuffCtl, 0x10, EncCOA_RegCodeOutRdBuffCtl, 0x500e90)
|
|
FldFunc(EncCOA_RegCodeOutRdBuffCtl, UseMark, 8, 1)
|
|
FldFunc(EncCOA_RegCodeOutRdBuffCtl, Id, 4, 4)
|
|
FldFunc(EncCOA_RegCodeOutRdBuffCtl, ByteMode, 3, 1)
|
|
FldFunc(EncCOA_RegCodeOutRdBuffCtl, WrapEn, 2, 1)
|
|
FldFunc(EncCOA_RegCodeOutRdBuffCtl, Init, 1, 1)
|
|
FldFunc(EncCOA_RegCodeOutRdBuffCtl, En, 0, 1)
|
|
RegFunc(EncCodeOutA, 0x500E80, RegCodeOutRdBuffStallCnt, 0x14, EncCOA_RegCodeOutRdBuffStallCnt, 0x500e94)
|
|
FldFunc(EncCOA_RegCodeOutRdBuffStallCnt, Cnt, 0, 32)
|
|
RegFunc(EncCodeOutA, 0x500E80, RegCodeOutRdBuffBytesSent, 0x18, EncCOA_RegCodeOutRdBuffBytesSent, 0x500e98)
|
|
FldFunc(EncCOA_RegCodeOutRdBuffBytesSent, NumBytes, 0, 32)
|
|
|
|
RegAreaFunc(EncCodeOutBBase, 0x500EC0, 0x500EFF)
|
|
RegFunc(EncCodeOutB, 0x500EC0, RegCodeOutRdBuffAddr, 0x0, EncCOB_RegCodeOutRdBuffAddr, 0x500ec0)
|
|
FldFunc(EncCOB_RegCodeOutRdBuffAddr, Addr, 0, 28)
|
|
RegFunc(EncCodeOutB, 0x500EC0, RegCodeOutRdBuffStartAddr, 0x4, EncCOB_RegCodeOutRdBuffStartAddr, 0x500ec4)
|
|
FldFunc(EncCOB_RegCodeOutRdBuffStartAddr, Addr, 0, 28)
|
|
RegFunc(EncCodeOutB, 0x500EC0, RegCodeOutRdBuffEndAddr, 0x8, EncCOB_RegCodeOutRdBuffEndAddr, 0x500ec8)
|
|
FldFunc(EncCOB_RegCodeOutRdBuffEndAddr, Addr, 0, 28)
|
|
RegFunc(EncCodeOutB, 0x500EC0, RegCodeOutRdBuffMarkAddr, 0xC, EncCOB_RegCodeOutRdBuffMarkAddr, 0x500ecc)
|
|
FldFunc(EncCOB_RegCodeOutRdBuffMarkAddr, Addr, 0, 28)
|
|
RegFunc(EncCodeOutB, 0x500EC0, RegCodeOutRdBuffCtl, 0x10, EncCOB_RegCodeOutRdBuffCtl, 0x500ed0)
|
|
FldFunc(EncCOB_RegCodeOutRdBuffCtl, UseMark, 8, 1)
|
|
FldFunc(EncCOB_RegCodeOutRdBuffCtl, Id, 4, 4)
|
|
FldFunc(EncCOB_RegCodeOutRdBuffCtl, ByteMode, 3, 1)
|
|
FldFunc(EncCOB_RegCodeOutRdBuffCtl, WrapEn, 2, 1)
|
|
FldFunc(EncCOB_RegCodeOutRdBuffCtl, Init, 1, 1)
|
|
FldFunc(EncCOB_RegCodeOutRdBuffCtl, En, 0, 1)
|
|
RegFunc(EncCodeOutB, 0x500EC0, RegCodeOutRdBuffStallCnt, 0x14, EncCOB_RegCodeOutRdBuffStallCnt, 0x500ed4)
|
|
FldFunc(EncCOB_RegCodeOutRdBuffStallCnt, Cnt, 0, 32)
|
|
RegFunc(EncCodeOutB, 0x500EC0, RegCodeOutRdBuffBytesSent, 0x18, EncCOB_RegCodeOutRdBuffBytesSent, 0x500ed8)
|
|
FldFunc(EncCOB_RegCodeOutRdBuffBytesSent, NumBytes, 0, 32)
|
|
|
|
RegAreaFunc(EncMidIndSdramRegsBase, 0x541000, 0x54107F)
|
|
RegFunc(EncMidIndSdramRegs, 0x541000, RegSdramInc, 0x0, EncMISRs_RegSdramInc, 0x541000)
|
|
FldFunc(EncMISRs_RegSdramInc, Inc, 0, 1)
|
|
RegFunc(EncMidIndSdramRegs, 0x541000, RegSdramAddr, 0x4, EncMISRs_RegSdramAddr, 0x541004)
|
|
FldFunc(EncMISRs_RegSdramAddr, Addr, 0, 32)
|
|
RegFunc(EncMidIndSdramRegs, 0x541000, RegSdramData, 0x8, EncMISRs_RegSdramData, 0x541008)
|
|
FldFunc(EncMISRs_RegSdramData, Data, 0, 32)
|
|
RegFunc(EncMidIndSdramRegs, 0x541000, RegCpuDbg, 0x10, EncMISRs_RegCpuDbg, 0x541010)
|
|
FldFunc(EncMISRs_RegCpuDbg, Hst, 0, 1)
|
|
|
|
RegAreaFunc(EncMidCpucoreBase, 0x544000, 0x544FFF)
|
|
RegFunc(EncMidCpucore, 0x544000, CpucoreReg, 0x0, EncMCe_CpucoreReg, 0x544000)
|
|
FldFunc(EncMCe_CpucoreReg, Addr, 0, 32)
|
|
|
|
RegAreaFunc(EncMidCpuauxBase, 0x545000, 0x545FFF)
|
|
RegFunc(EncMidCpuaux, 0x545000, CpuauxReg, 0x0, EncMCx_CpuauxReg, 0x545000)
|
|
FldFunc(EncMCx_CpuauxReg, Addr, 0, 32)
|
|
|
|
RegAreaFunc(EncMidCpuimemBase, 0x546000, 0x547FFF)
|
|
RegFunc(EncMidCpuimem, 0x546000, CpuimemReg, 0x0, EncMCm_CpuimemReg, 0x546000)
|
|
FldFunc(EncMCm_CpuimemReg, Addr, 0, 32)
|
|
|
|
RegAreaFunc(EncMidCpudmemBase, 0x548000, 0x54FFFF)
|
|
RegFunc(EncMidCpudmem, 0x548000, CpudmemReg, 0x0, EncMCm_CpudmemReg, 0x548000)
|
|
FldFunc(EncMCm_CpudmemReg, Addr, 0, 32)
|
|
|
|
RegAreaFunc(EncDctBase, 0x5E0000, 0x5EFFFF)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersUnitExecFlag, 0x0, EncDt_DspRegistersUnitExecFlag, 0x5e0000)
|
|
FldFunc(EncDt_DspRegistersUnitExecFlag, UnitExec, 0, 1)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersUnitProgramCounter, 0x4, EncDt_DspRegistersUnitProgramCounter, 0x5e0004)
|
|
FldFunc(EncDt_DspRegistersUnitProgramCounter, UnitPc, 0, 9)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersDctBlocksCbp, 0x8, EncDt_DspRegistersDctBlocksCbp, 0x5e0008)
|
|
FldFunc(EncDt_DspRegistersDctBlocksCbp, Cbp5, 5, 1)
|
|
FldFunc(EncDt_DspRegistersDctBlocksCbp, Cbp4, 4, 1)
|
|
FldFunc(EncDt_DspRegistersDctBlocksCbp, Cbp3, 3, 1)
|
|
FldFunc(EncDt_DspRegistersDctBlocksCbp, Cbp2, 2, 1)
|
|
FldFunc(EncDt_DspRegistersDctBlocksCbp, Cbp1, 1, 1)
|
|
FldFunc(EncDt_DspRegistersDctBlocksCbp, Cbp0, 0, 1)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersNumOfDct0Coeff, 0xC, EncDt_DspRegistersNumOfDct0Coeff, 0x5e000c)
|
|
FldFunc(EncDt_DspRegistersNumOfDct0Coeff, NumOfCoeff, 0, 7)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersNumOfDct1Coeff, 0x10, EncDt_DspRegistersNumOfDct1Coeff, 0x5e0010)
|
|
FldFunc(EncDt_DspRegistersNumOfDct1Coeff, NumOfCoeff, 0, 7)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersNumOfDct2Coeff, 0x14, EncDt_DspRegistersNumOfDct2Coeff, 0x5e0014)
|
|
FldFunc(EncDt_DspRegistersNumOfDct2Coeff, NumOfCoeff, 0, 7)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersNumOfDct3Coeff, 0x18, EncDt_DspRegistersNumOfDct3Coeff, 0x5e0018)
|
|
FldFunc(EncDt_DspRegistersNumOfDct3Coeff, NumOfCoeff, 0, 7)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersNumOfDct4Coeff, 0x1C, EncDt_DspRegistersNumOfDct4Coeff, 0x5e001c)
|
|
FldFunc(EncDt_DspRegistersNumOfDct4Coeff, NumOfCoeff, 0, 7)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersNumOfDct5Coeff, 0x20, EncDt_DspRegistersNumOfDct5Coeff, 0x5e0020)
|
|
FldFunc(EncDt_DspRegistersNumOfDct5Coeff, NumOfCoeff, 0, 7)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersSumOfRegbDct0, 0x24, EncDt_DspRegistersSumOfRegbDct0, 0x5e0024)
|
|
FldFunc(EncDt_DspRegistersSumOfRegbDct0, SumOfRegb, 0, 32)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersSumOfRegcDct0, 0x28, EncDt_DspRegistersSumOfRegcDct0, 0x5e0028)
|
|
FldFunc(EncDt_DspRegistersSumOfRegcDct0, SumOfRegb, 0, 32)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersSumOfRegbDct1, 0x2C, EncDt_DspRegistersSumOfRegbDct1, 0x5e002c)
|
|
FldFunc(EncDt_DspRegistersSumOfRegbDct1, SumOfRegb, 0, 32)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersSumOfRegcDct1, 0x30, EncDt_DspRegistersSumOfRegcDct1, 0x5e0030)
|
|
FldFunc(EncDt_DspRegistersSumOfRegcDct1, SumOfRegb, 0, 32)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersSumOfRegbDct2, 0x34, EncDt_DspRegistersSumOfRegbDct2, 0x5e0034)
|
|
FldFunc(EncDt_DspRegistersSumOfRegbDct2, SumOfRegb, 0, 32)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersSumOfRegcDct2, 0x38, EncDt_DspRegistersSumOfRegcDct2, 0x5e0038)
|
|
FldFunc(EncDt_DspRegistersSumOfRegcDct2, SumOfRegb, 0, 32)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersSumOfRegbDct3, 0x3C, EncDt_DspRegistersSumOfRegbDct3, 0x5e003c)
|
|
FldFunc(EncDt_DspRegistersSumOfRegbDct3, SumOfRegb, 0, 32)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersSumOfRegcDct3, 0x40, EncDt_DspRegistersSumOfRegcDct3, 0x5e0040)
|
|
FldFunc(EncDt_DspRegistersSumOfRegcDct3, SumOfRegb, 0, 32)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersSumOfRegbDct4, 0x44, EncDt_DspRegistersSumOfRegbDct4, 0x5e0044)
|
|
FldFunc(EncDt_DspRegistersSumOfRegbDct4, SumOfRegb, 0, 32)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersSumOfRegcDct4, 0x48, EncDt_DspRegistersSumOfRegcDct4, 0x5e0048)
|
|
FldFunc(EncDt_DspRegistersSumOfRegcDct4, SumOfRegb, 0, 32)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersSumOfRegbDct5, 0x4C, EncDt_DspRegistersSumOfRegbDct5, 0x5e004c)
|
|
FldFunc(EncDt_DspRegistersSumOfRegbDct5, SumOfRegb, 0, 32)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersSumOfRegcDct5, 0x50, EncDt_DspRegistersSumOfRegcDct5, 0x5e0050)
|
|
FldFunc(EncDt_DspRegistersSumOfRegcDct5, SumOfRegb, 0, 32)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersMinMaxPixelDct0, 0x54, EncDt_DspRegistersMinMaxPixelDct0, 0x5e0054)
|
|
FldFunc(EncDt_DspRegistersMinMaxPixelDct0, MinPixel, 9, 9)
|
|
FldFunc(EncDt_DspRegistersMinMaxPixelDct0, MaxPixel, 0, 9)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersMinMaxPixelDct1, 0x58, EncDt_DspRegistersMinMaxPixelDct1, 0x5e0058)
|
|
FldFunc(EncDt_DspRegistersMinMaxPixelDct1, MinPixel, 9, 9)
|
|
FldFunc(EncDt_DspRegistersMinMaxPixelDct1, MaxPixel, 0, 9)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersMinMaxPixelDct2, 0x5C, EncDt_DspRegistersMinMaxPixelDct2, 0x5e005c)
|
|
FldFunc(EncDt_DspRegistersMinMaxPixelDct2, MinPixel, 9, 9)
|
|
FldFunc(EncDt_DspRegistersMinMaxPixelDct2, MaxPixel, 0, 9)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersMinMaxPixelDct3, 0x60, EncDt_DspRegistersMinMaxPixelDct3, 0x5e0060)
|
|
FldFunc(EncDt_DspRegistersMinMaxPixelDct3, MinPixel, 9, 9)
|
|
FldFunc(EncDt_DspRegistersMinMaxPixelDct3, MaxPixel, 0, 9)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersMinMaxPixelDct4, 0x64, EncDt_DspRegistersMinMaxPixelDct4, 0x5e0064)
|
|
FldFunc(EncDt_DspRegistersMinMaxPixelDct4, MinPixel, 9, 9)
|
|
FldFunc(EncDt_DspRegistersMinMaxPixelDct4, MaxPixel, 0, 9)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersMinMaxPixelDct5, 0x68, EncDt_DspRegistersMinMaxPixelDct5, 0x5e0068)
|
|
FldFunc(EncDt_DspRegistersMinMaxPixelDct5, MinPixel, 9, 9)
|
|
FldFunc(EncDt_DspRegistersMinMaxPixelDct5, MaxPixel, 0, 9)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersRegisterR0, 0x6C, EncDt_DspRegistersRegisterR0, 0x5e006c)
|
|
FldFunc(EncDt_DspRegistersRegisterR0, RegR0, 0, 32)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersLoadParameters41, 0x70, EncDt_DspRegistersLoadParameters41, 0x5e0070)
|
|
FldFunc(EncDt_DspRegistersLoadParameters41, LoadNextDesc, 24, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters41, BusTransaction, 18, 6)
|
|
FldFunc(EncDt_DspRegistersLoadParameters41, BusWidth, 16, 2)
|
|
FldFunc(EncDt_DspRegistersLoadParameters41, Cr, 15, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters41, Cb, 14, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters41, ReconInvrData, 13, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters41, QFlag, 12, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters41, InvrFlag, 11, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters41, RFlag, 10, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters41, CmbFlag, 9, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters41, MemWa, 6, 3)
|
|
FldFunc(EncDt_DspRegistersLoadParameters41, MemRa1, 3, 3)
|
|
FldFunc(EncDt_DspRegistersLoadParameters41, MemRa0, 0, 3)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersLoadParameters42, 0x74, EncDt_DspRegistersLoadParameters42, 0x5e0074)
|
|
FldFunc(EncDt_DspRegistersLoadParameters42, LoadNextDesc, 24, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters42, BusTransaction, 18, 6)
|
|
FldFunc(EncDt_DspRegistersLoadParameters42, BusWidth, 16, 2)
|
|
FldFunc(EncDt_DspRegistersLoadParameters42, Cr, 15, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters42, Cb, 14, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters42, ReconInvrData, 13, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters42, QFlag, 12, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters42, InvrFlag, 11, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters42, RFlag, 10, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters42, CmbFlag, 9, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters42, MemWa, 6, 3)
|
|
FldFunc(EncDt_DspRegistersLoadParameters42, MemRa1, 3, 3)
|
|
FldFunc(EncDt_DspRegistersLoadParameters42, MemRa0, 0, 3)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersLoadParameters43, 0x78, EncDt_DspRegistersLoadParameters43, 0x5e0078)
|
|
FldFunc(EncDt_DspRegistersLoadParameters43, LoadNextDesc, 24, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters43, BusTransaction, 18, 6)
|
|
FldFunc(EncDt_DspRegistersLoadParameters43, BusWidth, 16, 2)
|
|
FldFunc(EncDt_DspRegistersLoadParameters43, Cr, 15, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters43, Cb, 14, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters43, ReconInvrData, 13, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters43, QFlag, 12, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters43, InvrFlag, 11, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters43, RFlag, 10, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters43, CmbFlag, 9, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters43, MemWa, 6, 3)
|
|
FldFunc(EncDt_DspRegistersLoadParameters43, MemRa1, 3, 3)
|
|
FldFunc(EncDt_DspRegistersLoadParameters43, MemRa0, 0, 3)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersLoadParameters44, 0x7C, EncDt_DspRegistersLoadParameters44, 0x5e007c)
|
|
FldFunc(EncDt_DspRegistersLoadParameters44, LoadNextDesc, 24, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters44, BusTransaction, 18, 6)
|
|
FldFunc(EncDt_DspRegistersLoadParameters44, BusWidth, 16, 2)
|
|
FldFunc(EncDt_DspRegistersLoadParameters44, Cr, 15, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters44, Cb, 14, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters44, ReconInvrData, 13, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters44, QFlag, 12, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters44, InvrFlag, 11, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters44, RFlag, 10, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters44, CmbFlag, 9, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters44, MemWa, 6, 3)
|
|
FldFunc(EncDt_DspRegistersLoadParameters44, MemRa1, 3, 3)
|
|
FldFunc(EncDt_DspRegistersLoadParameters44, MemRa0, 0, 3)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersLoadParameters45, 0x80, EncDt_DspRegistersLoadParameters45, 0x5e0080)
|
|
FldFunc(EncDt_DspRegistersLoadParameters45, LoadNextDesc, 24, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters45, BusTransaction, 18, 6)
|
|
FldFunc(EncDt_DspRegistersLoadParameters45, BusWidth, 16, 2)
|
|
FldFunc(EncDt_DspRegistersLoadParameters45, Cr, 15, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters45, Cb, 14, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters45, ReconInvrData, 13, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters45, QFlag, 12, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters45, InvrFlag, 11, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters45, RFlag, 10, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters45, CmbFlag, 9, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters45, MemWa, 6, 3)
|
|
FldFunc(EncDt_DspRegistersLoadParameters45, MemRa1, 3, 3)
|
|
FldFunc(EncDt_DspRegistersLoadParameters45, MemRa0, 0, 3)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersInterrupt, 0x84, EncDt_DspRegistersInterrupt, 0x5e0084)
|
|
FldFunc(EncDt_DspRegistersInterrupt, ErrorMcromAdd, 7, 1)
|
|
FldFunc(EncDt_DspRegistersInterrupt, ErrorMcromAck, 6, 1)
|
|
FldFunc(EncDt_DspRegistersInterrupt, ErrorCromAdd, 5, 1)
|
|
FldFunc(EncDt_DspRegistersInterrupt, ErrorCromAck, 4, 1)
|
|
FldFunc(EncDt_DspRegistersInterrupt, ErrorBankAdd, 3, 1)
|
|
FldFunc(EncDt_DspRegistersInterrupt, ErrorBankAck, 2, 1)
|
|
FldFunc(EncDt_DspRegistersInterrupt, BankError, 1, 1)
|
|
FldFunc(EncDt_DspRegistersInterrupt, Exec, 0, 1)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersMaskInterrupt, 0x88, EncDt_DspRegistersMaskInterrupt, 0x5e0088)
|
|
FldFunc(EncDt_DspRegistersMaskInterrupt, Mask, 0, 8)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersLoadParameters0, 0x8C, EncDt_DspRegistersLoadParameters0, 0x5e008c)
|
|
FldFunc(EncDt_DspRegistersLoadParameters0, ChooseClipPair, 12, 2)
|
|
FldFunc(EncDt_DspRegistersLoadParameters0, Clip, 11, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters0, MemWa, 8, 3)
|
|
FldFunc(EncDt_DspRegistersLoadParameters0, IncMemRa, 6, 2)
|
|
FldFunc(EncDt_DspRegistersLoadParameters0, MemRa1, 3, 3)
|
|
FldFunc(EncDt_DspRegistersLoadParameters0, MemRa0, 0, 3)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersLoadParameters1, 0x90, EncDt_DspRegistersLoadParameters1, 0x5e0090)
|
|
FldFunc(EncDt_DspRegistersLoadParameters1, RegaMux, 11, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters1, IncMemWa, 10, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters1, Field, 9, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters1, CromInc, 8, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters1, Iquant, 7, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters1, RoundRegLeftScale, 3, 4)
|
|
FldFunc(EncDt_DspRegistersLoadParameters1, ChooseRoundQuartet, 0, 3)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersLoadParameters2, 0x94, EncDt_DspRegistersLoadParameters2, 0x5e0094)
|
|
FldFunc(EncDt_DspRegistersLoadParameters2, RegisterType, 10, 2)
|
|
FldFunc(EncDt_DspRegistersLoadParameters2, RegisterGroup, 6, 4)
|
|
FldFunc(EncDt_DspRegistersLoadParameters2, Load, 4, 2)
|
|
FldFunc(EncDt_DspRegistersLoadParameters2, CbpCont, 2, 2)
|
|
FldFunc(EncDt_DspRegistersLoadParameters2, Mpeg4, 1, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters2, Mpeg1, 0, 1)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersLoadParameters3, 0x98, EncDt_DspRegistersLoadParameters3, 0x5e0098)
|
|
FldFunc(EncDt_DspRegistersLoadParameters3, MemWa, 1, 6)
|
|
FldFunc(EncDt_DspRegistersLoadParameters3, MemRaSel, 0, 1)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersLoadParameters4, 0x9C, EncDt_DspRegistersLoadParameters4, 0x5e009c)
|
|
FldFunc(EncDt_DspRegistersLoadParameters4, LoadNextDesc, 24, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters4, BusTransaction, 18, 6)
|
|
FldFunc(EncDt_DspRegistersLoadParameters4, BusWidth, 16, 2)
|
|
FldFunc(EncDt_DspRegistersLoadParameters4, Cr, 15, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters4, Cb, 14, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters4, ReconInvrData, 13, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters4, QFlag, 12, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters4, InvrFlag, 11, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters4, RFlag, 10, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters4, CmbFlag, 9, 1)
|
|
FldFunc(EncDt_DspRegistersLoadParameters4, MemWa, 6, 3)
|
|
FldFunc(EncDt_DspRegistersLoadParameters4, MemRa1, 3, 3)
|
|
FldFunc(EncDt_DspRegistersLoadParameters4, MemRa0, 0, 3)
|
|
RegFunc(EncDct, 0x5E0000, DspRegistersStartUnitPc, 0xA0, EncDt_DspRegistersStartUnitPc, 0x5e00a0)
|
|
FldFunc(EncDt_DspRegistersStartUnitPc, ProgramCounter, 0, 9)
|
|
RegFunc(EncDct, 0x5E0000, Bank00Dct0Pixels, 0xC, EncDt_Bank00Dct0Pixels, 0x5e000c)
|
|
FldFunc(EncDt_Bank00Dct0Pixels, Data, 0, 20)
|
|
RegFunc(EncDct, 0x5E0000, Bank01Dct1Pixels, 0xC, EncDt_Bank01Dct1Pixels, 0x5e000c)
|
|
FldFunc(EncDt_Bank01Dct1Pixels, Data, 0, 20)
|
|
RegFunc(EncDct, 0x5E0000, Bank10Dct2Pixels, 0xC, EncDt_Bank10Dct2Pixels, 0x5e000c)
|
|
FldFunc(EncDt_Bank10Dct2Pixels, Data, 0, 20)
|
|
RegFunc(EncDct, 0x5E0000, Bank11Dct3Pixels, 0xC, EncDt_Bank11Dct3Pixels, 0x5e000c)
|
|
FldFunc(EncDt_Bank11Dct3Pixels, Data, 0, 20)
|
|
RegFunc(EncDct, 0x5E0000, Bank20Dct4Pixels, 0xC, EncDt_Bank20Dct4Pixels, 0x5e000c)
|
|
FldFunc(EncDt_Bank20Dct4Pixels, Data, 0, 20)
|
|
RegFunc(EncDct, 0x5E0000, Bank21Dct5Pixels, 0xC, EncDt_Bank21Dct5Pixels, 0x5e000c)
|
|
FldFunc(EncDt_Bank21Dct5Pixels, Data, 0, 20)
|
|
RegFunc(EncDct, 0x5E0000, DspMcromMicrocode, 0xC, EncDt_DspMcromMicrocode, 0x5e000c)
|
|
FldFunc(EncDt_DspMcromMicrocode, Data, 0, 32)
|
|
RegFunc(EncDct, 0x5E0000, DspCromVariables, 0xC, EncDt_DspCromVariables, 0x5e000c)
|
|
FldFunc(EncDt_DspCromVariables, Data, 0, 20)
|
|
|
|
#endif
|
|
|
|
|
|
//******************************************************************************
|
|
//
|
|
// Encoder FME Ring Bus Node
|
|
//
|
|
//******************************************************************************
|
|
#ifndef EXCLUDE_ENCODER_FME
|
|
|
|
RegAreaFunc(EncFmeRbnodeRegsBase, 0x600000, 0x60007F)
|
|
RegFunc(EncFmeRbnodeRegs, 0x600000, RbConfig , 0x0, EncFRRs_RbConfig , 0x600000)
|
|
FldFunc(EncFRRs_RbConfig , RdPostEna, 1, 1)
|
|
FldFunc(EncFRRs_RbConfig , RdBypEna, 0, 1)
|
|
RegFunc(EncFmeRbnodeRegs, 0x600000, RbStickyError, 0x4, EncFRRs_RbStickyError, 0x600004)
|
|
FldFunc(EncFRRs_RbStickyError, Node, 1, 1)
|
|
FldFunc(EncFRRs_RbStickyError, Tgt, 0, 1)
|
|
RegFunc(EncFmeRbnodeRegs, 0x600000, RbCurrentError, 0x8, EncFRRs_RbCurrentError, 0x600008)
|
|
FldFunc(EncFRRs_RbCurrentError, Node, 1, 1)
|
|
FldFunc(EncFRRs_RbCurrentError, Tgt, 0, 1)
|
|
RegFunc(EncFmeRbnodeRegs, 0x600000, RbReadData, 0xC, EncFRRs_RbReadData, 0x60000c)
|
|
FldFunc(EncFRRs_RbReadData, Data, 0, 32)
|
|
|
|
RegAreaFunc(EncFmeRingbusDebugRegsBase, 0x600080, 0x6000FF)
|
|
RegFunc(EncFmeRingbusDebugRegs, 0x600080, RbDebugConfig, 0x0, EncFRDRs_RbDebugConfig, 0x600080)
|
|
FldFunc(EncFRDRs_RbDebugConfig, Addr3WrStat, 15, 1)
|
|
FldFunc(EncFRDRs_RbDebugConfig, Addr2WrStat, 14, 1)
|
|
FldFunc(EncFRDRs_RbDebugConfig, Addr1WrStat, 13, 1)
|
|
FldFunc(EncFRDRs_RbDebugConfig, Addr0WrStat, 12, 1)
|
|
FldFunc(EncFRDRs_RbDebugConfig, Addr3RdStat, 11, 1)
|
|
FldFunc(EncFRDRs_RbDebugConfig, Addr2RdStat, 10, 1)
|
|
FldFunc(EncFRDRs_RbDebugConfig, Addr1RdStat, 9, 1)
|
|
FldFunc(EncFRDRs_RbDebugConfig, Addr0RdStat, 8, 1)
|
|
FldFunc(EncFRDRs_RbDebugConfig, Addr3WrEna, 7, 1)
|
|
FldFunc(EncFRDRs_RbDebugConfig, Addr2WrEna, 6, 1)
|
|
FldFunc(EncFRDRs_RbDebugConfig, Addr1WrEna, 5, 1)
|
|
FldFunc(EncFRDRs_RbDebugConfig, Addr0WrEna, 4, 1)
|
|
FldFunc(EncFRDRs_RbDebugConfig, Addr3RdEna, 3, 1)
|
|
FldFunc(EncFRDRs_RbDebugConfig, Addr2RdEna, 2, 1)
|
|
FldFunc(EncFRDRs_RbDebugConfig, Addr1RdEna, 1, 1)
|
|
FldFunc(EncFRDRs_RbDebugConfig, Addr0RdEna, 0, 1)
|
|
RegFunc(EncFmeRingbusDebugRegs, 0x600080, RbDebugReg0Addr, 0x4, EncFRDRs_RbDebugReg0Addr, 0x600084)
|
|
FldFunc(EncFRDRs_RbDebugReg0Addr, Addr, 0, 16)
|
|
RegFunc(EncFmeRingbusDebugRegs, 0x600080, RbDebugReg1Addr, 0x8, EncFRDRs_RbDebugReg1Addr, 0x600088)
|
|
FldFunc(EncFRDRs_RbDebugReg1Addr, Addr, 0, 16)
|
|
RegFunc(EncFmeRingbusDebugRegs, 0x600080, RbDebugReg2Addr, 0xC, EncFRDRs_RbDebugReg2Addr, 0x60008c)
|
|
FldFunc(EncFRDRs_RbDebugReg2Addr, Addr, 0, 16)
|
|
RegFunc(EncFmeRingbusDebugRegs, 0x600080, RbDebugReg3Addr, 0x10, EncFRDRs_RbDebugReg3Addr, 0x600090)
|
|
FldFunc(EncFRDRs_RbDebugReg3Addr, Addr, 0, 16)
|
|
RegFunc(EncFmeRingbusDebugRegs, 0x600080, RbDebugOutputReg, 0x14, EncFRDRs_RbDebugOutputReg, 0x600094)
|
|
FldFunc(EncFRDRs_RbDebugOutputReg, DspRst, 1, 1)
|
|
FldFunc(EncFRDRs_RbDebugOutputReg, FmmRst, 0, 1)
|
|
|
|
#if 1 // New fme
|
|
RegFunc( a,b,c,d, REGOFFSET_FMEVECTOR_L0_0, 0x600430 ) // 16x16 mode vec for fme vec context
|
|
RegFunc( a,b,c,d, REGOFFSET_MVPAUTOCTL, 0x600568 ) // trigger auto (try all partititions, return single best)
|
|
FldFunc(REGOFFSET_MVPAUTOCTL, EnableSubmodes, 4, 1) // Allow subpartitions of 8x8 partitions.
|
|
FldFunc(REGOFFSET_MVPAUTOCTL, l11, 3, 1)
|
|
FldFunc(REGOFFSET_MVPAUTOCTL, l10, 2, 1)
|
|
FldFunc(REGOFFSET_MVPAUTOCTL, l01, 1, 1)
|
|
FldFunc(REGOFFSET_MVPAUTOCTL, l00, 0, 1) // Do list 0, ref 0 (only one used currently)
|
|
RegFunc( a,b,c,d, REGOFFSET_MVPAUTORESULT, 0x60056C )
|
|
FldFunc(REGOFFSET_MVPAUTORESULT, busy ,31, 1)
|
|
FldFunc(REGOFFSET_MVPAUTORESULT, rsv ,18, 13)
|
|
FldFunc(REGOFFSET_MVPAUTORESULT, bestmode ,16, 2)
|
|
FldFunc(REGOFFSET_MVPAUTORESULT, bestsubmode11,14, 2)
|
|
FldFunc(REGOFFSET_MVPAUTORESULT, bestsubmode10,12, 2)
|
|
FldFunc(REGOFFSET_MVPAUTORESULT, bestsubmode01,10, 2)
|
|
FldFunc(REGOFFSET_MVPAUTORESULT, bestsubmode00, 8, 2)
|
|
FldFunc(REGOFFSET_MVPAUTORESULT, bestsubmode , 8, 8)
|
|
FldFunc(REGOFFSET_MVPAUTORESULT, bestlistref11, 6, 2)
|
|
FldFunc(REGOFFSET_MVPAUTORESULT, bestlistref10, 4, 2)
|
|
FldFunc(REGOFFSET_MVPAUTORESULT, bestlistref01, 2, 2)
|
|
FldFunc(REGOFFSET_MVPAUTORESULT, bestlistref00, 0, 2)
|
|
FldFunc(REGOFFSET_MVPAUTORESULT, bestlistref , 0, 8)
|
|
|
|
RegFunc( a,b,c,d, REGOFFSET_MVPAUTOIDXCOST_00, 0x600570 )
|
|
RegFunc( a,b,c,d, REGOFFSET_MVPAUTOSUBMODECOST_0_00, 0x600580 )
|
|
RegFunc( a,b,c,d, REGOFFSET_MVPAUTOSUBMODECOST_0_01, 0x600584 )
|
|
RegFunc( a,b,c,d, REGOFFSET_MVPAUTOSUBMODECOST_0_10, 0x600588 )
|
|
RegFunc( a,b,c,d, REGOFFSET_MVPAUTOSUBMODECOST_0_11, 0x60058C )
|
|
#endif
|
|
|
|
RegAreaFunc(EncFmeMainBase, 0x600400, 0x6004FF)
|
|
RegFunc(EncFmeMain, 0x600400, EncFmeCtl, 0x0, EncFMn_EncFmeCtl, 0x600400)
|
|
FldFunc(EncFMn_EncFmeCtl, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMain, 0x600400, EncFmeCur, 0x4, EncFMn_EncFmeCur, 0x600404)
|
|
FldFunc(EncFMn_EncFmeCur, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMain, 0x600400, EncFmeRefindex, 0x8, EncFMn_EncFmeRefindex, 0x600408)
|
|
FldFunc(EncFMn_EncFmeRefindex, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMain, 0x600400, EncFmeRefvector, 0xC, EncFMn_EncFmeRefvector, 0x60040c)
|
|
FldFunc(EncFMn_EncFmeRefvector, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMain, 0x600400, EncFmeMvpa, 0x10, EncFMn_EncFmeMvpa, 0x600410)
|
|
FldFunc(EncFMn_EncFmeMvpa, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMain, 0x600400, EncFmeMvpb, 0x14, EncFMn_EncFmeMvpb, 0x600414)
|
|
FldFunc(EncFMn_EncFmeMvpb, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMain, 0x600400, EncFmeMvpc, 0x18, EncFMn_EncFmeMvpc, 0x600418)
|
|
FldFunc(EncFMn_EncFmeMvpc, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMain, 0x600400, EncFmeLambda, 0x1C, EncFMn_EncFmeLambda, 0x60041c)
|
|
FldFunc(EncFMn_EncFmeLambda, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMain, 0x600400, EncFmeImgsize, 0x20, EncFMn_EncFmeImgsize, 0x600420)
|
|
FldFunc(EncFMn_EncFmeImgsize, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMain, 0x600400, EncFmeSearchsize, 0x24, EncFMn_EncFmeSearchsize, 0x600424)
|
|
FldFunc(EncFMn_EncFmeSearchsize, NoInfo, 0, 32) /* By analogy with the above: note "size" is not capitalized */
|
|
RegFunc(EncFmeMain, 0x600400, EncFmeStatus, 0x28, EncFMn_EncFmeStatus, 0x600428)
|
|
FldFunc(EncFMn_EncFmeStatus, NoInfo, 0, 32)
|
|
|
|
|
|
|
|
RegAreaFunc(EncFmeMvpBase, 0x600500, 0x6005FF)
|
|
RegFunc(EncFmeMvp, 0x600500, EncFmeMvpArefindex, 0x0, EncFMp_EncFmeMvpArefindex, 0x600500)
|
|
FldFunc(EncFMp_EncFmeMvpArefindex, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMvp, 0x600500, EncFmeMvpVecta00, 0x4, EncFMp_EncFmeMvpVecta00, 0x600504)
|
|
FldFunc(EncFMp_EncFmeMvpVecta00, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMvp, 0x600500, EncFmeMvpVecta01, 0x8, EncFMp_EncFmeMvpVecta01, 0x600508)
|
|
FldFunc(EncFMp_EncFmeMvpVecta01, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMvp, 0x600500, EncFmeMvpVecta10, 0xC, EncFMp_EncFmeMvpVecta10, 0x60050c)
|
|
FldFunc(EncFMp_EncFmeMvpVecta10, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMvp, 0x600500, EncFmeMvpVecta11, 0x10, EncFMp_EncFmeMvpVecta11, 0x600510)
|
|
FldFunc(EncFMp_EncFmeMvpVecta11, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMvp, 0x600500, EncFmeMvpVecta20, 0x14, EncFMp_EncFmeMvpVecta20, 0x600514)
|
|
FldFunc(EncFMp_EncFmeMvpVecta20, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMvp, 0x600500, EncFmeMvpVecta21, 0x18, EncFMp_EncFmeMvpVecta21, 0x600518)
|
|
FldFunc(EncFMp_EncFmeMvpVecta21, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMvp, 0x600500, EncFmeMvpVecta30, 0x1C, EncFMp_EncFmeMvpVecta30, 0x60051c)
|
|
FldFunc(EncFMp_EncFmeMvpVecta30, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMvp, 0x600500, EncFmeMvpVecta31, 0x20, EncFMp_EncFmeMvpVecta31, 0x600520)
|
|
FldFunc(EncFMp_EncFmeMvpVecta31, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMvp, 0x600500, EncFmeMvpBrefindex, 0x24, EncFMp_EncFmeMvpBrefindex, 0x600524)
|
|
FldFunc(EncFMp_EncFmeMvpBrefindex, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMvp, 0x600500, EncFmeMvpVectb00, 0x28, EncFMp_EncFmeMvpVectb00, 0x600528)
|
|
FldFunc(EncFMp_EncFmeMvpVectb00, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMvp, 0x600500, EncFmeMvpVectb01, 0x2C, EncFMp_EncFmeMvpVectb01, 0x60052c)
|
|
FldFunc(EncFMp_EncFmeMvpVectb01, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMvp, 0x600500, EncFmeMvpVectb10, 0x30, EncFMp_EncFmeMvpVectb10, 0x600530)
|
|
FldFunc(EncFMp_EncFmeMvpVectb10, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMvp, 0x600500, EncFmeMvpVectb11, 0x34, EncFMp_EncFmeMvpVectb11, 0x600534)
|
|
FldFunc(EncFMp_EncFmeMvpVectb11, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMvp, 0x600500, EncFmeMvpVectb20, 0x38, EncFMp_EncFmeMvpVectb20, 0x600538)
|
|
FldFunc(EncFMp_EncFmeMvpVectb20, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMvp, 0x600500, EncFmeMvpVectb21, 0x3C, EncFMp_EncFmeMvpVectb21, 0x60053c)
|
|
FldFunc(EncFMp_EncFmeMvpVectb21, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMvp, 0x600500, EncFmeMvpVectb30, 0x40, EncFMp_EncFmeMvpVectb30, 0x600540)
|
|
FldFunc(EncFMp_EncFmeMvpVectb30, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMvp, 0x600500, EncFmeMvpVectb31, 0x44, EncFMp_EncFmeMvpVectb31, 0x600544)
|
|
FldFunc(EncFMp_EncFmeMvpVectb31, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMvp, 0x600500, EncFmeMvpCrefindex, 0x48, EncFMp_EncFmeMvpCrefindex, 0x600548)
|
|
FldFunc(EncFMp_EncFmeMvpCrefindex, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMvp, 0x600500, EncFmeMvpVectc00, 0x4C, EncFMp_EncFmeMvpVectc00, 0x60054c)
|
|
FldFunc(EncFMp_EncFmeMvpVectc00, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMvp, 0x600500, EncFmeMvpVectc01, 0x50, EncFMp_EncFmeMvpVectc01, 0x600550)
|
|
FldFunc(EncFMp_EncFmeMvpVectc01, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMvp, 0x600500, EncFmeMvpMode, 0x54, EncFMp_EncFmeMvpMode, 0x600554)
|
|
FldFunc(EncFMp_EncFmeMvpMode, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMvp, 0x600500, EncFmeMvpCurpar, 0x58, EncFMp_EncFmeMvpCurpar, 0x600558)
|
|
FldFunc(EncFMp_EncFmeMvpCurpar, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMvp, 0x600500, EncFmeMvpMvp, 0x5C, EncFMp_EncFmeMvpMvp, 0x60055c)
|
|
FldFunc(EncFMp_EncFmeMvpMvp, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMvp, 0x600500, EncFmeMvpMvd, 0x60, EncFMp_EncFmeMvpMvd, 0x600560)
|
|
FldFunc(EncFMp_EncFmeMvpMvd, NoInfo, 0, 32)
|
|
RegFunc(EncFmeMvp, 0x600500, EncFmeMvpCost, 0x64, EncFMp_EncFmeMvpCost, 0x600564)
|
|
FldFunc(EncFMp_EncFmeMvpCost, NoInfo, 0, 32)
|
|
|
|
RegAreaFunc(EncFmeMebBase, 0x600600, 0x6006FF)
|
|
|
|
RegAreaFunc(EncVmeVectbaseBase, 0x600800, 0x600BFF)
|
|
|
|
RegAreaFunc(EncFmeCpuregsBase, 0x600F00, 0x600F7F)
|
|
RegFunc(EncFmeCpuregs, 0x600F00, RegHst2cpuMbx, 0x0, EncFCs_RegHst2cpuMbx, 0x600f00)
|
|
FldFunc(EncFCs_RegHst2cpuMbx, Value, 0, 32)
|
|
RegFunc(EncFmeCpuregs, 0x600F00, RegCpu2hstMbx, 0x4, EncFCs_RegCpu2hstMbx, 0x600f04)
|
|
FldFunc(EncFCs_RegCpu2hstMbx, Value, 0, 32)
|
|
RegFunc(EncFmeCpuregs, 0x600F00, RegMbxStat, 0x8, EncFCs_RegMbxStat, 0x600f08)
|
|
RegFunc(EncFmeCpuregs, 0x600F00, RegCpuIntBase, 0xC, EncFCs_RegCpuIntBase, 0x600f0c)
|
|
FldFunc(EncFCs_RegCpuIntBase, Addr, 8, 24)
|
|
RegFunc(EncFmeCpuregs, 0x600F00, RegCpuIntEna, 0x10, EncFCs_RegCpuIntEna, 0x600f10)
|
|
FldFunc(EncFCs_RegCpuIntEna, Mbx, 31, 1)
|
|
FldFunc(EncFCs_RegCpuIntEna, Com7, 23, 1)
|
|
FldFunc(EncFCs_RegCpuIntEna, Com6, 22, 1)
|
|
FldFunc(EncFCs_RegCpuIntEna, Com5, 21, 1)
|
|
FldFunc(EncFCs_RegCpuIntEna, Com4, 20, 1)
|
|
FldFunc(EncFCs_RegCpuIntEna, Com3, 19, 1)
|
|
FldFunc(EncFCs_RegCpuIntEna, Com2, 18, 1)
|
|
FldFunc(EncFCs_RegCpuIntEna, Com1, 17, 1)
|
|
FldFunc(EncFCs_RegCpuIntEna, Com0, 16, 1)
|
|
FldFunc(EncFCs_RegCpuIntEna, Hw7, 15, 1)
|
|
FldFunc(EncFCs_RegCpuIntEna, Hw6, 14, 1)
|
|
FldFunc(EncFCs_RegCpuIntEna, Hw5, 13, 1)
|
|
FldFunc(EncFCs_RegCpuIntEna, Hw4, 12, 1)
|
|
FldFunc(EncFCs_RegCpuIntEna, Hw3, 11, 1)
|
|
FldFunc(EncFCs_RegCpuIntEna, Hw2, 10, 1)
|
|
FldFunc(EncFCs_RegCpuIntEna, Hw1, 9, 1)
|
|
FldFunc(EncFCs_RegCpuIntEna, Hw0, 8, 1)
|
|
FldFunc(EncFCs_RegCpuIntEna, Db7, 7, 1)
|
|
FldFunc(EncFCs_RegCpuIntEna, Db6, 6, 1)
|
|
FldFunc(EncFCs_RegCpuIntEna, Db5, 5, 1)
|
|
FldFunc(EncFCs_RegCpuIntEna, Db4, 4, 1)
|
|
FldFunc(EncFCs_RegCpuIntEna, Db3, 3, 1)
|
|
FldFunc(EncFCs_RegCpuIntEna, Db2, 2, 1)
|
|
FldFunc(EncFCs_RegCpuIntEna, Db1, 1, 1)
|
|
FldFunc(EncFCs_RegCpuIntEna, Db0, 0, 1)
|
|
RegFunc(EncFmeCpuregs, 0x600F00, StreamCpuIntEna, 0x10, EncFCs_StreamCpuIntEna, 0x600f10)
|
|
FldFunc(EncFCs_StreamCpuIntEna, Mbx, 31, 1)
|
|
FldFunc(EncFCs_StreamCpuIntEna, Dec, 18, 1)
|
|
FldFunc(EncFCs_StreamCpuIntEna, Aud, 17, 1)
|
|
FldFunc(EncFCs_StreamCpuIntEna, M2m, 15, 1)
|
|
FldFunc(EncFCs_StreamCpuIntEna, Pci, 14, 1)
|
|
FldFunc(EncFCs_StreamCpuIntEna, Ts1, 13, 1)
|
|
FldFunc(EncFCs_StreamCpuIntEna, Ts0, 12, 1)
|
|
FldFunc(EncFCs_StreamCpuIntEna, GpioHi, 11, 1)
|
|
FldFunc(EncFCs_StreamCpuIntEna, GpioLo, 10, 1)
|
|
FldFunc(EncFCs_StreamCpuIntEna, Vpp1, 9, 1)
|
|
FldFunc(EncFCs_StreamCpuIntEna, Vpp0, 8, 1)
|
|
FldFunc(EncFCs_StreamCpuIntEna, Rb, 1, 1)
|
|
FldFunc(EncFCs_StreamCpuIntEna, Sd, 0, 1)
|
|
RegFunc(EncFmeCpuregs, 0x600F00, Dec0CpuIntEna, 0x10, EncFCs_Dec0CpuIntEna, 0x600f10)
|
|
FldFunc(EncFCs_Dec0CpuIntEna, Mbx, 31, 1)
|
|
FldFunc(EncFCs_Dec0CpuIntEna, Dec, 16, 1)
|
|
FldFunc(EncFCs_Dec0CpuIntEna, Si, 8, 1)
|
|
FldFunc(EncFCs_Dec0CpuIntEna, Rb, 1, 1)
|
|
FldFunc(EncFCs_Dec0CpuIntEna, Sd, 0, 1)
|
|
RegFunc(EncFmeCpuregs, 0x600F00, Dec1CpuIntEna, 0x10, EncFCs_Dec1CpuIntEna, 0x600f10)
|
|
FldFunc(EncFCs_Dec1CpuIntEna, Mbx, 31, 1)
|
|
FldFunc(EncFCs_Dec1CpuIntEna, Cab, 9, 1)
|
|
FldFunc(EncFCs_Dec1CpuIntEna, Si, 8, 1)
|
|
FldFunc(EncFCs_Dec1CpuIntEna, Rb, 1, 1)
|
|
FldFunc(EncFCs_Dec1CpuIntEna, Sd, 0, 1)
|
|
RegFunc(EncFmeCpuregs, 0x600F00, RegCpuIntStat, 0x14, EncFCs_RegCpuIntStat, 0x600f14)
|
|
FldFunc(EncFCs_RegCpuIntStat, Mbx, 31, 1)
|
|
FldFunc(EncFCs_RegCpuIntStat, Com7, 23, 1)
|
|
FldFunc(EncFCs_RegCpuIntStat, Com6, 22, 1)
|
|
FldFunc(EncFCs_RegCpuIntStat, Com5, 21, 1)
|
|
FldFunc(EncFCs_RegCpuIntStat, Com4, 20, 1)
|
|
FldFunc(EncFCs_RegCpuIntStat, Com3, 19, 1)
|
|
FldFunc(EncFCs_RegCpuIntStat, Com2, 18, 1)
|
|
FldFunc(EncFCs_RegCpuIntStat, Com1, 17, 1)
|
|
FldFunc(EncFCs_RegCpuIntStat, Com0, 16, 1)
|
|
FldFunc(EncFCs_RegCpuIntStat, Hw7, 15, 1)
|
|
FldFunc(EncFCs_RegCpuIntStat, Hw6, 14, 1)
|
|
FldFunc(EncFCs_RegCpuIntStat, Hw5, 13, 1)
|
|
FldFunc(EncFCs_RegCpuIntStat, Hw4, 12, 1)
|
|
FldFunc(EncFCs_RegCpuIntStat, Hw3, 11, 1)
|
|
FldFunc(EncFCs_RegCpuIntStat, Hw2, 10, 1)
|
|
FldFunc(EncFCs_RegCpuIntStat, Hw1, 9, 1)
|
|
FldFunc(EncFCs_RegCpuIntStat, Hw0, 8, 1)
|
|
FldFunc(EncFCs_RegCpuIntStat, Db7, 7, 1)
|
|
FldFunc(EncFCs_RegCpuIntStat, Db6, 6, 1)
|
|
FldFunc(EncFCs_RegCpuIntStat, Db5, 5, 1)
|
|
FldFunc(EncFCs_RegCpuIntStat, Db4, 4, 1)
|
|
FldFunc(EncFCs_RegCpuIntStat, Db3, 3, 1)
|
|
FldFunc(EncFCs_RegCpuIntStat, Db2, 2, 1)
|
|
FldFunc(EncFCs_RegCpuIntStat, Db1, 1, 1)
|
|
FldFunc(EncFCs_RegCpuIntStat, Db0, 0, 1)
|
|
RegFunc(EncFmeCpuregs, 0x600F00, StreamCpuIntStat, 0x14, EncFCs_StreamCpuIntStat, 0x600f14)
|
|
FldFunc(EncFCs_StreamCpuIntStat, Mbx, 31, 1)
|
|
FldFunc(EncFCs_StreamCpuIntStat, Dec, 18, 1)
|
|
FldFunc(EncFCs_StreamCpuIntStat, Aud, 17, 1)
|
|
FldFunc(EncFCs_StreamCpuIntStat, M2m, 15, 1)
|
|
FldFunc(EncFCs_StreamCpuIntStat, Pci, 14, 1)
|
|
FldFunc(EncFCs_StreamCpuIntStat, Ts1, 13, 1)
|
|
FldFunc(EncFCs_StreamCpuIntStat, Ts0, 12, 1)
|
|
FldFunc(EncFCs_StreamCpuIntStat, GpioHi, 11, 1)
|
|
FldFunc(EncFCs_StreamCpuIntStat, GpioLo, 10, 1)
|
|
FldFunc(EncFCs_StreamCpuIntStat, Vpp1, 9, 1)
|
|
FldFunc(EncFCs_StreamCpuIntStat, Vpp0, 8, 1)
|
|
FldFunc(EncFCs_StreamCpuIntStat, Rb, 1, 1)
|
|
FldFunc(EncFCs_StreamCpuIntStat, Sd, 0, 1)
|
|
RegFunc(EncFmeCpuregs, 0x600F00, Dec0CpuIntStat, 0x14, EncFCs_Dec0CpuIntStat, 0x600f14)
|
|
FldFunc(EncFCs_Dec0CpuIntStat, Mbx, 31, 1)
|
|
FldFunc(EncFCs_Dec0CpuIntStat, Dec, 16, 1)
|
|
FldFunc(EncFCs_Dec0CpuIntStat, Si, 8, 1)
|
|
FldFunc(EncFCs_Dec0CpuIntStat, Rb, 1, 1)
|
|
FldFunc(EncFCs_Dec0CpuIntStat, Sd, 0, 1)
|
|
RegFunc(EncFmeCpuregs, 0x600F00, Dec1CpuIntStat, 0x14, EncFCs_Dec1CpuIntStat, 0x600f14)
|
|
FldFunc(EncFCs_Dec1CpuIntStat, Mbx, 31, 1)
|
|
FldFunc(EncFCs_Dec1CpuIntStat, Cab, 9, 1)
|
|
FldFunc(EncFCs_Dec1CpuIntStat, Si, 8, 1)
|
|
FldFunc(EncFCs_Dec1CpuIntStat, Rb, 1, 1)
|
|
FldFunc(EncFCs_Dec1CpuIntStat, Sd, 0, 1)
|
|
RegFunc(EncFmeCpuregs, 0x600F00, RegHst2cpuStat, 0x18, EncFCs_RegHst2cpuStat, 0x600f18)
|
|
FldFunc(EncFCs_RegHst2cpuStat, Value, 0, 32)
|
|
RegFunc(EncFmeCpuregs, 0x600F00, RegCpu2hstStat, 0x1C, EncFCs_RegCpu2hstStat, 0x600f1c)
|
|
FldFunc(EncFCs_RegCpu2hstStat, Value, 0, 32)
|
|
RegFunc(EncFmeCpuregs, 0x600F00, RegCpuIntgenSet, 0x20, EncFCs_RegCpuIntgenSet, 0x600f20)
|
|
FldFunc(EncFCs_RegCpuIntgenSet, Cpu2HstMbx, 31, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenSet, Int15, 15, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenSet, Int14, 14, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenSet, Int13, 13, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenSet, Int12, 12, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenSet, Int11, 11, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenSet, Int10, 10, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenSet, Int9, 9, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenSet, Int8, 8, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenSet, Int7, 7, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenSet, Int6, 6, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenSet, Int5, 5, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenSet, Int4, 4, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenSet, Int3, 3, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenSet, Int2, 2, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenSet, Int1, 1, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenSet, Int0, 0, 1)
|
|
RegFunc(EncFmeCpuregs, 0x600F00, RegCpuIntgenClr, 0x24, EncFCs_RegCpuIntgenClr, 0x600f24)
|
|
FldFunc(EncFCs_RegCpuIntgenClr, Cpu2HstMbx, 31, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenClr, Int15, 15, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenClr, Int14, 14, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenClr, Int13, 13, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenClr, Int12, 12, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenClr, Int11, 11, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenClr, Int10, 10, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenClr, Int9, 9, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenClr, Int8, 8, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenClr, Int7, 7, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenClr, Int6, 6, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenClr, Int5, 5, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenClr, Int4, 4, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenClr, Int3, 3, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenClr, Int2, 2, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenClr, Int1, 1, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenClr, Int0, 0, 1)
|
|
RegFunc(EncFmeCpuregs, 0x600F00, RegCpuIcacheMiss, 0x28, EncFCs_RegCpuIcacheMiss, 0x600f28)
|
|
FldFunc(EncFCs_RegCpuIcacheMiss, Count, 0, 32)
|
|
RegFunc(EncFmeCpuregs, 0x600F00, RegCpuIntgenMask, 0x2C, EncFCs_RegCpuIntgenMask, 0x600f2c)
|
|
FldFunc(EncFCs_RegCpuIntgenMask, Cpu2HstMbx, 31, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenMask, Int15, 15, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenMask, Int14, 14, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenMask, Int13, 13, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenMask, Int12, 12, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenMask, Int11, 11, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenMask, Int10, 10, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenMask, Int9, 9, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenMask, Int8, 8, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenMask, Int7, 7, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenMask, Int6, 6, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenMask, Int5, 5, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenMask, Int4, 4, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenMask, Int3, 3, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenMask, Int2, 2, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenMask, Int1, 1, 1)
|
|
FldFunc(EncFCs_RegCpuIntgenMask, Int0, 0, 1)
|
|
|
|
RegAreaFunc(EncFmeCpudmaBase, 0x601800, 0x6018FF)
|
|
RegFunc(EncFmeCpudma, 0x601800, RegDma0SdAddr, 0x0, EncFCa_RegDma0SdAddr, 0x601800)
|
|
FldFunc(EncFCa_RegDma0SdAddr, SdAddr, 0, 32)
|
|
RegFunc(EncFmeCpudma, 0x601800, RegDma0LclAddr, 0x4, EncFCa_RegDma0LclAddr, 0x601804)
|
|
FldFunc(EncFCa_RegDma0LclAddr, Addr, 2, 7)
|
|
RegFunc(EncFmeCpudma, 0x601800, RegDma0Len, 0x8, EncFCa_RegDma0Len, 0x601808)
|
|
FldFunc(EncFCa_RegDma0Len, Length, 2, 8)
|
|
RegFunc(EncFmeCpudma, 0x601800, RegDma1SdAddr, 0x10, EncFCa_RegDma1SdAddr, 0x601810)
|
|
FldFunc(EncFCa_RegDma1SdAddr, SdAddr, 0, 32)
|
|
RegFunc(EncFmeCpudma, 0x601800, RegDma1LclAddr, 0x14, EncFCa_RegDma1LclAddr, 0x601814)
|
|
FldFunc(EncFCa_RegDma1LclAddr, Addr, 2, 7)
|
|
RegFunc(EncFmeCpudma, 0x601800, RegDma1Len, 0x18, EncFCa_RegDma1Len, 0x601818)
|
|
FldFunc(EncFCa_RegDma1Len, Length, 2, 8)
|
|
RegFunc(EncFmeCpudma, 0x601800, RegDma2SdAddr, 0x20, EncFCa_RegDma2SdAddr, 0x601820)
|
|
FldFunc(EncFCa_RegDma2SdAddr, SdAddr, 0, 32)
|
|
RegFunc(EncFmeCpudma, 0x601800, RegDma2LclAddr, 0x24, EncFCa_RegDma2LclAddr, 0x601824)
|
|
FldFunc(EncFCa_RegDma2LclAddr, Addr, 2, 7)
|
|
RegFunc(EncFmeCpudma, 0x601800, RegDma2Len, 0x28, EncFCa_RegDma2Len, 0x601828)
|
|
FldFunc(EncFCa_RegDma2Len, Length, 2, 8)
|
|
RegFunc(EncFmeCpudma, 0x601800, RegDma3SdAddr, 0x30, EncFCa_RegDma3SdAddr, 0x601830)
|
|
FldFunc(EncFCa_RegDma3SdAddr, SdAddr, 0, 32)
|
|
RegFunc(EncFmeCpudma, 0x601800, RegDma3LclAddr, 0x34, EncFCa_RegDma3LclAddr, 0x601834)
|
|
FldFunc(EncFCa_RegDma3LclAddr, Addr, 2, 7)
|
|
RegFunc(EncFmeCpudma, 0x601800, RegDma3Len, 0x38, EncFCa_RegDma3Len, 0x601838)
|
|
FldFunc(EncFCa_RegDma3Len, Length, 2, 8)
|
|
RegFunc(EncFmeCpudma, 0x601800, RegDmaStatus, 0x40, EncFCa_RegDmaStatus, 0x601840)
|
|
FldFunc(EncFCa_RegDmaStatus, Act3, 3, 1)
|
|
FldFunc(EncFCa_RegDmaStatus, Act2, 2, 1)
|
|
FldFunc(EncFCa_RegDmaStatus, Act1, 1, 1)
|
|
FldFunc(EncFCa_RegDmaStatus, Act0, 0, 1)
|
|
|
|
RegAreaFunc(EncFmeDmamemBase, 0x601A00, 0x6021FF)
|
|
RegFunc(EncFmeDmamem, 0x601A00, DmaMem, 0x0, EncFDm_DmaMem, 0x601a00)
|
|
FldFunc(EncFDm_DmaMem, Data, 0, 32)
|
|
|
|
RegAreaFunc(EncFmeIndSdramRegsBase, 0x641000, 0x64107F)
|
|
RegFunc(EncFmeIndSdramRegs, 0x641000, RegSdramInc, 0x0, EncFISRs_RegSdramInc, 0x641000)
|
|
FldFunc(EncFISRs_RegSdramInc, Inc, 0, 1)
|
|
RegFunc(EncFmeIndSdramRegs, 0x641000, RegSdramAddr, 0x4, EncFISRs_RegSdramAddr, 0x641004)
|
|
FldFunc(EncFISRs_RegSdramAddr, Addr, 0, 32)
|
|
RegFunc(EncFmeIndSdramRegs, 0x641000, RegSdramData, 0x8, EncFISRs_RegSdramData, 0x641008)
|
|
FldFunc(EncFISRs_RegSdramData, Data, 0, 32)
|
|
RegFunc(EncFmeIndSdramRegs, 0x641000, RegCpuDbg, 0x10, EncFISRs_RegCpuDbg, 0x641010)
|
|
FldFunc(EncFISRs_RegCpuDbg, Hst, 0, 1)
|
|
|
|
RegAreaFunc(EncFmeCpucoreBase, 0x644000, 0x644FFF)
|
|
RegFunc(EncFmeCpucore, 0x644000, CpucoreReg, 0x0, EncFCe_CpucoreReg, 0x644000)
|
|
FldFunc(EncFCe_CpucoreReg, Addr, 0, 32)
|
|
|
|
RegAreaFunc(EncFmeCpuauxBase, 0x645000, 0x645FFF)
|
|
RegFunc(EncFmeCpuaux, 0x645000, CpuauxReg, 0x0, EncFCx_CpuauxReg, 0x645000)
|
|
FldFunc(EncFCx_CpuauxReg, Addr, 0, 32)
|
|
|
|
RegAreaFunc(EncFmeCpuimemBase, 0x646000, 0x647FFF)
|
|
RegFunc(EncFmeCpuimem, 0x646000, CpuimemReg, 0x0, EncFCm_CpuimemReg, 0x646000)
|
|
FldFunc(EncFCm_CpuimemReg, Addr, 0, 32)
|
|
|
|
RegAreaFunc(EncFmeCpudmemBase, 0x648000, 0x64FFFF)
|
|
RegFunc(EncFmeCpudmem, 0x648000, CpudmemReg, 0x0, EncFCm_CpudmemReg, 0x648000)
|
|
FldFunc(EncFCm_CpudmemReg, Addr, 0, 32)
|
|
|
|
#endif
|
|
|
|
|
|
//******************************************************************************
|
|
//
|
|
// PostProc Ring Bus Node
|
|
//
|
|
//******************************************************************************
|
|
#ifndef EXCLUDE_POSTPROC
|
|
|
|
RegAreaFunc(PostProcRegsBase, 0x700000, 0x70007F)
|
|
RegFunc(PostProcRegs, 0x700000, RbConfig , 0x0, PosPRs_RbConfig , 0x700000)
|
|
FldFunc(PosPRs_RbConfig , RdPostEna, 1, 1)
|
|
FldFunc(PosPRs_RbConfig , RdBypEna, 0, 1)
|
|
RegFunc(PostProcRegs, 0x700000, RbStickyError, 0x4, PosPRs_RbStickyError, 0x700004)
|
|
FldFunc(PosPRs_RbStickyError, Node, 1, 1)
|
|
FldFunc(PosPRs_RbStickyError, Tgt, 0, 1)
|
|
RegFunc(PostProcRegs, 0x700000, RbCurrentError, 0x8, PosPRs_RbCurrentError, 0x700008)
|
|
FldFunc(PosPRs_RbCurrentError, Node, 1, 1)
|
|
FldFunc(PosPRs_RbCurrentError, Tgt, 0, 1)
|
|
RegFunc(PostProcRegs, 0x700000, RbReadData, 0xC, PosPRs_RbReadData, 0x70000c)
|
|
FldFunc(PosPRs_RbReadData, Data, 0, 32)
|
|
|
|
RegAreaFunc(PostProcRingbusDebugRegsBase, 0x700080, 0x7000FF)
|
|
RegFunc(PostProcRingbusDebugRegs, 0x700080, RbDebugConfig, 0x0, PosPRDRs_RbDebugConfig, 0x700080)
|
|
FldFunc(PosPRDRs_RbDebugConfig, Addr3WrStat, 15, 1)
|
|
FldFunc(PosPRDRs_RbDebugConfig, Addr2WrStat, 14, 1)
|
|
FldFunc(PosPRDRs_RbDebugConfig, Addr1WrStat, 13, 1)
|
|
FldFunc(PosPRDRs_RbDebugConfig, Addr0WrStat, 12, 1)
|
|
FldFunc(PosPRDRs_RbDebugConfig, Addr3RdStat, 11, 1)
|
|
FldFunc(PosPRDRs_RbDebugConfig, Addr2RdStat, 10, 1)
|
|
FldFunc(PosPRDRs_RbDebugConfig, Addr1RdStat, 9, 1)
|
|
FldFunc(PosPRDRs_RbDebugConfig, Addr0RdStat, 8, 1)
|
|
FldFunc(PosPRDRs_RbDebugConfig, Addr3WrEna, 7, 1)
|
|
FldFunc(PosPRDRs_RbDebugConfig, Addr2WrEna, 6, 1)
|
|
FldFunc(PosPRDRs_RbDebugConfig, Addr1WrEna, 5, 1)
|
|
FldFunc(PosPRDRs_RbDebugConfig, Addr0WrEna, 4, 1)
|
|
FldFunc(PosPRDRs_RbDebugConfig, Addr3RdEna, 3, 1)
|
|
FldFunc(PosPRDRs_RbDebugConfig, Addr2RdEna, 2, 1)
|
|
FldFunc(PosPRDRs_RbDebugConfig, Addr1RdEna, 1, 1)
|
|
FldFunc(PosPRDRs_RbDebugConfig, Addr0RdEna, 0, 1)
|
|
RegFunc(PostProcRingbusDebugRegs, 0x700080, RbDebugReg0Addr, 0x4, PosPRDRs_RbDebugReg0Addr, 0x700084)
|
|
FldFunc(PosPRDRs_RbDebugReg0Addr, Addr, 0, 16)
|
|
RegFunc(PostProcRingbusDebugRegs, 0x700080, RbDebugReg1Addr, 0x8, PosPRDRs_RbDebugReg1Addr, 0x700088)
|
|
FldFunc(PosPRDRs_RbDebugReg1Addr, Addr, 0, 16)
|
|
RegFunc(PostProcRingbusDebugRegs, 0x700080, RbDebugReg2Addr, 0xC, PosPRDRs_RbDebugReg2Addr, 0x70008c)
|
|
FldFunc(PosPRDRs_RbDebugReg2Addr, Addr, 0, 16)
|
|
RegFunc(PostProcRingbusDebugRegs, 0x700080, RbDebugReg3Addr, 0x10, PosPRDRs_RbDebugReg3Addr, 0x700090)
|
|
FldFunc(PosPRDRs_RbDebugReg3Addr, Addr, 0, 16)
|
|
RegFunc(PostProcRingbusDebugRegs, 0x700080, RbDebugOutputReg, 0x14, PosPRDRs_RbDebugOutputReg, 0x700094)
|
|
FldFunc(PosPRDRs_RbDebugOutputReg, DspRst, 1, 1)
|
|
FldFunc(PosPRDRs_RbDebugOutputReg, FmmRst, 0, 1)
|
|
|
|
RegAreaFunc(DecodeFgtBase, 0x700600, 0x7007FF)
|
|
RegFunc(DecodeFgt, 0x700600, RegFgInorg, 0x0, DecFt_RegFgInorg, 0x700600)
|
|
FldFunc(DecFt_RegFgInorg, StartLinNum, 16, 11)
|
|
FldFunc(DecFt_RegFgInorg, StartPixNum, 0, 11)
|
|
RegFunc(DecodeFgt, 0x700600, RegFgInsize, 0x4, DecFt_RegFgInsize, 0x700604)
|
|
FldFunc(DecFt_RegFgInsize, NumLines, 16, 11)
|
|
FldFunc(DecFt_RegFgInsize, NumPix, 0, 11)
|
|
RegFunc(DecodeFgt, 0x700600, RegFgCtl, 0x8, DecFt_RegFgCtl, 0x700608)
|
|
FldFunc(DecFt_RegFgCtl, WritePicid, 16, 8)
|
|
FldFunc(DecFt_RegFgCtl, ReadPicid, 8, 8)
|
|
FldFunc(DecFt_RegFgCtl, Wrbot1top0, 6, 1)
|
|
FldFunc(DecFt_RegFgCtl, Wrfield1frame0, 5, 1)
|
|
FldFunc(DecFt_RegFgCtl, Rdbot1top0, 4, 1)
|
|
FldFunc(DecFt_RegFgCtl, Rdfield1frame0, 3, 1)
|
|
FldFunc(DecFt_RegFgCtl, Reset, 2, 1)
|
|
FldFunc(DecFt_RegFgCtl, DisWb, 1, 1)
|
|
FldFunc(DecFt_RegFgCtl, Load, 0, 1)
|
|
RegFunc(DecodeFgt, 0x700600, RegFgStart, 0xC, DecFt_RegFgStart, 0x70060c)
|
|
FldFunc(DecFt_RegFgStart, Start, 0, 1)
|
|
RegFunc(DecodeFgt, 0x700600, RegFgInsei, 0x10, DecFt_RegFgInsei, 0x700610)
|
|
FldFunc(DecFt_RegFgInsei, DbOffset, 8, 10)
|
|
FldFunc(DecFt_RegFgInsei, Newsei, 4, 1)
|
|
FldFunc(DecFt_RegFgInsei, Shift, 0, 4)
|
|
RegFunc(DecodeFgt, 0x700600, RegFgInyseed, 0x14, DecFt_RegFgInyseed, 0x700614)
|
|
FldFunc(DecFt_RegFgInyseed, Seed, 0, 32)
|
|
RegFunc(DecodeFgt, 0x700600, RegFgInuseed, 0x18, DecFt_RegFgInuseed, 0x700618)
|
|
FldFunc(DecFt_RegFgInuseed, Seed, 0, 32)
|
|
RegFunc(DecodeFgt, 0x700600, RegFgInvseed, 0x1C, DecFt_RegFgInvseed, 0x70061c)
|
|
FldFunc(DecFt_RegFgInvseed, Seed, 0, 32)
|
|
RegFunc(DecodeFgt, 0x700600, RegFgInylut, 0x20, DecFt_RegFgInylut, 0x700620)
|
|
FldFunc(DecFt_RegFgInylut, LutAddr, 24, 7)
|
|
FldFunc(DecFt_RegFgInylut, BaVal1, 20, 4)
|
|
FldFunc(DecFt_RegFgInylut, CompModelVal1, 12, 8)
|
|
FldFunc(DecFt_RegFgInylut, BaVal0, 8, 4)
|
|
FldFunc(DecFt_RegFgInylut, CompModelVal0, 0, 8)
|
|
RegFunc(DecodeFgt, 0x700600, RegFgInulut, 0x24, DecFt_RegFgInulut, 0x700624)
|
|
FldFunc(DecFt_RegFgInulut, LutAddr, 24, 7)
|
|
FldFunc(DecFt_RegFgInulut, BaVal1, 20, 4)
|
|
FldFunc(DecFt_RegFgInulut, CompModelVal1, 12, 8)
|
|
FldFunc(DecFt_RegFgInulut, BaVal0, 8, 4)
|
|
FldFunc(DecFt_RegFgInulut, CompModelVal0, 0, 8)
|
|
RegFunc(DecodeFgt, 0x700600, RegFgInvlut, 0x28, DecFt_RegFgInvlut, 0x700628)
|
|
FldFunc(DecFt_RegFgInvlut, LutAddr, 24, 7)
|
|
FldFunc(DecFt_RegFgInvlut, BaVal1, 20, 4)
|
|
FldFunc(DecFt_RegFgInvlut, CompModelVal1, 12, 8)
|
|
FldFunc(DecFt_RegFgInvlut, BaVal0, 8, 4)
|
|
FldFunc(DecFt_RegFgInvlut, CompModelVal0, 0, 8)
|
|
RegFunc(DecodeFgt, 0x700600, RegFgInlutRaddr, 0x2C, DecFt_RegFgInlutRaddr, 0x70062c)
|
|
FldFunc(DecFt_RegFgInlutRaddr, VlutRdAddr, 16, 7)
|
|
FldFunc(DecFt_RegFgInlutRaddr, UlutRdAddr, 8, 7)
|
|
FldFunc(DecFt_RegFgInlutRaddr, YlutRdAddr, 0, 7)
|
|
RegFunc(DecodeFgt, 0x700600, RegFgIncache1, 0x30, DecFt_RegFgIncache1, 0x700630)
|
|
FldFunc(DecFt_RegFgIncache1, PatVal3, 24, 8)
|
|
FldFunc(DecFt_RegFgIncache1, PatVal2, 16, 8)
|
|
FldFunc(DecFt_RegFgIncache1, PatVal1, 8, 8)
|
|
FldFunc(DecFt_RegFgIncache1, PatVal0, 0, 8)
|
|
RegFunc(DecodeFgt, 0x700600, RegFgIncache2, 0x34, DecFt_RegFgIncache2, 0x700634)
|
|
FldFunc(DecFt_RegFgIncache2, PatVal3, 24, 8)
|
|
FldFunc(DecFt_RegFgIncache2, PatVal2, 16, 8)
|
|
FldFunc(DecFt_RegFgIncache2, PatVal1, 8, 8)
|
|
FldFunc(DecFt_RegFgIncache2, PatVal0, 0, 8)
|
|
RegFunc(DecodeFgt, 0x700600, RegFgIncache3, 0x38, DecFt_RegFgIncache3, 0x700638)
|
|
FldFunc(DecFt_RegFgIncache3, PatVal1, 8, 8)
|
|
FldFunc(DecFt_RegFgIncache3, PatVal0, 0, 8)
|
|
RegFunc(DecodeFgt, 0x700600, RegFgInbase, 0x3C, DecFt_RegFgInbase, 0x70063c)
|
|
FldFunc(DecFt_RegFgInbase, Addr, 0, 32)
|
|
RegFunc(DecodeFgt, 0x700600, RegFgInal, 0x40, DecFt_RegFgInal, 0x700640)
|
|
FldFunc(DecFt_RegFgInal, NumLuma, 0, 11)
|
|
RegFunc(DecodeFgt, 0x700600, RegFgMint, 0x44, DecFt_RegFgMint, 0x700644)
|
|
FldFunc(DecFt_RegFgMint, FgAlmostDoneMask, 1, 1)
|
|
FldFunc(DecFt_RegFgMint, FgMask, 0, 1)
|
|
RegFunc(DecodeFgt, 0x700600, RegFgOycrc, 0x48, DecFt_RegFgOycrc, 0x700648)
|
|
FldFunc(DecFt_RegFgOycrc, Crc, 0, 32)
|
|
RegFunc(DecodeFgt, 0x700600, RegFgOucrc, 0x4C, DecFt_RegFgOucrc, 0x70064c)
|
|
FldFunc(DecFt_RegFgOucrc, Crc, 0, 32)
|
|
RegFunc(DecodeFgt, 0x700600, RegFgOvcrc, 0x50, DecFt_RegFgOvcrc, 0x700650)
|
|
FldFunc(DecFt_RegFgOvcrc, Crc, 0, 32)
|
|
RegFunc(DecodeFgt, 0x700600, RegFgStatus, 0x54, DecFt_RegFgStatus, 0x700654)
|
|
FldFunc(DecFt_RegFgStatus, Id, 28, 4)
|
|
FldFunc(DecFt_RegFgStatus, WrBusy, 8, 1)
|
|
FldFunc(DecFt_RegFgStatus, DblkBusy, 7, 1)
|
|
FldFunc(DecFt_RegFgStatus, CompBusy, 6, 1)
|
|
FldFunc(DecFt_RegFgStatus, BagBusy, 5, 1)
|
|
FldFunc(DecFt_RegFgStatus, DmaBusy, 4, 1)
|
|
FldFunc(DecFt_RegFgStatus, HwBusy, 3, 1)
|
|
FldFunc(DecFt_RegFgStatus, ResetActive, 2, 1)
|
|
FldFunc(DecFt_RegFgStatus, WrDone, 1, 1)
|
|
FldFunc(DecFt_RegFgStatus, Done, 0, 1)
|
|
|
|
RegAreaFunc(DecodeVoutaBase, 0x700800, 0x70087F)
|
|
RegFunc(DecodeVouta, 0x700800, RegVppCtl, 0x0, DecVa_RegVppCtl, 0x700800)
|
|
FldFunc(DecVa_RegVppCtl, Start, 31, 1)
|
|
FldFunc(DecVa_RegVppCtl, Loop, 30, 1)
|
|
FldFunc(DecVa_RegVppCtl, Rst, 29, 1)
|
|
FldFunc(DecVa_RegVppCtl, Vifrst, 28, 1)
|
|
FldFunc(DecVa_RegVppCtl, DiagLoad, 27, 1)
|
|
FldFunc(DecVa_RegVppCtl, Outfield, 19, 1)
|
|
FldFunc(DecVa_RegVppCtl, Outbot, 18, 1)
|
|
FldFunc(DecVa_RegVppCtl, Field, 17, 1)
|
|
FldFunc(DecVa_RegVppCtl, Bot, 16, 1)
|
|
FldFunc(DecVa_RegVppCtl, OppPicid, 8, 8)
|
|
FldFunc(DecVa_RegVppCtl, RefPicid, 0, 8)
|
|
RegFunc(DecodeVouta, 0x700800, RegVppMode, 0x4, DecVa_RegVppMode, 0x700804)
|
|
FldFunc(DecVa_RegVppMode, CrcRange, 31, 1)
|
|
FldFunc(DecVa_RegVppMode, CrcBlack, 30, 1)
|
|
FldFunc(DecVa_RegVppMode, Opt656Dis, 29, 1)
|
|
FldFunc(DecVa_RegVppMode, OptmemEna, 28, 1)
|
|
FldFunc(DecVa_RegVppMode, ClipEna, 27, 1)
|
|
FldFunc(DecVa_RegVppMode, FiltFld, 25, 1)
|
|
FldFunc(DecVa_RegVppMode, OsdFull, 24, 1)
|
|
FldFunc(DecVa_RegVppMode, OsdEna, 23, 1)
|
|
FldFunc(DecVa_RegVppMode, DeintEna, 22, 1)
|
|
FldFunc(DecVa_RegVppMode, Clip601, 20, 1)
|
|
FldFunc(DecVa_RegVppMode, IntFilt, 19, 1)
|
|
FldFunc(DecVa_RegVppMode, CscEna, 18, 1)
|
|
FldFunc(DecVa_RegVppMode, ChrLeft, 17, 1)
|
|
FldFunc(DecVa_RegVppMode, ChrUp, 16, 1)
|
|
FldFunc(DecVa_RegVppMode, Yfen, 15, 1)
|
|
FldFunc(DecVa_RegVppMode, YfNumphs, 8, 4)
|
|
FldFunc(DecVa_RegVppMode, Xfen, 7, 1)
|
|
FldFunc(DecVa_RegVppMode, XfNumphs, 0, 4)
|
|
RegFunc(DecodeVouta, 0x700800, RegVppInorg, 0x8, DecVa_RegVppInorg, 0x700808)
|
|
FldFunc(DecVa_RegVppInorg, Inyorg, 16, 12)
|
|
FldFunc(DecVa_RegVppInorg, Inxorg, 0, 12)
|
|
RegFunc(DecodeVouta, 0x700800, RegVppInsize, 0xC, DecVa_RegVppInsize, 0x70080c)
|
|
FldFunc(DecVa_RegVppInsize, Inysize, 16, 12)
|
|
FldFunc(DecVa_RegVppInsize, Inxsize, 0, 12)
|
|
RegFunc(DecodeVouta, 0x700800, RegVppIntctl, 0x10, DecVa_RegVppIntctl, 0x700810)
|
|
FldFunc(DecVa_RegVppIntctl, AlmostDoneLineNumber, 16, 12)
|
|
FldFunc(DecVa_RegVppIntctl, QintMode, 15, 1)
|
|
FldFunc(DecVa_RegVppIntctl, EnaVifUnderflow, 4, 1)
|
|
FldFunc(DecVa_RegVppIntctl, EnaVifad, 3, 1)
|
|
FldFunc(DecVa_RegVppIntctl, EnaVifeof, 2, 1)
|
|
FldFunc(DecVa_RegVppIntctl, EnaAd, 1, 1)
|
|
FldFunc(DecVa_RegVppIntctl, EnaEof, 0, 1)
|
|
RegFunc(DecodeVouta, 0x700800, RegVppIntstat, 0x14, DecVa_RegVppIntstat, 0x700814)
|
|
FldFunc(DecVa_RegVppIntstat, Queuecount, 28, 4)
|
|
FldFunc(DecVa_RegVppIntstat, Revid, 24, 4)
|
|
FldFunc(DecVa_RegVppIntstat, EofOpt, 23, 1)
|
|
FldFunc(DecVa_RegVppIntstat, EofOsd, 22, 1)
|
|
FldFunc(DecVa_RegVppIntstat, EofFch, 21, 1)
|
|
FldFunc(DecVa_RegVppIntstat, EofDnt, 20, 1)
|
|
FldFunc(DecVa_RegVppIntstat, EofScx, 19, 1)
|
|
FldFunc(DecVa_RegVppIntstat, EofScy, 18, 1)
|
|
FldFunc(DecVa_RegVppIntstat, EofChr, 17, 1)
|
|
FldFunc(DecVa_RegVppIntstat, EofFmt, 16, 1)
|
|
FldFunc(DecVa_RegVppIntstat, Debug, 8, 8)
|
|
FldFunc(DecVa_RegVppIntstat, Run, 7, 1)
|
|
FldFunc(DecVa_RegVppIntstat, Rstact, 6, 1)
|
|
FldFunc(DecVa_RegVppIntstat, VifUnderflow, 4, 1)
|
|
FldFunc(DecVa_RegVppIntstat, Vifad, 3, 1)
|
|
FldFunc(DecVa_RegVppIntstat, Vifeof, 2, 1)
|
|
FldFunc(DecVa_RegVppIntstat, Ad, 1, 1)
|
|
FldFunc(DecVa_RegVppIntstat, Eof, 0, 1)
|
|
RegFunc(DecodeVouta, 0x700800, RegVppFilttap, 0x18, DecVa_RegVppFilttap, 0x700818)
|
|
FldFunc(DecVa_RegVppFilttap, Coefa, 24, 8)
|
|
FldFunc(DecVa_RegVppFilttap, Coefb, 16, 8)
|
|
FldFunc(DecVa_RegVppFilttap, Coefc, 8, 8)
|
|
FldFunc(DecVa_RegVppFilttap, Coefd, 0, 8)
|
|
RegFunc(DecodeVouta, 0x700800, RegVppFiltctl, 0x1C, DecVa_RegVppFiltctl, 0x70081c)
|
|
FldFunc(DecVa_RegVppFiltctl, Readback, 13, 1)
|
|
FldFunc(DecVa_RegVppFiltctl, BotFld, 12, 1)
|
|
FldFunc(DecVa_RegVppFiltctl, Yf, 11, 1)
|
|
FldFunc(DecVa_RegVppFiltctl, Xf, 10, 1)
|
|
FldFunc(DecVa_RegVppFiltctl, Ln, 9, 1)
|
|
FldFunc(DecVa_RegVppFiltctl, Cn, 8, 1)
|
|
FldFunc(DecVa_RegVppFiltctl, Inc, 4, 4)
|
|
FldFunc(DecVa_RegVppFiltctl, Phase, 0, 4)
|
|
RegFunc(DecodeVouta, 0x700800, RegVppOutsize, 0x20, DecVa_RegVppOutsize, 0x700820)
|
|
FldFunc(DecVa_RegVppOutsize, Outysize, 16, 12)
|
|
FldFunc(DecVa_RegVppOutsize, Outxsize, 0, 12)
|
|
RegFunc(DecodeVouta, 0x700800, RegVppOutyedge, 0x24, DecVa_RegVppOutyedge, 0x700824)
|
|
FldFunc(DecVa_RegVppOutyedge, Crop, 31, 1)
|
|
FldFunc(DecVa_RegVppOutyedge, Counttop, 16, 12)
|
|
FldFunc(DecVa_RegVppOutyedge, Countbottom, 0, 12)
|
|
RegFunc(DecodeVouta, 0x700800, RegVppOutxedge, 0x28, DecVa_RegVppOutxedge, 0x700828)
|
|
FldFunc(DecVa_RegVppOutxedge, Crop, 31, 1)
|
|
FldFunc(DecVa_RegVppOutxedge, Countleft, 16, 12)
|
|
FldFunc(DecVa_RegVppOutxedge, Countright, 0, 12)
|
|
RegFunc(DecodeVouta, 0x700800, RegVppOsd, 0x2C, DecVa_RegVppOsd, 0x70082c)
|
|
FldFunc(DecVa_RegVppOsd, Addr, 0, 32)
|
|
RegFunc(DecodeVouta, 0x700800, RegVppInoffset, 0x30, DecVa_RegVppInoffset, 0x700830)
|
|
FldFunc(DecVa_RegVppInoffset, Toplum, 24, 8)
|
|
FldFunc(DecVa_RegVppInoffset, Topchr, 16, 8)
|
|
FldFunc(DecVa_RegVppInoffset, Botlum, 8, 8)
|
|
FldFunc(DecVa_RegVppInoffset, Botchr, 0, 8)
|
|
RegFunc(DecodeVouta, 0x700800, RegVppRammon, 0x34, DecVa_RegVppRammon, 0x700834)
|
|
FldFunc(DecVa_RegVppRammon, Osddry, 24, 8)
|
|
FldFunc(DecVa_RegVppRammon, Fchdry, 16, 8)
|
|
FldFunc(DecVa_RegVppRammon, Latency, 0, 16)
|
|
RegFunc(DecodeVouta, 0x700800, RegVppPadvalue, 0x38, DecVa_RegVppPadvalue, 0x700838)
|
|
FldFunc(DecVa_RegVppPadvalue, Padinsp, 31, 1)
|
|
FldFunc(DecVa_RegVppPadvalue, Padlum, 16, 8)
|
|
FldFunc(DecVa_RegVppPadvalue, Padchru, 8, 8)
|
|
FldFunc(DecVa_RegVppPadvalue, Padchrv, 0, 8)
|
|
RegFunc(DecodeVouta, 0x700800, RegVppOpt, 0x3C, DecVa_RegVppOpt, 0x70083c)
|
|
FldFunc(DecVa_RegVppOpt, Addr, 0, 32)
|
|
RegFunc(DecodeVouta, 0x700800, RegVppCrclum, 0x40, DecVa_RegVppCrclum, 0x700840)
|
|
FldFunc(DecVa_RegVppCrclum, Crc, 0, 32)
|
|
RegFunc(DecodeVouta, 0x700800, RegVppCrcchr, 0x44, DecVa_RegVppCrcchr, 0x700844)
|
|
FldFunc(DecVa_RegVppCrcchr, Crc, 0, 32)
|
|
RegFunc(DecodeVouta, 0x700800, RegVppCrccolor, 0x48, DecVa_RegVppCrccolor, 0x700848)
|
|
FldFunc(DecVa_RegVppCrccolor, Lum, 16, 8)
|
|
FldFunc(DecVa_RegVppCrccolor, Chru, 8, 8)
|
|
FldFunc(DecVa_RegVppCrccolor, Chrv, 0, 8)
|
|
RegFunc(DecodeVouta, 0x700800, RegVppChecksum, 0x4C, DecVa_RegVppChecksum, 0x70084c)
|
|
FldFunc(DecVa_RegVppChecksum, Sum, 0, 32)
|
|
RegFunc(DecodeVouta, 0x700800, RegVppRange, 0x50, DecVa_RegVppRange, 0x700850)
|
|
FldFunc(DecVa_RegVppRange, Main, 31, 1)
|
|
FldFunc(DecVa_RegVppRange, LumEn, 15, 1)
|
|
FldFunc(DecVa_RegVppRange, Lum, 8, 3)
|
|
FldFunc(DecVa_RegVppRange, ChrEn, 7, 1)
|
|
FldFunc(DecVa_RegVppRange, Chr, 0, 3)
|
|
RegFunc(DecodeVouta, 0x700800, RegVppColorcvt, 0x54, DecVa_RegVppColorcvt, 0x700854)
|
|
FldFunc(DecVa_RegVppColorcvt, Coef1, 16, 12)
|
|
FldFunc(DecVa_RegVppColorcvt, Coef0, 0, 12)
|
|
RegFunc(DecodeVouta, 0x700800, RegVppDecimate, 0x58, DecVa_RegVppDecimate, 0x700858)
|
|
FldFunc(DecVa_RegVppDecimate, YEn, 31, 1)
|
|
FldFunc(DecVa_RegVppDecimate, YM, 24, 7)
|
|
FldFunc(DecVa_RegVppDecimate, YN, 16, 7)
|
|
FldFunc(DecVa_RegVppDecimate, XEn, 15, 1)
|
|
FldFunc(DecVa_RegVppDecimate, XM, 8, 7)
|
|
FldFunc(DecVa_RegVppDecimate, XN, 0, 7)
|
|
RegFunc(DecodeVouta, 0x700800, RegVppDecisize, 0x5C, DecVa_RegVppDecisize, 0x70085c)
|
|
FldFunc(DecVa_RegVppDecisize, YSize, 16, 12)
|
|
FldFunc(DecVa_RegVppDecisize, XSize, 0, 12)
|
|
RegFunc(DecodeVouta, 0x700800, RegVppDecivec, 0x60, DecVa_RegVppDecivec, 0x700860)
|
|
FldFunc(DecVa_RegVppDecivec, Selects, 0, 32)
|
|
|
|
RegAreaFunc(DecodeV656aBase, 0x700880, 0x7008FF)
|
|
RegFunc(DecodeV656a, 0x700880, VidCtlReg, 0x0, DecVa_VidCtlReg, 0x700880)
|
|
FldFunc(DecVa_VidCtlReg, ResetVidout, 14, 1)
|
|
FldFunc(DecVa_VidCtlReg, DiagLoad, 13, 1)
|
|
FldFunc(DecVa_VidCtlReg, ClkOpp, 12, 1)
|
|
FldFunc(DecVa_VidCtlReg, SdSel, 11, 1)
|
|
FldFunc(DecVa_VidCtlReg, SdDvi, 10, 1)
|
|
FldFunc(DecVa_VidCtlReg, Oe, 9, 1)
|
|
FldFunc(DecVa_VidCtlReg, UnSw, 8, 1)
|
|
FldFunc(DecVa_VidCtlReg, Nrt, 7, 1)
|
|
FldFunc(DecVa_VidCtlReg, ClipDis, 6, 1)
|
|
FldFunc(DecVa_VidCtlReg, InvertSync, 5, 1)
|
|
FldFunc(DecVa_VidCtlReg, DviMode, 4, 1)
|
|
FldFunc(DecVa_VidCtlReg, Vsynen, 3, 1)
|
|
FldFunc(DecVa_VidCtlReg, Wm, 2, 1)
|
|
FldFunc(DecVa_VidCtlReg, Pro, 1, 1)
|
|
FldFunc(DecVa_VidCtlReg, En, 0, 1)
|
|
RegFunc(DecodeV656a, 0x700880, VidSpl, 0x4, DecVa_VidSpl, 0x700884)
|
|
FldFunc(DecVa_VidSpl, SamplesPerLine, 0, 13)
|
|
RegFunc(DecodeV656a, 0x700880, VidSpal, 0x8, DecVa_VidSpal, 0x700888)
|
|
FldFunc(DecVa_VidSpal, SamplesPerActiveLine, 0, 13)
|
|
RegFunc(DecodeV656a, 0x700880, EToE, 0xC, DecVa_EToE, 0x70088c)
|
|
FldFunc(DecVa_EToE, EndOfLineToEndOfLine, 0, 13)
|
|
RegFunc(DecodeV656a, 0x700880, Lpf, 0x10, DecVa_Lpf, 0x700890)
|
|
FldFunc(DecVa_Lpf, LinePerFrame, 0, 13)
|
|
RegFunc(DecodeV656a, 0x700880, Vlpf, 0x14, DecVa_Vlpf, 0x700894)
|
|
FldFunc(DecVa_Vlpf, VideoLinesPerFrame, 0, 13)
|
|
RegFunc(DecodeV656a, 0x700880, Vbsf1, 0x18, DecVa_Vbsf1, 0x700898)
|
|
FldFunc(DecVa_Vbsf1, VideoBlankingStartField1, 0, 13)
|
|
RegFunc(DecodeV656a, 0x700880, Vbff1, 0x1C, DecVa_Vbff1, 0x70089c)
|
|
FldFunc(DecVa_Vbff1, VideoBlankingFinishField1, 0, 13)
|
|
RegFunc(DecodeV656a, 0x700880, Vbsf2, 0x20, DecVa_Vbsf2, 0x7008a0)
|
|
FldFunc(DecVa_Vbsf2, VideoBlankingStartField2, 0, 13)
|
|
RegFunc(DecodeV656a, 0x700880, Vbff2, 0x24, DecVa_Vbff2, 0x7008a4)
|
|
FldFunc(DecVa_Vbff2, VideoBlankingFinishField2, 0, 13)
|
|
RegFunc(DecodeV656a, 0x700880, F1id, 0x28, DecVa_F1id, 0x7008a8)
|
|
FldFunc(DecVa_F1id, Field1Id, 0, 13)
|
|
RegFunc(DecodeV656a, 0x700880, F2id, 0x2C, DecVa_F2id, 0x7008ac)
|
|
FldFunc(DecVa_F2id, Field2Id, 0, 13)
|
|
RegFunc(DecodeV656a, 0x700880, Vcurfld, 0x30, DecVa_Vcurfld, 0x7008b0)
|
|
FldFunc(DecVa_Vcurfld, CcBufOcc, 8, 2)
|
|
FldFunc(DecVa_Vcurfld, 656BufOcc, 4, 2)
|
|
FldFunc(DecVa_Vcurfld, VdUnd, 3, 1)
|
|
FldFunc(DecVa_Vcurfld, VsynErr, 2, 1)
|
|
FldFunc(DecVa_Vcurfld, FldIn, 1, 1)
|
|
FldFunc(DecVa_Vcurfld, 656Fld, 0, 1)
|
|
RegFunc(DecodeV656a, 0x700880, VsdF0, 0x34, DecVa_VsdF0, 0x7008b4)
|
|
FldFunc(DecVa_VsdF0, F0dist, 0, 22)
|
|
RegFunc(DecodeV656a, 0x700880, VsdF1, 0x38, DecVa_VsdF1, 0x7008b8)
|
|
FldFunc(DecVa_VsdF1, F1dist, 0, 22)
|
|
RegFunc(DecodeV656a, 0x700880, Vsw, 0x3C, DecVa_Vsw, 0x7008bc)
|
|
FldFunc(DecVa_Vsw, Gbndsize, 0, 7)
|
|
RegFunc(DecodeV656a, 0x700880, HdDviHsyncStart, 0x40, DecVa_HdDviHsyncStart, 0x7008c0)
|
|
FldFunc(DecVa_HdDviHsyncStart, Addr, 0, 22)
|
|
RegFunc(DecodeV656a, 0x700880, HdDviHsyncSize, 0x44, DecVa_HdDviHsyncSize, 0x7008c4)
|
|
FldFunc(DecVa_HdDviHsyncSize, Size, 0, 22)
|
|
RegFunc(DecodeV656a, 0x700880, HdDviVsyncF1Start, 0x48, DecVa_HdDviVsyncF1Start, 0x7008c8)
|
|
FldFunc(DecVa_HdDviVsyncF1Start, Addr, 0, 22)
|
|
RegFunc(DecodeV656a, 0x700880, HdDviVsyncF1Size, 0x4C, DecVa_HdDviVsyncF1Size, 0x7008cc)
|
|
FldFunc(DecVa_HdDviVsyncF1Size, Size, 0, 22)
|
|
RegFunc(DecodeV656a, 0x700880, HdDviVsyncF2Start, 0x50, DecVa_HdDviVsyncF2Start, 0x7008d0)
|
|
FldFunc(DecVa_HdDviVsyncF2Start, Addr, 0, 22)
|
|
RegFunc(DecodeV656a, 0x700880, HdDviVsyncF2Size, 0x54, DecVa_HdDviVsyncF2Size, 0x7008d4)
|
|
FldFunc(DecVa_HdDviVsyncF2Size, Size, 0, 22)
|
|
RegFunc(DecodeV656a, 0x700880, BkF1, 0x58, DecVa_BkF1, 0x7008d8)
|
|
FldFunc(DecVa_BkF1, Bk, 0, 12)
|
|
RegFunc(DecodeV656a, 0x700880, BkF2, 0x5C, DecVa_BkF2, 0x7008dc)
|
|
FldFunc(DecVa_BkF2, Bk, 0, 12)
|
|
RegFunc(DecodeV656a, 0x700880, Adl656, 0x60, DecVa_Adl656, 0x7008e0)
|
|
FldFunc(DecVa_Adl656, AlmostDoneInt, 0, 13)
|
|
RegFunc(DecodeV656a, 0x700880, CcBufAddr, 0x64, DecVa_CcBufAddr, 0x7008e4)
|
|
FldFunc(DecVa_CcBufAddr, CcEnable, 31, 1)
|
|
FldFunc(DecVa_CcBufAddr, BufferAddr, 0, 31)
|
|
RegFunc(DecodeV656a, 0x700880, CcStrt, 0x68, DecVa_CcStrt, 0x7008e8)
|
|
FldFunc(DecVa_CcStrt, CcLineStartF2, 16, 13)
|
|
FldFunc(DecVa_CcStrt, CcLineStartF1, 0, 13)
|
|
RegFunc(DecodeV656a, 0x700880, CcLines, 0x6C, DecVa_CcLines, 0x7008ec)
|
|
FldFunc(DecVa_CcLines, CcNumLinesF2, 16, 13)
|
|
FldFunc(DecVa_CcLines, CcNumLinesF1, 0, 13)
|
|
RegFunc(DecodeV656a, 0x700880, ClkmuxCtrl, 0x70, DecVa_ClkmuxCtrl, 0x7008f0)
|
|
FldFunc(DecVa_ClkmuxCtrl, ResetClkmux, 8, 1)
|
|
FldFunc(DecVa_ClkmuxCtrl, ClkmuxDelay, 0, 8)
|
|
|
|
RegAreaFunc(DecodeVoutbBase, 0x700900, 0x70097F)
|
|
RegFunc(DecodeVoutb, 0x700900, RegVppCtl, 0x0, DecVb_RegVppCtl, 0x700900)
|
|
FldFunc(DecVb_RegVppCtl, Start, 31, 1)
|
|
FldFunc(DecVb_RegVppCtl, Loop, 30, 1)
|
|
FldFunc(DecVb_RegVppCtl, Rst, 29, 1)
|
|
FldFunc(DecVb_RegVppCtl, Vifrst, 28, 1)
|
|
FldFunc(DecVb_RegVppCtl, DiagLoad, 27, 1)
|
|
FldFunc(DecVb_RegVppCtl, Outfield, 19, 1)
|
|
FldFunc(DecVb_RegVppCtl, Outbot, 18, 1)
|
|
FldFunc(DecVb_RegVppCtl, Field, 17, 1)
|
|
FldFunc(DecVb_RegVppCtl, Bot, 16, 1)
|
|
FldFunc(DecVb_RegVppCtl, OppPicid, 8, 8)
|
|
FldFunc(DecVb_RegVppCtl, RefPicid, 0, 8)
|
|
RegFunc(DecodeVoutb, 0x700900, RegVppMode, 0x4, DecVb_RegVppMode, 0x700904)
|
|
FldFunc(DecVb_RegVppMode, CrcRange, 31, 1)
|
|
FldFunc(DecVb_RegVppMode, CrcBlack, 30, 1)
|
|
FldFunc(DecVb_RegVppMode, Opt656Dis, 29, 1)
|
|
FldFunc(DecVb_RegVppMode, OptmemEna, 28, 1)
|
|
FldFunc(DecVb_RegVppMode, ClipEna, 27, 1)
|
|
FldFunc(DecVb_RegVppMode, FiltFld, 25, 1)
|
|
FldFunc(DecVb_RegVppMode, OsdFull, 24, 1)
|
|
FldFunc(DecVb_RegVppMode, OsdEna, 23, 1)
|
|
FldFunc(DecVb_RegVppMode, DeintEna, 22, 1)
|
|
FldFunc(DecVb_RegVppMode, Clip601, 20, 1)
|
|
FldFunc(DecVb_RegVppMode, IntFilt, 19, 1)
|
|
FldFunc(DecVb_RegVppMode, CscEna, 18, 1)
|
|
FldFunc(DecVb_RegVppMode, ChrLeft, 17, 1)
|
|
FldFunc(DecVb_RegVppMode, ChrUp, 16, 1)
|
|
FldFunc(DecVb_RegVppMode, Yfen, 15, 1)
|
|
FldFunc(DecVb_RegVppMode, YfNumphs, 8, 4)
|
|
FldFunc(DecVb_RegVppMode, Xfen, 7, 1)
|
|
FldFunc(DecVb_RegVppMode, XfNumphs, 0, 4)
|
|
RegFunc(DecodeVoutb, 0x700900, RegVppInorg, 0x8, DecVb_RegVppInorg, 0x700908)
|
|
FldFunc(DecVb_RegVppInorg, Inyorg, 16, 12)
|
|
FldFunc(DecVb_RegVppInorg, Inxorg, 0, 12)
|
|
RegFunc(DecodeVoutb, 0x700900, RegVppInsize, 0xC, DecVb_RegVppInsize, 0x70090c)
|
|
FldFunc(DecVb_RegVppInsize, Inysize, 16, 12)
|
|
FldFunc(DecVb_RegVppInsize, Inxsize, 0, 12)
|
|
RegFunc(DecodeVoutb, 0x700900, RegVppIntctl, 0x10, DecVb_RegVppIntctl, 0x700910)
|
|
FldFunc(DecVb_RegVppIntctl, AlmostDoneLineNumber, 16, 12)
|
|
FldFunc(DecVb_RegVppIntctl, QintMode, 15, 1)
|
|
FldFunc(DecVb_RegVppIntctl, EnaVifUnderflow, 4, 1)
|
|
FldFunc(DecVb_RegVppIntctl, EnaVifad, 3, 1)
|
|
FldFunc(DecVb_RegVppIntctl, EnaVifeof, 2, 1)
|
|
FldFunc(DecVb_RegVppIntctl, EnaAd, 1, 1)
|
|
FldFunc(DecVb_RegVppIntctl, EnaEof, 0, 1)
|
|
RegFunc(DecodeVoutb, 0x700900, RegVppIntstat, 0x14, DecVb_RegVppIntstat, 0x700914)
|
|
FldFunc(DecVb_RegVppIntstat, Queuecount, 28, 4)
|
|
FldFunc(DecVb_RegVppIntstat, Revid, 24, 4)
|
|
FldFunc(DecVb_RegVppIntstat, EofOpt, 23, 1)
|
|
FldFunc(DecVb_RegVppIntstat, EofOsd, 22, 1)
|
|
FldFunc(DecVb_RegVppIntstat, EofFch, 21, 1)
|
|
FldFunc(DecVb_RegVppIntstat, EofDnt, 20, 1)
|
|
FldFunc(DecVb_RegVppIntstat, EofScx, 19, 1)
|
|
FldFunc(DecVb_RegVppIntstat, EofScy, 18, 1)
|
|
FldFunc(DecVb_RegVppIntstat, EofChr, 17, 1)
|
|
FldFunc(DecVb_RegVppIntstat, EofFmt, 16, 1)
|
|
FldFunc(DecVb_RegVppIntstat, Debug, 8, 8)
|
|
FldFunc(DecVb_RegVppIntstat, Run, 7, 1)
|
|
FldFunc(DecVb_RegVppIntstat, Rstact, 6, 1)
|
|
FldFunc(DecVb_RegVppIntstat, VifUnderflow, 4, 1)
|
|
FldFunc(DecVb_RegVppIntstat, Vifad, 3, 1)
|
|
FldFunc(DecVb_RegVppIntstat, Vifeof, 2, 1)
|
|
FldFunc(DecVb_RegVppIntstat, Ad, 1, 1)
|
|
FldFunc(DecVb_RegVppIntstat, Eof, 0, 1)
|
|
RegFunc(DecodeVoutb, 0x700900, RegVppFilttap, 0x18, DecVb_RegVppFilttap, 0x700918)
|
|
FldFunc(DecVb_RegVppFilttap, Coefa, 24, 8)
|
|
FldFunc(DecVb_RegVppFilttap, Coefb, 16, 8)
|
|
FldFunc(DecVb_RegVppFilttap, Coefc, 8, 8)
|
|
FldFunc(DecVb_RegVppFilttap, Coefd, 0, 8)
|
|
RegFunc(DecodeVoutb, 0x700900, RegVppFiltctl, 0x1C, DecVb_RegVppFiltctl, 0x70091c)
|
|
FldFunc(DecVb_RegVppFiltctl, Readback, 13, 1)
|
|
FldFunc(DecVb_RegVppFiltctl, BotFld, 12, 1)
|
|
FldFunc(DecVb_RegVppFiltctl, Yf, 11, 1)
|
|
FldFunc(DecVb_RegVppFiltctl, Xf, 10, 1)
|
|
FldFunc(DecVb_RegVppFiltctl, Ln, 9, 1)
|
|
FldFunc(DecVb_RegVppFiltctl, Cn, 8, 1)
|
|
FldFunc(DecVb_RegVppFiltctl, Inc, 4, 4)
|
|
FldFunc(DecVb_RegVppFiltctl, Phase, 0, 4)
|
|
RegFunc(DecodeVoutb, 0x700900, RegVppOutsize, 0x20, DecVb_RegVppOutsize, 0x700920)
|
|
FldFunc(DecVb_RegVppOutsize, Outysize, 16, 12)
|
|
FldFunc(DecVb_RegVppOutsize, Outxsize, 0, 12)
|
|
RegFunc(DecodeVoutb, 0x700900, RegVppOutyedge, 0x24, DecVb_RegVppOutyedge, 0x700924)
|
|
FldFunc(DecVb_RegVppOutyedge, Crop, 31, 1)
|
|
FldFunc(DecVb_RegVppOutyedge, Counttop, 16, 12)
|
|
FldFunc(DecVb_RegVppOutyedge, Countbottom, 0, 12)
|
|
RegFunc(DecodeVoutb, 0x700900, RegVppOutxedge, 0x28, DecVb_RegVppOutxedge, 0x700928)
|
|
FldFunc(DecVb_RegVppOutxedge, Crop, 31, 1)
|
|
FldFunc(DecVb_RegVppOutxedge, Countleft, 16, 12)
|
|
FldFunc(DecVb_RegVppOutxedge, Countright, 0, 12)
|
|
RegFunc(DecodeVoutb, 0x700900, RegVppOsd, 0x2C, DecVb_RegVppOsd, 0x70092c)
|
|
FldFunc(DecVb_RegVppOsd, Addr, 0, 32)
|
|
RegFunc(DecodeVoutb, 0x700900, RegVppInoffset, 0x30, DecVb_RegVppInoffset, 0x700930)
|
|
FldFunc(DecVb_RegVppInoffset, Toplum, 24, 8)
|
|
FldFunc(DecVb_RegVppInoffset, Topchr, 16, 8)
|
|
FldFunc(DecVb_RegVppInoffset, Botlum, 8, 8)
|
|
FldFunc(DecVb_RegVppInoffset, Botchr, 0, 8)
|
|
RegFunc(DecodeVoutb, 0x700900, RegVppRammon, 0x34, DecVb_RegVppRammon, 0x700934)
|
|
FldFunc(DecVb_RegVppRammon, Osddry, 24, 8)
|
|
FldFunc(DecVb_RegVppRammon, Fchdry, 16, 8)
|
|
FldFunc(DecVb_RegVppRammon, Latency, 0, 16)
|
|
RegFunc(DecodeVoutb, 0x700900, RegVppPadvalue, 0x38, DecVb_RegVppPadvalue, 0x700938)
|
|
FldFunc(DecVb_RegVppPadvalue, Padinsp, 31, 1)
|
|
FldFunc(DecVb_RegVppPadvalue, Padlum, 16, 8)
|
|
FldFunc(DecVb_RegVppPadvalue, Padchru, 8, 8)
|
|
FldFunc(DecVb_RegVppPadvalue, Padchrv, 0, 8)
|
|
RegFunc(DecodeVoutb, 0x700900, RegVppOpt, 0x3C, DecVb_RegVppOpt, 0x70093c)
|
|
FldFunc(DecVb_RegVppOpt, Addr, 0, 32)
|
|
RegFunc(DecodeVoutb, 0x700900, RegVppCrclum, 0x40, DecVb_RegVppCrclum, 0x700940)
|
|
FldFunc(DecVb_RegVppCrclum, Crc, 0, 32)
|
|
RegFunc(DecodeVoutb, 0x700900, RegVppCrcchr, 0x44, DecVb_RegVppCrcchr, 0x700944)
|
|
FldFunc(DecVb_RegVppCrcchr, Crc, 0, 32)
|
|
RegFunc(DecodeVoutb, 0x700900, RegVppCrccolor, 0x48, DecVb_RegVppCrccolor, 0x700948)
|
|
FldFunc(DecVb_RegVppCrccolor, Lum, 16, 8)
|
|
FldFunc(DecVb_RegVppCrccolor, Chru, 8, 8)
|
|
FldFunc(DecVb_RegVppCrccolor, Chrv, 0, 8)
|
|
RegFunc(DecodeVoutb, 0x700900, RegVppChecksum, 0x4C, DecVb_RegVppChecksum, 0x70094c)
|
|
FldFunc(DecVb_RegVppChecksum, Sum, 0, 32)
|
|
RegFunc(DecodeVoutb, 0x700900, RegVppRange, 0x50, DecVb_RegVppRange, 0x700950)
|
|
FldFunc(DecVb_RegVppRange, Main, 31, 1)
|
|
FldFunc(DecVb_RegVppRange, LumEn, 15, 1)
|
|
FldFunc(DecVb_RegVppRange, Lum, 8, 3)
|
|
FldFunc(DecVb_RegVppRange, ChrEn, 7, 1)
|
|
FldFunc(DecVb_RegVppRange, Chr, 0, 3)
|
|
RegFunc(DecodeVoutb, 0x700900, RegVppColorcvt, 0x54, DecVb_RegVppColorcvt, 0x700954)
|
|
FldFunc(DecVb_RegVppColorcvt, Coef1, 16, 12)
|
|
FldFunc(DecVb_RegVppColorcvt, Coef0, 0, 12)
|
|
RegFunc(DecodeVoutb, 0x700900, RegVppDecimate, 0x58, DecVb_RegVppDecimate, 0x700958)
|
|
FldFunc(DecVb_RegVppDecimate, YEn, 31, 1)
|
|
FldFunc(DecVb_RegVppDecimate, YM, 24, 7)
|
|
FldFunc(DecVb_RegVppDecimate, YN, 16, 7)
|
|
FldFunc(DecVb_RegVppDecimate, XEn, 15, 1)
|
|
FldFunc(DecVb_RegVppDecimate, XM, 8, 7)
|
|
FldFunc(DecVb_RegVppDecimate, XN, 0, 7)
|
|
RegFunc(DecodeVoutb, 0x700900, RegVppDecisize, 0x5C, DecVb_RegVppDecisize, 0x70095c)
|
|
FldFunc(DecVb_RegVppDecisize, YSize, 16, 12)
|
|
FldFunc(DecVb_RegVppDecisize, XSize, 0, 12)
|
|
RegFunc(DecodeVoutb, 0x700900, RegVppDecivec, 0x60, DecVb_RegVppDecivec, 0x700960)
|
|
FldFunc(DecVb_RegVppDecivec, Selects, 0, 32)
|
|
|
|
RegAreaFunc(DecodeV656bBase, 0x700980, 0x7009FF)
|
|
RegFunc(DecodeV656b, 0x700980, VidCtlReg, 0x0, DecVb_VidCtlReg, 0x700980)
|
|
FldFunc(DecVb_VidCtlReg, ResetVidout, 14, 1)
|
|
FldFunc(DecVb_VidCtlReg, DiagLoad, 13, 1)
|
|
FldFunc(DecVb_VidCtlReg, ClkOpp, 12, 1)
|
|
FldFunc(DecVb_VidCtlReg, SdSel, 11, 1)
|
|
FldFunc(DecVb_VidCtlReg, SdDvi, 10, 1)
|
|
FldFunc(DecVb_VidCtlReg, Oe, 9, 1)
|
|
FldFunc(DecVb_VidCtlReg, UnSw, 8, 1)
|
|
FldFunc(DecVb_VidCtlReg, Nrt, 7, 1)
|
|
FldFunc(DecVb_VidCtlReg, ClipDis, 6, 1)
|
|
FldFunc(DecVb_VidCtlReg, InvertSync, 5, 1)
|
|
FldFunc(DecVb_VidCtlReg, DviMode, 4, 1)
|
|
FldFunc(DecVb_VidCtlReg, Vsynen, 3, 1)
|
|
FldFunc(DecVb_VidCtlReg, Wm, 2, 1)
|
|
FldFunc(DecVb_VidCtlReg, Pro, 1, 1)
|
|
FldFunc(DecVb_VidCtlReg, En, 0, 1)
|
|
RegFunc(DecodeV656b, 0x700980, VidSpl, 0x4, DecVb_VidSpl, 0x700984)
|
|
FldFunc(DecVb_VidSpl, SamplesPerLine, 0, 13)
|
|
RegFunc(DecodeV656b, 0x700980, VidSpal, 0x8, DecVb_VidSpal, 0x700988)
|
|
FldFunc(DecVb_VidSpal, SamplesPerActiveLine, 0, 13)
|
|
RegFunc(DecodeV656b, 0x700980, EToE, 0xC, DecVb_EToE, 0x70098c)
|
|
FldFunc(DecVb_EToE, EndOfLineToEndOfLine, 0, 13)
|
|
RegFunc(DecodeV656b, 0x700980, Lpf, 0x10, DecVb_Lpf, 0x700990)
|
|
FldFunc(DecVb_Lpf, LinePerFrame, 0, 13)
|
|
RegFunc(DecodeV656b, 0x700980, Vlpf, 0x14, DecVb_Vlpf, 0x700994)
|
|
FldFunc(DecVb_Vlpf, VideoLinesPerFrame, 0, 13)
|
|
RegFunc(DecodeV656b, 0x700980, Vbsf1, 0x18, DecVb_Vbsf1, 0x700998)
|
|
FldFunc(DecVb_Vbsf1, VideoBlankingStartField1, 0, 13)
|
|
RegFunc(DecodeV656b, 0x700980, Vbff1, 0x1C, DecVb_Vbff1, 0x70099c)
|
|
FldFunc(DecVb_Vbff1, VideoBlankingFinishField1, 0, 13)
|
|
RegFunc(DecodeV656b, 0x700980, Vbsf2, 0x20, DecVb_Vbsf2, 0x7009a0)
|
|
FldFunc(DecVb_Vbsf2, VideoBlankingStartField2, 0, 13)
|
|
RegFunc(DecodeV656b, 0x700980, Vbff2, 0x24, DecVb_Vbff2, 0x7009a4)
|
|
FldFunc(DecVb_Vbff2, VideoBlankingFinishField2, 0, 13)
|
|
RegFunc(DecodeV656b, 0x700980, F1id, 0x28, DecVb_F1id, 0x7009a8)
|
|
FldFunc(DecVb_F1id, Field1Id, 0, 13)
|
|
RegFunc(DecodeV656b, 0x700980, F2id, 0x2C, DecVb_F2id, 0x7009ac)
|
|
FldFunc(DecVb_F2id, Field2Id, 0, 13)
|
|
RegFunc(DecodeV656b, 0x700980, Vcurfld, 0x30, DecVb_Vcurfld, 0x7009b0)
|
|
FldFunc(DecVb_Vcurfld, CcBufOcc, 8, 2)
|
|
FldFunc(DecVb_Vcurfld, 656BufOcc, 4, 2)
|
|
FldFunc(DecVb_Vcurfld, VdUnd, 3, 1)
|
|
FldFunc(DecVb_Vcurfld, VsynErr, 2, 1)
|
|
FldFunc(DecVb_Vcurfld, FldIn, 1, 1)
|
|
FldFunc(DecVb_Vcurfld, 656Fld, 0, 1)
|
|
RegFunc(DecodeV656b, 0x700980, VsdF0, 0x34, DecVb_VsdF0, 0x7009b4)
|
|
FldFunc(DecVb_VsdF0, F0dist, 0, 22)
|
|
RegFunc(DecodeV656b, 0x700980, VsdF1, 0x38, DecVb_VsdF1, 0x7009b8)
|
|
FldFunc(DecVb_VsdF1, F1dist, 0, 22)
|
|
RegFunc(DecodeV656b, 0x700980, Vsw, 0x3C, DecVb_Vsw, 0x7009bc)
|
|
FldFunc(DecVb_Vsw, Gbndsize, 0, 7)
|
|
RegFunc(DecodeV656b, 0x700980, HdDviHsyncStart, 0x40, DecVb_HdDviHsyncStart, 0x7009c0)
|
|
FldFunc(DecVb_HdDviHsyncStart, Addr, 0, 22)
|
|
RegFunc(DecodeV656b, 0x700980, HdDviHsyncSize, 0x44, DecVb_HdDviHsyncSize, 0x7009c4)
|
|
FldFunc(DecVb_HdDviHsyncSize, Size, 0, 22)
|
|
RegFunc(DecodeV656b, 0x700980, HdDviVsyncF1Start, 0x48, DecVb_HdDviVsyncF1Start, 0x7009c8)
|
|
FldFunc(DecVb_HdDviVsyncF1Start, Addr, 0, 22)
|
|
RegFunc(DecodeV656b, 0x700980, HdDviVsyncF1Size, 0x4C, DecVb_HdDviVsyncF1Size, 0x7009cc)
|
|
FldFunc(DecVb_HdDviVsyncF1Size, Size, 0, 22)
|
|
RegFunc(DecodeV656b, 0x700980, HdDviVsyncF2Start, 0x50, DecVb_HdDviVsyncF2Start, 0x7009d0)
|
|
FldFunc(DecVb_HdDviVsyncF2Start, Addr, 0, 22)
|
|
RegFunc(DecodeV656b, 0x700980, HdDviVsyncF2Size, 0x54, DecVb_HdDviVsyncF2Size, 0x7009d4)
|
|
FldFunc(DecVb_HdDviVsyncF2Size, Size, 0, 22)
|
|
RegFunc(DecodeV656b, 0x700980, BkF1, 0x58, DecVb_BkF1, 0x7009d8)
|
|
FldFunc(DecVb_BkF1, Bk, 0, 12)
|
|
RegFunc(DecodeV656b, 0x700980, BkF2, 0x5C, DecVb_BkF2, 0x7009dc)
|
|
FldFunc(DecVb_BkF2, Bk, 0, 12)
|
|
RegFunc(DecodeV656b, 0x700980, Adl656, 0x60, DecVb_Adl656, 0x7009e0)
|
|
FldFunc(DecVb_Adl656, AlmostDoneInt, 0, 13)
|
|
RegFunc(DecodeV656b, 0x700980, CcBufAddr, 0x64, DecVb_CcBufAddr, 0x7009e4)
|
|
FldFunc(DecVb_CcBufAddr, CcEnable, 31, 1)
|
|
FldFunc(DecVb_CcBufAddr, BufferAddr, 0, 31)
|
|
RegFunc(DecodeV656b, 0x700980, CcStrt, 0x68, DecVb_CcStrt, 0x7009e8)
|
|
FldFunc(DecVb_CcStrt, CcLineStartF2, 16, 13)
|
|
FldFunc(DecVb_CcStrt, CcLineStartF1, 0, 13)
|
|
RegFunc(DecodeV656b, 0x700980, CcLines, 0x6C, DecVb_CcLines, 0x7009ec)
|
|
FldFunc(DecVb_CcLines, CcNumLinesF2, 16, 13)
|
|
FldFunc(DecVb_CcLines, CcNumLinesF1, 0, 13)
|
|
RegFunc(DecodeV656b, 0x700980, ClkmuxCtrl, 0x70, DecVb_ClkmuxCtrl, 0x7009f0)
|
|
FldFunc(DecVb_ClkmuxCtrl, ResetClkmux, 8, 1)
|
|
FldFunc(DecVb_ClkmuxCtrl, ClkmuxDelay, 0, 8)
|
|
|
|
#endif
|
|
|
|
|
|
//******************************************************************************
|
|
//
|
|
// Encoder VIP Ring Bus Node
|
|
//
|
|
//******************************************************************************
|
|
#ifndef EXCLUDE_ENCODER_VIP
|
|
|
|
RegAreaFunc(EncVipRbnodeRegsBase, 0x800000, 0x80007F)
|
|
RegFunc(EncVipRbnodeRegs, 0x800000, RbConfig , 0x0, EncVRRs_RbConfig , 0x800000)
|
|
FldFunc(EncVRRs_RbConfig , RdPostEna, 1, 1)
|
|
FldFunc(EncVRRs_RbConfig , RdBypEna, 0, 1)
|
|
RegFunc(EncVipRbnodeRegs, 0x800000, RbStickyError, 0x4, EncVRRs_RbStickyError, 0x800004)
|
|
FldFunc(EncVRRs_RbStickyError, Node, 1, 1)
|
|
FldFunc(EncVRRs_RbStickyError, Tgt, 0, 1)
|
|
RegFunc(EncVipRbnodeRegs, 0x800000, RbCurrentError, 0x8, EncVRRs_RbCurrentError, 0x800008)
|
|
FldFunc(EncVRRs_RbCurrentError, Node, 1, 1)
|
|
FldFunc(EncVRRs_RbCurrentError, Tgt, 0, 1)
|
|
RegFunc(EncVipRbnodeRegs, 0x800000, RbReadData, 0xC, EncVRRs_RbReadData, 0x80000c)
|
|
FldFunc(EncVRRs_RbReadData, Data, 0, 32)
|
|
|
|
RegAreaFunc(EncVipRingbusDebugRegsBase, 0x800080, 0x8000FF)
|
|
RegFunc(EncVipRingbusDebugRegs, 0x800080, RbDebugConfig, 0x0, EncVRDRs_RbDebugConfig, 0x800080)
|
|
FldFunc(EncVRDRs_RbDebugConfig, Addr3WrStat, 15, 1)
|
|
FldFunc(EncVRDRs_RbDebugConfig, Addr2WrStat, 14, 1)
|
|
FldFunc(EncVRDRs_RbDebugConfig, Addr1WrStat, 13, 1)
|
|
FldFunc(EncVRDRs_RbDebugConfig, Addr0WrStat, 12, 1)
|
|
FldFunc(EncVRDRs_RbDebugConfig, Addr3RdStat, 11, 1)
|
|
FldFunc(EncVRDRs_RbDebugConfig, Addr2RdStat, 10, 1)
|
|
FldFunc(EncVRDRs_RbDebugConfig, Addr1RdStat, 9, 1)
|
|
FldFunc(EncVRDRs_RbDebugConfig, Addr0RdStat, 8, 1)
|
|
FldFunc(EncVRDRs_RbDebugConfig, Addr3WrEna, 7, 1)
|
|
FldFunc(EncVRDRs_RbDebugConfig, Addr2WrEna, 6, 1)
|
|
FldFunc(EncVRDRs_RbDebugConfig, Addr1WrEna, 5, 1)
|
|
FldFunc(EncVRDRs_RbDebugConfig, Addr0WrEna, 4, 1)
|
|
FldFunc(EncVRDRs_RbDebugConfig, Addr3RdEna, 3, 1)
|
|
FldFunc(EncVRDRs_RbDebugConfig, Addr2RdEna, 2, 1)
|
|
FldFunc(EncVRDRs_RbDebugConfig, Addr1RdEna, 1, 1)
|
|
FldFunc(EncVRDRs_RbDebugConfig, Addr0RdEna, 0, 1)
|
|
RegFunc(EncVipRingbusDebugRegs, 0x800080, RbDebugReg0Addr, 0x4, EncVRDRs_RbDebugReg0Addr, 0x800084)
|
|
FldFunc(EncVRDRs_RbDebugReg0Addr, Addr, 0, 16)
|
|
RegFunc(EncVipRingbusDebugRegs, 0x800080, RbDebugReg1Addr, 0x8, EncVRDRs_RbDebugReg1Addr, 0x800088)
|
|
FldFunc(EncVRDRs_RbDebugReg1Addr, Addr, 0, 16)
|
|
RegFunc(EncVipRingbusDebugRegs, 0x800080, RbDebugReg2Addr, 0xC, EncVRDRs_RbDebugReg2Addr, 0x80008c)
|
|
FldFunc(EncVRDRs_RbDebugReg2Addr, Addr, 0, 16)
|
|
RegFunc(EncVipRingbusDebugRegs, 0x800080, RbDebugReg3Addr, 0x10, EncVRDRs_RbDebugReg3Addr, 0x800090)
|
|
FldFunc(EncVRDRs_RbDebugReg3Addr, Addr, 0, 16)
|
|
RegFunc(EncVipRingbusDebugRegs, 0x800080, RbDebugOutputReg, 0x14, EncVRDRs_RbDebugOutputReg, 0x800094)
|
|
FldFunc(EncVRDRs_RbDebugOutputReg, DspRst, 1, 1)
|
|
FldFunc(EncVRDRs_RbDebugOutputReg, FmmRst, 0, 1)
|
|
|
|
RegAreaFunc(EncVipCpuregsBase, 0x800F00, 0x800F7F)
|
|
RegFunc(EncVipCpuregs, 0x800F00, RegHst2cpuMbx, 0x0, EncVCs_RegHst2cpuMbx, 0x800f00)
|
|
FldFunc(EncVCs_RegHst2cpuMbx, Value, 0, 32)
|
|
RegFunc(EncVipCpuregs, 0x800F00, RegCpu2hstMbx, 0x4, EncVCs_RegCpu2hstMbx, 0x800f04)
|
|
FldFunc(EncVCs_RegCpu2hstMbx, Value, 0, 32)
|
|
RegFunc(EncVipCpuregs, 0x800F00, RegMbxStat, 0x8, EncVCs_RegMbxStat, 0x800f08)
|
|
RegFunc(EncVipCpuregs, 0x800F00, RegCpuIntBase, 0xC, EncVCs_RegCpuIntBase, 0x800f0c)
|
|
FldFunc(EncVCs_RegCpuIntBase, Addr, 8, 24)
|
|
RegFunc(EncVipCpuregs, 0x800F00, RegCpuIntEna, 0x10, EncVCs_RegCpuIntEna, 0x800f10)
|
|
FldFunc(EncVCs_RegCpuIntEna, Mbx, 31, 1)
|
|
FldFunc(EncVCs_RegCpuIntEna, Com7, 23, 1)
|
|
FldFunc(EncVCs_RegCpuIntEna, Com6, 22, 1)
|
|
FldFunc(EncVCs_RegCpuIntEna, Com5, 21, 1)
|
|
FldFunc(EncVCs_RegCpuIntEna, Com4, 20, 1)
|
|
FldFunc(EncVCs_RegCpuIntEna, Com3, 19, 1)
|
|
FldFunc(EncVCs_RegCpuIntEna, Com2, 18, 1)
|
|
FldFunc(EncVCs_RegCpuIntEna, Com1, 17, 1)
|
|
FldFunc(EncVCs_RegCpuIntEna, Com0, 16, 1)
|
|
FldFunc(EncVCs_RegCpuIntEna, Hw7, 15, 1)
|
|
FldFunc(EncVCs_RegCpuIntEna, Hw6, 14, 1)
|
|
FldFunc(EncVCs_RegCpuIntEna, Hw5, 13, 1)
|
|
FldFunc(EncVCs_RegCpuIntEna, Hw4, 12, 1)
|
|
FldFunc(EncVCs_RegCpuIntEna, Hw3, 11, 1)
|
|
FldFunc(EncVCs_RegCpuIntEna, Hw2, 10, 1)
|
|
FldFunc(EncVCs_RegCpuIntEna, Hw1, 9, 1)
|
|
FldFunc(EncVCs_RegCpuIntEna, Hw0, 8, 1)
|
|
FldFunc(EncVCs_RegCpuIntEna, Db7, 7, 1)
|
|
FldFunc(EncVCs_RegCpuIntEna, Db6, 6, 1)
|
|
FldFunc(EncVCs_RegCpuIntEna, Db5, 5, 1)
|
|
FldFunc(EncVCs_RegCpuIntEna, Db4, 4, 1)
|
|
FldFunc(EncVCs_RegCpuIntEna, Db3, 3, 1)
|
|
FldFunc(EncVCs_RegCpuIntEna, Db2, 2, 1)
|
|
FldFunc(EncVCs_RegCpuIntEna, Db1, 1, 1)
|
|
FldFunc(EncVCs_RegCpuIntEna, Db0, 0, 1)
|
|
RegFunc(EncVipCpuregs, 0x800F00, StreamCpuIntEna, 0x10, EncVCs_StreamCpuIntEna, 0x800f10)
|
|
FldFunc(EncVCs_StreamCpuIntEna, Mbx, 31, 1)
|
|
FldFunc(EncVCs_StreamCpuIntEna, Dec, 18, 1)
|
|
FldFunc(EncVCs_StreamCpuIntEna, Aud, 17, 1)
|
|
FldFunc(EncVCs_StreamCpuIntEna, M2m, 15, 1)
|
|
FldFunc(EncVCs_StreamCpuIntEna, Pci, 14, 1)
|
|
FldFunc(EncVCs_StreamCpuIntEna, Ts1, 13, 1)
|
|
FldFunc(EncVCs_StreamCpuIntEna, Ts0, 12, 1)
|
|
FldFunc(EncVCs_StreamCpuIntEna, GpioHi, 11, 1)
|
|
FldFunc(EncVCs_StreamCpuIntEna, GpioLo, 10, 1)
|
|
FldFunc(EncVCs_StreamCpuIntEna, Vpp1, 9, 1)
|
|
FldFunc(EncVCs_StreamCpuIntEna, Vpp0, 8, 1)
|
|
FldFunc(EncVCs_StreamCpuIntEna, Rb, 1, 1)
|
|
FldFunc(EncVCs_StreamCpuIntEna, Sd, 0, 1)
|
|
RegFunc(EncVipCpuregs, 0x800F00, Dec0CpuIntEna, 0x10, EncVCs_Dec0CpuIntEna, 0x800f10)
|
|
FldFunc(EncVCs_Dec0CpuIntEna, Mbx, 31, 1)
|
|
FldFunc(EncVCs_Dec0CpuIntEna, Dec, 16, 1)
|
|
FldFunc(EncVCs_Dec0CpuIntEna, Si, 8, 1)
|
|
FldFunc(EncVCs_Dec0CpuIntEna, Rb, 1, 1)
|
|
FldFunc(EncVCs_Dec0CpuIntEna, Sd, 0, 1)
|
|
RegFunc(EncVipCpuregs, 0x800F00, Dec1CpuIntEna, 0x10, EncVCs_Dec1CpuIntEna, 0x800f10)
|
|
FldFunc(EncVCs_Dec1CpuIntEna, Mbx, 31, 1)
|
|
FldFunc(EncVCs_Dec1CpuIntEna, Cab, 9, 1)
|
|
FldFunc(EncVCs_Dec1CpuIntEna, Si, 8, 1)
|
|
FldFunc(EncVCs_Dec1CpuIntEna, Rb, 1, 1)
|
|
FldFunc(EncVCs_Dec1CpuIntEna, Sd, 0, 1)
|
|
RegFunc(EncVipCpuregs, 0x800F00, RegCpuIntStat, 0x14, EncVCs_RegCpuIntStat, 0x800f14)
|
|
FldFunc(EncVCs_RegCpuIntStat, Mbx, 31, 1)
|
|
FldFunc(EncVCs_RegCpuIntStat, Com7, 23, 1)
|
|
FldFunc(EncVCs_RegCpuIntStat, Com6, 22, 1)
|
|
FldFunc(EncVCs_RegCpuIntStat, Com5, 21, 1)
|
|
FldFunc(EncVCs_RegCpuIntStat, Com4, 20, 1)
|
|
FldFunc(EncVCs_RegCpuIntStat, Com3, 19, 1)
|
|
FldFunc(EncVCs_RegCpuIntStat, Com2, 18, 1)
|
|
FldFunc(EncVCs_RegCpuIntStat, Com1, 17, 1)
|
|
FldFunc(EncVCs_RegCpuIntStat, Com0, 16, 1)
|
|
FldFunc(EncVCs_RegCpuIntStat, Hw7, 15, 1)
|
|
FldFunc(EncVCs_RegCpuIntStat, Hw6, 14, 1)
|
|
FldFunc(EncVCs_RegCpuIntStat, Hw5, 13, 1)
|
|
FldFunc(EncVCs_RegCpuIntStat, Hw4, 12, 1)
|
|
FldFunc(EncVCs_RegCpuIntStat, Hw3, 11, 1)
|
|
FldFunc(EncVCs_RegCpuIntStat, Hw2, 10, 1)
|
|
FldFunc(EncVCs_RegCpuIntStat, Hw1, 9, 1)
|
|
FldFunc(EncVCs_RegCpuIntStat, Hw0, 8, 1)
|
|
FldFunc(EncVCs_RegCpuIntStat, Db7, 7, 1)
|
|
FldFunc(EncVCs_RegCpuIntStat, Db6, 6, 1)
|
|
FldFunc(EncVCs_RegCpuIntStat, Db5, 5, 1)
|
|
FldFunc(EncVCs_RegCpuIntStat, Db4, 4, 1)
|
|
FldFunc(EncVCs_RegCpuIntStat, Db3, 3, 1)
|
|
FldFunc(EncVCs_RegCpuIntStat, Db2, 2, 1)
|
|
FldFunc(EncVCs_RegCpuIntStat, Db1, 1, 1)
|
|
FldFunc(EncVCs_RegCpuIntStat, Db0, 0, 1)
|
|
RegFunc(EncVipCpuregs, 0x800F00, StreamCpuIntStat, 0x14, EncVCs_StreamCpuIntStat, 0x800f14)
|
|
FldFunc(EncVCs_StreamCpuIntStat, Mbx, 31, 1)
|
|
FldFunc(EncVCs_StreamCpuIntStat, Dec, 18, 1)
|
|
FldFunc(EncVCs_StreamCpuIntStat, Aud, 17, 1)
|
|
FldFunc(EncVCs_StreamCpuIntStat, M2m, 15, 1)
|
|
FldFunc(EncVCs_StreamCpuIntStat, Pci, 14, 1)
|
|
FldFunc(EncVCs_StreamCpuIntStat, Ts1, 13, 1)
|
|
FldFunc(EncVCs_StreamCpuIntStat, Ts0, 12, 1)
|
|
FldFunc(EncVCs_StreamCpuIntStat, GpioHi, 11, 1)
|
|
FldFunc(EncVCs_StreamCpuIntStat, GpioLo, 10, 1)
|
|
FldFunc(EncVCs_StreamCpuIntStat, Vpp1, 9, 1)
|
|
FldFunc(EncVCs_StreamCpuIntStat, Vpp0, 8, 1)
|
|
FldFunc(EncVCs_StreamCpuIntStat, Rb, 1, 1)
|
|
FldFunc(EncVCs_StreamCpuIntStat, Sd, 0, 1)
|
|
RegFunc(EncVipCpuregs, 0x800F00, Dec0CpuIntStat, 0x14, EncVCs_Dec0CpuIntStat, 0x800f14)
|
|
FldFunc(EncVCs_Dec0CpuIntStat, Mbx, 31, 1)
|
|
FldFunc(EncVCs_Dec0CpuIntStat, Dec, 16, 1)
|
|
FldFunc(EncVCs_Dec0CpuIntStat, Si, 8, 1)
|
|
FldFunc(EncVCs_Dec0CpuIntStat, Rb, 1, 1)
|
|
FldFunc(EncVCs_Dec0CpuIntStat, Sd, 0, 1)
|
|
RegFunc(EncVipCpuregs, 0x800F00, Dec1CpuIntStat, 0x14, EncVCs_Dec1CpuIntStat, 0x800f14)
|
|
FldFunc(EncVCs_Dec1CpuIntStat, Mbx, 31, 1)
|
|
FldFunc(EncVCs_Dec1CpuIntStat, Cab, 9, 1)
|
|
FldFunc(EncVCs_Dec1CpuIntStat, Si, 8, 1)
|
|
FldFunc(EncVCs_Dec1CpuIntStat, Rb, 1, 1)
|
|
FldFunc(EncVCs_Dec1CpuIntStat, Sd, 0, 1)
|
|
RegFunc(EncVipCpuregs, 0x800F00, RegHst2cpuStat, 0x18, EncVCs_RegHst2cpuStat, 0x800f18)
|
|
FldFunc(EncVCs_RegHst2cpuStat, Value, 0, 32)
|
|
RegFunc(EncVipCpuregs, 0x800F00, RegCpu2hstStat, 0x1C, EncVCs_RegCpu2hstStat, 0x800f1c)
|
|
FldFunc(EncVCs_RegCpu2hstStat, Value, 0, 32)
|
|
RegFunc(EncVipCpuregs, 0x800F00, RegCpuIntgenSet, 0x20, EncVCs_RegCpuIntgenSet, 0x800f20)
|
|
FldFunc(EncVCs_RegCpuIntgenSet, Cpu2HstMbx, 31, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenSet, Int15, 15, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenSet, Int14, 14, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenSet, Int13, 13, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenSet, Int12, 12, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenSet, Int11, 11, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenSet, Int10, 10, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenSet, Int9, 9, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenSet, Int8, 8, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenSet, Int7, 7, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenSet, Int6, 6, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenSet, Int5, 5, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenSet, Int4, 4, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenSet, Int3, 3, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenSet, Int2, 2, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenSet, Int1, 1, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenSet, Int0, 0, 1)
|
|
RegFunc(EncVipCpuregs, 0x800F00, RegCpuIntgenClr, 0x24, EncVCs_RegCpuIntgenClr, 0x800f24)
|
|
FldFunc(EncVCs_RegCpuIntgenClr, Cpu2HstMbx, 31, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenClr, Int15, 15, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenClr, Int14, 14, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenClr, Int13, 13, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenClr, Int12, 12, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenClr, Int11, 11, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenClr, Int10, 10, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenClr, Int9, 9, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenClr, Int8, 8, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenClr, Int7, 7, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenClr, Int6, 6, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenClr, Int5, 5, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenClr, Int4, 4, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenClr, Int3, 3, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenClr, Int2, 2, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenClr, Int1, 1, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenClr, Int0, 0, 1)
|
|
RegFunc(EncVipCpuregs, 0x800F00, RegCpuIcacheMiss, 0x28, EncVCs_RegCpuIcacheMiss, 0x800f28)
|
|
FldFunc(EncVCs_RegCpuIcacheMiss, Count, 0, 32)
|
|
RegFunc(EncVipCpuregs, 0x800F00, RegCpuIntgenMask, 0x2C, EncVCs_RegCpuIntgenMask, 0x800f2c)
|
|
FldFunc(EncVCs_RegCpuIntgenMask, Cpu2HstMbx, 31, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenMask, Int15, 15, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenMask, Int14, 14, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenMask, Int13, 13, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenMask, Int12, 12, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenMask, Int11, 11, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenMask, Int10, 10, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenMask, Int9, 9, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenMask, Int8, 8, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenMask, Int7, 7, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenMask, Int6, 6, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenMask, Int5, 5, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenMask, Int4, 4, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenMask, Int3, 3, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenMask, Int2, 2, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenMask, Int1, 1, 1)
|
|
FldFunc(EncVCs_RegCpuIntgenMask, Int0, 0, 1)
|
|
|
|
RegAreaFunc(EncVipCpudmaBase, 0x801800, 0x8018FF)
|
|
RegFunc(EncVipCpudma, 0x801800, RegDma0SdAddr, 0x0, EncVCa_RegDma0SdAddr, 0x801800)
|
|
FldFunc(EncVCa_RegDma0SdAddr, SdAddr, 0, 32)
|
|
RegFunc(EncVipCpudma, 0x801800, RegDma0LclAddr, 0x4, EncVCa_RegDma0LclAddr, 0x801804)
|
|
FldFunc(EncVCa_RegDma0LclAddr, Addr, 2, 7)
|
|
RegFunc(EncVipCpudma, 0x801800, RegDma0Len, 0x8, EncVCa_RegDma0Len, 0x801808)
|
|
FldFunc(EncVCa_RegDma0Len, Length, 2, 8)
|
|
RegFunc(EncVipCpudma, 0x801800, RegDma1SdAddr, 0x10, EncVCa_RegDma1SdAddr, 0x801810)
|
|
FldFunc(EncVCa_RegDma1SdAddr, SdAddr, 0, 32)
|
|
RegFunc(EncVipCpudma, 0x801800, RegDma1LclAddr, 0x14, EncVCa_RegDma1LclAddr, 0x801814)
|
|
FldFunc(EncVCa_RegDma1LclAddr, Addr, 2, 7)
|
|
RegFunc(EncVipCpudma, 0x801800, RegDma1Len, 0x18, EncVCa_RegDma1Len, 0x801818)
|
|
FldFunc(EncVCa_RegDma1Len, Length, 2, 8)
|
|
RegFunc(EncVipCpudma, 0x801800, RegDma2SdAddr, 0x20, EncVCa_RegDma2SdAddr, 0x801820)
|
|
FldFunc(EncVCa_RegDma2SdAddr, SdAddr, 0, 32)
|
|
RegFunc(EncVipCpudma, 0x801800, RegDma2LclAddr, 0x24, EncVCa_RegDma2LclAddr, 0x801824)
|
|
FldFunc(EncVCa_RegDma2LclAddr, Addr, 2, 7)
|
|
RegFunc(EncVipCpudma, 0x801800, RegDma2Len, 0x28, EncVCa_RegDma2Len, 0x801828)
|
|
FldFunc(EncVCa_RegDma2Len, Length, 2, 8)
|
|
RegFunc(EncVipCpudma, 0x801800, RegDma3SdAddr, 0x30, EncVCa_RegDma3SdAddr, 0x801830)
|
|
FldFunc(EncVCa_RegDma3SdAddr, SdAddr, 0, 32)
|
|
RegFunc(EncVipCpudma, 0x801800, RegDma3LclAddr, 0x34, EncVCa_RegDma3LclAddr, 0x801834)
|
|
FldFunc(EncVCa_RegDma3LclAddr, Addr, 2, 7)
|
|
RegFunc(EncVipCpudma, 0x801800, RegDma3Len, 0x38, EncVCa_RegDma3Len, 0x801838)
|
|
FldFunc(EncVCa_RegDma3Len, Length, 2, 8)
|
|
RegFunc(EncVipCpudma, 0x801800, RegDmaStatus, 0x40, EncVCa_RegDmaStatus, 0x801840)
|
|
FldFunc(EncVCa_RegDmaStatus, Act3, 3, 1)
|
|
FldFunc(EncVCa_RegDmaStatus, Act2, 2, 1)
|
|
FldFunc(EncVCa_RegDmaStatus, Act1, 1, 1)
|
|
FldFunc(EncVCa_RegDmaStatus, Act0, 0, 1)
|
|
|
|
RegAreaFunc(EncVipDmamemBase, 0x801A00, 0x8021FF)
|
|
RegFunc(EncVipDmamem, 0x801A00, DmaMem, 0x0, EncVDm_DmaMem, 0x801a00)
|
|
FldFunc(EncVDm_DmaMem, Data, 0, 32)
|
|
|
|
RegAreaFunc(EncVipIndSdramRegsBase, 0x841000, 0x84107F)
|
|
RegFunc(EncVipIndSdramRegs, 0x841000, RegSdramInc, 0x0, EncVISRs_RegSdramInc, 0x841000)
|
|
FldFunc(EncVISRs_RegSdramInc, Inc, 0, 1)
|
|
RegFunc(EncVipIndSdramRegs, 0x841000, RegSdramAddr, 0x4, EncVISRs_RegSdramAddr, 0x841004)
|
|
FldFunc(EncVISRs_RegSdramAddr, Addr, 0, 32)
|
|
RegFunc(EncVipIndSdramRegs, 0x841000, RegSdramData, 0x8, EncVISRs_RegSdramData, 0x841008)
|
|
FldFunc(EncVISRs_RegSdramData, Data, 0, 32)
|
|
RegFunc(EncVipIndSdramRegs, 0x841000, RegCpuDbg, 0x10, EncVISRs_RegCpuDbg, 0x841010)
|
|
FldFunc(EncVISRs_RegCpuDbg, Hst, 0, 1)
|
|
|
|
RegAreaFunc(EncVipCpucoreBase, 0x844000, 0x844FFF)
|
|
RegFunc(EncVipCpucore, 0x844000, CpucoreReg, 0x0, EncVCe_CpucoreReg, 0x844000)
|
|
FldFunc(EncVCe_CpucoreReg, Addr, 0, 32)
|
|
|
|
RegAreaFunc(EncVipCpuauxBase, 0x845000, 0x845FFF)
|
|
RegFunc(EncVipCpuaux, 0x845000, CpuauxReg, 0x0, EncVCx_CpuauxReg, 0x845000)
|
|
FldFunc(EncVCx_CpuauxReg, Addr, 0, 32)
|
|
|
|
RegAreaFunc(EncVipCpuimemBase, 0x846000, 0x847FFF)
|
|
RegFunc(EncVipCpuimem, 0x846000, CpuimemReg, 0x0, EncVCm_CpuimemReg, 0x846000)
|
|
FldFunc(EncVCm_CpuimemReg, Addr, 0, 32)
|
|
|
|
RegAreaFunc(EncVipCpudmemBase, 0x848000, 0x84FFFF)
|
|
RegFunc(EncVipCpudmem, 0x848000, CpudmemReg, 0x0, EncVCm_CpudmemReg, 0x848000)
|
|
FldFunc(EncVCm_CpudmemReg, Addr, 0, 32)
|
|
|
|
RegAreaFunc(EncVppBase, 0x8E0000, 0x8FFFFF)
|
|
|
|
#endif
|
|
|
|
|
|
#if defined(FldEnum)
|
|
|
|
// One FldEnum macro (must be defined external to file) call per register field enum.
|
|
// register, field, name, value
|
|
|
|
FldEnum(EncSn_EncSe2binPutsym, Type, NBits, 0)
|
|
FldEnum(EncSn_EncSe2binPutsym, Type, ExpGolomb, 1)
|
|
FldEnum(EncSn_EncSe2binPutsym, Type, MPEGInfo, 2)
|
|
FldEnum(EncSn_EncSe2binPutsym, Type, MPEGCoef, 3)
|
|
FldEnum(EncSn_EncSe2binPutsym, Type, H264Info, 4)
|
|
FldEnum(EncSn_EncSe2binPutsym, Type, H264Coef, 5)
|
|
FldEnum(EncSn_EncSe2binPutsym, Type, SP4x4Mode, 6)
|
|
FldEnum(EncSn_EncSe2binPutsym, Type, Reset, 7)
|
|
FldEnum(EncSn_EncSe2binPutsym, Type, Flush, 8)
|
|
|
|
FldEnum(EncSn_EncSe2binPutsym, SubType, NBits_NA, 0)
|
|
|
|
FldEnum(EncSn_EncSe2binPutsym, SubType, ExpGolomb_Unsigned, 0)
|
|
FldEnum(EncSn_EncSe2binPutsym, SubType, ExpGolomb_Signed, 1)
|
|
|
|
FldEnum(EncSn_EncSe2binPutsym, SubType, MPEGInfo_MBTypeIFrame, 0)
|
|
FldEnum(EncSn_EncSe2binPutsym, SubType, MPEGInfo_MBTypePFrame, 1)
|
|
FldEnum(EncSn_EncSe2binPutsym, SubType, MPEGInfo_MBTypeBFrame, 2)
|
|
FldEnum(EncSn_EncSe2binPutsym, SubType, MPEGInfo_MBAddr, 3)
|
|
FldEnum(EncSn_EncSe2binPutsym, SubType, MPEGInfo_CBP, 4)
|
|
FldEnum(EncSn_EncSe2binPutsym, SubType, MPEGInfo_MotionCode, 5)
|
|
FldEnum(EncSn_EncSe2binPutsym, SubType, MPEGInfo_DMVector, 6)
|
|
|
|
FldEnum(EncSn_EncSe2binPutsym, SubType, H264Info_MBTypeI, 0)
|
|
FldEnum(EncSn_EncSe2binPutsym, SubType, H264Info_MBTypeP, 1)
|
|
FldEnum(EncSn_EncSe2binPutsym, SubType, H264Info_MBTypeB, 2)
|
|
FldEnum(EncSn_EncSe2binPutsym, SubType, H264Info_SubMBTypeP, 3)
|
|
FldEnum(EncSn_EncSe2binPutsym, SubType, H264Info_SubMBTypeB, 4)
|
|
FldEnum(EncSn_EncSe2binPutsym, SubType, H264Info_MVD, 5)
|
|
FldEnum(EncSn_EncSe2binPutsym, SubType, H264Info_TU, 6)
|
|
FldEnum(EncSn_EncSe2binPutsym, SubType, H264Info_CBP, 7)
|
|
|
|
FldEnum(EncSn_EncSe2binPutsym, SubType, SP4x4Mode_CAVLC, 0)
|
|
FldEnum(EncSn_EncSe2binPutsym, SubType, SP4x4Mode_CABAC, 1)
|
|
|
|
FldEnum(EncSn_EncSe2binDoResid, Type, Type_CAVLC, 1)
|
|
FldEnum(EncSn_EncSe2binDoResid, Type, Type_CABAC, 2)
|
|
|
|
#endif//defined(FldEnum)
|
|
|
|
// Field defines with no real registers associated
|
|
FldFunc(C2BCnvtCmdW0, RdAddr, 0, 32)
|
|
|
|
FldFunc(C2BCnvtCmdW1, MaxBits, 0, 32)
|
|
|
|
FldFunc(C2BCnvtCmdW2, StartMBY, 24, 8)
|
|
FldFunc(C2BCnvtCmdW2, StartMBX, 16, 8)
|
|
FldFunc(C2BCnvtCmdW2, NumRefIdxL1, 10, 6)
|
|
FldFunc(C2BCnvtCmdW2, NumRefIdxL0, 4, 6)
|
|
FldFunc(C2BCnvtCmdW2, Struct, 2, 2)
|
|
FldFunc(C2BCnvtCmdW2, Type, 0, 2)
|
|
|
|
FldFunc(C2BCnvtCmdW3, Width, 24, 8)
|
|
FldFunc(C2BCnvtCmdW3, Enc, 23, 1)
|
|
FldFunc(C2BCnvtCmdW3, 8x8MF, 22, 1)
|
|
FldFunc(C2BCnvtCmdW3, EPMode, 20, 2)
|
|
FldFunc(C2BCnvtCmdW3, D8x8IF, 19, 1)
|
|
FldFunc(C2BCnvtCmdW3, ChromaFactor, 17, 2)
|
|
FldFunc(C2BCnvtCmdW3, Align64, 16, 1)
|
|
FldFunc(C2BCnvtCmdW3, WrCtxId, 10, 6)
|
|
FldFunc(C2BCnvtCmdW3, RdCtxId, 4, 6)
|
|
FldFunc(C2BCnvtCmdW3, Cmd, 0, 4)
|
|
|
|
FldFunc(C2BInitCmdW0, RdAddr, 0, 32)
|
|
|
|
FldFunc(C2BInitCmdW3, Rsv10, 10, 22)
|
|
FldFunc(C2BInitCmdW3, QP, 4, 6)
|
|
FldFunc(C2BInitCmdW3, Cmd, 0, 4)
|
|
|
|
FldFunc(C2BCopyCmdW0, RdAddr, 0, 32)
|
|
|
|
FldFunc(C2BCopyCmdW1, CopyBits, 0, 32)
|
|
|
|
FldFunc(C2BCopyCmdW3, Rsv24, 24, 8)
|
|
FldFunc(C2BCopyCmdW3, Enc, 23, 1)
|
|
FldFunc(C2BCopyCmdW3, Rsv22, 22, 1)
|
|
FldFunc(C2BCopyCmdW3, EPMode, 20, 2)
|
|
FldFunc(C2BCopyCmdW3, Rsv17, 17, 3)
|
|
FldFunc(C2BCopyCmdW3, Align64, 16, 1)
|
|
FldFunc(C2BCopyCmdW3, WrCtxId, 10, 6)
|
|
FldFunc(C2BCopyCmdW3, RdCtxId, 4, 6)
|
|
FldFunc(C2BCopyCmdW3, Cmd, 0, 4)
|
|
|
|
FldFunc(C2BRdCtxW0, BaseAddr, 0, 32)
|
|
|
|
FldFunc(C2BRdCtxW1, EndAddr, 0, 32)
|
|
|
|
FldFunc(C2BRdCtxW2, MarkAddr, 0, 32)
|
|
|
|
FldFunc(C2BWrCtxW0, BaseAddr, 0, 32)
|
|
|
|
FldFunc(C2BWrCtxW1, EndAddr, 0, 32)
|
|
|
|
FldFunc(C2BWrCtxW2, MarkAddr, 0, 32)
|
|
FldFunc(C2BWrCtxW2, NewFmt, 31, 1)
|
|
|
|
FldFunc(C2BWrCtxW3, Rsv2, 2, 30)
|
|
FldFunc(C2BWrCtxW3, SMb, 1, 1)
|
|
FldFunc(C2BWrCtxW3, SMa, 0, 1)
|
|
|
|
FldFunc(C2BWrCtxW4, Rsv6, 6, 26)
|
|
FldFunc(C2BWrCtxW4, WrPtr, 0, 6)
|
|
|
|
FldFunc(C2BWrCtxW5, Rsv6, 6, 26)
|
|
FldFunc(C2BWrCtxW5, RdPtr, 0, 6)
|
|
|
|
FldFunc(C2BWrCtxWx, Err, 31, 1)
|
|
FldFunc(C2BWrCtxWx, Done, 30, 1)
|
|
FldFunc(C2BWrCtxWx, SliceStart, 0, 30)
|
|
|
|
|
|
RegFunc(Mef, 0x00600400, FmeCtl, 0x00, Meff_FmeCtl, 0x00600400)
|
|
FldFunc(FmeCtl, RefIdx, 5, 1)
|
|
FldFunc(FmeCtl, ListIdx, 4, 1)
|
|
FldFunc(FmeCtl, HostRam, 3, 1)
|
|
FldFunc(FmeCtl, Rsv2, 2, 1)
|
|
FldFunc(FmeCtl, Enable, 1, 1)
|
|
FldFunc(FmeCtl, SADClr, 0, 1)
|
|
RegFunc(Mef, 0x00600400, FmeCurr, 0x04, Meff_FmeCurr, 0x00600404)
|
|
FldFunc(FmeCurr, FrameId, 24, 8)
|
|
FldFunc(FmeCurr, YPos, 12, 12)
|
|
FldFunc(FmeCurr, XPos, 0, 12)
|
|
RegFunc(Mef, 0x00600400, FmeRefId, 0x08, Meff_FmeRefId, 0x00600408)
|
|
RegFunc(Mef, 0x00600400, FmeRefVec, 0x0C, Meff_FmeRefVec, 0x0060040C)
|
|
FldFunc(FmeRefVec, YVec, 16, 16) // // Actually truncated to 12 bits in hw, but will be written as 16 bits of signed int
|
|
FldFunc(FmeRefVec, XVec, 0, 16)
|
|
|
|
|
|
RegFunc(Mef, 0x00600400, FmeMVPA, 0x10, Meff_FmeMVPA, 0x00600410)
|
|
FldFunc(FmeMVP, YVec, 16, 16)
|
|
FldFunc(FmeMVP, XVec, 0, 16)
|
|
RegFunc(Mef, 0x00600400, FmeMVPB, 0x14, Meff_FmeMVPB, 0x00600414)
|
|
RegFunc(Mef, 0x00600400, FmeMVPC, 0x18, Meff_FmeMVPC, 0x00600418)
|
|
RegFunc(Mef, 0x00600400, FmeLambda, 0x1c, Meff_FmeLambda, 0x0060041c)
|
|
FldFunc(FmeLambda, Rsv16, 16, 16)
|
|
FldFunc(FmeLambda, Val, 0, 16)
|
|
|
|
RegFunc(Mef, 0x00600400, FmeImgSize, 0x20, Meff_FmeImgSize, 0x00600420)
|
|
FldFunc(FmeImgSize, YSize, 16, 16)
|
|
FldFunc(FmeImgSize, XSize, 0, 16)
|
|
|
|
RegFunc(Mef, 0x00600400, FmeSearchSize, 0x24, Meff_FmeSearchSize, 0x00600424) /* By analogy with the above, note the MixedCase */
|
|
|
|
RegFunc(Mef, 0x00600400, FmeStatus, 0x28, Meff_FmeStatus, 0x00600428)
|
|
FldFunc(FmeStatus, OutRdy, 1, 1)
|
|
FldFunc(FmeStatus, InRdy, 0, 1)
|
|
|
|
|
|
|
|
RegFunc(Mef, 0x00600400, BiPredCtl, 0x40, Meff_BiPredCtl, 0x00600440)
|
|
|
|
RegFunc(Mef,0x00600500, MvpRefIdxA, 0x100, Meff_MvpRefIdxA, 0x00600500)
|
|
FldFunc(MvpRefIdxA, L1RefA1, 24, 8)
|
|
FldFunc(MvpRefIdxA, L0RefA1, 16, 8)
|
|
FldFunc(MvpRefIdxA, L1RefA0, 8, 8)
|
|
FldFunc(MvpRefIdxA, L0RefA0, 0, 8)
|
|
|
|
RegFunc(Mef,0x00600500, MvpVecA00, 0x104, Meff_MvpVecA00, 0x00600504)
|
|
RegFunc(Mef,0x00600500, MvpVecA01, 0x108, Meff_MvpVecA01, 0x00600508)
|
|
RegFunc(Mef,0x00600500, MvpVecA10, 0x10c, Meff_MvpVecA10, 0x0060050c)
|
|
RegFunc(Mef,0x00600500, MvpVecA11, 0x110, Meff_MvpVecA11, 0x00600510)
|
|
RegFunc(Mef,0x00600500, MvpVecA20, 0x114, Meff_MvpVecA20, 0x00600514)
|
|
RegFunc(Mef,0x00600500, MvpVecA21, 0x118, Meff_MvpVecA21, 0x00600518)
|
|
RegFunc(Mef,0x00600500, MvpVecA30, 0x11c, Meff_MvpVecA30, 0x0060051c)
|
|
RegFunc(Mef,0x00600500, MvpVecA31, 0x120, Meff_MvpVecA31, 0x00600520)
|
|
|
|
RegFunc(Mef,0x00600500, MvpRefIdxB, 0x124, Meff_MvpRefIdxB, 0x00600524)
|
|
FldFunc(MvpRefIdxB, L1RefB1, 24, 8)
|
|
FldFunc(MvpRefIdxB, L0RefB1, 16, 8)
|
|
FldFunc(MvpRefIdxB, L1RefB0, 8, 8)
|
|
FldFunc(MvpRefIdxB, L0RefB0, 0, 8)
|
|
|
|
|
|
RegFunc(Mef,0x00600500, MvpVecB00, 0x128, Meff_MvpVecB00, 0x00600528)
|
|
RegFunc(Mef,0x00600500, MvpVecB01, 0x12c, Meff_MvpVecB01, 0x0060052c)
|
|
RegFunc(Mef,0x00600500, MvpVecB10, 0x130, Meff_MvpVecB10, 0x00600530)
|
|
RegFunc(Mef,0x00600500, MvpVecB11, 0x134, Meff_MvpVecB11, 0x00600534)
|
|
RegFunc(Mef,0x00600500, MvpVecB20, 0x138, Meff_MvpVecB20, 0x00600538)
|
|
RegFunc(Mef,0x00600500, MvpVecB21, 0x13c, Meff_MvpVecB21, 0x0060053c)
|
|
RegFunc(Mef,0x00600500, MvpVecB30, 0x140, Meff_MvpVecB30, 0x00600540)
|
|
RegFunc(Mef,0x00600500, MvpVecB31, 0x144, Meff_MvpVecB31, 0x00600544)
|
|
|
|
RegFunc(Mef,0x00600500, MvpRefIdxCAndEdge,0x148, Meff_MvpRefIdxCAndEdge, 0x00600548)
|
|
FldFunc(MvpRefIdxCAndEdge, TopEdge, 11, 1)
|
|
FldFunc(MvpRefIdxCAndEdge, RightEdge, 10, 1)
|
|
FldFunc(MvpRefIdxCAndEdge, LeftEdge, 9, 1)
|
|
FldFunc(MvpRefIdxCAndEdge, L1RefC0, 8, 8)
|
|
FldFunc(MvpRefIdxCAndEdge, L0RefC0, 0, 8)
|
|
|
|
RegFunc(Mef,0x00600500, MvpVecC00, 0x14c, Meff_MvpVecC00, 0x0060054c)
|
|
RegFunc(Mef,0x00600500, MvpVecC01, 0x150, Meff_MvpVecC01, 0x00600550)
|
|
|
|
RegFunc(Mef,0x00600500, MvpCurrMode, 0x154, Meff_MvpCurrMode, 0x00600554)
|
|
|
|
FldFunc(MvpCurrMode, MbMode, 14, 2)
|
|
FldFunc(MvpCurrMode, PartIdx, 12, 2)
|
|
FldFunc(MvpCurrMode, SubMode, 10, 2)
|
|
FldFunc(MvpCurrMode, ListIdx, 8, 2)
|
|
FldFunc(MvpCurrMode, RefIdx, 0, 8)
|
|
|
|
RegFunc(Mef,0x00600500, MvpResultMode, 0x158, Meff_MvpResultMode, 0x00600558)
|
|
FldFunc(MvpResultMode, SubMode, 16, 2)
|
|
FldFunc(MvpResultMode, Refidx1, 8, 8)
|
|
FldFunc(MvpResultMode, Refidx0, 0, 8)
|
|
|
|
RegFunc(Mef,0x00600500, MvpMVP, 0x15c, Meff_MvpMVP, 0x0060055c)
|
|
RegFunc(Mef,0x00600500, MvpMVD, 0x160, Meff_MvpMVD, 0x00600560)
|
|
RegFunc(Mef,0x00600500, MvpCost, 0x164, Meff_MvpCost, 0x00600564)
|
|
|
|
|
|
FldFunc(Meff_FmeCtl, RefIdx, 5, 1)
|
|
FldFunc(Meff_FmeCtl, ListIdx, 4, 1)
|
|
FldFunc(Meff_FmeCtl, HostRam, 3, 1)
|
|
FldFunc(Meff_FmeCtl, Rsv2, 2, 1)
|
|
FldFunc(Meff_FmeCtl, Enable, 1, 1)
|
|
FldFunc(Meff_FmeCtl, SADClr, 0, 1)
|
|
|
|
FldFunc(Meff_FmeCurr, FrameId, 24, 8)
|
|
FldFunc(Meff_FmeCurr, YPos, 12, 12)
|
|
FldFunc(Meff_FmeCurr, XPos, 0, 12)
|
|
|
|
FldFunc(Meff_FmeRefVec, YVec, 16, 16) // Actually truncated to 12 bits in hw, but will be written as 16 bits of signed int
|
|
FldFunc(Meff_FmeRefVec, XVec, 0, 16)
|
|
|
|
FldFunc(Meff_FmeMVP, YVec, 16, 16)
|
|
FldFunc(Meff_FmeMVP, XVec, 0, 16)
|
|
|
|
FldFunc(Meff_FmeLambda, Rsv16, 16, 16)
|
|
FldFunc(Meff_FmeLambda, Val, 0, 16)
|
|
|
|
FldFunc(Meff_FmeImgSize, YSize, 16, 16)
|
|
FldFunc(Meff_FmeImgSize, XSize, 0, 16)
|
|
|
|
FldFunc(Meff_FmeStatus, l00, 3, 1) // vector l0 r0 ready to read
|
|
FldFunc(Meff_FmeStatus, BidirRdy, 2, 1)
|
|
FldFunc(Meff_FmeStatus, OutRdy, 1, 1)
|
|
FldFunc(Meff_FmeStatus, InRdy, 0, 1)
|
|
|
|
FldFunc(Meff_MvpRefIdxA, L1RefA1, 24, 8)
|
|
FldFunc(Meff_MvpRefIdxA, L0RefA1, 16, 8)
|
|
FldFunc(Meff_MvpRefIdxA, L1RefA0, 8, 8)
|
|
FldFunc(Meff_MvpRefIdxA, L0RefA0, 0, 8)
|
|
|
|
FldFunc(Meff_MvpRefIdxB, L1RefB1, 24, 8)
|
|
FldFunc(Meff_MvpRefIdxB, L0RefB1, 16, 8)
|
|
FldFunc(Meff_MvpRefIdxB, L1RefB0, 8, 8)
|
|
FldFunc(Meff_MvpRefIdxB, L0RefB0, 0, 8)
|
|
|
|
FldFunc(Meff_MvpRefIdxCAndEdge, TopEdge, 11, 1)
|
|
FldFunc(Meff_MvpRefIdxCAndEdge, RightEdge, 10, 1)
|
|
FldFunc(Meff_MvpRefIdxCAndEdge, LeftEdge, 9, 1)
|
|
FldFunc(Meff_MvpRefIdxCAndEdge, L1RefC0, 8, 8)
|
|
FldFunc(Meff_MvpRefIdxCAndEdge, L0RefC0, 0, 8)
|
|
|
|
FldFunc(Meff_MvpCurrMode, MbMode, 14, 2)
|
|
FldFunc(Meff_MvpCurrMode, PartIdx, 12, 2)
|
|
FldFunc(Meff_MvpCurrMode, SubMode, 10, 2)
|
|
FldFunc(Meff_MvpCurrMode, ListIdx, 8, 2)
|
|
FldFunc(Meff_MvpCurrMode, RefIdx, 0, 8)
|
|
|
|
FldFunc(Meff_MvpResultMode, SubMode, 16, 2)
|
|
FldFunc(Meff_MvpResultMode, Refidx1, 8, 8)
|
|
FldFunc(Meff_MvpResultMode, Refidx0, 0, 8)
|
|
|
|
FldFunc(Meff_EncFCs_RegMbxStat, Rsv2, 2, 30)
|
|
FldFunc(Meff_EncFCs_RegMbxStat, C2H, 1, 1)
|
|
FldFunc(Meff_EncFCs_RegMbxStat, H2C, 0, 1)
|
|
|
|
#ifdef VCMODS_REGMAP
|
|
// PFCD not sure why these two areafuncs conflict, change to one common area
|
|
|
|
RegAreaFunc(MefBase, 0x600600, 0x600AFF)
|
|
RegFunc(Mef,0x00600600, BiPredSad, 0x0, Meff_BiPredSad, 0x00600600)
|
|
//RegAreaFunc(MefBase, 0x600800, 0x600AFF)
|
|
RegFunc(Mef,0x00600800, FmeVec, 0x0, Meff_FmeVec, 0x00600800)
|
|
|
|
#else
|
|
RegAreaFunc(MefBase, 0x600600, 0x6007FF)
|
|
RegFunc(Mef,0x00600600, BiPredSad, 0x0, Meff_BiPredSad, 0x00600600)
|
|
RegAreaFunc(MefBase, 0x600800, 0x600AFF)
|
|
RegFunc(Mef,0x00600800, FmeVec, 0x0, Meff_FmeVec, 0x00600800)
|
|
#endif
|
|
|