220 lines
16 KiB
C
Executable File
220 lines
16 KiB
C
Executable File
// This file was generated by the create_regs script
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#define TB_BASE 0x7e20b000
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#define TB_ADDR HW_REGISTER_RW( 0x7e20b000 )
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#define TB_ADDR_MASK 0xffffffff
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#define TB_ADDR_WIDTH 32
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#define TB_TASK HW_REGISTER_RW( 0x7e20b000 )
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#define TB_TASK_MASK 0x0001ffff
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#define TB_TASK_WIDTH 17
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#define TB_TASK_NUM_BITS 15:0
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#define TB_TASK_NUM_SET 0x0000ffff
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#define TB_TASK_NUM_CLR 0xffff0000
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#define TB_TASK_NUM_MSB 15
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#define TB_TASK_NUM_LSB 0
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#define TB_TASK_TEXT_FLAG_BITS 16:16
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#define TB_TASK_TEXT_FLAG_SET 0x00010000
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#define TB_TASK_TEXT_FLAG_CLR 0xfffeffff
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#define TB_TASK_TEXT_FLAG_MSB 16
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#define TB_TASK_TEXT_FLAG_LSB 16
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#define TB_TASK_PARAM1 HW_REGISTER_RW( 0x7e20b004 )
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#define TB_TASK_PARAM1_MASK 0xffffffff
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#define TB_TASK_PARAM1_WIDTH 32
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#define TB_TASK_PARAM2 HW_REGISTER_RW( 0x7e20b008 )
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#define TB_TASK_PARAM2_MASK 0xffffffff
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#define TB_TASK_PARAM2_WIDTH 32
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#define TB_TASK_PARAM3 HW_REGISTER_RW( 0x7e20b00c )
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#define TB_TASK_PARAM3_MASK 0xffffffff
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#define TB_TASK_PARAM3_WIDTH 32
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#define TB_TASK_STATUS HW_REGISTER_RW( 0x7e20b080 )
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#define TB_TASK_STATUS_MASK 0xffffffff
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#define TB_TASK_STATUS_WIDTH 32
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#define TB_TASK_RXDATA1 HW_REGISTER_RW( 0x7e20b084 )
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#define TB_TASK_RXDATA1_MASK 0xffffffff
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#define TB_TASK_RXDATA1_WIDTH 32
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#define TB_TASK_RXDATA2 HW_REGISTER_RW( 0x7e20b088 )
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#define TB_TASK_RXDATA2_MASK 0xffffffff
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#define TB_TASK_RXDATA2_WIDTH 32
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#define TB_TASK_TXTCLR HW_REGISTER_RW( 0x7e20b0f0 )
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#define TB_TASK_TXTCLR_MASK 0xffffffff
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#define TB_TASK_TXTCLR_WIDTH 32
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#define TB_HDMI HW_REGISTER_RW( 0x7e20b100 )
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#define TB_HDMI_MASK 0xffffffff
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#define TB_HDMI_WIDTH 32
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#define TB_PCM HW_REGISTER_RW( 0x7e20b200 )
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#define TB_PCM_MASK 0xffffffff
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#define TB_PCM_WIDTH 32
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#define TB_HOST HW_REGISTER_RW( 0x7e20b300 )
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#define TB_HOST_MASK 0xffffffff
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#define TB_HOST_WIDTH 32
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#define TB_PRINTER_CTRL HW_REGISTER_RW( 0x7e20b400 )
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#define TB_PRINTER_CTRL_MASK 0x0000fff3
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#define TB_PRINTER_CTRL_WIDTH 16
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#define TB_PRINTER_CTRL_TASKNO_BITS 15:4
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#define TB_PRINTER_CTRL_TASKNO_SET 0x0000fff0
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#define TB_PRINTER_CTRL_TASKNO_CLR 0xffff000f
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#define TB_PRINTER_CTRL_TASKNO_MSB 15
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#define TB_PRINTER_CTRL_TASKNO_LSB 4
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#define TB_PRINTER_CTRL_OFFSET_BITS 1:0
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#define TB_PRINTER_CTRL_OFFSET_SET 0x00000003
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#define TB_PRINTER_CTRL_OFFSET_CLR 0xfffffffc
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#define TB_PRINTER_CTRL_OFFSET_MSB 1
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#define TB_PRINTER_CTRL_OFFSET_LSB 0
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#define TB_PRINTER_DATA HW_REGISTER_RW( 0x7e20b404 )
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#define TB_PRINTER_DATA_MASK 0xffffffff
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#define TB_PRINTER_DATA_WIDTH 32
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#define TB_BOOT_ADDR HW_REGISTER_RW( 0x7e20b500 )
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#define TB_BOOT_ADDR_MASK 0xffffffff
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#define TB_BOOT_ADDR_WIDTH 32
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#define TB_BOOT_OPT HW_REGISTER_RW( 0x7e20b504 )
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#define TB_BOOT_OPT_MASK 0x800007ff
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#define TB_BOOT_OPT_WIDTH 32
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#define TB_BOOT_OPT_FAST_OPT_BITS 0:0
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#define TB_BOOT_OPT_FAST_OPT_SET 0x00000001
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#define TB_BOOT_OPT_FAST_OPT_CLR 0xfffffffe
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#define TB_BOOT_OPT_FAST_OPT_MSB 0
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#define TB_BOOT_OPT_FAST_OPT_LSB 0
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#define TB_BOOT_OPT_EIGHT_BANK_BITS 1:1
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#define TB_BOOT_OPT_EIGHT_BANK_SET 0x00000002
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#define TB_BOOT_OPT_EIGHT_BANK_CLR 0xfffffffd
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#define TB_BOOT_OPT_EIGHT_BANK_MSB 1
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#define TB_BOOT_OPT_EIGHT_BANK_LSB 1
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#define TB_BOOT_OPT_FPGA_BITS 2:2
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#define TB_BOOT_OPT_FPGA_SET 0x00000004
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#define TB_BOOT_OPT_FPGA_CLR 0xfffffffb
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#define TB_BOOT_OPT_FPGA_MSB 2
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#define TB_BOOT_OPT_FPGA_LSB 2
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#define TB_BOOT_OPT_TCL_SIM_BITS 3:3
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#define TB_BOOT_OPT_TCL_SIM_SET 0x00000008
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#define TB_BOOT_OPT_TCL_SIM_CLR 0xfffffff7
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#define TB_BOOT_OPT_TCL_SIM_MSB 3
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#define TB_BOOT_OPT_TCL_SIM_LSB 3
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#define TB_BOOT_OPT_ELPIDA_BITS 4:4
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#define TB_BOOT_OPT_ELPIDA_SET 0x00000010
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#define TB_BOOT_OPT_ELPIDA_CLR 0xffffffef
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#define TB_BOOT_OPT_ELPIDA_MSB 4
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#define TB_BOOT_OPT_ELPIDA_LSB 4
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#define TB_BOOT_OPT_SDC_BEHAV_PHY_BITS 5:5
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#define TB_BOOT_OPT_SDC_BEHAV_PHY_SET 0x00000020
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#define TB_BOOT_OPT_SDC_BEHAV_PHY_CLR 0xffffffdf
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#define TB_BOOT_OPT_SDC_BEHAV_PHY_MSB 5
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#define TB_BOOT_OPT_SDC_BEHAV_PHY_LSB 5
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#define TB_BOOT_OPT_NO_PRINT_BITS 6:6
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#define TB_BOOT_OPT_NO_PRINT_SET 0x00000040
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#define TB_BOOT_OPT_NO_PRINT_CLR 0xffffffbf
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#define TB_BOOT_OPT_NO_PRINT_MSB 6
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#define TB_BOOT_OPT_NO_PRINT_LSB 6
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#define TB_BOOT_OPT_BOOT_HALT_BITS 7:7
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#define TB_BOOT_OPT_BOOT_HALT_SET 0x00000080
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#define TB_BOOT_OPT_BOOT_HALT_CLR 0xffffff7f
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#define TB_BOOT_OPT_BOOT_HALT_MSB 7
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#define TB_BOOT_OPT_BOOT_HALT_LSB 7
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#define TB_BOOT_OPT_BANK_MODE_BITS 9:8
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#define TB_BOOT_OPT_BANK_MODE_SET 0x00000300
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#define TB_BOOT_OPT_BANK_MODE_CLR 0xfffffcff
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#define TB_BOOT_OPT_BANK_MODE_MSB 9
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#define TB_BOOT_OPT_BANK_MODE_LSB 8
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#define TB_BOOT_OPT_DONT_SET_VPU_CLK_BITS 10:10
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#define TB_BOOT_OPT_DONT_SET_VPU_CLK_SET 0x00000400
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#define TB_BOOT_OPT_DONT_SET_VPU_CLK_CLR 0xfffffbff
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#define TB_BOOT_OPT_DONT_SET_VPU_CLK_MSB 10
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#define TB_BOOT_OPT_DONT_SET_VPU_CLK_LSB 10
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#define TB_BOOT_OPT_TB_PRESENT_BITS 31:31
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#define TB_BOOT_OPT_TB_PRESENT_SET 0x80000000
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#define TB_BOOT_OPT_TB_PRESENT_CLR 0x7fffffff
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#define TB_BOOT_OPT_TB_PRESENT_MSB 31
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#define TB_BOOT_OPT_TB_PRESENT_LSB 31
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#define TB_BOOT_SECURE_MODE HW_REGISTER_RW( 0x7e20b508 )
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#define TB_BOOT_SECURE_MODE_MASK 0x00000003
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#define TB_BOOT_SECURE_MODE_WIDTH 2
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#define TB_BOOT_SECURE_MODE_JTAG_SECURE_BITS 1:0
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#define TB_BOOT_SECURE_MODE_JTAG_SECURE_SET 0x00000003
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#define TB_BOOT_SECURE_MODE_JTAG_SECURE_CLR 0xfffffffc
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#define TB_BOOT_SECURE_MODE_JTAG_SECURE_MSB 1
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#define TB_BOOT_SECURE_MODE_JTAG_SECURE_LSB 0
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#define TB_BOOT_STATUS HW_REGISTER_RW( 0x7e20b50c )
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#define TB_BOOT_STATUS_MASK 0x00000001
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#define TB_BOOT_STATUS_WIDTH 1
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#define TB_BOOT_STATUS_CPRMAN_PROGRAMMED_BITS 0:0
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#define TB_BOOT_STATUS_CPRMAN_PROGRAMMED_SET 0x00000001
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#define TB_BOOT_STATUS_CPRMAN_PROGRAMMED_CLR 0xfffffffe
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#define TB_BOOT_STATUS_CPRMAN_PROGRAMMED_MSB 0
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#define TB_BOOT_STATUS_CPRMAN_PROGRAMMED_LSB 0
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#define TB_JTB_CONFIG HW_REGISTER_RW( 0x7e20b800 )
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#define TB_JTB_CONFIG_MASK 0xbfffffff
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#define TB_JTB_CONFIG_WIDTH 32
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#define TB_JTB_CONFIG_SBITS_BITS 4:0
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#define TB_JTB_CONFIG_SBITS_SET 0x0000001f
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#define TB_JTB_CONFIG_SBITS_CLR 0xffffffe0
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#define TB_JTB_CONFIG_SBITS_MSB 4
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#define TB_JTB_CONFIG_SBITS_LSB 0
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#define TB_JTB_CONFIG_OUT_MS_BITS 6:6
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#define TB_JTB_CONFIG_OUT_MS_SET 0x00000040
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#define TB_JTB_CONFIG_OUT_MS_CLR 0xffffffbf
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#define TB_JTB_CONFIG_OUT_MS_MSB 6
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#define TB_JTB_CONFIG_OUT_MS_LSB 6
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#define TB_JTB_CONFIG_INV_CLK_BITS 7:7
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#define TB_JTB_CONFIG_INV_CLK_SET 0x00000080
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#define TB_JTB_CONFIG_INV_CLK_CLR 0xffffff7f
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#define TB_JTB_CONFIG_INV_CLK_MSB 7
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#define TB_JTB_CONFIG_INV_CLK_LSB 7
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#define TB_JTB_CONFIG_TMS_RISE_BITS 8:8
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#define TB_JTB_CONFIG_TMS_RISE_SET 0x00000100
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#define TB_JTB_CONFIG_TMS_RISE_CLR 0xfffffeff
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#define TB_JTB_CONFIG_TMS_RISE_MSB 8
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#define TB_JTB_CONFIG_TMS_RISE_LSB 8
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#define TB_JTB_CONFIG_TDI_RISE_BITS 9:9
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#define TB_JTB_CONFIG_TDI_RISE_SET 0x00000200
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#define TB_JTB_CONFIG_TDI_RISE_CLR 0xfffffdff
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#define TB_JTB_CONFIG_TDI_RISE_MSB 9
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#define TB_JTB_CONFIG_TDI_RISE_LSB 9
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#define TB_JTB_CONFIG_TDO_RISE_BITS 10:10
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#define TB_JTB_CONFIG_TDO_RISE_SET 0x00000400
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#define TB_JTB_CONFIG_TDO_RISE_CLR 0xfffffbff
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#define TB_JTB_CONFIG_TDO_RISE_MSB 10
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#define TB_JTB_CONFIG_TDO_RISE_LSB 10
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#define TB_JTB_CONFIG_ENABLE_BITS 11:11
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#define TB_JTB_CONFIG_ENABLE_SET 0x00000800
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#define TB_JTB_CONFIG_ENABLE_CLR 0xfffff7ff
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#define TB_JTB_CONFIG_ENABLE_MSB 11
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#define TB_JTB_CONFIG_ENABLE_LSB 11
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#define TB_JTB_CONFIG_D_HOLD_BITS 13:12
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#define TB_JTB_CONFIG_D_HOLD_SET 0x00003000
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#define TB_JTB_CONFIG_D_HOLD_CLR 0xffffcfff
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#define TB_JTB_CONFIG_D_HOLD_MSB 13
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#define TB_JTB_CONFIG_D_HOLD_LSB 12
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#define TB_JTB_CONFIG_TRSTN_BITS 14:14
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#define TB_JTB_CONFIG_TRSTN_SET 0x00004000
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#define TB_JTB_CONFIG_TRSTN_CLR 0xffffbfff
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#define TB_JTB_CONFIG_TRSTN_MSB 14
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#define TB_JTB_CONFIG_TRSTN_LSB 14
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#define TB_JTB_CONFIG_SPEED_BITS 23:16
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#define TB_JTB_CONFIG_SPEED_SET 0x00ff0000
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#define TB_JTB_CONFIG_SPEED_CLR 0xff00ffff
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#define TB_JTB_CONFIG_SPEED_MSB 23
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#define TB_JTB_CONFIG_SPEED_LSB 16
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#define TB_JTB_CONFIG_BITCNT_BITS 29:23
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#define TB_JTB_CONFIG_BITCNT_SET 0x3f800000
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#define TB_JTB_CONFIG_BITCNT_CLR 0xc07fffff
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#define TB_JTB_CONFIG_BITCNT_MSB 29
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#define TB_JTB_CONFIG_BITCNT_LSB 23
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#define TB_JTB_CONFIG_BUSY_BITS 31:31
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#define TB_JTB_CONFIG_BUSY_SET 0x80000000
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#define TB_JTB_CONFIG_BUSY_CLR 0x7fffffff
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#define TB_JTB_CONFIG_BUSY_MSB 31
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#define TB_JTB_CONFIG_BUSY_LSB 31
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#define TB_JTB_TMS HW_REGISTER_RW( 0x7e20b804 )
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#define TB_JTB_TMS_MASK 0xffffffff
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#define TB_JTB_TMS_WIDTH 32
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#define TB_JTB_TDI HW_REGISTER_RW( 0x7e20b808 )
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#define TB_JTB_TDI_MASK 0xffffffff
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#define TB_JTB_TDI_WIDTH 32
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#define TB_JTB_TDO HW_REGISTER_RO( 0x7e20b80c )
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#define TB_JTB_TDO_MASK 0xffffffff
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#define TB_JTB_TDO_WIDTH 32
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#define TB_JTB_BITCNT HW_REGISTER_RW( 0x7e20b810 )
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#define TB_JTB_BITCNT_MASK 0x0000003f
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#define TB_JTB_BITCNT_WIDTH 6
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#define TB_JTB_PORTEN HW_REGISTER_RW( 0x7e20b814 )
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#define TB_JTB_PORTEN_MASK 0x000000ff
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#define TB_JTB_PORTEN_WIDTH 8
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