246 lines
17 KiB
C
Executable File
246 lines
17 KiB
C
Executable File
// This file was generated by the create_regs script
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#define ASB_BASE 0x7e00a000
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#define ASB_APB_ID 0x62726467
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#define ASB_AXI_BRDG_VERSION HW_REGISTER_RW( 0x7e00a000 )
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#define ASB_AXI_BRDG_VERSION_MASK 0x000000ff
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#define ASB_AXI_BRDG_VERSION_WIDTH 8
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#define ASB_AXI_BRDG_VERSION_RESET 0000000000
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#define ASB_CPR_CTRL HW_REGISTER_RW( 0x7e00a004 )
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#define ASB_CPR_CTRL_MASK 0x00ffffff
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#define ASB_CPR_CTRL_WIDTH 24
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#define ASB_CPR_CTRL_RESET 0x00000007
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#define ASB_CPR_CTRL_CLR_REQ_BITS 0:0
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#define ASB_CPR_CTRL_CLR_REQ_SET 0x00000001
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#define ASB_CPR_CTRL_CLR_REQ_CLR 0xfffffffe
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#define ASB_CPR_CTRL_CLR_REQ_MSB 0
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#define ASB_CPR_CTRL_CLR_REQ_LSB 0
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#define ASB_CPR_CTRL_CLR_ACK_BITS 1:1
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#define ASB_CPR_CTRL_CLR_ACK_SET 0x00000002
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#define ASB_CPR_CTRL_CLR_ACK_CLR 0xfffffffd
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#define ASB_CPR_CTRL_CLR_ACK_MSB 1
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#define ASB_CPR_CTRL_CLR_ACK_LSB 1
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#define ASB_CPR_CTRL_EMPTY_BITS 2:2
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#define ASB_CPR_CTRL_EMPTY_SET 0x00000004
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#define ASB_CPR_CTRL_EMPTY_CLR 0xfffffffb
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#define ASB_CPR_CTRL_EMPTY_MSB 2
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#define ASB_CPR_CTRL_EMPTY_LSB 2
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#define ASB_CPR_CTRL_FULL_BITS 3:3
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#define ASB_CPR_CTRL_FULL_SET 0x00000008
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#define ASB_CPR_CTRL_FULL_CLR 0xfffffff7
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#define ASB_CPR_CTRL_FULL_MSB 3
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#define ASB_CPR_CTRL_FULL_LSB 3
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#define ASB_CPR_CTRL_RCOUNT_BITS 13:4
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#define ASB_CPR_CTRL_RCOUNT_SET 0x00003ff0
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#define ASB_CPR_CTRL_RCOUNT_CLR 0xffffc00f
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#define ASB_CPR_CTRL_RCOUNT_MSB 13
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#define ASB_CPR_CTRL_RCOUNT_LSB 4
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#define ASB_CPR_CTRL_WCOUNT_BITS 23:14
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#define ASB_CPR_CTRL_WCOUNT_SET 0x00ffc000
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#define ASB_CPR_CTRL_WCOUNT_CLR 0xff003fff
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#define ASB_CPR_CTRL_WCOUNT_MSB 23
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#define ASB_CPR_CTRL_WCOUNT_LSB 14
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#define ASB_V3D_S_CTRL HW_REGISTER_RW( 0x7e00a008 )
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#define ASB_V3D_S_CTRL_MASK 0x00ffffff
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#define ASB_V3D_S_CTRL_WIDTH 24
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#define ASB_V3D_S_CTRL_RESET 0x00000007
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#define ASB_V3D_S_CTRL_CLR_REQ_BITS 0:0
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#define ASB_V3D_S_CTRL_CLR_REQ_SET 0x00000001
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#define ASB_V3D_S_CTRL_CLR_REQ_CLR 0xfffffffe
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#define ASB_V3D_S_CTRL_CLR_REQ_MSB 0
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#define ASB_V3D_S_CTRL_CLR_REQ_LSB 0
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#define ASB_V3D_S_CTRL_CLR_ACK_BITS 1:1
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#define ASB_V3D_S_CTRL_CLR_ACK_SET 0x00000002
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#define ASB_V3D_S_CTRL_CLR_ACK_CLR 0xfffffffd
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#define ASB_V3D_S_CTRL_CLR_ACK_MSB 1
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#define ASB_V3D_S_CTRL_CLR_ACK_LSB 1
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#define ASB_V3D_S_CTRL_EMPTY_BITS 2:2
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#define ASB_V3D_S_CTRL_EMPTY_SET 0x00000004
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#define ASB_V3D_S_CTRL_EMPTY_CLR 0xfffffffb
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#define ASB_V3D_S_CTRL_EMPTY_MSB 2
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#define ASB_V3D_S_CTRL_EMPTY_LSB 2
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#define ASB_V3D_S_CTRL_FULL_BITS 3:3
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#define ASB_V3D_S_CTRL_FULL_SET 0x00000008
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#define ASB_V3D_S_CTRL_FULL_CLR 0xfffffff7
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#define ASB_V3D_S_CTRL_FULL_MSB 3
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#define ASB_V3D_S_CTRL_FULL_LSB 3
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#define ASB_V3D_S_CTRL_RCOUNT_BITS 13:4
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#define ASB_V3D_S_CTRL_RCOUNT_SET 0x00003ff0
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#define ASB_V3D_S_CTRL_RCOUNT_CLR 0xffffc00f
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#define ASB_V3D_S_CTRL_RCOUNT_MSB 13
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#define ASB_V3D_S_CTRL_RCOUNT_LSB 4
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#define ASB_V3D_S_CTRL_WCOUNT_BITS 23:14
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#define ASB_V3D_S_CTRL_WCOUNT_SET 0x00ffc000
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#define ASB_V3D_S_CTRL_WCOUNT_CLR 0xff003fff
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#define ASB_V3D_S_CTRL_WCOUNT_MSB 23
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#define ASB_V3D_S_CTRL_WCOUNT_LSB 14
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#define ASB_V3D_M_CTRL HW_REGISTER_RW( 0x7e00a00c )
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#define ASB_V3D_M_CTRL_MASK 0x00ffffff
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#define ASB_V3D_M_CTRL_WIDTH 24
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#define ASB_V3D_M_CTRL_RESET 0x00000007
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#define ASB_V3D_M_CTRL_CLR_REQ_BITS 0:0
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#define ASB_V3D_M_CTRL_CLR_REQ_SET 0x00000001
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#define ASB_V3D_M_CTRL_CLR_REQ_CLR 0xfffffffe
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#define ASB_V3D_M_CTRL_CLR_REQ_MSB 0
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#define ASB_V3D_M_CTRL_CLR_REQ_LSB 0
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#define ASB_V3D_M_CTRL_CLR_ACK_BITS 1:1
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#define ASB_V3D_M_CTRL_CLR_ACK_SET 0x00000002
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#define ASB_V3D_M_CTRL_CLR_ACK_CLR 0xfffffffd
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#define ASB_V3D_M_CTRL_CLR_ACK_MSB 1
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#define ASB_V3D_M_CTRL_CLR_ACK_LSB 1
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#define ASB_V3D_M_CTRL_EMPTY_BITS 2:2
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#define ASB_V3D_M_CTRL_EMPTY_SET 0x00000004
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#define ASB_V3D_M_CTRL_EMPTY_CLR 0xfffffffb
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#define ASB_V3D_M_CTRL_EMPTY_MSB 2
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#define ASB_V3D_M_CTRL_EMPTY_LSB 2
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#define ASB_V3D_M_CTRL_FULL_BITS 3:3
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#define ASB_V3D_M_CTRL_FULL_SET 0x00000008
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#define ASB_V3D_M_CTRL_FULL_CLR 0xfffffff7
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#define ASB_V3D_M_CTRL_FULL_MSB 3
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#define ASB_V3D_M_CTRL_FULL_LSB 3
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#define ASB_V3D_M_CTRL_RCOUNT_BITS 13:4
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#define ASB_V3D_M_CTRL_RCOUNT_SET 0x00003ff0
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#define ASB_V3D_M_CTRL_RCOUNT_CLR 0xffffc00f
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#define ASB_V3D_M_CTRL_RCOUNT_MSB 13
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#define ASB_V3D_M_CTRL_RCOUNT_LSB 4
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#define ASB_V3D_M_CTRL_WCOUNT_BITS 23:14
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#define ASB_V3D_M_CTRL_WCOUNT_SET 0x00ffc000
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#define ASB_V3D_M_CTRL_WCOUNT_CLR 0xff003fff
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#define ASB_V3D_M_CTRL_WCOUNT_MSB 23
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#define ASB_V3D_M_CTRL_WCOUNT_LSB 14
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#define ASB_ISP_S_CTRL HW_REGISTER_RW( 0x7e00a010 )
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#define ASB_ISP_S_CTRL_MASK 0x00ffffff
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#define ASB_ISP_S_CTRL_WIDTH 24
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#define ASB_ISP_S_CTRL_RESET 0x00000007
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#define ASB_ISP_S_CTRL_CLR_REQ_BITS 0:0
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#define ASB_ISP_S_CTRL_CLR_REQ_SET 0x00000001
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#define ASB_ISP_S_CTRL_CLR_REQ_CLR 0xfffffffe
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#define ASB_ISP_S_CTRL_CLR_REQ_MSB 0
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#define ASB_ISP_S_CTRL_CLR_REQ_LSB 0
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#define ASB_ISP_S_CTRL_CLR_ACK_BITS 1:1
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#define ASB_ISP_S_CTRL_CLR_ACK_SET 0x00000002
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#define ASB_ISP_S_CTRL_CLR_ACK_CLR 0xfffffffd
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#define ASB_ISP_S_CTRL_CLR_ACK_MSB 1
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#define ASB_ISP_S_CTRL_CLR_ACK_LSB 1
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#define ASB_ISP_S_CTRL_EMPTY_BITS 2:2
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#define ASB_ISP_S_CTRL_EMPTY_SET 0x00000004
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#define ASB_ISP_S_CTRL_EMPTY_CLR 0xfffffffb
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#define ASB_ISP_S_CTRL_EMPTY_MSB 2
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#define ASB_ISP_S_CTRL_EMPTY_LSB 2
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#define ASB_ISP_S_CTRL_FULL_BITS 3:3
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#define ASB_ISP_S_CTRL_FULL_SET 0x00000008
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#define ASB_ISP_S_CTRL_FULL_CLR 0xfffffff7
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#define ASB_ISP_S_CTRL_FULL_MSB 3
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#define ASB_ISP_S_CTRL_FULL_LSB 3
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#define ASB_ISP_S_CTRL_RCOUNT_BITS 13:4
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#define ASB_ISP_S_CTRL_RCOUNT_SET 0x00003ff0
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#define ASB_ISP_S_CTRL_RCOUNT_CLR 0xffffc00f
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#define ASB_ISP_S_CTRL_RCOUNT_MSB 13
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#define ASB_ISP_S_CTRL_RCOUNT_LSB 4
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#define ASB_ISP_S_CTRL_WCOUNT_BITS 23:14
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#define ASB_ISP_S_CTRL_WCOUNT_SET 0x00ffc000
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#define ASB_ISP_S_CTRL_WCOUNT_CLR 0xff003fff
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#define ASB_ISP_S_CTRL_WCOUNT_MSB 23
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#define ASB_ISP_S_CTRL_WCOUNT_LSB 14
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#define ASB_ISP_M_CTRL HW_REGISTER_RW( 0x7e00a014 )
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#define ASB_ISP_M_CTRL_MASK 0x00ffffff
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#define ASB_ISP_M_CTRL_WIDTH 24
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#define ASB_ISP_M_CTRL_RESET 0x00000007
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#define ASB_ISP_M_CTRL_CLR_REQ_BITS 0:0
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#define ASB_ISP_M_CTRL_CLR_REQ_SET 0x00000001
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#define ASB_ISP_M_CTRL_CLR_REQ_CLR 0xfffffffe
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#define ASB_ISP_M_CTRL_CLR_REQ_MSB 0
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#define ASB_ISP_M_CTRL_CLR_REQ_LSB 0
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#define ASB_ISP_M_CTRL_CLR_ACK_BITS 1:1
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#define ASB_ISP_M_CTRL_CLR_ACK_SET 0x00000002
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#define ASB_ISP_M_CTRL_CLR_ACK_CLR 0xfffffffd
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#define ASB_ISP_M_CTRL_CLR_ACK_MSB 1
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#define ASB_ISP_M_CTRL_CLR_ACK_LSB 1
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#define ASB_ISP_M_CTRL_EMPTY_BITS 2:2
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#define ASB_ISP_M_CTRL_EMPTY_SET 0x00000004
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#define ASB_ISP_M_CTRL_EMPTY_CLR 0xfffffffb
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#define ASB_ISP_M_CTRL_EMPTY_MSB 2
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#define ASB_ISP_M_CTRL_EMPTY_LSB 2
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#define ASB_ISP_M_CTRL_FULL_BITS 3:3
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#define ASB_ISP_M_CTRL_FULL_SET 0x00000008
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#define ASB_ISP_M_CTRL_FULL_CLR 0xfffffff7
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#define ASB_ISP_M_CTRL_FULL_MSB 3
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#define ASB_ISP_M_CTRL_FULL_LSB 3
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#define ASB_ISP_M_CTRL_RCOUNT_BITS 13:4
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#define ASB_ISP_M_CTRL_RCOUNT_SET 0x00003ff0
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#define ASB_ISP_M_CTRL_RCOUNT_CLR 0xffffc00f
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#define ASB_ISP_M_CTRL_RCOUNT_MSB 13
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#define ASB_ISP_M_CTRL_RCOUNT_LSB 4
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#define ASB_ISP_M_CTRL_WCOUNT_BITS 23:14
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#define ASB_ISP_M_CTRL_WCOUNT_SET 0x00ffc000
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#define ASB_ISP_M_CTRL_WCOUNT_CLR 0xff003fff
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#define ASB_ISP_M_CTRL_WCOUNT_MSB 23
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#define ASB_ISP_M_CTRL_WCOUNT_LSB 14
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#define ASB_H264_S_CTRL HW_REGISTER_RW( 0x7e00a018 )
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#define ASB_H264_S_CTRL_MASK 0x00ffffff
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#define ASB_H264_S_CTRL_WIDTH 24
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#define ASB_H264_S_CTRL_RESET 0x00000007
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#define ASB_H264_S_CTRL_CLR_REQ_BITS 0:0
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#define ASB_H264_S_CTRL_CLR_REQ_SET 0x00000001
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#define ASB_H264_S_CTRL_CLR_REQ_CLR 0xfffffffe
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#define ASB_H264_S_CTRL_CLR_REQ_MSB 0
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#define ASB_H264_S_CTRL_CLR_REQ_LSB 0
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#define ASB_H264_S_CTRL_CLR_ACK_BITS 1:1
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#define ASB_H264_S_CTRL_CLR_ACK_SET 0x00000002
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#define ASB_H264_S_CTRL_CLR_ACK_CLR 0xfffffffd
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#define ASB_H264_S_CTRL_CLR_ACK_MSB 1
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#define ASB_H264_S_CTRL_CLR_ACK_LSB 1
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#define ASB_H264_S_CTRL_EMPTY_BITS 2:2
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#define ASB_H264_S_CTRL_EMPTY_SET 0x00000004
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#define ASB_H264_S_CTRL_EMPTY_CLR 0xfffffffb
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#define ASB_H264_S_CTRL_EMPTY_MSB 2
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#define ASB_H264_S_CTRL_EMPTY_LSB 2
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#define ASB_H264_S_CTRL_FULL_BITS 3:3
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#define ASB_H264_S_CTRL_FULL_SET 0x00000008
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#define ASB_H264_S_CTRL_FULL_CLR 0xfffffff7
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#define ASB_H264_S_CTRL_FULL_MSB 3
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#define ASB_H264_S_CTRL_FULL_LSB 3
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#define ASB_H264_S_CTRL_RCOUNT_BITS 13:4
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#define ASB_H264_S_CTRL_RCOUNT_SET 0x00003ff0
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#define ASB_H264_S_CTRL_RCOUNT_CLR 0xffffc00f
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#define ASB_H264_S_CTRL_RCOUNT_MSB 13
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#define ASB_H264_S_CTRL_RCOUNT_LSB 4
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#define ASB_H264_S_CTRL_WCOUNT_BITS 23:14
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#define ASB_H264_S_CTRL_WCOUNT_SET 0x00ffc000
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#define ASB_H264_S_CTRL_WCOUNT_CLR 0xff003fff
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#define ASB_H264_S_CTRL_WCOUNT_MSB 23
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#define ASB_H264_S_CTRL_WCOUNT_LSB 14
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#define ASB_H264_M_CTRL HW_REGISTER_RW( 0x7e00a01c )
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#define ASB_H264_M_CTRL_MASK 0x00ffffff
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#define ASB_H264_M_CTRL_WIDTH 24
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#define ASB_H264_M_CTRL_RESET 0x00000007
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#define ASB_H264_M_CTRL_CLR_REQ_BITS 0:0
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#define ASB_H264_M_CTRL_CLR_REQ_SET 0x00000001
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#define ASB_H264_M_CTRL_CLR_REQ_CLR 0xfffffffe
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#define ASB_H264_M_CTRL_CLR_REQ_MSB 0
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#define ASB_H264_M_CTRL_CLR_REQ_LSB 0
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#define ASB_H264_M_CTRL_CLR_ACK_BITS 1:1
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#define ASB_H264_M_CTRL_CLR_ACK_SET 0x00000002
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#define ASB_H264_M_CTRL_CLR_ACK_CLR 0xfffffffd
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#define ASB_H264_M_CTRL_CLR_ACK_MSB 1
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#define ASB_H264_M_CTRL_CLR_ACK_LSB 1
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#define ASB_H264_M_CTRL_EMPTY_BITS 2:2
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#define ASB_H264_M_CTRL_EMPTY_SET 0x00000004
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#define ASB_H264_M_CTRL_EMPTY_CLR 0xfffffffb
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#define ASB_H264_M_CTRL_EMPTY_MSB 2
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#define ASB_H264_M_CTRL_EMPTY_LSB 2
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#define ASB_H264_M_CTRL_FULL_BITS 3:3
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#define ASB_H264_M_CTRL_FULL_SET 0x00000008
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#define ASB_H264_M_CTRL_FULL_CLR 0xfffffff7
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#define ASB_H264_M_CTRL_FULL_MSB 3
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#define ASB_H264_M_CTRL_FULL_LSB 3
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#define ASB_H264_M_CTRL_RCOUNT_BITS 13:4
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#define ASB_H264_M_CTRL_RCOUNT_SET 0x00003ff0
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#define ASB_H264_M_CTRL_RCOUNT_CLR 0xffffc00f
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#define ASB_H264_M_CTRL_RCOUNT_MSB 13
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#define ASB_H264_M_CTRL_RCOUNT_LSB 4
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#define ASB_H264_M_CTRL_WCOUNT_BITS 23:14
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#define ASB_H264_M_CTRL_WCOUNT_SET 0x00ffc000
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#define ASB_H264_M_CTRL_WCOUNT_CLR 0xff003fff
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#define ASB_H264_M_CTRL_WCOUNT_MSB 23
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#define ASB_H264_M_CTRL_WCOUNT_LSB 14
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