71 lines
4.9 KiB
C
Executable File
71 lines
4.9 KiB
C
Executable File
// This file was generated by the create_regs script
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#define VPU_ARB_CTRL_BASE 0x7ee04000
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#define VPU_ARB_CTRL_UC HW_REGISTER_RW( 0x7ee04000 )
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#define VPU_ARB_CTRL_UC_MASK 0x0000ffff
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#define VPU_ARB_CTRL_UC_WIDTH 16
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#define VPU_ARB_CTRL_UC_RESET 0000000000
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#define VPU_ARB_CTRL_UC_CHANNEL_INIBIT_BITS 15:8
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#define VPU_ARB_CTRL_UC_CHANNEL_INIBIT_SET 0x0000ff00
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#define VPU_ARB_CTRL_UC_CHANNEL_INIBIT_CLR 0xffff00ff
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#define VPU_ARB_CTRL_UC_CHANNEL_INIBIT_MSB 15
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#define VPU_ARB_CTRL_UC_CHANNEL_INIBIT_LSB 8
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#define VPU_ARB_CTRL_UC_CHANNEL_INIBIT_RESET 0x0
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#define VPU_ARB_CTRL_UC_ALGORITHM_BITS 7:6
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#define VPU_ARB_CTRL_UC_ALGORITHM_SET 0x000000c0
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#define VPU_ARB_CTRL_UC_ALGORITHM_CLR 0xffffff3f
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#define VPU_ARB_CTRL_UC_ALGORITHM_MSB 7
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#define VPU_ARB_CTRL_UC_ALGORITHM_LSB 6
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#define VPU_ARB_CTRL_UC_ALGORITHM_RESET 0x0
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#define VPU_ARB_CTRL_UC_THRESHOLD_BITS 5:4
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#define VPU_ARB_CTRL_UC_THRESHOLD_SET 0x00000030
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#define VPU_ARB_CTRL_UC_THRESHOLD_CLR 0xffffffcf
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#define VPU_ARB_CTRL_UC_THRESHOLD_MSB 5
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#define VPU_ARB_CTRL_UC_THRESHOLD_LSB 4
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#define VPU_ARB_CTRL_UC_THRESHOLD_RESET 0x0
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#define VPU_ARB_CTRL_UC_DELAY_BITS 3:2
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#define VPU_ARB_CTRL_UC_DELAY_SET 0x0000000c
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#define VPU_ARB_CTRL_UC_DELAY_CLR 0xfffffff3
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#define VPU_ARB_CTRL_UC_DELAY_MSB 3
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#define VPU_ARB_CTRL_UC_DELAY_LSB 2
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#define VPU_ARB_CTRL_UC_DELAY_RESET 0x0
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#define VPU_ARB_CTRL_UC_LIMIT_BITS 1:0
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#define VPU_ARB_CTRL_UC_LIMIT_SET 0x00000003
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#define VPU_ARB_CTRL_UC_LIMIT_CLR 0xfffffffc
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#define VPU_ARB_CTRL_UC_LIMIT_MSB 1
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#define VPU_ARB_CTRL_UC_LIMIT_LSB 0
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#define VPU_ARB_CTRL_UC_LIMIT_RESET 0x0
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#define VPU_ARB_CTRL_L2 HW_REGISTER_RW( 0x7ee04004 )
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#define VPU_ARB_CTRL_L2_MASK 0x0000ffff
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#define VPU_ARB_CTRL_L2_WIDTH 16
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#define VPU_ARB_CTRL_L2_RESET 0000000000
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#define VPU_ARB_CTRL_L2_CHANNEL_INIBIT_BITS 15:8
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#define VPU_ARB_CTRL_L2_CHANNEL_INIBIT_SET 0x0000ff00
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#define VPU_ARB_CTRL_L2_CHANNEL_INIBIT_CLR 0xffff00ff
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#define VPU_ARB_CTRL_L2_CHANNEL_INIBIT_MSB 15
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#define VPU_ARB_CTRL_L2_CHANNEL_INIBIT_LSB 8
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#define VPU_ARB_CTRL_L2_CHANNEL_INIBIT_RESET 0x0
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#define VPU_ARB_CTRL_L2_ALGORITHM_BITS 7:6
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#define VPU_ARB_CTRL_L2_ALGORITHM_SET 0x000000c0
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#define VPU_ARB_CTRL_L2_ALGORITHM_CLR 0xffffff3f
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#define VPU_ARB_CTRL_L2_ALGORITHM_MSB 7
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#define VPU_ARB_CTRL_L2_ALGORITHM_LSB 6
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#define VPU_ARB_CTRL_L2_ALGORITHM_RESET 0x0
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#define VPU_ARB_CTRL_L2_THRESHOLD_BITS 5:4
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#define VPU_ARB_CTRL_L2_THRESHOLD_SET 0x00000030
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#define VPU_ARB_CTRL_L2_THRESHOLD_CLR 0xffffffcf
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#define VPU_ARB_CTRL_L2_THRESHOLD_MSB 5
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#define VPU_ARB_CTRL_L2_THRESHOLD_LSB 4
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#define VPU_ARB_CTRL_L2_THRESHOLD_RESET 0x0
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#define VPU_ARB_CTRL_L2_DELAY_BITS 3:2
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#define VPU_ARB_CTRL_L2_DELAY_SET 0x0000000c
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#define VPU_ARB_CTRL_L2_DELAY_CLR 0xfffffff3
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#define VPU_ARB_CTRL_L2_DELAY_MSB 3
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#define VPU_ARB_CTRL_L2_DELAY_LSB 2
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#define VPU_ARB_CTRL_L2_DELAY_RESET 0x0
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#define VPU_ARB_CTRL_L2_LIMIT_BITS 1:0
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#define VPU_ARB_CTRL_L2_LIMIT_SET 0x00000003
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#define VPU_ARB_CTRL_L2_LIMIT_CLR 0xfffffffc
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#define VPU_ARB_CTRL_L2_LIMIT_MSB 1
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#define VPU_ARB_CTRL_L2_LIMIT_LSB 0
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#define VPU_ARB_CTRL_L2_LIMIT_RESET 0x0
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