84 lines
6.4 KiB
C
Executable File
84 lines
6.4 KiB
C
Executable File
// This file was generated by the create_regs script
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#define IC1_BASE 0x7e002800
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#define IC1_APB_ID 0x494e5445
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#define IC1_C HW_REGISTER_RW( 0x7e002800 )
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#define IC1_C_MASK 0x0000000f
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#define IC1_C_WIDTH 4
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#define IC1_C_RESET 0000000000
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#define IC1_S HW_REGISTER_RO( 0x7e002804 )
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#define IC1_S_MASK 0x073f073f
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#define IC1_S_WIDTH 27
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#define IC1_SRC0 HW_REGISTER_RO( 0x7e002808 )
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#define IC1_SRC0_MASK 0xffffffff
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#define IC1_SRC0_WIDTH 32
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#define IC1_SRC1 HW_REGISTER_RO( 0x7e00280c )
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#define IC1_SRC1_MASK 0xffffffff
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#define IC1_SRC1_WIDTH 32
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#define IC1_MASK0 HW_REGISTER_RW( 0x7e002810 )
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#define IC1_MASK0_MASK 0x77777777
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#define IC1_MASK0_WIDTH 31
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#define IC1_MASK0_RESET 0000000000
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#define IC1_MASK1 HW_REGISTER_RW( 0x7e002814 )
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#define IC1_MASK1_MASK 0x77777777
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#define IC1_MASK1_WIDTH 31
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#define IC1_MASK1_RESET 0000000000
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#define IC1_MASK2 HW_REGISTER_RW( 0x7e002818 )
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#define IC1_MASK2_MASK 0x77777777
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#define IC1_MASK2_WIDTH 31
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#define IC1_MASK2_RESET 0000000000
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#define IC1_MASK3 HW_REGISTER_RW( 0x7e00281c )
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#define IC1_MASK3_MASK 0x77777777
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#define IC1_MASK3_WIDTH 31
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#define IC1_MASK3_RESET 0000000000
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#define IC1_MASK4 HW_REGISTER_RW( 0x7e002820 )
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#define IC1_MASK4_MASK 0x77777777
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#define IC1_MASK4_WIDTH 31
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#define IC1_MASK4_RESET 0000000000
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#define IC1_MASK5 HW_REGISTER_RW( 0x7e002824 )
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#define IC1_MASK5_MASK 0x77777777
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#define IC1_MASK5_WIDTH 31
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#define IC1_MASK5_RESET 0000000000
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#define IC1_MASK6 HW_REGISTER_RW( 0x7e002828 )
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#define IC1_MASK6_MASK 0x77777777
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#define IC1_MASK6_WIDTH 31
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#define IC1_MASK6_RESET 0000000000
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#define IC1_MASK7 HW_REGISTER_RW( 0x7e00282c )
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#define IC1_MASK7_MASK 0x77777777
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#define IC1_MASK7_WIDTH 31
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#define IC1_MASK7_RESET 0000000000
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#define IC1_VADDR HW_REGISTER_RW( 0x7e002830 )
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#define IC1_VADDR_MASK 0xfffffe00
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#define IC1_VADDR_WIDTH 32
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#define IC1_VADDR_RESET 0000000000
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#define IC1_WAKEUP HW_REGISTER_RW( 0x7e002834 )
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#define IC1_WAKEUP_MASK 0xfffffffe
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#define IC1_WAKEUP_WIDTH 32
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#define IC1_WAKEUP_RESET 0x10000000
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#define IC1_PROFILE HW_REGISTER_RW( 0x7e002838 )
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#define IC1_PROFILE_MASK 0x0000ffff
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#define IC1_PROFILE_WIDTH 16
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#define IC1_FORCE0 HW_REGISTER_RW( 0x7e002840 )
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#define IC1_FORCE0_MASK 0xffffffff
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#define IC1_FORCE0_WIDTH 32
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#define IC1_FORCE0_RESET 0000000000
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#define IC1_FORCE1 HW_REGISTER_RW( 0x7e002844 )
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#define IC1_FORCE1_MASK 0xffffffff
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#define IC1_FORCE1_WIDTH 32
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#define IC1_FORCE1_RESET 0000000000
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#define IC1_FORCE0_SET HW_REGISTER_RW( 0x7e002848 )
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#define IC1_FORCE0_SET_MASK 0xffffffff
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#define IC1_FORCE0_SET_WIDTH 32
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#define IC1_FORCE0_SET_RESET 0000000000
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#define IC1_FORCE1_SET HW_REGISTER_RW( 0x7e00284c )
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#define IC1_FORCE1_SET_MASK 0xffffffff
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#define IC1_FORCE1_SET_WIDTH 32
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#define IC1_FORCE1_SET_RESET 0000000000
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#define IC1_FORCE0_CLR HW_REGISTER_RW( 0x7e002850 )
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#define IC1_FORCE0_CLR_MASK 0xffffffff
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#define IC1_FORCE0_CLR_WIDTH 32
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#define IC1_FORCE0_CLR_RESET 0000000000
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#define IC1_FORCE1_CLR HW_REGISTER_RW( 0x7e002854 )
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#define IC1_FORCE1_CLR_MASK 0xffffffff
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#define IC1_FORCE1_CLR_WIDTH 32
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#define IC1_FORCE1_CLR_RESET 0000000000
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