happy new year 2013

.gitignore

@@ -28,6 +28,7 @@ pair2net
 autotest
 fp2bit
 bit2fp
+printf_swbits
 hello_world
 blinking_led
 

Makefile

@@ -11,8 +11,8 @@ CFLAGS  += -I$(CURDIR)/libs
 
 LDFLAGS += -Wl,-rpath,$(CURDIR)/libs
 
-OBJS 	= autotest.o bit2fp.o draw_svg_tiles.o fp2bit.o hstrrep.o \
+OBJS 	= autotest.o bit2fp.o printf_swbits.o draw_svg_tiles.o fp2bit.o \
-	merge_seq.o new_fp.o pair2net.o sort_seq.o hello_world.o \
+	hstrrep.o merge_seq.o new_fp.o pair2net.o sort_seq.o hello_world.o \
 	blinking_led.o
 
 DYNAMIC_LIBS = libs/libfpga-model.so libs/libfpga-bit.so \
@@ -23,7 +23,7 @@ DYNAMIC_LIBS = libs/libfpga-model.so libs/libfpga-bit.so \
 .SECONDARY:
 .SECONDEXPANSION:
 
-all: new_fp fp2bit bit2fp draw_svg_tiles autotest hstrrep \
+all: new_fp fp2bit bit2fp printf_swbits draw_svg_tiles autotest hstrrep \
 	sort_seq merge_seq pair2net hello_world blinking_led
 
 include Makefile.common
@@ -168,8 +168,8 @@ compare_%_conns.fco: compare_%.fp sort_seq merge_seq
 compare_%_sw.fco: compare_%.fp
 	@cat $<|awk '{if ($$1=="sw") printf "%s %s %s %s %s\n",$$2,$$3,$$4,$$5,$$6}'|sort >$@
 
-compare_%_swbits.fco: bit2fp
+compare_%_swbits.fco: printf_swbits
-	@./bit2fp --printf-swbits | sort > $@
+	@./printf_swbits | sort > $@
 
 compare_%.fp: new_fp
 	@./new_fp >$@
@@ -198,6 +198,8 @@ fp2bit: fp2bit.o $(DYNAMIC_LIBS)
 
 bit2fp: bit2fp.o $(DYNAMIC_LIBS)
 
+printf_swbits: printf_swbits.o $(DYNAMIC_LIBS)
+
 new_fp: new_fp.o $(DYNAMIC_LIBS)
 
 draw_svg_tiles: CFLAGS += `pkg-config libxml-2.0 --cflags`
@@ -222,7 +224,7 @@ clean:
 	@make -C libs clean
 	rm -f $(OBJS) *.d
 	rm -f 	draw_svg_tiles new_fp hstrrep sort_seq merge_seq autotest
-	rm -f	fp2bit bit2fp pair2net hello_world blinking_led
+	rm -f	fp2bit bit2fp printf_swbits pair2net hello_world blinking_led
 	rm -f	xc6slx9.fp xc6slx9.svg
 	rm -f	$(DESIGN_GOLD) $(AUTOTEST_GOLD) $(COMPARE_GOLD)
 	rm -f	test.gold/compare_xc6slx9.fp

autotest.c

@@ -1748,7 +1748,7 @@ static int test_bscan_config(struct test_state* tstate)
 
 static int test_clock_routing(struct test_state* tstate)
 {
-	int rc, i, iob_clk_y, iob_clk_x, iob_clk_type_idx;
+	int rc, i, t2_io_idx, iob_clk_y, iob_clk_x, iob_clk_type_idx;
 	int logic_y, logic_x, logic_type_idx;
 	int y;
 	net_idx_t clock_net;
@@ -1759,15 +1759,16 @@ static int test_clock_routing(struct test_state* tstate)
 	// first round over all gclk pins to the same logic dev
 	//
 
-	for (i = 0; i < tstate->model->pkg->num_gclk_pins; i++) {
+	for (i = 0; i < tstate->model->die->num_gclk_pins; i++) {
-		if (!tstate->model->pkg->gclk_pin[i])
+
-			continue;
+		t2_io_idx = tstate->model->die->gclk_t2_io_idx[i];
-		fpga_find_iob(tstate->model, tstate->model->pkg->gclk_pin[i],
+		iob_clk_y = tstate->model->die->t2_io[t2_io_idx].y;
-			&iob_clk_y, &iob_clk_x, &iob_clk_type_idx);
+		iob_clk_x = tstate->model->die->t2_io[t2_io_idx].x;
-		RC_CHECK(tstate->model);
+		iob_clk_type_idx = tstate->model->die->t2_io[t2_io_idx].type_idx;
-		printf("\nO test %i: gclk pin %s (y%i x%i IOB %i)\n",
+		printf("\nO test %i: gclk %i (y%i x%i IOB %i)\n",
-			tstate->next_diff_counter, tstate->model->pkg->gclk_pin[i],
+			tstate->next_diff_counter, i,
 			iob_clk_y, iob_clk_x, iob_clk_type_idx);
+
 		fdev_iob_input(tstate->model, iob_clk_y, iob_clk_x,
 			iob_clk_type_idx, IO_LVCMOS33);
 
@@ -1807,12 +1808,13 @@ static int test_clock_routing(struct test_state* tstate)
 	// left and right side of all hclk rows top-down.
 	//
 
-	for (i = 0; i < tstate->model->pkg->num_gclk_pins; i++) {
+	for (i = 0; i < tstate->model->die->num_gclk_pins; i++) {
-		if (!tstate->model->pkg->gclk_pin[i])
+
-			continue;
+		t2_io_idx = tstate->model->die->gclk_t2_io_idx[i];
-		fpga_find_iob(tstate->model, tstate->model->pkg->gclk_pin[i],
+		iob_clk_y = tstate->model->die->t2_io[t2_io_idx].y;
-			&iob_clk_y, &iob_clk_x, &iob_clk_type_idx);
+		iob_clk_x = tstate->model->die->t2_io[t2_io_idx].x;
-		RC_CHECK(tstate->model);
+		iob_clk_type_idx = tstate->model->die->t2_io[t2_io_idx].type_idx;
+
 		// skip top and bottom iobs
 		if (iob_clk_x != LEFT_OUTER_COL
 		    && iob_clk_x != tstate->model->x_width-RIGHT_OUTER_O)

bit2fp.c

@@ -13,7 +13,7 @@ int main(int argc, char** argv)
 {
 	struct fpga_model model;
 	int bit_header, bit_regs, bit_crc, fp_header, pull_model, file_arg, flags;
-	int print_swbits, rc = -1;
+	int rc = -1;
 	struct fpga_config config;
 
 	// parameters
@@ -22,7 +22,7 @@ int main(int argc, char** argv)
 			"\n"
 			"%s - bitstream to floorplan\n"
 			"Usage: %s [--bit-header] [--bit-regs] [--bit-crc] [--no-model]\n"
-			"       %*s [--no-fp-header] [--printf-swbits] <bitstream_file>\n"
+			"       %*s [--no-fp-header] <bitstream_file>\n"
 			"\n", argv[0], argv[0], (int) strlen(argv[0]), "");
 		goto fail;
 	}
@@ -32,7 +32,6 @@ int main(int argc, char** argv)
 	pull_model = 1;
 	fp_header = 1;
 	file_arg = 1;
-	print_swbits = 0;
 	while (file_arg < argc
 	       && !strncmp(argv[file_arg], "--", 2)) {
 		if (!strcmp(argv[file_arg], "--bit-header"))
@@ -45,22 +44,10 @@ int main(int argc, char** argv)
 			pull_model = 0;
 		else if (!strcmp(argv[file_arg], "--no-fp-header"))
 			fp_header = 0;
-		else if (!strcmp(argv[file_arg], "--printf-swbits"))
-			print_swbits = 1;
 		else break;
 		file_arg++;
 	}
 
-	// build model
-	if ((rc = fpga_build_model(&model, XC6SLX9, TQG144)))
-		FAIL(rc);
-
-	if (print_swbits) {
-		rc = printf_swbits(&model);
-		if (rc) FAIL(rc);
-		return 0;
-	}
-
 	// read binary configuration file
 	{
 		FILE* fbits = fopen(argv[file_arg], "r");
@@ -73,6 +60,15 @@ int main(int argc, char** argv)
 		if (rc) FAIL(rc);
 	}
 
+	// build model
+	if (config.idcode_reg == -1) FAIL(EINVAL);
+	// todo: scanf package from header string, better default for part
+	//   1. cmd line
+	//   2. header string
+	//   3. part-default
+	if ((rc = fpga_build_model(&model, config.reg[config.idcode_reg].int_v,
+		cmdline_package(argc, argv)))) FAIL(rc);
+
 	// fill model from binary configuration
 	if (pull_model)
 		if ((rc = extract_model(&model, &config.bits))) FAIL(rc);

blinking_led.c

@@ -37,27 +37,30 @@ int main(int argc, char** argv)
 
 	if (cmdline_help(argc, argv)) {
 		printf( "       %*s [-Dbits=14|23]\n"
-			"       %*s [-Dclock_pin=P55|...]\n"
+			"       %*s [-Dclock_pin=IO_L30N_GCLK0_USERCCLK_2|...]\n"
-			"       %*s [-Dled_pin=P48|...]\n"
+			"       %*s [-Dled_pin=IO_L48P_D7_2|...]\n"
 			"\n", (int) strlen(*argv), "",
 			(int) strlen(*argv), "", (int) strlen(*argv), "");
 		return 0;
 	}
 	if (!(param_bits = cmdline_intvar(argc, argv, "bits")))
 		param_bits = 14;
+
 	if (!(param_clock_pin = cmdline_strvar(argc, argv, "clock_pin")))
-		param_clock_pin = "P55";
+		param_clock_pin = "IO_L30N_GCLK0_USERCCLK_2";
 	if (!(param_led_pin = cmdline_strvar(argc, argv, "led_pin")))
-		param_led_pin = "P48";
+		param_led_pin = "IO_L48P_D7_2";
 
 	fpga_build_model(&model, cmdline_part(argc, argv),
 		cmdline_package(argc, argv));
 
-	fpga_find_iob(&model, param_clock_pin, &iob_clk_y, &iob_clk_x, &iob_clk_type_idx);
+	fpga_find_iob(&model, xc6_find_pkg_pin(model.pkg, param_clock_pin),
+		&iob_clk_y, &iob_clk_x, &iob_clk_type_idx);
 	fdev_iob_input(&model, iob_clk_y, iob_clk_x, iob_clk_type_idx,
 		IO_LVCMOS33);
 
-	fpga_find_iob(&model, param_led_pin, &iob_led_y, &iob_led_x, &iob_led_type_idx);
+	fpga_find_iob(&model, xc6_find_pkg_pin(model.pkg, param_led_pin),
+		&iob_led_y, &iob_led_x, &iob_led_type_idx);
 	fdev_iob_output(&model, iob_led_y, iob_led_x, iob_led_type_idx,
 		IO_LVCMOS25);
 	fdev_iob_slew(&model, iob_led_y, iob_led_x, iob_led_type_idx,

libs/bit_frames.c

@@ -269,16 +269,15 @@ fail:
 
 static int extract_iobs(struct extract_state* es)
 {
-	int i, num_iobs, iob_y, iob_x, iob_idx, dev_idx, first_iob, rc;
+	int i, iob_y, iob_x, iob_idx, dev_idx, first_iob, rc;
 	uint64_t u64;
 	const char* iob_sitename;
 	struct fpga_device* dev;
 	struct fpgadev_iob cfg;
 
 	RC_CHECK(es->model);
-	num_iobs = get_num_iobs(XC6SLX9);
 	first_iob = 0;
-	for (i = 0; i < num_iobs; i++) {
+	for (i = 0; i < es->model->die->num_t2_ios; i++) {
 		u64 = frame_get_u64(&es->bits->d[
 			IOB_DATA_START + i*IOB_ENTRY_LEN]);
 		if (!u64) continue;
@@ -572,22 +571,20 @@ fail:
 
 static int extract_type2(struct extract_state* es)
 {
-	int i, bits_off;
+	int gclk_i, bits_off;
 	uint16_t u16;
 
 	RC_CHECK(es->model);
 	extract_iobs(es);
-	for (i = 0; i < es->model->pkg->num_gclk_pins; i++) {
+	for (gclk_i = 0; gclk_i < es->model->die->num_gclk_pins; gclk_i++) {
-		if (!es->model->pkg->gclk_pin[i])
-			continue;
 		bits_off = IOB_DATA_START
-			+ es->model->pkg->gclk_type2_o[i]*XC6_WORD_BYTES
+			+ es->model->die->gclk_t2_switches[gclk_i]*XC6_WORD_BYTES
 			+ XC6_TYPE2_GCLK_REG_SW/XC6_WORD_BITS;
 		u16 = frame_get_u16(&es->bits->d[bits_off]);
 		if (!u16)
 			continue;
 		if (u16 & (1<<(XC6_TYPE2_GCLK_REG_SW%XC6_WORD_BITS))) {
-			int iob_y, iob_x, iob_idx;
+			int t2_io_idx, iob_y, iob_x, iob_type_idx;
 			struct fpga_device *iob_dev;
 			struct switch_to_yx_l2 switch_to_yx_l2;
 			struct switch_to_rel switch_to_rel;
@@ -597,10 +594,11 @@ static int extract_type2(struct extract_state* es)
 			// the writing equivalent is in write_inner_term_sw()
 			//
 
-			fpga_find_iob(es->model, es->model->pkg->gclk_pin[i],
+			t2_io_idx = es->model->die->gclk_t2_io_idx[gclk_i];
-				&iob_y, &iob_x, &iob_idx);
+			iob_y = es->model->die->t2_io[t2_io_idx].y;
-			RC_CHECK(es->model);
+			iob_x = es->model->die->t2_io[t2_io_idx].x;
-			iob_dev = fdev_p(es->model, iob_y, iob_x, DEV_IOB, iob_idx);
+			iob_type_idx = es->model->die->t2_io[t2_io_idx].type_idx;
+			iob_dev = fdev_p(es->model, iob_y, iob_x, DEV_IOB, iob_type_idx);
 			RC_ASSERT(es->model, iob_dev);
 
 			switch_to_yx_l2.l1.yx_req = YX_X_CENTER_CMTPLL | YX_Y_CENTER;
@@ -2489,7 +2487,7 @@ static int write_inner_term_sw(struct fpga_bits *bits,
 		if ((from_found = strstr(from_str, "CLKPIN"))
 		    && (to_found = strstr(to_str, "CKPIN"))) {
 			struct switch_to_yx_l2 switch_to_yx_l2;
-			int iob_y, iob_x, iob_idx;
+			int t2_io_idx, iob_y, iob_x, iob_type_idx;
 			struct fpga_device *iob_dev;
 
 			from_idx = atoi(&from_found[6]);
@@ -2508,17 +2506,16 @@ static int write_inner_term_sw(struct fpga_bits *bits,
 			RC_ASSERT(model, switch_to_yx_l2.l1.set.len);
 
 			// find matching gclk pin
-			for (j = 0; j < model->pkg->num_gclk_pins; j++) {
+			for (j = 0; j < model->die->num_gclk_pins; j++) {
-				if (!model->pkg->gclk_pin[j])
+				t2_io_idx = model->die->gclk_t2_io_idx[j];
-					continue;
+				iob_y = model->die->t2_io[t2_io_idx].y;
+				iob_x = model->die->t2_io[t2_io_idx].x;
+				iob_type_idx = model->die->t2_io[t2_io_idx].type_idx;
 
-				fpga_find_iob(model, model->pkg->gclk_pin[j],
-					&iob_y, &iob_x, &iob_idx);
-				RC_CHECK(model);
 				if (iob_y != switch_to_yx_l2.l1.dest_y
 				    || iob_x != switch_to_yx_l2.l1.dest_x)
 					continue;
-				iob_dev = fdev_p(model, iob_y, iob_x, DEV_IOB, iob_idx);
+				iob_dev = fdev_p(model, iob_y, iob_x, DEV_IOB, iob_type_idx);
 				RC_ASSERT(model, iob_dev);
 
 				if (fpga_switch_lookup(model, iob_y, iob_x,
@@ -2527,12 +2524,12 @@ static int write_inner_term_sw(struct fpga_bits *bits,
 					break;
 			}
 			// set bit
-			if (j < model->pkg->num_gclk_pins) {
+			if (j < model->die->num_gclk_pins) {
 				uint16_t u16;
 				int bits_off;
 
 				bits_off = IOB_DATA_START
-					+ model->pkg->gclk_type2_o[j]*XC6_WORD_BYTES
+					+ model->die->gclk_t2_switches[j]*XC6_WORD_BYTES
 					+ XC6_TYPE2_GCLK_REG_SW/XC6_WORD_BITS;
 				u16 = frame_get_u16(&bits->d[bits_off]);
 				u16 |= 1<<(XC6_TYPE2_GCLK_REG_SW%XC6_WORD_BITS);

libs/control.c

@@ -163,50 +163,6 @@ int fpga_find_iob(struct fpga_model* model, const char* sitename,
 	return -1;
 }
 
-const char* fpga_iob_sitename(struct fpga_model* model, int y, int x,
-	dev_type_idx_t idx)
-{
-	int i;
-
-	if (y == TOP_OUTER_ROW) {
-		for (i = 0; i < sizeof(xc6slx9_iob_top)/sizeof(xc6slx9_iob_top[0]); i++) {
-			if (xc6slx9_iob_top[i].xy == x) {
-				if (idx < 0 || idx > 3) return 0;
-				return xc6slx9_iob_top[i].name[idx];
-			}
-		}
-		return 0;
-	}
-	if (y == model->y_height-BOT_OUTER_ROW) {
-		for (i = 0; i < sizeof(xc6slx9_iob_bottom)/sizeof(xc6slx9_iob_bottom[0]); i++) {
-			if (xc6slx9_iob_bottom[i].xy == x) {
-				if (idx < 0 || idx > 3) return 0;
-				return xc6slx9_iob_bottom[i].name[idx];
-			}
-		}
-		return 0;
-	}
-	if (x == LEFT_OUTER_COL) {
-		for (i = 0; i < sizeof(xc6slx9_iob_left)/sizeof(xc6slx9_iob_left[0]); i++) {
-			if (xc6slx9_iob_left[i].xy == y) {
-				if (idx < 0 || idx > 1) return 0;
-				return xc6slx9_iob_left[i].name[idx];
-			}
-		}
-		return 0;
-	}
-	if (x == model->x_width-RIGHT_OUTER_O) {
-		for (i = 0; i < sizeof(xc6slx9_iob_right)/sizeof(xc6slx9_iob_right[0]); i++) {
-			if (xc6slx9_iob_right[i].xy == y) {
-				if (idx < 0 || idx > 1) return 0;
-				return xc6slx9_iob_right[i].name[idx];
-			}
-		}
-		return 0;
-	}
-	return 0;
-}
-
 static void enum_x(struct fpga_model *model, enum fpgadev_type type,
 	int enum_i, int *y, int x, int *type_idx)
 {

libs/control.h

@@ -12,8 +12,6 @@ const char* fpga_enum_iob(struct fpga_model* model, int enum_idx,
 	int* y, int* x, dev_type_idx_t* type_idx);
 int fpga_find_iob(struct fpga_model* model, const char* sitename,
 	int* y, int* x, dev_type_idx_t* idx);
-const char* fpga_iob_sitename(struct fpga_model* model, int y, int x,
-	dev_type_idx_t idx);
 
 //
 // When dealing with devices, there are two indices:

libs/parts.h

@@ -44,16 +44,6 @@ struct xc_major_info
 	int minors;
 };
 
-#define XC_T2_IOB_PAD		0x00000001
-#define XC_T2_IOB_UNBONDED	0x00000002
-#define XC_T2_CENTER		0x00000004
-
-struct xc_type2_info
-{
-	int flags;
-	int val;
-};
-
 //
 // major_str
 //  'L' = X+L logic block
@@ -76,6 +66,18 @@ struct xc_type2_info
 //   'U' = unwired
 //
 
+#define XC6_NUM_GCLK_PINS 32
+
+struct xc_t2_io_info
+{
+	int pair; // 0 for entries used for switches
+	int pos_side; // 1 for positive, 0 for negative
+	int bank;
+	int y;
+	int x;
+	int type_idx;
+};
+
 struct xc_die
 {
 	int idcode;
@@ -85,8 +87,13 @@ struct xc_die
 	const char* major_str;
 	int num_majors;
 	struct xc_major_info majors[XC_MAX_MAJORS];
-	int num_type2;
+
-	struct xc_type2_info type2[XC_MAX_TYPE2_ENTRIES];
+	int num_t2_ios;
+	struct xc_t2_io_info t2_io[XC_MAX_TYPE2_ENTRIES];
+	int num_gclk_pins;
+	int gclk_t2_io_idx[XC6_NUM_GCLK_PINS];
+	int gclk_t2_switches[XC6_NUM_GCLK_PINS]; // in 16-bit words
+
 	int mcb_ypos;
 	int num_mui;
 	int mui_pos[XC_MAX_MUI_POS];
@@ -98,20 +105,31 @@ const struct xc_die* xc_die_info(int idcode);
 int xc_die_center_major(const struct xc_die *die);
 
 enum xc6_pkg { TQG144, FTG256, CSG324, FGG484 };
-#define XC6_NUM_GCLK_PINS 32
+#define XC6_MAX_NUM_PINS 900 // fgg900 package
+
+// see ug385
+struct xc6_pin_info
+{
+	const char *name;
+	int bank;
+	const char *bufio2;
+	const char *description;
+	int pair;
+	int pos_side;
+};
 
 struct xc6_pkg_info
 {
 	enum xc6_pkg pkg;
-	int num_gclk_pins;
+	int num_pins;
-	// negative side of differential pairs: even numbers
+	struct xc6_pin_info pin[XC6_MAX_NUM_PINS];
-	// positive side of differential pairs: odd numbers
-	const char* gclk_pin[XC6_NUM_GCLK_PINS];
-	int gclk_type2_o[XC6_NUM_GCLK_PINS]; // in words
 };
 
 const struct xc6_pkg_info *xc6_pkg_info(enum xc6_pkg pkg);
 
+// returns 0 if description not found
+const char *xc6_find_pkg_pin(const struct xc6_pkg_info *pkg_info, const char *description);
+
 #define FRAME_SIZE		130
 #define FRAMES_PER_ROW		505 // for slx4 and slx9
 #define PADDING_FRAMES_PER_ROW	2
@@ -219,11 +237,13 @@ enum major_type get_major_type(int idcode, int major);
 #define XC6_LEFTSIDE_MAJOR 1
 #define XC6_SLX9_RIGHTMOST_MAJOR 17
 
+#define XC6_SLX9_TOTAL_TILE_ROWS 73
+#define XC6_SLX9_TOTAL_TILE_COLS 45
+
 int get_rightside_major(int idcode);
 int get_major_framestart(int idcode, int major);
 int get_frames_per_row(int idcode);
 
-int get_num_iobs(int idcode);
 const char* get_iob_sitename(int idcode, int idx);
 // returns -1 if sitename not found
 int find_iob_sitename(int idcode, const char* name);

printf_swbits.c

@@ -0,0 +1,29 @@
+//
+// Author: Wolfgang Spraul
+//
+// This is free and unencumbered software released into the public domain.
+// For details see the UNLICENSE file at the root of the source tree.
+//
+
+#include "model.h"
+#include "bit.h"
+
+int main(int argc, char** argv)
+{
+	struct fpga_model model;
+	int i;
+
+	for (i = 1; i < argc; i++) {
+		if (!strcmp(argv[i], "--help")) {
+			printf( "\n%s\n\n"
+				"Usage: %s [--part=xc6slx9]\n"
+				"       %*s [--help]\n\n",
+				*argv, *argv, (int) strlen(*argv), "");
+			return 1;
+		}
+	}
+	fpga_build_model(&model, cmdline_part(argc, argv),
+		cmdline_package(argc, argv));
+	printf_swbits(&model);
+	return fpga_free_model(&model);
+}