609 lines
35 KiB
C
Executable File
609 lines
35 KiB
C
Executable File
/***************************************************************************
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* Copyright (c) 1999-2005, Broadcom Corporation
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* All Rights Reserved
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* Confidential Property of Broadcom Corporation
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*
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*
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* THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE
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* AGREEMENT BETWEEN THE USER AND BROADCOM. YOU HAVE NO RIGHT TO USE OR
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* EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT.
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*
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* $brcm_Workfile: $
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* $brcm_Revision: $
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* $brcm_Date: $
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*
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* Module Description:
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* DO NOT EDIT THIS FILE DIRECTLY
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*
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* This module was generated magically with RDB from a source description
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* file. You must edit the source file for changes to be made to this file.
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*
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*
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* Date: Generated on Mon Mar 28 16:48:47 2005
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* MD5 Checksum ba913b07d554347688609e8e66f4943f
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*
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* Compiled with: RDB Utility combo_header.pl
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* RDB Parser 3.0
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* unknown unknown
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* Perl Interpreter 5.006
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* Operating System solaris
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*
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* Spec Versions: BG 01
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* BVN_MFD 1
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* CAP 1
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* DSP_CTRL 03
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* IN656 1
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* ITFP 03
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* LBG 1
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* NET 1
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* SCL 1
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* VBI_DEC 03
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* VD_TOP 5
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* VIDEO_DEC 03
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* VIP_CTRL 03
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* VIP_L2 03
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* VPP 03
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*
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* RDB Files: /projects/BCM7043/A0/work/gelias/bcm7043_a0/design/chip/rdb/bcm7043_a0.rdb
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* /projects/BCM7043/A0/snapshot/bcm7043_a0/design/vip_tops/rdb/vip_top_blockdef.rdb
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* /projects/BCM7043/A0/snapshot/bcm7043_a0/design/cap/rdb/bvn_cap.rdb
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* /projects/BCM7043/A0/snapshot/bcm7043_a0/design/bvn/common/rdb/bvb_lite_general.rdb
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* /projects/BCM7043/A0/snapshot/bcm7043_a0/design/mfd/rdb/bvn_mfd.rdb
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* /projects/BCM7043/A0/snapshot/bcm7043_a0/design/bvn/common/rdb/bvb_lite_general.rdb
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* /projects/BCM7043/A0/snapshot/bcm7043_a0/design/scl/rdb/bvn_scl.rdb
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* /projects/BCM7043/A0/snapshot/bcm7043_a0/design/bvn/common/rdb/bvb_lite_general.rdb
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* /projects/BCM7043/A0/snapshot/bcm7043_a0/design/vpp/rdb/vpp.rdb
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* /projects/BCM7043/A0/snapshot/bcm7043_a0/design/bvn/common/rdb/bvb_lite_general.rdb
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* /projects/BCM7043/A0/snapshot/bcm7043_a0/design/video_decoder/rdb/video_decoder_top.rdb
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* /projects/BCM7043/A0/snapshot/bcm7043_a0/design/video_decoder/rdb/vd_major_revid.rdb
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* /projects/BCM7043/A0/snapshot/bcm7043_a0/design/video_decoder/rdb/vd_minor_revid.rdb
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* /projects/BCM7043/A0/snapshot/bcm7043_a0/design/656_dec/rdb/in656.rdb
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* /projects/BCM7043/A0/snapshot/bcm7043_a0/design/656_dec/rdb/in656_revid.rdb
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* /projects/BCM7043/A0/snapshot/bcm7043_a0/design/l2/rdb/vip_intr_ctrl2.rdb
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* /projects/BCM7043/A0/snapshot/bcm7043_a0/design/vnet/rdb/bvn_net.rdb
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* /projects/BCM7043/A0/snapshot/bcm7043_a0/design/lbg/rdb/vip_lbg.rdb
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* /projects/BCM7043/A0/snapshot/bcm7043_a0/design/bvn/common/rdb/bvb_lite_general.rdb
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* /projects/BCM7043/A0/snapshot/bcm7043_a0/design/vbi_dec/rdb/vib_top.rdb
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* /projects/BCM7043/A0/snapshot/bcm7043_a0/design/vbi_dec/rdb/video_dec.rdb
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* /projects/BCM7043/A0/snapshot/bcm7043_a0/design/vbi_dec/rdb/vbi_dec.rdb
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* /projects/BCM7043/A0/snapshot/bcm7043_a0/design/itfp/rdb/itfp.rdb
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* /projects/BCM7043/A0/snapshot/bcm7043_a0/design/bvn/common/rdb/bvb_lite_general.rdb
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* /projects/BCM7043/A0/snapshot/bcm7043_a0/design/vip_tops/rdb/vip_ctrl.rdb
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* /projects/BCM7043/A0/snapshot/bcm7043_a0/design/bsm/rdb/bg_top.rdb
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* /projects/BCM7043/A0/snapshot/bcm7043_a0/design/bsm/rdb/bg_ctrl.rdb
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* /projects/BCM7043/A0/snapshot/bcm7043_a0/design/dsp/rdb/dsp_top.rdb
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* /projects/BCM7043/A0/snapshot/bcm7043_a0/design/dsp/rdb/dsp_ctrl.rdb
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*
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* Revision History:
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*
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* $brcm_Log: $
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*
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***************************************************************************/
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#ifndef BCM7043_A0_BG_INSTR_H__
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#define BCM7043_A0_BG_INSTR_H__
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/***************************************************************************
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*BG_INSTR - BG Instructions
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***************************************************************************/
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#define BG_INSTR_DCT_WRITE 0x005f0000 /* DCT_WRITE command */
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#define BG_INSTR_PUTAC_RESET 0x005f0004 /* PUT AC command */
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#define BG_INSTR_INIT_MPEGTYPE 0x005f0008 /* INIT MPEGTYPE */
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#define BG_INSTR_INTRA_MAXRUN 0x005f000c /* INTRA MAX RUN */
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#define BG_INSTR_INTER_MAXRUN 0x005f0010 /* INTER MAX RUN */
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#define BG_INSTR_INTRA_LAST_MAXRUN 0x005f0014 /* INTRA LAST MAX RUN */
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#define BG_INSTR_INTER_LAST_MAXRUN 0x005f0018 /* INTER LAST MAX RUN */
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#define BG_INSTR_INTRA_MAXLEVEL 0x005f001c /* INTRA MAX LEVEL */
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#define BG_INSTR_INTER_MAXLEVEL 0x005f0020 /* INTER MAX LEVEL */
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#define BG_INSTR_INTRA_LAST_MAXLEVEL 0x005f0024 /* INTRA LAST MAX LEVEL */
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#define BG_INSTR_INTER_LAST_MAXLEVEL 0x005f0028 /* INTER LAST MAX LEVEL */
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#define BG_INSTR_INTRA_RUN_RAM_BASE 0x005f002c /* INTRA RUN RAM BASE */
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#define BG_INSTR_INTER_RUN_RAM_BASE 0x005f0030 /* INTER RUN RAM BASE */
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#define BG_INSTR_INTRA_LAST_RUN_RAM_BASE 0x005f0034 /* INTRA LAST RUN RAM BASE */
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#define BG_INSTR_INTER_LAST_RUN_RAM_BASE 0x005f0038 /* INTER LAST RUN RAM BASE */
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#define BG_INSTR_INTRA_LEVEL_RAM_BASE 0x005f003c /* INTRA LEVEL RAM BASE */
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#define BG_INSTR_INTER_LEVEL_RAM_BASE 0x005f0040 /* INTER LEVEL RAM BASE */
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#define BG_INSTR_INTRA_LAST_LEVEL_RAM_BASE 0x005f0044 /* INTRA LAST LEVEL RAM BASE */
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#define BG_INSTR_INTER_LAST_LEVEL_RAM_BASE 0x005f0048 /* INTER LAST LEVEL RAM BASE */
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#define BG_INSTR_LAST_AC_LEVEL 0x005f004c /* LAST AC LEVEL */
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#define BG_INSTR_DSP_STOP_ADDR 0x005f0050 /* DSP STOP ADDRESS */
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#define BG_INSTR_CBP_REG 0x005f0054 /* CBP REG VALUE */
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#define BG_INSTR_PUTBIT_COUNTER 0x005f0058 /* PUTBIT COUNTER */
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#define BG_INSTR_INIT_COMMAND 0x005f005c /* INIT COMMAND */
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#define BG_INSTR_OUT_POINTER 0x005f0060 /* READ OUTPOINTER VALUE */
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#define BG_INSTR_PUTBIT_10 0x005f0064 /* PUT BIT COMMAND */
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#define BG_INSTR_PUTBIT_16 0x005f0068 /* PUT BIT COMMAND */
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#define BG_INSTR_PUTAC 0x005f006c /* PUT AC */
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#define BG_INSTR_EXECSTATUS 0x005f0070 /* EXEC STATUS */
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#define BG_INSTR_REVISION_ID 0x005f0074 /* Letter Box Generator Revision register */
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#define BG_INSTR_PUTAC_ACCEL 0x005f0078 // added temporary by ilyam 13/09/05
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/***************************************************************************
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*DCT_WRITE - DCT_WRITE command
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***************************************************************************/
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/* BG_INSTR :: DCT_WRITE :: reserved0 [31:01] */
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#define BG_INSTR_DCT_WRITE_reserved0_MASK 0xfffffffe
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#define BG_INSTR_DCT_WRITE_reserved0_ALIGN 0
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#define BG_INSTR_DCT_WRITE_reserved0_BITS 31
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#define BG_INSTR_DCT_WRITE_reserved0_SHIFT 1
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/* BG_INSTR :: DCT_WRITE :: DCT_WRITE [00:00] */
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#define BG_INSTR_DCT_WRITE_DCT_WRITE_MASK 0x00000001
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#define BG_INSTR_DCT_WRITE_DCT_WRITE_ALIGN 0
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#define BG_INSTR_DCT_WRITE_DCT_WRITE_BITS 1
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#define BG_INSTR_DCT_WRITE_DCT_WRITE_SHIFT 0
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/***************************************************************************
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*PUTAC_RESET - PUT AC command
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***************************************************************************/
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/* BG_INSTR :: PUTAC_RESET :: reserved0 [31:01] */
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#define BG_INSTR_PUTAC_RESET_reserved0_MASK 0xfffffffe
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#define BG_INSTR_PUTAC_RESET_reserved0_ALIGN 0
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#define BG_INSTR_PUTAC_RESET_reserved0_BITS 31
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#define BG_INSTR_PUTAC_RESET_reserved0_SHIFT 1
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/* BG_INSTR :: PUTAC_RESET :: PUTAC_RESET [00:00] */
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#define BG_INSTR_PUTAC_RESET_PUTAC_RESET_MASK 0x00000001
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#define BG_INSTR_PUTAC_RESET_PUTAC_RESET_ALIGN 0
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#define BG_INSTR_PUTAC_RESET_PUTAC_RESET_BITS 1
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#define BG_INSTR_PUTAC_RESET_PUTAC_RESET_SHIFT 0
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/***************************************************************************
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*INIT_MPEGTYPE - INIT MPEGTYPE
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***************************************************************************/
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/* BG_INSTR :: INIT_MPEGTYPE :: reserved0 [31:05] */
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#define BG_INSTR_INIT_MPEGTYPE_reserved0_MASK 0xffffffe0
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#define BG_INSTR_INIT_MPEGTYPE_reserved0_ALIGN 0
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#define BG_INSTR_INIT_MPEGTYPE_reserved0_BITS 27
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#define BG_INSTR_INIT_MPEGTYPE_reserved0_SHIFT 5
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/* BG_INSTR :: INIT_MPEGTYPE :: CBP_MODE [04:04] */
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#define BG_INSTR_INIT_MPEGTYPE_CBP_MODE_MASK 0x00000010
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#define BG_INSTR_INIT_MPEGTYPE_CBP_MODE_ALIGN 0
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#define BG_INSTR_INIT_MPEGTYPE_CBP_MODE_BITS 1
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#define BG_INSTR_INIT_MPEGTYPE_CBP_MODE_SHIFT 4
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/* BG_INSTR :: INIT_MPEGTYPE :: INTRA [03:03] */
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#define BG_INSTR_INIT_MPEGTYPE_INTRA_MASK 0x00000008
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#define BG_INSTR_INIT_MPEGTYPE_INTRA_ALIGN 0
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#define BG_INSTR_INIT_MPEGTYPE_INTRA_BITS 1
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#define BG_INSTR_INIT_MPEGTYPE_INTRA_SHIFT 3
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/* BG_INSTR :: INIT_MPEGTYPE :: MPEG4 [02:02] */
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#define BG_INSTR_INIT_MPEGTYPE_MPEG4_MASK 0x00000004
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#define BG_INSTR_INIT_MPEGTYPE_MPEG4_ALIGN 0
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#define BG_INSTR_INIT_MPEGTYPE_MPEG4_BITS 1
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#define BG_INSTR_INIT_MPEGTYPE_MPEG4_SHIFT 2
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/* BG_INSTR :: INIT_MPEGTYPE :: MPEG2 [01:01] */
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#define BG_INSTR_INIT_MPEGTYPE_MPEG2_MASK 0x00000002
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#define BG_INSTR_INIT_MPEGTYPE_MPEG2_ALIGN 0
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#define BG_INSTR_INIT_MPEGTYPE_MPEG2_BITS 1
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#define BG_INSTR_INIT_MPEGTYPE_MPEG2_SHIFT 1
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/* BG_INSTR :: INIT_MPEGTYPE :: MPEG1 [00:00] */
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#define BG_INSTR_INIT_MPEGTYPE_MPEG1_MASK 0x00000001
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#define BG_INSTR_INIT_MPEGTYPE_MPEG1_ALIGN 0
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#define BG_INSTR_INIT_MPEGTYPE_MPEG1_BITS 1
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#define BG_INSTR_INIT_MPEGTYPE_MPEG1_SHIFT 0
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/***************************************************************************
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*INTRA_MAXRUN - INTRA MAX RUN
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***************************************************************************/
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/* BG_INSTR :: INTRA_MAXRUN :: reserved0 [31:06] */
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#define BG_INSTR_INTRA_MAXRUN_reserved0_MASK 0xffffffc0
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#define BG_INSTR_INTRA_MAXRUN_reserved0_ALIGN 0
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#define BG_INSTR_INTRA_MAXRUN_reserved0_BITS 26
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#define BG_INSTR_INTRA_MAXRUN_reserved0_SHIFT 6
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/* BG_INSTR :: INTRA_MAXRUN :: MAXRUN_VALUE [05:00] */
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#define BG_INSTR_INTRA_MAXRUN_MAXRUN_VALUE_MASK 0x0000003f
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#define BG_INSTR_INTRA_MAXRUN_MAXRUN_VALUE_ALIGN 0
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#define BG_INSTR_INTRA_MAXRUN_MAXRUN_VALUE_BITS 6
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#define BG_INSTR_INTRA_MAXRUN_MAXRUN_VALUE_SHIFT 0
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/***************************************************************************
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*INTER_MAXRUN - INTER MAX RUN
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***************************************************************************/
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/* BG_INSTR :: INTER_MAXRUN :: reserved0 [31:06] */
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#define BG_INSTR_INTER_MAXRUN_reserved0_MASK 0xffffffc0
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#define BG_INSTR_INTER_MAXRUN_reserved0_ALIGN 0
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#define BG_INSTR_INTER_MAXRUN_reserved0_BITS 26
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#define BG_INSTR_INTER_MAXRUN_reserved0_SHIFT 6
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/* BG_INSTR :: INTER_MAXRUN :: MAXRUN_VALUE [05:00] */
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#define BG_INSTR_INTER_MAXRUN_MAXRUN_VALUE_MASK 0x0000003f
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#define BG_INSTR_INTER_MAXRUN_MAXRUN_VALUE_ALIGN 0
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#define BG_INSTR_INTER_MAXRUN_MAXRUN_VALUE_BITS 6
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#define BG_INSTR_INTER_MAXRUN_MAXRUN_VALUE_SHIFT 0
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/***************************************************************************
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*INTRA_LAST_MAXRUN - INTRA LAST MAX RUN
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***************************************************************************/
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/* BG_INSTR :: INTRA_LAST_MAXRUN :: reserved0 [31:06] */
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#define BG_INSTR_INTRA_LAST_MAXRUN_reserved0_MASK 0xffffffc0
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#define BG_INSTR_INTRA_LAST_MAXRUN_reserved0_ALIGN 0
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#define BG_INSTR_INTRA_LAST_MAXRUN_reserved0_BITS 26
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#define BG_INSTR_INTRA_LAST_MAXRUN_reserved0_SHIFT 6
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/* BG_INSTR :: INTRA_LAST_MAXRUN :: MAXRUN_VALUE [05:00] */
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#define BG_INSTR_INTRA_LAST_MAXRUN_MAXRUN_VALUE_MASK 0x0000003f
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#define BG_INSTR_INTRA_LAST_MAXRUN_MAXRUN_VALUE_ALIGN 0
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#define BG_INSTR_INTRA_LAST_MAXRUN_MAXRUN_VALUE_BITS 6
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#define BG_INSTR_INTRA_LAST_MAXRUN_MAXRUN_VALUE_SHIFT 0
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/***************************************************************************
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*INTER_LAST_MAXRUN - INTER LAST MAX RUN
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***************************************************************************/
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/* BG_INSTR :: INTER_LAST_MAXRUN :: reserved0 [31:06] */
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#define BG_INSTR_INTER_LAST_MAXRUN_reserved0_MASK 0xffffffc0
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#define BG_INSTR_INTER_LAST_MAXRUN_reserved0_ALIGN 0
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#define BG_INSTR_INTER_LAST_MAXRUN_reserved0_BITS 26
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#define BG_INSTR_INTER_LAST_MAXRUN_reserved0_SHIFT 6
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/* BG_INSTR :: INTER_LAST_MAXRUN :: MAXRUN_VALUE [05:00] */
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#define BG_INSTR_INTER_LAST_MAXRUN_MAXRUN_VALUE_MASK 0x0000003f
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#define BG_INSTR_INTER_LAST_MAXRUN_MAXRUN_VALUE_ALIGN 0
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#define BG_INSTR_INTER_LAST_MAXRUN_MAXRUN_VALUE_BITS 6
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#define BG_INSTR_INTER_LAST_MAXRUN_MAXRUN_VALUE_SHIFT 0
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/***************************************************************************
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*INTRA_MAXLEVEL - INTRA MAX LEVEL
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***************************************************************************/
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/* BG_INSTR :: INTRA_MAXLEVEL :: reserved0 [31:06] */
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#define BG_INSTR_INTRA_MAXLEVEL_reserved0_MASK 0xffffffc0
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#define BG_INSTR_INTRA_MAXLEVEL_reserved0_ALIGN 0
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#define BG_INSTR_INTRA_MAXLEVEL_reserved0_BITS 26
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#define BG_INSTR_INTRA_MAXLEVEL_reserved0_SHIFT 6
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/* BG_INSTR :: INTRA_MAXLEVEL :: MAX_LEVEL_VALUE [05:00] */
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#define BG_INSTR_INTRA_MAXLEVEL_MAX_LEVEL_VALUE_MASK 0x0000003f
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#define BG_INSTR_INTRA_MAXLEVEL_MAX_LEVEL_VALUE_ALIGN 0
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#define BG_INSTR_INTRA_MAXLEVEL_MAX_LEVEL_VALUE_BITS 6
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#define BG_INSTR_INTRA_MAXLEVEL_MAX_LEVEL_VALUE_SHIFT 0
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/***************************************************************************
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*INTER_MAXLEVEL - INTER MAX LEVEL
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***************************************************************************/
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/* BG_INSTR :: INTER_MAXLEVEL :: reserved0 [31:06] */
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#define BG_INSTR_INTER_MAXLEVEL_reserved0_MASK 0xffffffc0
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#define BG_INSTR_INTER_MAXLEVEL_reserved0_ALIGN 0
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#define BG_INSTR_INTER_MAXLEVEL_reserved0_BITS 26
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#define BG_INSTR_INTER_MAXLEVEL_reserved0_SHIFT 6
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/* BG_INSTR :: INTER_MAXLEVEL :: MAX_LEVEL_VALUE [05:00] */
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#define BG_INSTR_INTER_MAXLEVEL_MAX_LEVEL_VALUE_MASK 0x0000003f
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#define BG_INSTR_INTER_MAXLEVEL_MAX_LEVEL_VALUE_ALIGN 0
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#define BG_INSTR_INTER_MAXLEVEL_MAX_LEVEL_VALUE_BITS 6
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#define BG_INSTR_INTER_MAXLEVEL_MAX_LEVEL_VALUE_SHIFT 0
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/***************************************************************************
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*INTRA_LAST_MAXLEVEL - INTRA LAST MAX LEVEL
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***************************************************************************/
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/* BG_INSTR :: INTRA_LAST_MAXLEVEL :: reserved0 [31:06] */
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#define BG_INSTR_INTRA_LAST_MAXLEVEL_reserved0_MASK 0xffffffc0
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#define BG_INSTR_INTRA_LAST_MAXLEVEL_reserved0_ALIGN 0
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#define BG_INSTR_INTRA_LAST_MAXLEVEL_reserved0_BITS 26
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#define BG_INSTR_INTRA_LAST_MAXLEVEL_reserved0_SHIFT 6
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/* BG_INSTR :: INTRA_LAST_MAXLEVEL :: MAX_LEVEL_VALUE [05:00] */
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#define BG_INSTR_INTRA_LAST_MAXLEVEL_MAX_LEVEL_VALUE_MASK 0x0000003f
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#define BG_INSTR_INTRA_LAST_MAXLEVEL_MAX_LEVEL_VALUE_ALIGN 0
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#define BG_INSTR_INTRA_LAST_MAXLEVEL_MAX_LEVEL_VALUE_BITS 6
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#define BG_INSTR_INTRA_LAST_MAXLEVEL_MAX_LEVEL_VALUE_SHIFT 0
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/***************************************************************************
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*INTER_LAST_MAXLEVEL - INTER LAST MAX LEVEL
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***************************************************************************/
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/* BG_INSTR :: INTER_LAST_MAXLEVEL :: reserved0 [31:06] */
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#define BG_INSTR_INTER_LAST_MAXLEVEL_reserved0_MASK 0xffffffc0
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#define BG_INSTR_INTER_LAST_MAXLEVEL_reserved0_ALIGN 0
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#define BG_INSTR_INTER_LAST_MAXLEVEL_reserved0_BITS 26
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#define BG_INSTR_INTER_LAST_MAXLEVEL_reserved0_SHIFT 6
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/* BG_INSTR :: INTER_LAST_MAXLEVEL :: MAX_LEVEL_VALUE [05:00] */
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#define BG_INSTR_INTER_LAST_MAXLEVEL_MAX_LEVEL_VALUE_MASK 0x0000003f
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#define BG_INSTR_INTER_LAST_MAXLEVEL_MAX_LEVEL_VALUE_ALIGN 0
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#define BG_INSTR_INTER_LAST_MAXLEVEL_MAX_LEVEL_VALUE_BITS 6
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#define BG_INSTR_INTER_LAST_MAXLEVEL_MAX_LEVEL_VALUE_SHIFT 0
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/***************************************************************************
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*INTRA_RUN_RAM_BASE - INTRA RUN RAM BASE
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***************************************************************************/
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/* BG_INSTR :: INTRA_RUN_RAM_BASE :: reserved0 [31:09] */
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#define BG_INSTR_INTRA_RUN_RAM_BASE_reserved0_MASK 0xfffffe00
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#define BG_INSTR_INTRA_RUN_RAM_BASE_reserved0_ALIGN 0
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#define BG_INSTR_INTRA_RUN_RAM_BASE_reserved0_BITS 23
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#define BG_INSTR_INTRA_RUN_RAM_BASE_reserved0_SHIFT 9
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/* BG_INSTR :: INTRA_RUN_RAM_BASE :: RAM_BASE_VALUE [08:00] */
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#define BG_INSTR_INTRA_RUN_RAM_BASE_RAM_BASE_VALUE_MASK 0x000001ff
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#define BG_INSTR_INTRA_RUN_RAM_BASE_RAM_BASE_VALUE_ALIGN 0
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#define BG_INSTR_INTRA_RUN_RAM_BASE_RAM_BASE_VALUE_BITS 9
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#define BG_INSTR_INTRA_RUN_RAM_BASE_RAM_BASE_VALUE_SHIFT 0
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/***************************************************************************
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*INTER_RUN_RAM_BASE - INTER RUN RAM BASE
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***************************************************************************/
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/* BG_INSTR :: INTER_RUN_RAM_BASE :: reserved0 [31:09] */
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#define BG_INSTR_INTER_RUN_RAM_BASE_reserved0_MASK 0xfffffe00
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#define BG_INSTR_INTER_RUN_RAM_BASE_reserved0_ALIGN 0
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#define BG_INSTR_INTER_RUN_RAM_BASE_reserved0_BITS 23
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#define BG_INSTR_INTER_RUN_RAM_BASE_reserved0_SHIFT 9
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/* BG_INSTR :: INTER_RUN_RAM_BASE :: RAM_BASE_VALUE [08:00] */
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#define BG_INSTR_INTER_RUN_RAM_BASE_RAM_BASE_VALUE_MASK 0x000001ff
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#define BG_INSTR_INTER_RUN_RAM_BASE_RAM_BASE_VALUE_ALIGN 0
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#define BG_INSTR_INTER_RUN_RAM_BASE_RAM_BASE_VALUE_BITS 9
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#define BG_INSTR_INTER_RUN_RAM_BASE_RAM_BASE_VALUE_SHIFT 0
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/***************************************************************************
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*INTRA_LAST_RUN_RAM_BASE - INTRA LAST RUN RAM BASE
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***************************************************************************/
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/* BG_INSTR :: INTRA_LAST_RUN_RAM_BASE :: reserved0 [31:09] */
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#define BG_INSTR_INTRA_LAST_RUN_RAM_BASE_reserved0_MASK 0xfffffe00
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#define BG_INSTR_INTRA_LAST_RUN_RAM_BASE_reserved0_ALIGN 0
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#define BG_INSTR_INTRA_LAST_RUN_RAM_BASE_reserved0_BITS 23
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#define BG_INSTR_INTRA_LAST_RUN_RAM_BASE_reserved0_SHIFT 9
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/* BG_INSTR :: INTRA_LAST_RUN_RAM_BASE :: RAM_BASE_VALUE [08:00] */
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#define BG_INSTR_INTRA_LAST_RUN_RAM_BASE_RAM_BASE_VALUE_MASK 0x000001ff
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#define BG_INSTR_INTRA_LAST_RUN_RAM_BASE_RAM_BASE_VALUE_ALIGN 0
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#define BG_INSTR_INTRA_LAST_RUN_RAM_BASE_RAM_BASE_VALUE_BITS 9
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#define BG_INSTR_INTRA_LAST_RUN_RAM_BASE_RAM_BASE_VALUE_SHIFT 0
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/***************************************************************************
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*INTER_LAST_RUN_RAM_BASE - INTER LAST RUN RAM BASE
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***************************************************************************/
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/* BG_INSTR :: INTER_LAST_RUN_RAM_BASE :: reserved0 [31:09] */
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#define BG_INSTR_INTER_LAST_RUN_RAM_BASE_reserved0_MASK 0xfffffe00
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#define BG_INSTR_INTER_LAST_RUN_RAM_BASE_reserved0_ALIGN 0
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#define BG_INSTR_INTER_LAST_RUN_RAM_BASE_reserved0_BITS 23
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#define BG_INSTR_INTER_LAST_RUN_RAM_BASE_reserved0_SHIFT 9
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/* BG_INSTR :: INTER_LAST_RUN_RAM_BASE :: RAM_BASE_VALUE [08:00] */
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#define BG_INSTR_INTER_LAST_RUN_RAM_BASE_RAM_BASE_VALUE_MASK 0x000001ff
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#define BG_INSTR_INTER_LAST_RUN_RAM_BASE_RAM_BASE_VALUE_ALIGN 0
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#define BG_INSTR_INTER_LAST_RUN_RAM_BASE_RAM_BASE_VALUE_BITS 9
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#define BG_INSTR_INTER_LAST_RUN_RAM_BASE_RAM_BASE_VALUE_SHIFT 0
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/***************************************************************************
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*INTRA_LEVEL_RAM_BASE - INTRA LEVEL RAM BASE
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***************************************************************************/
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/* BG_INSTR :: INTRA_LEVEL_RAM_BASE :: reserved0 [31:09] */
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#define BG_INSTR_INTRA_LEVEL_RAM_BASE_reserved0_MASK 0xfffffe00
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#define BG_INSTR_INTRA_LEVEL_RAM_BASE_reserved0_ALIGN 0
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#define BG_INSTR_INTRA_LEVEL_RAM_BASE_reserved0_BITS 23
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#define BG_INSTR_INTRA_LEVEL_RAM_BASE_reserved0_SHIFT 9
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/* BG_INSTR :: INTRA_LEVEL_RAM_BASE :: RAM_BASE_VALUE [08:00] */
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#define BG_INSTR_INTRA_LEVEL_RAM_BASE_RAM_BASE_VALUE_MASK 0x000001ff
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#define BG_INSTR_INTRA_LEVEL_RAM_BASE_RAM_BASE_VALUE_ALIGN 0
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#define BG_INSTR_INTRA_LEVEL_RAM_BASE_RAM_BASE_VALUE_BITS 9
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#define BG_INSTR_INTRA_LEVEL_RAM_BASE_RAM_BASE_VALUE_SHIFT 0
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/***************************************************************************
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*INTER_LEVEL_RAM_BASE - INTER LEVEL RAM BASE
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***************************************************************************/
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/* BG_INSTR :: INTER_LEVEL_RAM_BASE :: reserved0 [31:09] */
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#define BG_INSTR_INTER_LEVEL_RAM_BASE_reserved0_MASK 0xfffffe00
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#define BG_INSTR_INTER_LEVEL_RAM_BASE_reserved0_ALIGN 0
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#define BG_INSTR_INTER_LEVEL_RAM_BASE_reserved0_BITS 23
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#define BG_INSTR_INTER_LEVEL_RAM_BASE_reserved0_SHIFT 9
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/* BG_INSTR :: INTER_LEVEL_RAM_BASE :: RAM_BASE_VALUE [08:00] */
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#define BG_INSTR_INTER_LEVEL_RAM_BASE_RAM_BASE_VALUE_MASK 0x000001ff
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#define BG_INSTR_INTER_LEVEL_RAM_BASE_RAM_BASE_VALUE_ALIGN 0
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#define BG_INSTR_INTER_LEVEL_RAM_BASE_RAM_BASE_VALUE_BITS 9
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#define BG_INSTR_INTER_LEVEL_RAM_BASE_RAM_BASE_VALUE_SHIFT 0
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/***************************************************************************
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*INTRA_LAST_LEVEL_RAM_BASE - INTRA LAST LEVEL RAM BASE
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***************************************************************************/
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/* BG_INSTR :: INTRA_LAST_LEVEL_RAM_BASE :: reserved0 [31:09] */
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#define BG_INSTR_INTRA_LAST_LEVEL_RAM_BASE_reserved0_MASK 0xfffffe00
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#define BG_INSTR_INTRA_LAST_LEVEL_RAM_BASE_reserved0_ALIGN 0
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#define BG_INSTR_INTRA_LAST_LEVEL_RAM_BASE_reserved0_BITS 23
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#define BG_INSTR_INTRA_LAST_LEVEL_RAM_BASE_reserved0_SHIFT 9
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/* BG_INSTR :: INTRA_LAST_LEVEL_RAM_BASE :: RAM_BASE_VALUE [08:00] */
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#define BG_INSTR_INTRA_LAST_LEVEL_RAM_BASE_RAM_BASE_VALUE_MASK 0x000001ff
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#define BG_INSTR_INTRA_LAST_LEVEL_RAM_BASE_RAM_BASE_VALUE_ALIGN 0
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#define BG_INSTR_INTRA_LAST_LEVEL_RAM_BASE_RAM_BASE_VALUE_BITS 9
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#define BG_INSTR_INTRA_LAST_LEVEL_RAM_BASE_RAM_BASE_VALUE_SHIFT 0
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/***************************************************************************
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*INTER_LAST_LEVEL_RAM_BASE - INTER LAST LEVEL RAM BASE
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***************************************************************************/
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/* BG_INSTR :: INTER_LAST_LEVEL_RAM_BASE :: reserved0 [31:09] */
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#define BG_INSTR_INTER_LAST_LEVEL_RAM_BASE_reserved0_MASK 0xfffffe00
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#define BG_INSTR_INTER_LAST_LEVEL_RAM_BASE_reserved0_ALIGN 0
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#define BG_INSTR_INTER_LAST_LEVEL_RAM_BASE_reserved0_BITS 23
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#define BG_INSTR_INTER_LAST_LEVEL_RAM_BASE_reserved0_SHIFT 9
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/* BG_INSTR :: INTER_LAST_LEVEL_RAM_BASE :: RAM_BASE_VALUE [08:00] */
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#define BG_INSTR_INTER_LAST_LEVEL_RAM_BASE_RAM_BASE_VALUE_MASK 0x000001ff
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#define BG_INSTR_INTER_LAST_LEVEL_RAM_BASE_RAM_BASE_VALUE_ALIGN 0
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#define BG_INSTR_INTER_LAST_LEVEL_RAM_BASE_RAM_BASE_VALUE_BITS 9
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#define BG_INSTR_INTER_LAST_LEVEL_RAM_BASE_RAM_BASE_VALUE_SHIFT 0
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/***************************************************************************
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*LAST_AC_LEVEL - LAST AC LEVEL
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***************************************************************************/
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/* BG_INSTR :: LAST_AC_LEVEL :: reserved0 [31:07] */
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#define BG_INSTR_LAST_AC_LEVEL_reserved0_MASK 0xffffff80
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#define BG_INSTR_LAST_AC_LEVEL_reserved0_ALIGN 0
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#define BG_INSTR_LAST_AC_LEVEL_reserved0_BITS 25
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#define BG_INSTR_LAST_AC_LEVEL_reserved0_SHIFT 7
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/* BG_INSTR :: LAST_AC_LEVEL :: LAST_AC_LEVEL [06:00] */
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#define BG_INSTR_LAST_AC_LEVEL_LAST_AC_LEVEL_MASK 0x0000007f
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#define BG_INSTR_LAST_AC_LEVEL_LAST_AC_LEVEL_ALIGN 0
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#define BG_INSTR_LAST_AC_LEVEL_LAST_AC_LEVEL_BITS 7
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#define BG_INSTR_LAST_AC_LEVEL_LAST_AC_LEVEL_SHIFT 0
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/***************************************************************************
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*DSP_STOP_ADDR - DSP STOP ADDRESS
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***************************************************************************/
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/* BG_INSTR :: DSP_STOP_ADDR :: reserved0 [31:07] */
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#define BG_INSTR_DSP_STOP_ADDR_reserved0_MASK 0xffffff80
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#define BG_INSTR_DSP_STOP_ADDR_reserved0_ALIGN 0
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#define BG_INSTR_DSP_STOP_ADDR_reserved0_BITS 25
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#define BG_INSTR_DSP_STOP_ADDR_reserved0_SHIFT 7
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/* BG_INSTR :: DSP_STOP_ADDR :: DSP_STOP_ADDR [06:00] */
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#define BG_INSTR_DSP_STOP_ADDR_DSP_STOP_ADDR_MASK 0x0000007f
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#define BG_INSTR_DSP_STOP_ADDR_DSP_STOP_ADDR_ALIGN 0
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#define BG_INSTR_DSP_STOP_ADDR_DSP_STOP_ADDR_BITS 7
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#define BG_INSTR_DSP_STOP_ADDR_DSP_STOP_ADDR_SHIFT 0
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/***************************************************************************
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*CBP_REG - CBP REG VALUE
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***************************************************************************/
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/* BG_INSTR :: CBP_REG :: reserved0 [31:06] */
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#define BG_INSTR_CBP_REG_reserved0_MASK 0xffffffc0
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#define BG_INSTR_CBP_REG_reserved0_ALIGN 0
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#define BG_INSTR_CBP_REG_reserved0_BITS 26
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#define BG_INSTR_CBP_REG_reserved0_SHIFT 6
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/* BG_INSTR :: CBP_REG :: CBP_REG [05:00] */
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#define BG_INSTR_CBP_REG_CBP_REG_MASK 0x0000003f
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#define BG_INSTR_CBP_REG_CBP_REG_ALIGN 0
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#define BG_INSTR_CBP_REG_CBP_REG_BITS 6
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#define BG_INSTR_CBP_REG_CBP_REG_SHIFT 0
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/***************************************************************************
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*PUTBIT_COUNTER - PUTBIT COUNTER
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***************************************************************************/
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/* BG_INSTR :: PUTBIT_COUNTER :: BIT_COUNTER_VALUE [31:00] */
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#define BG_INSTR_PUTBIT_COUNTER_BIT_COUNTER_VALUE_MASK 0xffffffff
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#define BG_INSTR_PUTBIT_COUNTER_BIT_COUNTER_VALUE_ALIGN 0
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#define BG_INSTR_PUTBIT_COUNTER_BIT_COUNTER_VALUE_BITS 32
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#define BG_INSTR_PUTBIT_COUNTER_BIT_COUNTER_VALUE_SHIFT 0
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/***************************************************************************
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*INIT_COMMAND - INIT COMMAND
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***************************************************************************/
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/* BG_INSTR :: INIT_COMMAND :: reserved0 [31:01] */
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#define BG_INSTR_INIT_COMMAND_reserved0_MASK 0xfffffffe
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#define BG_INSTR_INIT_COMMAND_reserved0_ALIGN 0
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#define BG_INSTR_INIT_COMMAND_reserved0_BITS 31
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#define BG_INSTR_INIT_COMMAND_reserved0_SHIFT 1
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/* BG_INSTR :: INIT_COMMAND :: INIT [00:00] */
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#define BG_INSTR_INIT_COMMAND_INIT_MASK 0x00000001
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#define BG_INSTR_INIT_COMMAND_INIT_ALIGN 0
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#define BG_INSTR_INIT_COMMAND_INIT_BITS 1
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#define BG_INSTR_INIT_COMMAND_INIT_SHIFT 0
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/***************************************************************************
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*OUT_POINTER - READ OUTPOINTER VALUE
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***************************************************************************/
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/* BG_INSTR :: OUT_POINTER :: reserved0 [31:06] */
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#define BG_INSTR_OUT_POINTER_reserved0_MASK 0xffffffc0
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#define BG_INSTR_OUT_POINTER_reserved0_ALIGN 0
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#define BG_INSTR_OUT_POINTER_reserved0_BITS 26
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#define BG_INSTR_OUT_POINTER_reserved0_SHIFT 6
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/* BG_INSTR :: OUT_POINTER :: OUT_POINTER [05:00] */
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#define BG_INSTR_OUT_POINTER_OUT_POINTER_MASK 0x0000003f
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#define BG_INSTR_OUT_POINTER_OUT_POINTER_ALIGN 0
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#define BG_INSTR_OUT_POINTER_OUT_POINTER_BITS 6
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#define BG_INSTR_OUT_POINTER_OUT_POINTER_SHIFT 0
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/***************************************************************************
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*PUTBIT_10 - PUT BIT COMMAND
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***************************************************************************/
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/* BG_INSTR :: PUTBIT_10 :: reserved0 [31:16] */
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#define BG_INSTR_PUTBIT_10_reserved0_MASK 0xffff0000
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#define BG_INSTR_PUTBIT_10_reserved0_ALIGN 0
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#define BG_INSTR_PUTBIT_10_reserved0_BITS 16
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#define BG_INSTR_PUTBIT_10_reserved0_SHIFT 16
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/* BG_INSTR :: PUTBIT_10 :: CLEN [15:10] */
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#define BG_INSTR_PUTBIT_10_CLEN_MASK 0x0000fc00
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#define BG_INSTR_PUTBIT_10_CLEN_ALIGN 0
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#define BG_INSTR_PUTBIT_10_CLEN_BITS 6
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#define BG_INSTR_PUTBIT_10_CLEN_SHIFT 10
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/* BG_INSTR :: PUTBIT_10 :: CWORD [09:00] */
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#define BG_INSTR_PUTBIT_10_CWORD_MASK 0x000003ff
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#define BG_INSTR_PUTBIT_10_CWORD_ALIGN 0
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#define BG_INSTR_PUTBIT_10_CWORD_BITS 10
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#define BG_INSTR_PUTBIT_10_CWORD_SHIFT 0
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/***************************************************************************
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*PUTBIT_16 - PUT BIT COMMAND
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***************************************************************************/
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/* BG_INSTR :: PUTBIT_16 :: reserved0 [31:22] */
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#define BG_INSTR_PUTBIT_16_reserved0_MASK 0xffc00000
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#define BG_INSTR_PUTBIT_16_reserved0_ALIGN 0
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#define BG_INSTR_PUTBIT_16_reserved0_BITS 10
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#define BG_INSTR_PUTBIT_16_reserved0_SHIFT 22
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/* BG_INSTR :: PUTBIT_16 :: CLEN [21:16] */
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#define BG_INSTR_PUTBIT_16_CLEN_MASK 0x003f0000
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#define BG_INSTR_PUTBIT_16_CLEN_ALIGN 0
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#define BG_INSTR_PUTBIT_16_CLEN_BITS 6
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#define BG_INSTR_PUTBIT_16_CLEN_SHIFT 16
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/* BG_INSTR :: PUTBIT_16 :: CWORD [15:00] */
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#define BG_INSTR_PUTBIT_16_CWORD_MASK 0x0000ffff
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#define BG_INSTR_PUTBIT_16_CWORD_ALIGN 0
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#define BG_INSTR_PUTBIT_16_CWORD_BITS 16
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#define BG_INSTR_PUTBIT_16_CWORD_SHIFT 0
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/***************************************************************************
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*PUTAC - PUT AC
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***************************************************************************/
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/* BG_INSTR :: PUTAC :: reserved0 [31:09] */
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#define BG_INSTR_PUTAC_reserved0_MASK 0xfffffe00
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#define BG_INSTR_PUTAC_reserved0_ALIGN 0
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#define BG_INSTR_PUTAC_reserved0_BITS 23
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#define BG_INSTR_PUTAC_reserved0_SHIFT 9
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/* BG_INSTR :: PUTAC :: DCT_RD_ADDRESS [08:00] */
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#define BG_INSTR_PUTAC_DCT_RD_ADDRESS_MASK 0x000001ff
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#define BG_INSTR_PUTAC_DCT_RD_ADDRESS_ALIGN 0
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#define BG_INSTR_PUTAC_DCT_RD_ADDRESS_BITS 9
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#define BG_INSTR_PUTAC_DCT_RD_ADDRESS_SHIFT 0
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/***************************************************************************
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*EXECSTATUS - EXEC STATUS
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***************************************************************************/
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/* BG_INSTR :: EXECSTATUS :: reserved0 [31:01] */
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#define BG_INSTR_EXECSTATUS_reserved0_MASK 0xfffffffe
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#define BG_INSTR_EXECSTATUS_reserved0_ALIGN 0
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#define BG_INSTR_EXECSTATUS_reserved0_BITS 31
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#define BG_INSTR_EXECSTATUS_reserved0_SHIFT 1
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/* BG_INSTR :: EXECSTATUS :: EXEC_STATUS [00:00] */
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#define BG_INSTR_EXECSTATUS_EXEC_STATUS_MASK 0x00000001
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#define BG_INSTR_EXECSTATUS_EXEC_STATUS_ALIGN 0
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#define BG_INSTR_EXECSTATUS_EXEC_STATUS_BITS 1
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#define BG_INSTR_EXECSTATUS_EXEC_STATUS_SHIFT 0
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/***************************************************************************
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*REVISION_ID - Letter Box Generator Revision register
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***************************************************************************/
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/* BG_INSTR :: REVISION_ID :: reserved0 [31:08] */
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#define BG_INSTR_REVISION_ID_reserved0_MASK 0xffffff00
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#define BG_INSTR_REVISION_ID_reserved0_ALIGN 0
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#define BG_INSTR_REVISION_ID_reserved0_BITS 24
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#define BG_INSTR_REVISION_ID_reserved0_SHIFT 8
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/* BG_INSTR :: REVISION_ID :: MAJOR [07:04] */
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#define BG_INSTR_REVISION_ID_MAJOR_MASK 0x000000f0
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#define BG_INSTR_REVISION_ID_MAJOR_ALIGN 0
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#define BG_INSTR_REVISION_ID_MAJOR_BITS 4
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#define BG_INSTR_REVISION_ID_MAJOR_SHIFT 4
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/* BG_INSTR :: REVISION_ID :: MINOR [03:00] */
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#define BG_INSTR_REVISION_ID_MINOR_MASK 0x0000000f
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#define BG_INSTR_REVISION_ID_MINOR_ALIGN 0
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#define BG_INSTR_REVISION_ID_MINOR_BITS 4
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#define BG_INSTR_REVISION_ID_MINOR_SHIFT 0
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#endif /* #ifndef BCM7043_A0_BG_INSTR_H__ */
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/* End of File */
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