Commit Graph

32 Commits

Author SHA1 Message Date
Wolfgang Spraul
ae2abbe06e NN4 2012-08-04 03:35:54 +02:00
Wolfgang Spraul
5b9da5a1f1 a few more devices 2012-08-03 15:12:25 +02:00
Wolfgang Spraul
328d3934c2 better tools, a bit of logicout wiring 2012-08-03 08:27:05 +02:00
Wolfgang Spraul
e4c9a8f5c7 a little switch infrastructure 2012-08-02 10:58:56 +02:00
Wolfgang Spraul
7148b17d4b cleanup, some more devices 2012-08-02 08:01:46 +02:00
Wolfgang Spraul
eac8090301 wrote pair2net utility to build nets out of connection pairs 2012-08-02 03:45:59 +02:00
Wolfgang Spraul
f76a9a5d52 a few more ports 2012-08-01 08:35:15 +02:00
Wolfgang Spraul
1ba638d597 some bram, macc and logic ports 2012-08-01 05:50:01 +02:00
Wolfgang Spraul
0ebac7068f finished gclk 2012-08-01 04:28:43 +02:00
Wolfgang Spraul
17857de4d2 moving functions around a little 2012-07-31 11:24:30 +02:00
Wolfgang Spraul
76e644bb52 cleanup, fixes, some gclk vertical wiring 2012-07-31 08:53:07 +02:00
Wolfgang Spraul
3f7db4d968 more powerful hashed string array, high-speed search and replace utility
hstrrep
2012-07-29 05:59:59 +02:00
Wolfgang Spraul
f2f5e5e027 working 2012-07-28 13:53:13 +02:00
Wolfgang Spraul
f2a2c5d2b7 wires left and right 2012-07-28 07:42:31 +02:00
Wolfgang Spraul
1dadb4c381 started with global clock wiring 2012-07-27 16:01:34 +02:00
Wolfgang Spraul
904108d50a finished tile positioning cleanup 2012-07-27 09:10:09 +02:00
Wolfgang Spraul
3b9fa11659 tile positioning cleanup p1 2012-07-27 07:45:26 +02:00
Wolfgang Spraul
f7ada88c59 some dcm and pll wiring 2012-07-27 03:31:30 +02:00
Wolfgang Spraul
ae2438cca0 cleanup, wires, new_fp prints static connections 2012-07-26 05:26:27 +02:00
Wolfgang Spraul
9ecc9d7475 first steps in logic wires 2012-07-25 14:01:24 +02:00
Wolfgang Spraul
fd7236242e wires 2012-07-25 11:24:42 +02:00
Wolfgang Spraul
c5098634c4 wires 2012-07-25 10:03:25 +02:00
Wolfgang Spraul
7266c64eca modeling 2012-07-25 08:00:19 +02:00
Wolfgang Spraul
f8d1911cd2 wires 1.1% 2012-07-25 04:58:40 +02:00
Wolfgang Spraul
c9718d0372 wires 2012-07-25 03:03:23 +02:00
Wolfgang Spraul
44cd3b0b7f wires 2012-07-24 15:38:01 +02:00
Wolfgang Spraul
7f74817e78 modeling wires, about 0.7% of them done 2012-07-24 05:49:14 +02:00
Wolfgang Spraul
325c31920b another small wire segment modeled 2012-07-24 03:57:11 +02:00
Wolfgang Spraul
a17588fac5 modeled first line - NN2 2012-07-23 10:34:28 +02:00
Wolfgang Spraul
b4ad7801b0 minor model cleanup 2012-07-21 06:04:08 +02:00
Wolfgang Spraul
970eb4eee9 added simple hashed string array for tile and wire names 2012-07-19 17:29:25 +02:00
Wolfgang Spraul
d1e8d5f557 moved model into separate file so multiple utils can use it 2012-07-17 10:58:07 +02:00